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charset="utf-8" As per [1], we need one "use" item per line, in order to reduce merge conflicts. Furthermore, we need a trailing ", //" in order to tell rustfmt(1) to leave it alone. This does that for the entire nova-core driver. [1] https://docs.kernel.org/rust/coding-guidelines.html#imports Signed-off-by: John Hubbard Acked-by: Danilo Krummrich --- Tested on Ampere: GA104 (bare metal). thanks, John Hubbard drivers/gpu/nova-core/dma.rs | 17 +++++--- drivers/gpu/nova-core/driver.rs | 11 +++-- drivers/gpu/nova-core/falcon.rs | 34 +++++++++------ drivers/gpu/nova-core/falcon/gsp.rs | 12 +++++- drivers/gpu/nova-core/falcon/hal.rs | 12 ++++-- drivers/gpu/nova-core/falcon/hal/ga102.rs | 26 ++++++++---- drivers/gpu/nova-core/falcon/sec2.rs | 10 ++++- drivers/gpu/nova-core/fb.rs | 28 +++++++----- drivers/gpu/nova-core/fb/hal.rs | 6 ++- drivers/gpu/nova-core/fb/hal/ga100.rs | 12 +++--- drivers/gpu/nova-core/fb/hal/ga102.rs | 8 ++-- drivers/gpu/nova-core/fb/hal/tu102.rs | 9 ++-- drivers/gpu/nova-core/firmware.rs | 30 +++++++------ drivers/gpu/nova-core/firmware/booter.rs | 46 ++++++++++++++------ drivers/gpu/nova-core/firmware/fwsec.rs | 52 +++++++++++++++++------ drivers/gpu/nova-core/firmware/gsp.rs | 33 +++++++++----- drivers/gpu/nova-core/firmware/riscv.rs | 16 ++++--- drivers/gpu/nova-core/gfw.rs | 14 +++--- drivers/gpu/nova-core/gpu.rs | 30 +++++++++---- drivers/gpu/nova-core/gsp/boot.rs | 44 ++++++++++++------- drivers/gpu/nova-core/regs.rs | 24 ++++++++--- drivers/gpu/nova-core/vbios.rs | 29 +++++++++---- 22 files changed, 344 insertions(+), 159 deletions(-) diff --git a/drivers/gpu/nova-core/dma.rs b/drivers/gpu/nova-core/dma.rs index 94f44bcfd748..5b117aefdb15 100644 --- a/drivers/gpu/nova-core/dma.rs +++ b/drivers/gpu/nova-core/dma.rs @@ -2,12 +2,17 @@ =20 //! Simple DMA object wrapper. =20 -use core::ops::{Deref, DerefMut}; - -use kernel::device; -use kernel::dma::CoherentAllocation; -use kernel::page::PAGE_SIZE; -use kernel::prelude::*; +use core::ops::{ + Deref, + DerefMut, // +}; + +use kernel::{ + device, + dma::CoherentAllocation, + page::PAGE_SIZE, + prelude::*, // +}; =20 pub(crate) struct DmaObject { dma: CoherentAllocation, diff --git a/drivers/gpu/nova-core/driver.rs b/drivers/gpu/nova-core/driver= .rs index edc72052e27a..2509f75eccb9 100644 --- a/drivers/gpu/nova-core/driver.rs +++ b/drivers/gpu/nova-core/driver.rs @@ -1,13 +1,18 @@ // SPDX-License-Identifier: GPL-2.0 =20 use kernel::{ - auxiliary, c_str, + auxiliary, + c_str, device::Core, pci, - pci::{Class, ClassMask, Vendor}, + pci::{ + Class, + ClassMask, + Vendor, // + }, prelude::*, sizes::SZ_16M, - sync::Arc, + sync::Arc, // }; =20 use crate::gpu::Gpu; diff --git a/drivers/gpu/nova-core/falcon.rs b/drivers/gpu/nova-core/falcon= .rs index fb3561cc9746..9d46dc3f8c5e 100644 --- a/drivers/gpu/nova-core/falcon.rs +++ b/drivers/gpu/nova-core/falcon.rs @@ -3,20 +3,28 @@ //! Falcon microprocessor base support =20 use core::ops::Deref; + use hal::FalconHal; -use kernel::device; -use kernel::dma::DmaAddress; -use kernel::io::poll::read_poll_timeout; -use kernel::prelude::*; -use kernel::sync::aref::ARef; -use kernel::time::delay::fsleep; -use kernel::time::Delta; - -use crate::dma::DmaObject; -use crate::driver::Bar0; -use crate::gpu::Chipset; -use crate::regs; -use crate::regs::macros::RegisterBase; + +use kernel::{ + device, + dma::DmaAddress, + io::poll::read_poll_timeout, + prelude::*, + sync::aref::ARef, + time::{ + delay::fsleep, + Delta, // + }, // +}; + +use crate::{ + dma::DmaObject, + driver::Bar0, + gpu::Chipset, + regs, + regs::macros::RegisterBase, // +}; =20 pub(crate) mod gsp; mod hal; diff --git a/drivers/gpu/nova-core/falcon/gsp.rs b/drivers/gpu/nova-core/fa= lcon/gsp.rs index f17599cb49fa..12a6dee0f29e 100644 --- a/drivers/gpu/nova-core/falcon/gsp.rs +++ b/drivers/gpu/nova-core/falcon/gsp.rs @@ -2,8 +2,16 @@ =20 use crate::{ driver::Bar0, - falcon::{Falcon, FalconEngine, PFalcon2Base, PFalconBase}, - regs::{self, macros::RegisterBase}, + falcon::{ + Falcon, + FalconEngine, + PFalcon2Base, + PFalconBase, // + }, + regs::{ + self, + macros::RegisterBase, // + }, // }; =20 /// Type specifying the `Gsp` falcon engine. Cannot be instantiated. diff --git a/drivers/gpu/nova-core/falcon/hal.rs b/drivers/gpu/nova-core/fa= lcon/hal.rs index c6c71db1bb70..a8c8ae5ee323 100644 --- a/drivers/gpu/nova-core/falcon/hal.rs +++ b/drivers/gpu/nova-core/falcon/hal.rs @@ -2,9 +2,15 @@ =20 use kernel::prelude::*; =20 -use crate::driver::Bar0; -use crate::falcon::{Falcon, FalconBromParams, FalconEngine}; -use crate::gpu::Chipset; +use crate::{ + driver::Bar0, + falcon::{ + Falcon, + FalconBromParams, + FalconEngine, // + }, + gpu::Chipset, // +}; =20 mod ga102; =20 diff --git a/drivers/gpu/nova-core/falcon/hal/ga102.rs b/drivers/gpu/nova-c= ore/falcon/hal/ga102.rs index afed353b24d2..1c63e2bd4621 100644 --- a/drivers/gpu/nova-core/falcon/hal/ga102.rs +++ b/drivers/gpu/nova-core/falcon/hal/ga102.rs @@ -2,16 +2,24 @@ =20 use core::marker::PhantomData; =20 -use kernel::device; -use kernel::io::poll::read_poll_timeout; -use kernel::prelude::*; -use kernel::time::Delta; - -use crate::driver::Bar0; -use crate::falcon::{ - Falcon, FalconBromParams, FalconEngine, FalconModSelAlgo, PeregrineCor= eSelect, +use kernel::{ + device, + io::poll::read_poll_timeout, + prelude::*, + time::Delta, // +}; + +use crate::{ + driver::Bar0, + falcon::{ + Falcon, + FalconBromParams, + FalconEngine, + FalconModSelAlgo, + PeregrineCoreSelect, // + }, + regs, // }; -use crate::regs; =20 use super::FalconHal; =20 diff --git a/drivers/gpu/nova-core/falcon/sec2.rs b/drivers/gpu/nova-core/f= alcon/sec2.rs index 815786c8480d..ab1195a758f5 100644 --- a/drivers/gpu/nova-core/falcon/sec2.rs +++ b/drivers/gpu/nova-core/falcon/sec2.rs @@ -1,7 +1,13 @@ // SPDX-License-Identifier: GPL-2.0 =20 -use crate::falcon::{FalconEngine, PFalcon2Base, PFalconBase}; -use crate::regs::macros::RegisterBase; +use crate::{ + falcon::{ + FalconEngine, + PFalcon2Base, + PFalconBase, // + }, + regs::macros::RegisterBase, // +}; =20 /// Type specifying the `Sec2` falcon engine. Cannot be instantiated. pub(crate) struct Sec2(()); diff --git a/drivers/gpu/nova-core/fb.rs b/drivers/gpu/nova-core/fb.rs index 27d9edab8347..53e718510568 100644 --- a/drivers/gpu/nova-core/fb.rs +++ b/drivers/gpu/nova-core/fb.rs @@ -2,16 +2,24 @@ =20 use core::ops::Range; =20 -use kernel::prelude::*; -use kernel::ptr::{Alignable, Alignment}; -use kernel::sizes::*; -use kernel::sync::aref::ARef; -use kernel::{dev_warn, device}; - -use crate::dma::DmaObject; -use crate::driver::Bar0; -use crate::gpu::Chipset; -use crate::regs; +use kernel::{ + dev_warn, + device, + prelude::*, + ptr::{ + Alignable, + Alignment, // + }, + sizes::*, + sync::aref::ARef, // +}; + +use crate::{ + dma::DmaObject, + driver::Bar0, + gpu::Chipset, + regs, // +}; =20 mod hal; =20 diff --git a/drivers/gpu/nova-core/fb/hal.rs b/drivers/gpu/nova-core/fb/hal= .rs index 2f914948bb9a..aba0abd8ee00 100644 --- a/drivers/gpu/nova-core/fb/hal.rs +++ b/drivers/gpu/nova-core/fb/hal.rs @@ -2,8 +2,10 @@ =20 use kernel::prelude::*; =20 -use crate::driver::Bar0; -use crate::gpu::Chipset; +use crate::{ + driver::Bar0, + gpu::Chipset, // +}; =20 mod ga100; mod ga102; diff --git a/drivers/gpu/nova-core/fb/hal/ga100.rs b/drivers/gpu/nova-core/= fb/hal/ga100.rs index 871c42bf033a..dae392c38a1b 100644 --- a/drivers/gpu/nova-core/fb/hal/ga100.rs +++ b/drivers/gpu/nova-core/fb/hal/ga100.rs @@ -1,15 +1,17 @@ // SPDX-License-Identifier: GPL-2.0 =20 -struct Ga100; - use kernel::prelude::*; =20 -use crate::driver::Bar0; -use crate::fb::hal::FbHal; -use crate::regs; +use crate::{ + driver::Bar0, + fb::hal::FbHal, + regs, // +}; =20 use super::tu102::FLUSH_SYSMEM_ADDR_SHIFT; =20 +struct Ga100; + pub(super) fn read_sysmem_flush_page_ga100(bar: &Bar0) -> u64 { u64::from(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR::read(bar).adr_39_08()) = << FLUSH_SYSMEM_ADDR_SHIFT | u64::from(regs::NV_PFB_NISO_FLUSH_SYSMEM_ADDR_HI::read(bar).adr_= 63_40()) diff --git a/drivers/gpu/nova-core/fb/hal/ga102.rs b/drivers/gpu/nova-core/= fb/hal/ga102.rs index a73b77e39715..734605905031 100644 --- a/drivers/gpu/nova-core/fb/hal/ga102.rs +++ b/drivers/gpu/nova-core/fb/hal/ga102.rs @@ -2,9 +2,11 @@ =20 use kernel::prelude::*; =20 -use crate::driver::Bar0; -use crate::fb::hal::FbHal; -use crate::regs; +use crate::{ + driver::Bar0, + fb::hal::FbHal, + regs, // +}; =20 fn vidmem_size_ga102(bar: &Bar0) -> u64 { regs::NV_USABLE_FB_SIZE_IN_MB::read(bar).usable_fb_size() diff --git a/drivers/gpu/nova-core/fb/hal/tu102.rs b/drivers/gpu/nova-core/= fb/hal/tu102.rs index 32114c3b3686..eec984f4e816 100644 --- a/drivers/gpu/nova-core/fb/hal/tu102.rs +++ b/drivers/gpu/nova-core/fb/hal/tu102.rs @@ -1,10 +1,13 @@ // SPDX-License-Identifier: GPL-2.0 =20 -use crate::driver::Bar0; -use crate::fb::hal::FbHal; -use crate::regs; use kernel::prelude::*; =20 +use crate::{ + driver::Bar0, + fb::hal::FbHal, + regs, // +}; + /// Shift applied to the sysmem address before it is written into `NV_PFB_= NISO_FLUSH_SYSMEM_ADDR`, /// to be used by HALs. pub(super) const FLUSH_SYSMEM_ADDR_SHIFT: u32 =3D 8; diff --git a/drivers/gpu/nova-core/firmware.rs b/drivers/gpu/nova-core/firm= ware.rs index 4179a74a2342..895309132ae0 100644 --- a/drivers/gpu/nova-core/firmware.rs +++ b/drivers/gpu/nova-core/firmware.rs @@ -3,18 +3,24 @@ //! Contains structures and functions dedicated to the parsing, building a= nd patching of firmwares //! to be loaded into a given execution unit. =20 -use core::marker::PhantomData; -use core::mem::size_of; - -use kernel::device; -use kernel::firmware; -use kernel::prelude::*; -use kernel::str::CString; -use kernel::transmute::FromBytes; - -use crate::dma::DmaObject; -use crate::falcon::FalconFirmware; -use crate::gpu; +use core::{ + marker::PhantomData, + mem::size_of, // +}; + +use kernel::{ + device, + firmware, + prelude::*, + str::CString, + transmute::FromBytes, // +}; + +use crate::{ + dma::DmaObject, + falcon::FalconFirmware, + gpu, // +}; =20 pub(crate) mod booter; pub(crate) mod fwsec; diff --git a/drivers/gpu/nova-core/firmware/booter.rs b/drivers/gpu/nova-co= re/firmware/booter.rs index b4ff1b17e4a0..4d2a6502a879 100644 --- a/drivers/gpu/nova-core/firmware/booter.rs +++ b/drivers/gpu/nova-core/firmware/booter.rs @@ -4,20 +4,38 @@ //! running on [`Sec2`], that is used on Turing/Ampere to load the GSP fir= mware into the GSP falcon //! (and optionally unload it through a separate firmware image). =20 -use core::marker::PhantomData; -use core::mem::size_of; -use core::ops::Deref; - -use kernel::device; -use kernel::prelude::*; -use kernel::transmute::FromBytes; - -use crate::dma::DmaObject; -use crate::driver::Bar0; -use crate::falcon::sec2::Sec2; -use crate::falcon::{Falcon, FalconBromParams, FalconFirmware, FalconLoadPa= rams, FalconLoadTarget}; -use crate::firmware::{BinFirmware, FirmwareDmaObject, FirmwareSignature, S= igned, Unsigned}; -use crate::gpu::Chipset; +use core::{ + marker::PhantomData, + mem::size_of, + ops::Deref, // +}; + +use kernel::{ + device, + prelude::*, + transmute::FromBytes, // +}; + +use crate::{ + dma::DmaObject, + driver::Bar0, + falcon::{ + sec2::Sec2, + Falcon, + FalconBromParams, + FalconFirmware, + FalconLoadParams, + FalconLoadTarget, // + }, + firmware::{ + BinFirmware, + FirmwareDmaObject, + FirmwareSignature, + Signed, + Unsigned, // + }, + gpu::Chipset, // +}; =20 /// Local convenience function to return a copy of `S` by reinterpreting t= he bytes starting at /// `offset` in `slice`. diff --git a/drivers/gpu/nova-core/firmware/fwsec.rs b/drivers/gpu/nova-cor= e/firmware/fwsec.rs index ce78c1563754..ae3ae72f74d9 100644 --- a/drivers/gpu/nova-core/firmware/fwsec.rs +++ b/drivers/gpu/nova-core/firmware/fwsec.rs @@ -10,20 +10,44 @@ //! - The command to be run, as this firmware can perform several tasks ; //! - The ucode signature, so the GSP falcon can run FWSEC in HS mode. =20 -use core::marker::PhantomData; -use core::mem::{align_of, size_of}; -use core::ops::Deref; - -use kernel::device::{self, Device}; -use kernel::prelude::*; -use kernel::transmute::FromBytes; - -use crate::dma::DmaObject; -use crate::driver::Bar0; -use crate::falcon::gsp::Gsp; -use crate::falcon::{Falcon, FalconBromParams, FalconFirmware, FalconLoadPa= rams, FalconLoadTarget}; -use crate::firmware::{FalconUCodeDescV3, FirmwareDmaObject, FirmwareSignat= ure, Signed, Unsigned}; -use crate::vbios::Vbios; +use core::{ + marker::PhantomData, + mem::{ + align_of, + size_of, // + }, + ops::Deref, // +}; + +use kernel::{ + device::{ + self, + Device, // + }, + prelude::*, + transmute::FromBytes, // +}; + +use crate::{ + dma::DmaObject, + driver::Bar0, + falcon::{ + gsp::Gsp, + Falcon, + FalconBromParams, + FalconFirmware, + FalconLoadParams, + FalconLoadTarget, // + }, + firmware::{ + FalconUCodeDescV3, + FirmwareDmaObject, + FirmwareSignature, + Signed, + Unsigned, // + }, + vbios::Vbios, // +}; =20 const NVFW_FALCON_APPIF_ID_DMEMMAPPER: u32 =3D 0x4; =20 diff --git a/drivers/gpu/nova-core/firmware/gsp.rs b/drivers/gpu/nova-core/= firmware/gsp.rs index 24c3ea698940..c5175434f6e4 100644 --- a/drivers/gpu/nova-core/firmware/gsp.rs +++ b/drivers/gpu/nova-core/firmware/gsp.rs @@ -2,16 +2,29 @@ =20 use core::mem::size_of_val; =20 -use kernel::device; -use kernel::dma::{DataDirection, DmaAddress}; -use kernel::kvec; -use kernel::prelude::*; -use kernel::scatterlist::{Owned, SGTable}; - -use crate::dma::DmaObject; -use crate::firmware::riscv::RiscvFirmware; -use crate::gpu::{Architecture, Chipset}; -use crate::gsp::GSP_PAGE_SIZE; +use kernel::{ + device, + dma::{ + DataDirection, + DmaAddress, // + }, + kvec, + prelude::*, + scatterlist::{ + Owned, + SGTable, // + }, // +}; + +use crate::{ + dma::DmaObject, + firmware::riscv::RiscvFirmware, + gpu::{ + Architecture, + Chipset, // + }, + gsp::GSP_PAGE_SIZE, // +}; =20 /// Ad-hoc and temporary module to extract sections from ELF images. /// diff --git a/drivers/gpu/nova-core/firmware/riscv.rs b/drivers/gpu/nova-cor= e/firmware/riscv.rs index afb08f5bc4ba..196dedb96aeb 100644 --- a/drivers/gpu/nova-core/firmware/riscv.rs +++ b/drivers/gpu/nova-core/firmware/riscv.rs @@ -5,13 +5,17 @@ =20 use core::mem::size_of; =20 -use kernel::device; -use kernel::firmware::Firmware; -use kernel::prelude::*; -use kernel::transmute::FromBytes; +use kernel::{ + device, + firmware::Firmware, + prelude::*, + transmute::FromBytes, // +}; =20 -use crate::dma::DmaObject; -use crate::firmware::BinFirmware; +use crate::{ + dma::DmaObject, + firmware::BinFirmware, // +}; =20 /// Descriptor for microcode running on a RISC-V core. #[repr(C)] diff --git a/drivers/gpu/nova-core/gfw.rs b/drivers/gpu/nova-core/gfw.rs index 23c28c2a3793..9121f400046d 100644 --- a/drivers/gpu/nova-core/gfw.rs +++ b/drivers/gpu/nova-core/gfw.rs @@ -18,12 +18,16 @@ //! //! Note that the devinit sequence also needs to run during suspend/resume. =20 -use kernel::io::poll::read_poll_timeout; -use kernel::prelude::*; -use kernel::time::Delta; +use kernel::{ + io::poll::read_poll_timeout, + prelude::*, + time::Delta, // +}; =20 -use crate::driver::Bar0; -use crate::regs; +use crate::{ + driver::Bar0, + regs, // +}; =20 /// Wait for the `GFW` (GPU firmware) boot completion signal (`GFW_BOOT`),= or a 4 seconds timeout. /// diff --git a/drivers/gpu/nova-core/gpu.rs b/drivers/gpu/nova-core/gpu.rs index 9d182bffe8b4..de87efaf09f1 100644 --- a/drivers/gpu/nova-core/gpu.rs +++ b/drivers/gpu/nova-core/gpu.rs @@ -1,13 +1,27 @@ // SPDX-License-Identifier: GPL-2.0 =20 -use kernel::{device, devres::Devres, error::code::*, fmt, pci, prelude::*,= sync::Arc}; - -use crate::driver::Bar0; -use crate::falcon::{gsp::Gsp as GspFalcon, sec2::Sec2 as Sec2Falcon, Falco= n}; -use crate::fb::SysmemFlush; -use crate::gfw; -use crate::gsp::Gsp; -use crate::regs; +use kernel::{ + device, + devres::Devres, + error::code::*, + fmt, + pci, + prelude::*, + sync::Arc, // +}; + +use crate::{ + driver::Bar0, + falcon::{ + gsp::Gsp as GspFalcon, + sec2::Sec2 as Sec2Falcon, + Falcon, // + }, + fb::SysmemFlush, + gfw, + gsp::Gsp, + regs, // +}; =20 macro_rules! define_chipset { ({ $($variant:ident =3D $value:expr),* $(,)* }) =3D> diff --git a/drivers/gpu/nova-core/gsp/boot.rs b/drivers/gpu/nova-core/gsp/= boot.rs index 2800f3aee37d..0997036b7d1d 100644 --- a/drivers/gpu/nova-core/gsp/boot.rs +++ b/drivers/gpu/nova-core/gsp/boot.rs @@ -1,21 +1,35 @@ // SPDX-License-Identifier: GPL-2.0 =20 -use kernel::device; -use kernel::pci; -use kernel::prelude::*; - -use crate::driver::Bar0; -use crate::falcon::{gsp::Gsp, sec2::Sec2, Falcon}; -use crate::fb::FbLayout; -use crate::firmware::{ - booter::{BooterFirmware, BooterKind}, - fwsec::{FwsecCommand, FwsecFirmware}, - gsp::GspFirmware, - FIRMWARE_VERSION, +use kernel::{ + device, + pci, + prelude::*, // +}; + +use crate::{ + driver::Bar0, + falcon::{ + gsp::Gsp, + sec2::Sec2, + Falcon, // + }, + fb::FbLayout, + firmware::{ + booter::{ + BooterFirmware, + BooterKind, // + }, + fwsec::{ + FwsecCommand, + FwsecFirmware, // + }, + gsp::GspFirmware, + FIRMWARE_VERSION, // + }, + gpu::Chipset, + regs, + vbios::Vbios, // }; -use crate::gpu::Chipset; -use crate::regs; -use crate::vbios::Vbios; =20 impl super::Gsp { /// Helper function to load and run the FWSEC-FRTS firmware and confir= m that it has properly diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs index 206dab2e1335..a080520472a9 100644 --- a/drivers/gpu/nova-core/regs.rs +++ b/drivers/gpu/nova-core/regs.rs @@ -7,13 +7,27 @@ #[macro_use] pub(crate) mod macros; =20 -use crate::falcon::{ - DmaTrfCmdSize, FalconCoreRev, FalconCoreRevSubversion, FalconFbifMemTy= pe, FalconFbifTarget, - FalconModSelAlgo, FalconSecurityModel, PFalcon2Base, PFalconBase, Pere= grineCoreSelect, -}; -use crate::gpu::{Architecture, Chipset}; use kernel::prelude::*; =20 +use crate::{ + falcon::{ + DmaTrfCmdSize, + FalconCoreRev, + FalconCoreRevSubversion, + FalconFbifMemType, + FalconFbifTarget, + FalconModSelAlgo, + FalconSecurityModel, + PFalcon2Base, + PFalconBase, + PeregrineCoreSelect, // + }, + gpu::{ + Architecture, + Chipset, // + }, // +}; + // PMC =20 register!(NV_PMC_BOOT_0 @ 0x00000000, "Basic revision information about th= e GPU" { diff --git a/drivers/gpu/nova-core/vbios.rs b/drivers/gpu/nova-core/vbios.rs index aec9166ffb45..b4711126038b 100644 --- a/drivers/gpu/nova-core/vbios.rs +++ b/drivers/gpu/nova-core/vbios.rs @@ -2,16 +2,27 @@ =20 //! VBIOS extraction and parsing. =20 -use crate::driver::Bar0; -use crate::firmware::fwsec::Bcrt30Rsa3kSignature; -use crate::firmware::FalconUCodeDescV3; use core::convert::TryFrom; -use kernel::device; -use kernel::error::Result; -use kernel::prelude::*; -use kernel::ptr::{Alignable, Alignment}; -use kernel::transmute::FromBytes; -use kernel::types::ARef; + +use kernel::{ + device, + error::Result, + prelude::*, + ptr::{ + Alignable, + Alignment, // + }, + transmute::FromBytes, + types::ARef, // +}; + +use crate::{ + driver::Bar0, + firmware::{ + fwsec::Bcrt30Rsa3kSignature, + FalconUCodeDescV3, // + }, // +}; =20 /// The offset of the VBIOS ROM in the BAR0 space. const ROM_OFFSET: usize =3D 0x300000; base-commit: ade19c5060dfa39b84a9475a4a6b05e2a8a2b3ac --=20 2.51.2