From nobody Fri Dec 19 15:49:49 2025 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ED74C2ED844; Thu, 6 Nov 2025 10:50:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762426209; cv=none; b=JeyRZ9LI/hym+cdteebzzJC/nzKAuu2JvkOzC8J3jeQhjFT49HfXNIyhbwKcaDr5H1zwHwnbclG+zH7WxswCdI7CD/5N30I3Kt3ep8tcRPeZjy3Xluwb3DNEfnzkJZ/wvp/c30WDjU08QdphNucPESv1oGtvMBlIUQFFw894Ow4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762426209; c=relaxed/simple; bh=bMpmDPexMnRmoRfbcwDB/V8xNbFX+SFweSneoAFWRbM=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=GJvbLWhqdmbNQPMoBTR1Tuhl2Xx4OHl/Fo4IHYfxKoAmx3kcj2sl5xtcgwVoR5Z7ECpzNis9E41MiYSILNWsWbPTyb8KQP7iYrUVwcRlA+or0BYHc7LYqCX0iqFBwMwisJoISLj/cl01uESGvqpUiRmpekLSw13r+1DUyVFWtKg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=p9qGzcI1; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="p9qGzcI1" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 1F4044E41569; Thu, 6 Nov 2025 10:50:06 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id E99E76068C; Thu, 6 Nov 2025 10:50:05 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 16ACD11850847; Thu, 6 Nov 2025 11:50:02 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1762426204; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=BCZNjXI9xyk576AAxj2NJhhOCZr9Ja0z36kOvr2HSIQ=; b=p9qGzcI1jdYIGUrbwEudYHO9LS2wAc6nDyHbBu7v8HJdWW4zEZeNvd5eKRwIppQCy0+/pq GfjAdqEMo+vpNKKzbw811p89r4/V5LEGOsSKWJMDoqLXDm1i0eFHNGkXpwEdt//VgstHq/ V2tkgRrJKIeJgJooQeEu8VVmh8Uv50i4AzRLc2wStyUrGDFwD8YTYmdLcRks6DCfBfRUL9 0FLwu+IRFK+VlCJ6MW0YEvk3W8shXJRpSCftSo26iXXtZJ7c61XOJyeeiGsKMP9wqtWjcT F124BY1wveBqpjLgmbOgZV52h3mNDMJ1i2fFeRsRuI03miOhvMBzFxCouid6Cw== From: "Kory Maincent (TI.com)" Date: Thu, 06 Nov 2025 11:49:02 +0100 Subject: [PATCH v2 1/2] mfd: tps65219: Implement LOCK register handling for TPS65214 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251106-fix_tps65219-v2-1-a7d608c4272f@bootlin.com> References: <20251106-fix_tps65219-v2-0-a7d608c4272f@bootlin.com> In-Reply-To: <20251106-fix_tps65219-v2-0-a7d608c4272f@bootlin.com> To: Aaro Koskinen , Andreas Kemnade , Kevin Hilman , Roger Quadros , Tony Lindgren , Lee Jones , Shree Ramamoorthy , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Andrew Davis , Bajjuri Praneeth , Thomas Petazzoni , linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, "Kory Maincent (TI.com)" , stable@vger.kernel.org X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The TPS65214 PMIC variant has a LOCK_REG register that prevents writes to nearly all registers. Implement custom regmap operations that automatically unlock before writes and re-lock afterwards for TPS65214, while leaving other chip variants unaffected. The implementation follows the regmap-i2c design pattern. Cc: Fixes: 7947219ab1a2d ("mfd: tps65219: Add support for TI TPS65214 PMIC") Signed-off-by: Kory Maincent (TI.com) Reviewed-by: Shree Ramamoorthy --- Changes in v2: - Setup a custom regmap_bus only for the TPS65214 instead of checking the chip_id every time reg_write is called. --- drivers/mfd/tps65219.c | 51 ++++++++++++++++++++++++++++++++++++++++= +++- include/linux/mfd/tps65219.h | 2 ++ 2 files changed, 52 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/tps65219.c b/drivers/mfd/tps65219.c index 65a952555218d..7e916a9ce2335 100644 --- a/drivers/mfd/tps65219.c +++ b/drivers/mfd/tps65219.c @@ -473,6 +473,50 @@ static const struct tps65219_chip_data chip_info_table= [] =3D { }, }; =20 +static int tps65214_reg_write(void *context, unsigned int reg, unsigned in= t val) +{ + struct i2c_client *i2c =3D context; + struct tps65219 *tps; + int ret; + + if (val > 0xff || reg > 0xff) + return -EINVAL; + + tps =3D i2c_get_clientdata(i2c); + ret =3D i2c_smbus_write_byte_data(i2c, TPS65214_REG_LOCK, + TPS65214_LOCK_ACCESS_CMD); + if (ret) + return ret; + + ret =3D i2c_smbus_write_byte_data(i2c, reg, val); + if (ret) + return ret; + + return i2c_smbus_write_byte_data(i2c, TPS65214_REG_LOCK, 0); +} + +static int tps65214_reg_read(void *context, unsigned int reg, unsigned int= *val) +{ + struct i2c_client *i2c =3D context; + int ret; + + if (reg > 0xff) + return -EINVAL; + + ret =3D i2c_smbus_read_byte_data(i2c, reg); + if (ret < 0) + return ret; + + *val =3D ret; + + return 0; +} + +static const struct regmap_bus tps65214_regmap_bus =3D { + .reg_write =3D tps65214_reg_write, + .reg_read =3D tps65214_reg_read, +}; + static int tps65219_probe(struct i2c_client *client) { struct tps65219 *tps; @@ -491,7 +535,12 @@ static int tps65219_probe(struct i2c_client *client) chip_id =3D (uintptr_t)i2c_get_match_data(client); pmic =3D &chip_info_table[chip_id]; =20 - tps->regmap =3D devm_regmap_init_i2c(client, &tps65219_regmap_config); + if (chip_id =3D=3D TPS65214) + tps->regmap =3D devm_regmap_init(&client->dev, + &tps65214_regmap_bus, client, + &tps65219_regmap_config); + else + tps->regmap =3D devm_regmap_init_i2c(client, &tps65219_regmap_config); if (IS_ERR(tps->regmap)) { ret =3D PTR_ERR(tps->regmap); dev_err(tps->dev, "Failed to allocate register map: %d\n", ret); diff --git a/include/linux/mfd/tps65219.h b/include/linux/mfd/tps65219.h index 55234e771ba73..198ee319dd1db 100644 --- a/include/linux/mfd/tps65219.h +++ b/include/linux/mfd/tps65219.h @@ -149,6 +149,8 @@ enum pmic_id { #define TPS65215_ENABLE_LDO2_EN_MASK BIT(5) #define TPS65214_ENABLE_LDO1_EN_MASK BIT(5) #define TPS65219_ENABLE_LDO4_EN_MASK BIT(6) +/* Register Lock */ +#define TPS65214_LOCK_ACCESS_CMD 0x5a /* power ON-OFF sequence slot */ #define TPS65219_BUCKS_LDOS_SEQUENCE_OFF_SLOT_MASK GENMASK(3, 0) #define TPS65219_BUCKS_LDOS_SEQUENCE_ON_SLOT_MASK GENMASK(7, 4) --=20 2.43.0 From nobody Fri Dec 19 15:49:49 2025 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1E93D2EFD9B; Thu, 6 Nov 2025 10:50:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762426211; cv=none; b=gBzJfHKK+AdMHKBUigTldAchCXU0N9M9ALlVtoCVrawx1ZGv5DTflpVXTdvnuRg2KbEuszse/c/igB/uUwj1k3mCJJexi4IlyCjg7IaE33h9ntQJkFEGFBtKxj1pokI/pwHpmNTJHwSzbIwrym6FddEqJpaPGrr88b7wARSI5+s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762426211; c=relaxed/simple; bh=8UIsRhUEFzinLUGc744IWvO0O91rZDhgOYbtZ7rTnY8=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ajZfvEi10c19asny+qxlNqOv+wqm126aQ1qKJKczAi+RVY6FuP6gaKGUgzu1hvIB+bWxt6b6rBkU84xWXtQddZWtIEanwgd5tJZE7i1iCKZ3EzruZmKMJme72UUBW4OvyaUHxBDuIjCSNV7/VQDBrx2HqsLZ4biblfzsSI+lrw4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=CdT/M/jw; arc=none smtp.client-ip=185.171.202.116 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="CdT/M/jw" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-04.galae.net (Postfix) with ESMTPS id 5DDD2C0FA88; Thu, 6 Nov 2025 10:49:46 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 6C9CB6068C; Thu, 6 Nov 2025 10:50:07 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 0289411850A0A; Thu, 6 Nov 2025 11:50:04 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1762426206; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=c62G9irREdApF+2GHPJ1kR7br9S2AzEZ2ez6tWbkWpM=; b=CdT/M/jwIeIIynO3JmpdYWf9Syh3sbg2E8K/AI4CiZwGaIt+/SIZtbqhQKFnzYVUrMS6Pg WbOpWAQIJpQtfQJLEexDyFWYbSxu9LpsgqVzoIJFyjLQ/Nkt3p9SOmOvxz8yZEjYo3w/qV oV1WIFDyIaTJMw1twULYNSIAQ166edBwNYyZGY27lx9tg39GYY01ThA4hkCTZOX8Ku1mqw Qp5wJdlgk2jA5aiXfPdYRjwHt0QF8U4x6nkyp0qKG3Ir5nfz1DdexClD83RQfgIEDVrwnV /steLX9mcGXvHcyp+s7UV83pSEm7M2or8sTErQcQATr3387maKZBeW6nP/82NA== From: "Kory Maincent (TI.com)" Date: Thu, 06 Nov 2025 11:49:03 +0100 Subject: [PATCH v2 2/2] ARM: dts: am335x-bonegreen-eco: Enable 1GHz OPP by increasing vdd_mpu voltage Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251106-fix_tps65219-v2-2-a7d608c4272f@bootlin.com> References: <20251106-fix_tps65219-v2-0-a7d608c4272f@bootlin.com> In-Reply-To: <20251106-fix_tps65219-v2-0-a7d608c4272f@bootlin.com> To: Aaro Koskinen , Andreas Kemnade , Kevin Hilman , Roger Quadros , Tony Lindgren , Lee Jones , Shree Ramamoorthy , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Andrew Davis , Bajjuri Praneeth , Thomas Petazzoni , linux-omap@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, "Kory Maincent (TI.com)" X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 The vdd_mpu regulator maximum voltage was previously limited to 1.2985V, which prevented the CPU from reaching the 1GHz operating point. This limitation was put in place because voltage changes were not working correctly, causing the board to stall when attempting higher frequencies. With the recent TPS65219 PMIC driver fixes that properly implement the LOCK register handling, voltage transitions now work reliably. Increase the maximum voltage to 1.3515V to allow the full 1GHz OPP to be used. Signed-off-by: Kory Maincent (TI.com) Reviewed-by: Shree Ramamoorthy --- arch/arm/boot/dts/ti/omap/am335x-bonegreen-eco.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/ti/omap/am335x-bonegreen-eco.dts b/arch/arm/= boot/dts/ti/omap/am335x-bonegreen-eco.dts index d21118cdb6c2c..f00abfdd2cbd4 100644 --- a/arch/arm/boot/dts/ti/omap/am335x-bonegreen-eco.dts +++ b/arch/arm/boot/dts/ti/omap/am335x-bonegreen-eco.dts @@ -63,7 +63,7 @@ regulators { buck1: buck1 { regulator-name =3D "vdd_mpu"; regulator-min-microvolt =3D <925000>; - regulator-max-microvolt =3D <1298500>; + regulator-max-microvolt =3D <1351500>; regulator-boot-on; regulator-always-on; }; --=20 2.43.0