From nobody Fri Dec 19 15:49:53 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 748542E7BD3; Wed, 5 Nov 2025 21:18:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762377524; cv=none; b=ClfEwOUbYhNxAyha+xENcmb5go9BTvKsTJCV9M/AEgsYCZjHdTFw7u/BTI8L8U6MXw9p2JCSyGdQiuC095b4oL4tuYhRp4BlhPikg5P/1VZTrMx8NAftoCD4RdmUmw+zJctRECjk6nXr0ZkWlRGxWTJiuGpmK+cczSqHBmabQ1g= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762377524; c=relaxed/simple; bh=qtE8TxX+bp4mVeKXXycM622mPKaw8qoe/nGz0YEjV0g=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=RPcNb0qKgErbTLQ6FurZbAtTT7ruEmDsRMBb1J3OSPyM1CFYajGzJ4U/UAR0Kea5cVSGohy9oeTE87VWFuiARqVBqx/WqfU7ymnwYGYzH1F7tx+JH6pygQVOcXKZrXTSR+t3GG6Pprz15DD4w/51c3ukCeK2INjAxV4rZFGHaxE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=IaRJcfEJ; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="IaRJcfEJ" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1762377516; bh=qtE8TxX+bp4mVeKXXycM622mPKaw8qoe/nGz0YEjV0g=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=IaRJcfEJJPmuVxfIA0AMonJG0NAIwG2GFs1HcbU8uvXF99pgELvzC5G7nSSRhwUVJ LuwV5lD0JO+6NbQDCg/6824/ru1L/WtPNmPZ9XIv2dmNWRPrG1D+ir8Y18q8GzoaIE qEW8KlPcmRtH5QYv8gEmfKMpqY/vnwuoHhrQxhH/YBZUJn8Mrio3T/yeFVOaa9Kfp/ 3bU7QVAyxxZtxGmkVSf/V0rYQ39sDr5ivWxPxN2ygRhLyKoa/vXN3Zh8b/MbgnaR53 jdmgxlQ8Y7in86CB/YBRRqqqam07WivxiWw5icWmtAT4asEubhTmOpyhAMNyxRoJ/A g3EvDDnrDetBw== Received: from beast.luon.net (unknown [IPv6:2a10:3781:2531::8]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) (Authenticated sender: sjoerd) by bali.collaboradmins.com (Postfix) with ESMTPSA id 4164C17E1500; Wed, 5 Nov 2025 22:18:36 +0100 (CET) Received: by beast.luon.net (Postfix, from userid 1000) id B209C10F352E7; Wed, 05 Nov 2025 22:18:34 +0100 (CET) From: Sjoerd Simons Date: Wed, 05 Nov 2025 22:18:02 +0100 Subject: [PATCH v3 07/13] arm64: dts: mediatek: mt7981b-openwrt-one: Enable PCIe and USB Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251105-openwrt-one-network-v3-7-008e2cab38d1@collabora.com> References: <20251105-openwrt-one-network-v3-0-008e2cab38d1@collabora.com> In-Reply-To: <20251105-openwrt-one-network-v3-0-008e2cab38d1@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Ryder Lee , Jianjun Wang , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Lee Jones , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lorenzo Bianconi , Felix Fietkau Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, netdev@vger.kernel.org, Daniel Golle , Bryan Hinton , Sjoerd Simons X-Mailer: b4 0.14.3 Enable the PCIe controller and USB3 XHCI host on the OpenWrt One board. The USB controller is configured for USB 2.0 only mode, as the shared USB3/PCIe PHY is dedicated to PCIe functionality on this board. Signed-off-by: Sjoerd Simons --- .../boot/dts/mediatek/mt7981b-openwrt-one.dts | 43 ++++++++++++++++++= ++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts b/arch/ar= m64/boot/dts/mediatek/mt7981b-openwrt-one.dts index 2e39e72877301..7382599cfea29 100644 --- a/arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts +++ b/arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts @@ -67,9 +67,40 @@ led-2 { linux,default-trigger =3D "netdev"; }; }; + + reg_3p3v: regulator-3p3v { + compatible =3D "regulator-fixed"; + regulator-name =3D "fixed-3.3V"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + reg_5v: regulator-5v { + compatible =3D "regulator-fixed"; + regulator-name =3D "fixed-5V"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + regulator-boot-on; + regulator-always-on; + }; +}; + +&pcie { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pcie_pins>; + status =3D "okay"; }; =20 &pio { + pcie_pins: pcie-pins { + mux { + function =3D "pcie"; + groups =3D "pcie_pereset"; + }; + }; + pwm_pins: pwm-pins { mux { function =3D "pwm"; @@ -163,3 +194,15 @@ partition@180000 { &uart0 { status =3D "okay"; }; + +&usb_phy { + status =3D "okay"; +}; + +&xhci { + phys =3D <&u2port0 PHY_TYPE_USB2>; + vusb33-supply =3D <®_3p3v>; + vbus-supply =3D <®_5v>; + mediatek,u3p-dis-msk =3D <0x01>; + status =3D "okay"; +}; --=20 2.51.0