From nobody Fri Dec 19 15:49:56 2025 Received: from bali.collaboradmins.com (bali.collaboradmins.com [148.251.105.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB6CC248F73; Wed, 5 Nov 2025 21:18:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.251.105.195 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762377518; cv=none; b=J9borlUMqza8Ix6B0yLHsO1l67vCZv5eq2944mOeevq129rk0QoG7m/1mGufZiInALaUsvuhL2oiUlgV/9suj5wfkSRkd70dQ3WgcspWGOt2E4XGtgm1A4hJFqcd/mOHSI1oJfTVba1YK1jdJN264RVIXCGAFMbEVj8bCzMcljs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762377518; c=relaxed/simple; bh=bArrOhdqiPrD9jwVtY5HEE/53V3p8i0UZ8xJQqCPlD0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=aFIFfHVuBHejyNquFCTQ5NVVpd+XAsPVAtqzJBJ0qM+zA30HpEdccADwtvRnvpy3d7MmDSFUGQFJWcejZ3iF0br5UNpzM4DTFcRHEeh0gOtv0g0juRibDaK/t4/B84CRG2XQnerXbdlkRvw+dWkDh5tJOTa05scMIG8Wz5mv+BU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com; spf=pass smtp.mailfrom=collabora.com; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b=VOReS/tB; arc=none smtp.client-ip=148.251.105.195 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=collabora.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=collabora.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=collabora.com header.i=@collabora.com header.b="VOReS/tB" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1762377515; bh=bArrOhdqiPrD9jwVtY5HEE/53V3p8i0UZ8xJQqCPlD0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=VOReS/tBa/q6ng2Yhr2+/vUP5UB2401ugVhFf+0UORldLzyq+GXymaYL+4TyWBzbq E5iJPmF4FgnRteq2+Zzs4MGmfv6KXhmt2G3qH5ETOCYYTIUARBRY6u25jdHX+O/gMo RQjh+GIR3h/L5Zus48T6qNKpMtJhHs1KZ5A/r+YahUv+BbOSHCEvWT7GIIh/9XOhL7 6WqcFwJl8Xo3y+1LOMSyZZ/b8WZs6XemcZZkphmKBEawG5voNrNc2TjHbEBZ2Imc79 JR7TkSCCYcSdQkGq79iDohJaa4FfGFvVEDfMbGBBWDITlglqViL0jmLc5ieNhvCiXt VgNVVQbZqGcxg== Received: from beast.luon.net (unknown [IPv6:2a10:3781:2531::8]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: sjoerd) by bali.collaboradmins.com (Postfix) with ESMTPSA id E12A417E129C; Wed, 5 Nov 2025 22:18:34 +0100 (CET) Received: by beast.luon.net (Postfix, from userid 1000) id 96B5110F352DD; Wed, 05 Nov 2025 22:18:34 +0100 (CET) From: Sjoerd Simons Date: Wed, 05 Nov 2025 22:17:57 +0100 Subject: [PATCH v3 02/13] arm64: dts: mediatek: mt7981b-openwrt-one: Enable software leds Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251105-openwrt-one-network-v3-2-008e2cab38d1@collabora.com> References: <20251105-openwrt-one-network-v3-0-008e2cab38d1@collabora.com> In-Reply-To: <20251105-openwrt-one-network-v3-0-008e2cab38d1@collabora.com> To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Ryder Lee , Jianjun Wang , Bjorn Helgaas , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Lee Jones , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lorenzo Bianconi , Felix Fietkau Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, netdev@vger.kernel.org, Daniel Golle , Bryan Hinton , Sjoerd Simons X-Mailer: b4 0.14.3 The openwrt has 3 status leds at the front: * red: Used as failsafe led by openwrt * white: Used as boot led by openwrt * green: Used as running/upgrade led by openwrt On the back each RJ45 jack has the typical amber/green leds. For the WAN jack this is hardware controlled by the phy, for LAN these are under software control and enabled by this patch. Signed-off-by: Sjoerd Simons --- V2 -> V3: Move earlier in the patch sequence V1 -> V2: - Improve commit message - Re-order nodes to be alphabetical --- .../boot/dts/mediatek/mt7981b-openwrt-one.dts | 59 ++++++++++++++++++= ++++ arch/arm64/boot/dts/mediatek/mt7981b.dtsi | 2 +- 2 files changed, 60 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts b/arch/ar= m64/boot/dts/mediatek/mt7981b-openwrt-one.dts index 6bb98629f4536..2e39e72877301 100644 --- a/arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts +++ b/arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts @@ -3,6 +3,8 @@ /dts-v1/; =20 #include "mt7981b.dtsi" +#include +#include #include "dt-bindings/pinctrl/mt65xx.h" =20 / { @@ -21,9 +23,60 @@ memory@40000000 { reg =3D <0 0x40000000 0 0x40000000>; device_type =3D "memory"; }; + + pwm-leds { + compatible =3D "pwm-leds"; + + led-0 { + color =3D ; + default-brightness =3D <0>; + function =3D LED_FUNCTION_STATUS; + max-brightness =3D <255>; + pwms =3D <&pwm 0 10000>; + }; + + led-1 { + color =3D ; + default-brightness =3D <0>; + function =3D LED_FUNCTION_STATUS; + max-brightness =3D <255>; + pwms =3D <&pwm 1 10000>; + }; + }; + + gpio-leds { + compatible =3D "gpio-leds"; + + led-0 { + color =3D ; + function =3D LED_FUNCTION_STATUS; + gpios =3D <&pio 9 GPIO_ACTIVE_HIGH>; + }; + + led-1 { + color =3D ; + function =3D LED_FUNCTION_LAN; + gpios =3D <&pio 34 GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "netdev"; + }; + + led-2 { + color =3D ; + function =3D LED_FUNCTION_LAN; + gpios =3D <&pio 35 GPIO_ACTIVE_LOW>; + linux,default-trigger =3D "netdev"; + }; + }; }; =20 &pio { + pwm_pins: pwm-pins { + mux { + function =3D "pwm"; + groups =3D "pwm0_0", "pwm1_1"; + }; + }; + spi2_flash_pins: spi2-pins { mux { function =3D "spi"; @@ -44,6 +97,12 @@ conf-pd { }; }; =20 +&pwm { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pwm_pins>; + status =3D "okay"; +}; + &spi2 { pinctrl-names =3D "default"; pinctrl-0 =3D <&spi2_flash_pins>; diff --git a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi b/arch/arm64/boot/dt= s/mediatek/mt7981b.dtsi index f00e5bf63de35..416096b80770c 100644 --- a/arch/arm64/boot/dts/mediatek/mt7981b.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7981b.dtsi @@ -94,7 +94,7 @@ apmixedsys: clock-controller@1001e000 { #clock-cells =3D <1>; }; =20 - pwm@10048000 { + pwm: pwm@10048000 { compatible =3D "mediatek,mt7981-pwm"; reg =3D <0 0x10048000 0 0x1000>; clocks =3D <&infracfg CLK_INFRA_PWM_STA>, --=20 2.51.0