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Tue, 04 Nov 2025 10:10:13 -0800 (PST) From: Jernej Skrabec To: wens@csie.org Cc: mripard@kernel.org, maarten.lankhorst@linux.intel.com, tzimmermann@suse.de, airlied@gmail.com, simona@ffwll.ch, samuel@sholland.org, dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Jernej Skrabec , Chen-Yu Tsai , Ryan Walklin Subject: [PATCH v2 10/30] drm/sun4i: mixer: Move layer enabling to atomic_update Date: Tue, 4 Nov 2025 19:09:22 +0100 Message-ID: <20251104180942.61538-11-jernej.skrabec@gmail.com> X-Mailer: git-send-email 2.51.2 In-Reply-To: <20251104180942.61538-1-jernej.skrabec@gmail.com> References: <20251104180942.61538-1-jernej.skrabec@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Enable or disable layer only in layer atomic update callback. Doing so will enable having separate layer driver later for DE33. There is no fear that enable bit would be set incorrectly, as all read-modify-write sequences for that register are now eliminated. Reviewed-by: Chen-Yu Tsai Tested-by: Ryan Walklin Signed-off-by: Jernej Skrabec --- Changes in v2: - rewrited commit message drivers/gpu/drm/sun4i/sun8i_mixer.c | 24 ------------------------ drivers/gpu/drm/sun4i/sun8i_ui_layer.c | 13 ++++++++++++- drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 13 ++++++++++++- 3 files changed, 24 insertions(+), 26 deletions(-) diff --git a/drivers/gpu/drm/sun4i/sun8i_mixer.c b/drivers/gpu/drm/sun4i/su= n8i_mixer.c index a3194b71dc6d..1fca05a760b8 100644 --- a/drivers/gpu/drm/sun4i/sun8i_mixer.c +++ b/drivers/gpu/drm/sun4i/sun8i_mixer.c @@ -250,24 +250,6 @@ int sun8i_mixer_drm_format_to_hw(u32 format, u32 *hw_f= ormat) return -EINVAL; } =20 -static void sun8i_layer_enable(struct sun8i_layer *layer, bool enable) -{ - u32 ch_base =3D sun8i_channel_base(layer->mixer, layer->channel); - u32 val, reg, mask; - - if (layer->type =3D=3D SUN8I_LAYER_TYPE_UI) { - val =3D enable ? SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN : 0; - mask =3D SUN8I_MIXER_CHAN_UI_LAYER_ATTR_EN; - reg =3D SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, layer->overlay); - } else { - val =3D enable ? SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN : 0; - mask =3D SUN8I_MIXER_CHAN_VI_LAYER_ATTR_EN; - reg =3D SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, layer->overlay); - } - - regmap_update_bits(layer->mixer->engine.regs, reg, mask, val); -} - static void sun8i_mixer_commit(struct sunxi_engine *engine, struct drm_crtc *crtc, struct drm_atomic_state *state) @@ -304,12 +286,6 @@ static void sun8i_mixer_commit(struct sunxi_engine *en= gine, plane->base.id, layer->channel, layer->overlay, enable, zpos, x, y, w, h); =20 - /* - * We always update the layer enable bit, because it can clear - * spontaneously for unknown reasons. - */ - sun8i_layer_enable(layer, enable); - if (!enable) continue; =20 diff --git a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c b/drivers/gpu/drm/sun4i= /sun8i_ui_layer.c index 8634d2ee613a..9d5d5e0b7e63 100644 --- a/drivers/gpu/drm/sun4i/sun8i_ui_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_ui_layer.c @@ -25,6 +25,15 @@ #include "sun8i_ui_scaler.h" #include "sun8i_vi_scaler.h" =20 +static void sun8i_ui_layer_disable(struct sun8i_mixer *mixer, + int channel, int overlay) +{ + u32 ch_base =3D sun8i_channel_base(mixer, channel); + + regmap_write(mixer->engine.regs, + SUN8I_MIXER_CHAN_UI_LAYER_ATTR(ch_base, overlay), 0); +} + static void sun8i_ui_layer_update_attributes(struct sun8i_mixer *mixer, int channel, int overlay, struct drm_plane *plane) @@ -201,8 +210,10 @@ static void sun8i_ui_layer_atomic_update(struct drm_pl= ane *plane, struct sun8i_layer *layer =3D plane_to_sun8i_layer(plane); struct sun8i_mixer *mixer =3D layer->mixer; =20 - if (!new_state->crtc || !new_state->visible) + if (!new_state->crtc || !new_state->visible) { + sun8i_ui_layer_disable(mixer, layer->channel, layer->overlay); return; + } =20 sun8i_ui_layer_update_attributes(mixer, layer->channel, layer->overlay, plane); diff --git a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c b/drivers/gpu/drm/sun4i= /sun8i_vi_layer.c index dcc4429368d6..727117658c6c 100644 --- a/drivers/gpu/drm/sun4i/sun8i_vi_layer.c +++ b/drivers/gpu/drm/sun4i/sun8i_vi_layer.c @@ -18,6 +18,15 @@ #include "sun8i_vi_layer.h" #include "sun8i_vi_scaler.h" =20 +static void sun8i_vi_layer_disable(struct sun8i_mixer *mixer, + int channel, int overlay) +{ + u32 ch_base =3D sun8i_channel_base(mixer, channel); + + regmap_write(mixer->engine.regs, + SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), 0); +} + static void sun8i_vi_layer_update_attributes(struct sun8i_mixer *mixer, int channel, int overlay, struct drm_plane *plane) @@ -320,8 +329,10 @@ static void sun8i_vi_layer_atomic_update(struct drm_pl= ane *plane, struct sun8i_layer *layer =3D plane_to_sun8i_layer(plane); struct sun8i_mixer *mixer =3D layer->mixer; =20 - if (!new_state->crtc || !new_state->visible) + if (!new_state->crtc || !new_state->visible) { + sun8i_vi_layer_disable(mixer, layer->channel, layer->overlay); return; + } =20 sun8i_vi_layer_update_attributes(mixer, layer->channel, layer->overlay, plane); --=20 2.51.2