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(unknown []) by gzsmtp4 (Coremail) with SMTP id PygvCgDHcqsQLwppjl+qCg--.1966S4; Wed, 05 Nov 2025 00:51:33 +0800 (CST) From: Hans Zhang <18255117159@163.com> To: lpieralisi@kernel.org, kwilczynski@kernel.org, bhelgaas@google.com, helgaas@kernel.org, heiko@sntech.de, mani@kernel.org, yue.wang@Amlogic.com Cc: pali@kernel.org, neil.armstrong@linaro.org, robh@kernel.org, jingoohan1@gmail.com, khilman@baylibre.com, jbrunet@baylibre.com, martin.blumenstingl@googlemail.com, cassel@kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-rockchip@lists.infradead.org, Hans Zhang <18255117159@163.com> Subject: [PATCH v6 2/2] PCI: dwc: Remove redundant MPS configuration Date: Wed, 5 Nov 2025 00:51:25 +0800 Message-Id: <20251104165125.174168-3-18255117159@163.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251104165125.174168-1-18255117159@163.com> References: <20251104165125.174168-1-18255117159@163.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: PygvCgDHcqsQLwppjl+qCg--.1966S4 X-Coremail-Antispam: 1Uf129KBjvJXoW7KF4xuw4xXFWDJw43WF4xtFb_yoW8Cr1fpF y3WrsakF18Ar45WF4qkan5Cay3tasxCry7JF9Ig34fZFyayFsrJa4ayFWFka4xWrW293WS kr98K3y8A3W5trUanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x0pEeOJbUUUUU= X-CM-SenderInfo: rpryjkyvrrlimvzbiqqrwthudrp/1tbiFQH7o2kKLUUm0AABsw Content-Type: text/plain; charset="utf-8" The Meson PCIe controller driver manually configures maximum payload size (MPS) through meson_set_max_payload, duplicating functionality now centralized in the PCI core. Deprecating redundant code simplifies the driver and aligns it with the consolidated MPS management strategy, improving long-term maintainability. Signed-off-by: Hans Zhang <18255117159@163.com> --- drivers/pci/controller/dwc/pci-meson.c | 17 ----------------- 1 file changed, 17 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-meson.c b/drivers/pci/controlle= r/dwc/pci-meson.c index 787469d1b396..3d12e1a9bb0c 100644 --- a/drivers/pci/controller/dwc/pci-meson.c +++ b/drivers/pci/controller/dwc/pci-meson.c @@ -261,22 +261,6 @@ static int meson_size_to_payload(struct meson_pcie *mp= , int size) return fls(size) - 8; } =20 -static void meson_set_max_payload(struct meson_pcie *mp, int size) -{ - struct dw_pcie *pci =3D &mp->pci; - u32 val; - u16 offset =3D dw_pcie_find_capability(pci, PCI_CAP_ID_EXP); - int max_payload_size =3D meson_size_to_payload(mp, size); - - val =3D dw_pcie_readl_dbi(pci, offset + PCI_EXP_DEVCTL); - val &=3D ~PCI_EXP_DEVCTL_PAYLOAD; - dw_pcie_writel_dbi(pci, offset + PCI_EXP_DEVCTL, val); - - val =3D dw_pcie_readl_dbi(pci, offset + PCI_EXP_DEVCTL); - val |=3D PCIE_CAP_MAX_PAYLOAD_SIZE(max_payload_size); - dw_pcie_writel_dbi(pci, offset + PCI_EXP_DEVCTL, val); -} - static void meson_set_max_rd_req_size(struct meson_pcie *mp, int size) { struct dw_pcie *pci =3D &mp->pci; @@ -381,7 +365,6 @@ static int meson_pcie_host_init(struct dw_pcie_rp *pp) =20 pp->bridge->ops =3D &meson_pci_ops; =20 - meson_set_max_payload(mp, MAX_PAYLOAD_SIZE); meson_set_max_rd_req_size(mp, MAX_READ_REQ_SIZE); =20 return 0; --=20 2.34.1