From nobody Wed Dec 17 10:46:14 2025 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C812F31329D; Tue, 4 Nov 2025 09:12:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.7 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762247564; cv=none; b=bBVHPPlW9WE680aNV3UOExR8kE7ZebsvuOT7XMyzHkbImMc+ERHhtUEzLu5pAg7pb5plyXeIv3BasvfbIJBqs3TIeHGucWdsZ8QcGMUrMnC0IDlBQ3hM2iaxyLuqPDoW19AqBkbgkJEZrIjVSLV8P0MWVKZlqy76m3jnrEegyjw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762247564; c=relaxed/simple; bh=hcUM15fRJGMKAEAHFUE5/pmeQmEhBmfG4TIDV4Z0wWE=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=rC01iT7OkqR3/0D1lFvuln8jxf8WC0Nicq3udvf5Q/rZDxw7pgsO4oXhI7xfUGLUL1hXRrg9CAnoUk4rk386i5s9VdvrOg0jKokjjrssO93ur+Z1SpwxfFyiYm0hTexFkuyR/jw9/ci5smXLxtcnV4FJdglBVlAJER5/+P897us= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=LTW5gzTx; arc=none smtp.client-ip=192.198.163.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="LTW5gzTx" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1762247562; x=1793783562; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=hcUM15fRJGMKAEAHFUE5/pmeQmEhBmfG4TIDV4Z0wWE=; b=LTW5gzTxpQx+04/WNYxC/bTWeKNGOiDQIGMHFy6vo9FauJR7TzpFA583 6IDeiWLpew6jdsBoemcaLK5UF8E8Uoyb4M6+AsFN57vE5pqb2sW03vdlz zPXzkqe7amCSodF3ki/BhfFlxfLRTWZ9pmOh6WuS0TcsBzd+isgwJKaOM WjaeFurJ75Vq9c3K0jrcDcLBx9wdYTt11KVNAqNoC7wWhlwv1bmxnEA0L hnr1pbMEebuHgQq2f41LakFkIL6DdZJ76Kc79UhhJV3FCjPRpU8x3FO0l 3EocBzgEPhLSe6mOjtp/uk8cu2/K8iaTB/NaquYYFnExt+qwuJefEVNwR A==; X-CSE-ConnectionGUID: UUBRRU0tTRuY3oFYow3PgA== X-CSE-MsgGUID: Y/Ot14A4Qe6CnzQhbxE91A== X-IronPort-AV: E=McAfee;i="6800,10657,11602"; a="89798679" X-IronPort-AV: E=Sophos;i="6.19,278,1754982000"; d="scan'208";a="89798679" Received: from orviesa009.jf.intel.com ([10.64.159.149]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Nov 2025 01:12:37 -0800 X-CSE-ConnectionGUID: 6d87QPIpTaK5Sniegvufbg== X-CSE-MsgGUID: iM1k1y0rTvSE/IajcMFd2g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,278,1754982000"; d="scan'208";a="186795794" Received: from jf5300-b11a338t.jf.intel.com ([10.242.51.115]) by orviesa009.jf.intel.com with ESMTP; 04 Nov 2025 01:12:38 -0800 From: Kanchana P Sridhar To: linux-kernel@vger.kernel.org, linux-mm@kvack.org, hannes@cmpxchg.org, yosry.ahmed@linux.dev, nphamcs@gmail.com, chengming.zhou@linux.dev, usamaarif642@gmail.com, ryan.roberts@arm.com, 21cnbao@gmail.com, ying.huang@linux.alibaba.com, akpm@linux-foundation.org, senozhatsky@chromium.org, sj@kernel.org, kasong@tencent.com, linux-crypto@vger.kernel.org, herbert@gondor.apana.org.au, davem@davemloft.net, clabbe@baylibre.com, ardb@kernel.org, ebiggers@google.com, surenb@google.com, kristen.c.accardi@intel.com, vinicius.gomes@intel.com Cc: wajdi.k.feghali@intel.com, vinodh.gopal@intel.com, kanchana.p.sridhar@intel.com Subject: [PATCH v13 07/22] crypto: iaa - Refactor hardware descriptor setup into separate procedures. Date: Tue, 4 Nov 2025 01:12:20 -0800 Message-Id: <20251104091235.8793-8-kanchana.p.sridhar@intel.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20251104091235.8793-1-kanchana.p.sridhar@intel.com> References: <20251104091235.8793-1-kanchana.p.sridhar@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This patch refactors the code that sets up the "struct iax_hw_desc" for compress/decompress ops, into distinct procedures to make the code more readable. Also, get_iaa_device_compression_mode() is deleted and the compression mode directly accessed from the iaa_device in the calling procedures. Signed-off-by: Kanchana P Sridhar --- drivers/crypto/intel/iaa/iaa_crypto_main.c | 99 ++++++++++++---------- 1 file changed, 56 insertions(+), 43 deletions(-) diff --git a/drivers/crypto/intel/iaa/iaa_crypto_main.c b/drivers/crypto/in= tel/iaa/iaa_crypto_main.c index 74d5b451e34b..697e98785335 100644 --- a/drivers/crypto/intel/iaa/iaa_crypto_main.c +++ b/drivers/crypto/intel/iaa/iaa_crypto_main.c @@ -483,12 +483,6 @@ int add_iaa_compression_mode(const char *name, } EXPORT_SYMBOL_GPL(add_iaa_compression_mode); =20 -static struct iaa_device_compression_mode * -get_iaa_device_compression_mode(struct iaa_device *iaa_device, int idx) -{ - return iaa_device->compression_modes[idx]; -} - static void free_device_compression_mode(struct iaa_device *iaa_device, struct iaa_device_compression_mode *device_mode) { @@ -1570,7 +1564,6 @@ static int iaa_compress_verify(struct crypto_tfm *tfm= , struct acomp_req *req, dma_addr_t src_addr, unsigned int slen, dma_addr_t dst_addr, unsigned int dlen) { - struct iaa_device_compression_mode *active_compression_mode; struct iaa_compression_ctx *ctx =3D crypto_tfm_ctx(tfm); u32 *compression_crc =3D acomp_request_ctx(req); struct iaa_device *iaa_device; @@ -1589,8 +1582,6 @@ static int iaa_compress_verify(struct crypto_tfm *tfm= , struct acomp_req *req, pdev =3D idxd->pdev; dev =3D &pdev->dev; =20 - active_compression_mode =3D get_iaa_device_compression_mode(iaa_device, c= tx->mode); - while ((idxd_desc =3D=3D ERR_PTR(-EAGAIN)) && (alloc_desc_retries++ < ctx= ->alloc_decomp_desc_timeout)) { idxd_desc =3D idxd_alloc_desc(wq, IDXD_OP_NONBLOCK); cpu_relax(); @@ -1666,8 +1657,7 @@ static void iaa_desc_complete(struct idxd_desc *idxd_= desc, pdev =3D idxd->pdev; dev =3D &pdev->dev; =20 - active_compression_mode =3D get_iaa_device_compression_mode(iaa_device, - compression_ctx->mode); + active_compression_mode =3D iaa_device->compression_modes[compression_ctx= ->mode]; dev_dbg(dev, "%s: compression mode %s," " ctx->src_addr %llx, ctx->dst_addr %llx\n", __func__, active_compression_mode->name, @@ -1746,12 +1736,63 @@ static void iaa_desc_complete(struct idxd_desc *idx= d_desc, percpu_ref_put(&iaa_wq->ref); } =20 +static struct iax_hw_desc * +iaa_setup_compress_hw_desc(struct idxd_desc *idxd_desc, + dma_addr_t src_addr, + unsigned int slen, + dma_addr_t dst_addr, + unsigned int dlen, + enum iaa_mode mode, + struct iaa_device_compression_mode *active_compression_mode) +{ + struct iax_hw_desc *desc =3D idxd_desc->iax_hw; + + desc->flags =3D IDXD_OP_FLAG_CRAV | IDXD_OP_FLAG_RCR | IDXD_OP_FLAG_CC; + desc->opcode =3D IAX_OPCODE_COMPRESS; + desc->compr_flags =3D IAA_COMP_FLAGS; + desc->priv =3D 0; + + desc->src1_addr =3D (u64)src_addr; + desc->src1_size =3D slen; + desc->dst_addr =3D (u64)dst_addr; + desc->max_dst_size =3D dlen; + desc->flags |=3D IDXD_OP_FLAG_RD_SRC2_AECS; + desc->src2_addr =3D active_compression_mode->aecs_comp_table_dma_addr; + desc->src2_size =3D sizeof(struct aecs_comp_table_record); + desc->completion_addr =3D idxd_desc->compl_dma; + + return desc; +} + +static struct iax_hw_desc * +iaa_setup_decompress_hw_desc(struct idxd_desc *idxd_desc, + dma_addr_t src_addr, + unsigned int slen, + dma_addr_t dst_addr, + unsigned int dlen) +{ + struct iax_hw_desc *desc =3D idxd_desc->iax_hw; + + desc->flags =3D IDXD_OP_FLAG_CRAV | IDXD_OP_FLAG_RCR | IDXD_OP_FLAG_CC; + desc->opcode =3D IAX_OPCODE_DECOMPRESS; + desc->max_dst_size =3D PAGE_SIZE; + desc->decompr_flags =3D IAA_DECOMP_FLAGS; + desc->priv =3D 0; + + desc->src1_addr =3D (u64)src_addr; + desc->dst_addr =3D (u64)dst_addr; + desc->max_dst_size =3D dlen; + desc->src1_size =3D slen; + desc->completion_addr =3D idxd_desc->compl_dma; + + return desc; +} + static int iaa_compress(struct crypto_tfm *tfm, struct acomp_req *req, struct idxd_wq *wq, dma_addr_t src_addr, unsigned int slen, dma_addr_t dst_addr, unsigned int *dlen) { - struct iaa_device_compression_mode *active_compression_mode; struct iaa_compression_ctx *ctx =3D crypto_tfm_ctx(tfm); u32 *compression_crc =3D acomp_request_ctx(req); struct iaa_device *iaa_device; @@ -1770,8 +1811,6 @@ static int iaa_compress(struct crypto_tfm *tfm, struc= t acomp_req *req, pdev =3D idxd->pdev; dev =3D &pdev->dev; =20 - active_compression_mode =3D get_iaa_device_compression_mode(iaa_device, c= tx->mode); - while ((idxd_desc =3D=3D ERR_PTR(-EAGAIN)) && (alloc_desc_retries++ < ctx= ->alloc_comp_desc_timeout)) { idxd_desc =3D idxd_alloc_desc(wq, IDXD_OP_NONBLOCK); cpu_relax(); @@ -1782,21 +1821,9 @@ static int iaa_compress(struct crypto_tfm *tfm, stru= ct acomp_req *req, PTR_ERR(idxd_desc)); return -ENODEV; } - desc =3D idxd_desc->iax_hw; =20 - desc->flags =3D IDXD_OP_FLAG_CRAV | IDXD_OP_FLAG_RCR | - IDXD_OP_FLAG_RD_SRC2_AECS | IDXD_OP_FLAG_CC; - desc->opcode =3D IAX_OPCODE_COMPRESS; - desc->compr_flags =3D IAA_COMP_FLAGS; - desc->priv =3D 0; - - desc->src1_addr =3D (u64)src_addr; - desc->src1_size =3D slen; - desc->dst_addr =3D (u64)dst_addr; - desc->max_dst_size =3D *dlen; - desc->src2_addr =3D active_compression_mode->aecs_comp_table_dma_addr; - desc->src2_size =3D sizeof(struct aecs_comp_table_record); - desc->completion_addr =3D idxd_desc->compl_dma; + desc =3D iaa_setup_compress_hw_desc(idxd_desc, src_addr, slen, dst_addr, = *dlen, + ctx->mode, iaa_device->compression_modes[ctx->mode]); =20 if (likely(!ctx->use_irq)) { ret =3D idxd_submit_desc(wq, idxd_desc); @@ -1858,7 +1885,6 @@ static int iaa_decompress(struct crypto_tfm *tfm, str= uct acomp_req *req, dma_addr_t src_addr, unsigned int slen, dma_addr_t dst_addr, unsigned int *dlen) { - struct iaa_device_compression_mode *active_compression_mode; struct iaa_compression_ctx *ctx =3D crypto_tfm_ctx(tfm); struct iaa_device *iaa_device; struct idxd_desc *idxd_desc =3D ERR_PTR(-EAGAIN); @@ -1876,8 +1902,6 @@ static int iaa_decompress(struct crypto_tfm *tfm, str= uct acomp_req *req, pdev =3D idxd->pdev; dev =3D &pdev->dev; =20 - active_compression_mode =3D get_iaa_device_compression_mode(iaa_device, c= tx->mode); - while ((idxd_desc =3D=3D ERR_PTR(-EAGAIN)) && (alloc_desc_retries++ < ctx= ->alloc_decomp_desc_timeout)) { idxd_desc =3D idxd_alloc_desc(wq, IDXD_OP_NONBLOCK); cpu_relax(); @@ -1890,19 +1914,8 @@ static int iaa_decompress(struct crypto_tfm *tfm, st= ruct acomp_req *req, idxd_desc =3D NULL; goto fallback_software_decomp; } - desc =3D idxd_desc->iax_hw; =20 - desc->flags =3D IDXD_OP_FLAG_CRAV | IDXD_OP_FLAG_RCR | IDXD_OP_FLAG_CC; - desc->opcode =3D IAX_OPCODE_DECOMPRESS; - desc->max_dst_size =3D PAGE_SIZE; - desc->decompr_flags =3D IAA_DECOMP_FLAGS; - desc->priv =3D 0; - - desc->src1_addr =3D (u64)src_addr; - desc->dst_addr =3D (u64)dst_addr; - desc->max_dst_size =3D *dlen; - desc->src1_size =3D slen; - desc->completion_addr =3D idxd_desc->compl_dma; + desc =3D iaa_setup_decompress_hw_desc(idxd_desc, src_addr, slen, dst_addr= , *dlen); =20 if (likely(!ctx->use_irq)) { ret =3D idxd_submit_desc(wq, idxd_desc); --=20 2.27.0