From nobody Sun Feb 8 10:19:32 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C4E16313E07; Mon, 3 Nov 2025 14:19:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762179585; cv=none; b=QboN9W2ThbDWD4WcPyeML5GoGd55071kMfu3jJoo8EK42g95qpYS7D9fQEP2W6f8ljFj3oCuXmbVtr81BL+n6ymel5WFAA5OP/musf9FJ1lgGitmT0Ti2WLtgBLbtZkBUrlEp+o2yv9Hn/wbDIHlhWa1doZep/cQV+WaWmOg7IY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762179585; c=relaxed/simple; bh=Iq9TOV4FcGWhqql6PtEpR26BCz7j6f4oU9hSvDKk5F4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=tUInIYVDFRk8NxZE3bQ5cv17WCB2JNwjT2Gck2L0FSSANP+r1iJCd7vSpXtTnOHpij344wfaM6ndBp6qBCRR+4idPcA0Cm8lsfiP79cHQVSxus4f8zu3DYhfq8UQ41O0bzFq3ej+qfFRg1JRWwzPEYQ1EMKzVW7qeucREurSQ50= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=qUH30Rqx; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="qUH30Rqx" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 5CC381A1842; Mon, 3 Nov 2025 14:19:42 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 3221560628; Mon, 3 Nov 2025 14:19:42 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 6686A10B5011E; Mon, 3 Nov 2025 15:19:39 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1762179581; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=32YjyCAMTifsZOSn5l7Q5VxrAGZMoiALl3BPu6raayM=; b=qUH30Rqxf6gKxJv6daWGKMfSi/t29GIexoC3CPpoEzBUN+bHVcJFrddf3HUYW67vFZY08f ihBzlOM1nTv5ZycqN52zspuJNgMZ8Z8zomdB1PiVnKK6YEbiO7YGMSvbOwVzlPQ7wAvwu1 h7GNr7yio/+v6f9mZ6I59wkfNy6GeVtyEgkvu/G391Zkhd6h4+WH9m2qBGlsBpAiacF011 fVLzUEoqR+9qaBxH0iHP5C+nEq7Fm7aIdBB8+tg86T+ClzGYyagr/IuUuRNHouPiDQUxDh lO0KLphHf9eCodca5wvEvZ672vKCNb/Vo722+sH/YmqZKMwqoTArOeTYX+WiIw== From: "Herve Codina (Schneider Electric)" To: Wolfram Sang , Herve Codina , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Geert Uytterhoeven , Magnus Damm , Liam Girdwood , Mark Brown Cc: linux-iio@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Pascal Eberhard , Miquel Raynal , Thomas Petazzoni Subject: [PATCH v3 3/4] ARM: dts: renesas: r9a06g032: Add the ADC device Date: Mon, 3 Nov 2025 15:18:33 +0100 Message-ID: <20251103141834.71677-4-herve.codina@bootlin.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251103141834.71677-1-herve.codina@bootlin.com> References: <20251103141834.71677-1-herve.codina@bootlin.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Last-TLS-Session-Version: TLSv1.3 Content-Type: text/plain; charset="utf-8" The ADC available in the r9a06g032 SoC can use up to two internal ADC cores (ADC1 and ADC2) those internal cores are handled through ADC controller virtual channels. Describe this device. Signed-off-by: Herve Codina (Schneider Electric) Reviewed-by: Wolfram Sang Reviewed-by: Geert Uytterhoeven --- arch/arm/boot/dts/renesas/r9a06g032.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm/boot/dts/renesas/r9a06g032.dtsi b/arch/arm/boot/dts/r= enesas/r9a06g032.dtsi index 13a60656b044..2c1577923223 100644 --- a/arch/arm/boot/dts/renesas/r9a06g032.dtsi +++ b/arch/arm/boot/dts/renesas/r9a06g032.dtsi @@ -290,6 +290,16 @@ i2c2: i2c@40064000 { status =3D "disabled"; }; =20 + adc: adc@40065000 { + compatible =3D "renesas,r9a06g032-adc", "renesas,rzn1-adc"; + reg =3D <0x40065000 0x200>; + clocks =3D <&sysctrl R9A06G032_HCLK_ADC>, <&sysctrl R9A06G032_CLK_ADC>; + clock-names =3D "pclk", "adc"; + power-domains =3D <&sysctrl>; + #io-channel-cells =3D <1>; + status =3D "disabled"; + }; + pinctrl: pinctrl@40067000 { compatible =3D "renesas,r9a06g032-pinctrl", "renesas,rzn1-pinctrl"; reg =3D <0x40067000 0x1000>, <0x51000000 0x480>; --=20 2.51.0