From nobody Wed Dec 17 12:19:21 2025 Received: from mail-wm1-f73.google.com (mail-wm1-f73.google.com [209.85.128.73]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F0FF630CDA3 for ; Mon, 3 Nov 2025 12:34:04 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.128.73 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762173247; cv=none; b=Z2BC04dGcUiw5nI5k/2ZuSZZZhIvt6aRCrKSPK4zTo2Y2OzeDjEu8z4lF+kz08XrnGy6E9+Rg5UM2sYyrRrExxMhST/nr228IlfkrMXspfOB9j8wz23LCDj/0+IaTK+RXDC/GT7APNj0bdFaPEzKBou79iQ8736nx5Waji2NljM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762173247; c=relaxed/simple; bh=EQYMARjS+JyPMayoc+pRJxDO2woosAvTv2TdtcifVOc=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=WQacLSffLW5WHtAm4JvA5T8IQAwOufy+Ie63TmZSA6CnqOvCqZ4qN5Nkttzhs0MlOYiCnthtMtHwLosh9lw1Vx233Xw4fZSwyhFk1UxGQr91Hvps5cvPBsZ4IIh3HXIu9FeV1pSbafegyn7CXgiMXNNbRcAXIt3oOB0efaDegVI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--smostafa.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=jzB7UDtj; arc=none smtp.client-ip=209.85.128.73 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--smostafa.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="jzB7UDtj" Received: by mail-wm1-f73.google.com with SMTP id 5b1f17b1804b1-477124f7c00so23440825e9.1 for ; Mon, 03 Nov 2025 04:34:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20230601; t=1762173243; x=1762778043; darn=vger.kernel.org; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=XnNVG2vhHfC1gt/qitZLpmBchowi40mXLPD49k6Q4P8=; b=jzB7UDtjzYy3alk8zcwOk9pEgucEQbR0hkG79cud04jAnBV7QXHumgUA02Z/RNoQwl jVJwajFn9YV4Tj9eukuueQw6XibnKqvTxYa/CxeQH1HwZ3pqRObacPjz1pVKxToQedjp fX6SG5bsxKH31xMIqIxVdY3Mpgp71rlwvw0WMooq+F/UKacxNyCtJajMrGbaWKh9/w/E 225W5QGQTqsbu9ie56B5aTq7DnPuzidlLPDHYXcd/dZH0KvHqXXt57pjDaRk62OzosEi ZTzmn0XB0yxDWKojUJaTgzx8NgsQN3iLs/N1lPUq/nQDQh2rfNpIYqdhZoIZAPTYW0I5 IIMA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1762173243; x=1762778043; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=XnNVG2vhHfC1gt/qitZLpmBchowi40mXLPD49k6Q4P8=; b=U3eKKBFV39vFQaHJDQvQWzLnEfT4G8kmGnpiZRv8I1/vHgciGxLZ7aCPfTPiJZ7v/i hlVV718lrTAtEeSrNxPBr/xYVizmqY0k7PXnFn6UkKsyYYG3OOH5tjDntKV8OE4DAUhS PrpmpdhkCaDWpPR+P1ja8gswPV6kv/r9IjH4B6ZGnqQxf3hhqMSG2QRgy/EQlcv7zBNk STWx7n2TqMDYGR6kF7fTqLTsIVzZj6HB9GMtGZyQaL8AywGM397RgrCvNLh6BlKailcz NS7w7Y3ppAVJ4fvFzL/TZW+GX5CZaBvAEEk0ZJXJQ9FiCzTMKEHjUQEZLW8yla7JfxtD IIsQ== X-Forwarded-Encrypted: i=1; AJvYcCVSAmZxegOPfaUtE+0tseqfENtqXK5Wj/0QkG42RWVTOJp6msoHSVAdJ1nt97V1ZDFxuWNcjP/ZI1EflMA=@vger.kernel.org X-Gm-Message-State: AOJu0YzGGnc3YIMmBKkE5ZyZ2sThQ2svbSAPdkCaJpM8SEOgrk1HQGcp QowhWkVDzZWYhFArEm+CqHXaUuSRrEXV+gwY70JQHKE0y6suwbT/yM7TDahjlmBHb0fpuV60fek ADmXBs2eOyWEZjQ== X-Google-Smtp-Source: AGHT+IHA8/ok6+XXuQ9VXgpdq0czkrD75t7WqBNgPYie2CXvz0gEKxvUiOAYrX3UQcN/obgIYlDq5IcvFyCXfQ== X-Received: from wmd16.prod.google.com ([2002:a05:600c:6050:b0:46e:37d6:c1a6]) (user=smostafa job=prod-delivery.src-stubby-dispatcher) by 2002:a05:600c:3149:b0:477:942:7521 with SMTP id 5b1f17b1804b1-477307e285dmr107319205e9.14.1762173243360; Mon, 03 Nov 2025 04:34:03 -0800 (PST) Date: Mon, 3 Nov 2025 12:33:50 +0000 In-Reply-To: <20251103123355.1769093-1-smostafa@google.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20251103123355.1769093-1-smostafa@google.com> X-Mailer: git-send-email 2.51.1.930.gacf6e81ea2-goog Message-ID: <20251103123355.1769093-3-smostafa@google.com> Subject: [PATCH v6 2/4] iommu/io-pgtable-arm: Move selftests to a separate file From: Mostafa Saleh To: iommu@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: robin.murphy@arm.com, will@kernel.org, joro@8bytes.org, jgg@ziepe.ca, praan@google.com, Mostafa Saleh , Jason Gunthorpe Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Clean up the io-pgtable-arm library by moving the selftests out. Next the tests will be registered with kunit. This is useful also to factor out kernel specific code out, so it can compiled as part of the hypervisor object. Reviewed-by: Jason Gunthorpe Reviewed-by: Pranjal Shrivastava Signed-off-by: Mostafa Saleh --- drivers/iommu/Makefile | 1 + drivers/iommu/io-pgtable-arm-selftests.c | 201 +++++++++++++++++++++++ drivers/iommu/io-pgtable-arm.c | 190 --------------------- 3 files changed, 202 insertions(+), 190 deletions(-) create mode 100644 drivers/iommu/io-pgtable-arm-selftests.c diff --git a/drivers/iommu/Makefile b/drivers/iommu/Makefile index 355294fa9033..5250a2eea13f 100644 --- a/drivers/iommu/Makefile +++ b/drivers/iommu/Makefile @@ -12,6 +12,7 @@ obj-$(CONFIG_IOMMU_DMA) +=3D dma-iommu.o obj-$(CONFIG_IOMMU_IO_PGTABLE) +=3D io-pgtable.o obj-$(CONFIG_IOMMU_IO_PGTABLE_ARMV7S) +=3D io-pgtable-arm-v7s.o obj-$(CONFIG_IOMMU_IO_PGTABLE_LPAE) +=3D io-pgtable-arm.o +obj-$(CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST) +=3D io-pgtable-arm-selftests= .o obj-$(CONFIG_IOMMU_IO_PGTABLE_DART) +=3D io-pgtable-dart.o obj-$(CONFIG_IOMMU_IOVA) +=3D iova.o obj-$(CONFIG_OF_IOMMU) +=3D of_iommu.o diff --git a/drivers/iommu/io-pgtable-arm-selftests.c b/drivers/iommu/io-pg= table-arm-selftests.c new file mode 100644 index 000000000000..5da6d4b69920 --- /dev/null +++ b/drivers/iommu/io-pgtable-arm-selftests.c @@ -0,0 +1,201 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * CPU-agnostic ARM page table allocator. + * + * Copyright (C) 2014 ARM Limited + * + * Author: Will Deacon + */ + +#define pr_fmt(fmt) "arm-lpae io-pgtable: " fmt + +#include +#include +#include + +#include "io-pgtable-arm.h" + +static struct io_pgtable_cfg *cfg_cookie __initdata; + +static void __init dummy_tlb_flush_all(void *cookie) +{ + WARN_ON(cookie !=3D cfg_cookie); +} + +static void __init dummy_tlb_flush(unsigned long iova, size_t size, + size_t granule, void *cookie) +{ + WARN_ON(cookie !=3D cfg_cookie); + WARN_ON(!(size & cfg_cookie->pgsize_bitmap)); +} + +static void __init dummy_tlb_add_page(struct iommu_iotlb_gather *gather, + unsigned long iova, size_t granule, + void *cookie) +{ + dummy_tlb_flush(iova, granule, granule, cookie); +} + +static const struct iommu_flush_ops dummy_tlb_ops __initconst =3D { + .tlb_flush_all =3D dummy_tlb_flush_all, + .tlb_flush_walk =3D dummy_tlb_flush, + .tlb_add_page =3D dummy_tlb_add_page, +}; + +#define __FAIL(i) ({ \ + WARN(1, "selftest: test failed for fmt idx %d\n", (i)); \ + -EFAULT; \ +}) + +static int __init arm_lpae_run_tests(struct io_pgtable_cfg *cfg) +{ + static const enum io_pgtable_fmt fmts[] __initconst =3D { + ARM_64_LPAE_S1, + ARM_64_LPAE_S2, + }; + + int i, j; + unsigned long iova; + size_t size, mapped; + struct io_pgtable_ops *ops; + + for (i =3D 0; i < ARRAY_SIZE(fmts); ++i) { + cfg_cookie =3D cfg; + ops =3D alloc_io_pgtable_ops(fmts[i], cfg, cfg); + if (!ops) { + pr_err("selftest: failed to allocate io pgtable ops\n"); + return -ENOMEM; + } + + /* + * Initial sanity checks. + * Empty page tables shouldn't provide any translations. + */ + if (ops->iova_to_phys(ops, 42)) + return __FAIL(i); + + if (ops->iova_to_phys(ops, SZ_1G + 42)) + return __FAIL(i); + + if (ops->iova_to_phys(ops, SZ_2G + 42)) + return __FAIL(i); + + /* + * Distinct mappings of different granule sizes. + */ + iova =3D 0; + for_each_set_bit(j, &cfg->pgsize_bitmap, BITS_PER_LONG) { + size =3D 1UL << j; + + if (ops->map_pages(ops, iova, iova, size, 1, + IOMMU_READ | IOMMU_WRITE | + IOMMU_NOEXEC | IOMMU_CACHE, + GFP_KERNEL, &mapped)) + return __FAIL(i); + + /* Overlapping mappings */ + if (!ops->map_pages(ops, iova, iova + size, size, 1, + IOMMU_READ | IOMMU_NOEXEC, + GFP_KERNEL, &mapped)) + return __FAIL(i); + + if (ops->iova_to_phys(ops, iova + 42) !=3D (iova + 42)) + return __FAIL(i); + + iova +=3D SZ_1G; + } + + /* Full unmap */ + iova =3D 0; + for_each_set_bit(j, &cfg->pgsize_bitmap, BITS_PER_LONG) { + size =3D 1UL << j; + + if (ops->unmap_pages(ops, iova, size, 1, NULL) !=3D size) + return __FAIL(i); + + if (ops->iova_to_phys(ops, iova + 42)) + return __FAIL(i); + + /* Remap full block */ + if (ops->map_pages(ops, iova, iova, size, 1, + IOMMU_WRITE, GFP_KERNEL, &mapped)) + return __FAIL(i); + + if (ops->iova_to_phys(ops, iova + 42) !=3D (iova + 42)) + return __FAIL(i); + + iova +=3D SZ_1G; + } + + /* + * Map/unmap the last largest supported page of the IAS, this can + * trigger corner cases in the concatednated page tables. + */ + mapped =3D 0; + size =3D 1UL << __fls(cfg->pgsize_bitmap); + iova =3D (1UL << cfg->ias) - size; + if (ops->map_pages(ops, iova, iova, size, 1, + IOMMU_READ | IOMMU_WRITE | + IOMMU_NOEXEC | IOMMU_CACHE, + GFP_KERNEL, &mapped)) + return __FAIL(i); + if (mapped !=3D size) + return __FAIL(i); + if (ops->unmap_pages(ops, iova, size, 1, NULL) !=3D size) + return __FAIL(i); + + free_io_pgtable_ops(ops); + } + + return 0; +} + +static int __init arm_lpae_do_selftests(void) +{ + static const unsigned long pgsize[] __initconst =3D { + SZ_4K | SZ_2M | SZ_1G, + SZ_16K | SZ_32M, + SZ_64K | SZ_512M, + }; + + static const unsigned int address_size[] __initconst =3D { + 32, 36, 40, 42, 44, 48, + }; + + int i, j, k, pass =3D 0, fail =3D 0; + struct faux_device *dev; + struct io_pgtable_cfg cfg =3D { + .tlb =3D &dummy_tlb_ops, + .coherent_walk =3D true, + .quirks =3D IO_PGTABLE_QUIRK_NO_WARN, + }; + + dev =3D faux_device_create("io-pgtable-test", NULL, 0); + if (!dev) + return -ENOMEM; + + cfg.iommu_dev =3D &dev->dev; + + for (i =3D 0; i < ARRAY_SIZE(pgsize); ++i) { + for (j =3D 0; j < ARRAY_SIZE(address_size); ++j) { + /* Don't use ias > oas as it is not valid for stage-2. */ + for (k =3D 0; k <=3D j; ++k) { + cfg.pgsize_bitmap =3D pgsize[i]; + cfg.ias =3D address_size[k]; + cfg.oas =3D address_size[j]; + pr_info("selftest: pgsize_bitmap 0x%08lx, IAS %u OAS %u\n", + pgsize[i], cfg.ias, cfg.oas); + if (arm_lpae_run_tests(&cfg)) + fail++; + else + pass++; + } + } + } + + pr_info("selftest: completed with %d PASS %d FAIL\n", pass, fail); + faux_device_destroy(dev); + + return fail ? -EFAULT : 0; +} +subsys_initcall(arm_lpae_do_selftests); diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c index 7d6d7221f540..e6626004b323 100644 --- a/drivers/iommu/io-pgtable-arm.c +++ b/drivers/iommu/io-pgtable-arm.c @@ -12,8 +12,6 @@ #include #include #include -#include -#include #include #include #include @@ -1267,191 +1265,3 @@ struct io_pgtable_init_fns io_pgtable_arm_mali_lpae= _init_fns =3D { .alloc =3D arm_mali_lpae_alloc_pgtable, .free =3D arm_lpae_free_pgtable, }; - -#ifdef CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST - -static struct io_pgtable_cfg *cfg_cookie __initdata; - -static void __init dummy_tlb_flush_all(void *cookie) -{ - WARN_ON(cookie !=3D cfg_cookie); -} - -static void __init dummy_tlb_flush(unsigned long iova, size_t size, - size_t granule, void *cookie) -{ - WARN_ON(cookie !=3D cfg_cookie); - WARN_ON(!(size & cfg_cookie->pgsize_bitmap)); -} - -static void __init dummy_tlb_add_page(struct iommu_iotlb_gather *gather, - unsigned long iova, size_t granule, - void *cookie) -{ - dummy_tlb_flush(iova, granule, granule, cookie); -} - -static const struct iommu_flush_ops dummy_tlb_ops __initconst =3D { - .tlb_flush_all =3D dummy_tlb_flush_all, - .tlb_flush_walk =3D dummy_tlb_flush, - .tlb_add_page =3D dummy_tlb_add_page, -}; - -#define __FAIL(i) ({ \ - WARN(1, "selftest: test failed for fmt idx %d\n", (i)); \ - -EFAULT; \ -}) - -static int __init arm_lpae_run_tests(struct io_pgtable_cfg *cfg) -{ - static const enum io_pgtable_fmt fmts[] __initconst =3D { - ARM_64_LPAE_S1, - ARM_64_LPAE_S2, - }; - - int i, j; - unsigned long iova; - size_t size, mapped; - struct io_pgtable_ops *ops; - - for (i =3D 0; i < ARRAY_SIZE(fmts); ++i) { - cfg_cookie =3D cfg; - ops =3D alloc_io_pgtable_ops(fmts[i], cfg, cfg); - if (!ops) { - pr_err("selftest: failed to allocate io pgtable ops\n"); - return -ENOMEM; - } - - /* - * Initial sanity checks. - * Empty page tables shouldn't provide any translations. - */ - if (ops->iova_to_phys(ops, 42)) - return __FAIL(i); - - if (ops->iova_to_phys(ops, SZ_1G + 42)) - return __FAIL(i); - - if (ops->iova_to_phys(ops, SZ_2G + 42)) - return __FAIL(i); - - /* - * Distinct mappings of different granule sizes. - */ - iova =3D 0; - for_each_set_bit(j, &cfg->pgsize_bitmap, BITS_PER_LONG) { - size =3D 1UL << j; - - if (ops->map_pages(ops, iova, iova, size, 1, - IOMMU_READ | IOMMU_WRITE | - IOMMU_NOEXEC | IOMMU_CACHE, - GFP_KERNEL, &mapped)) - return __FAIL(i); - - /* Overlapping mappings */ - if (!ops->map_pages(ops, iova, iova + size, size, 1, - IOMMU_READ | IOMMU_NOEXEC, - GFP_KERNEL, &mapped)) - return __FAIL(i); - - if (ops->iova_to_phys(ops, iova + 42) !=3D (iova + 42)) - return __FAIL(i); - - iova +=3D SZ_1G; - } - - /* Full unmap */ - iova =3D 0; - for_each_set_bit(j, &cfg->pgsize_bitmap, BITS_PER_LONG) { - size =3D 1UL << j; - - if (ops->unmap_pages(ops, iova, size, 1, NULL) !=3D size) - return __FAIL(i); - - if (ops->iova_to_phys(ops, iova + 42)) - return __FAIL(i); - - /* Remap full block */ - if (ops->map_pages(ops, iova, iova, size, 1, - IOMMU_WRITE, GFP_KERNEL, &mapped)) - return __FAIL(i); - - if (ops->iova_to_phys(ops, iova + 42) !=3D (iova + 42)) - return __FAIL(i); - - iova +=3D SZ_1G; - } - - /* - * Map/unmap the last largest supported page of the IAS, this can - * trigger corner cases in the concatednated page tables. - */ - mapped =3D 0; - size =3D 1UL << __fls(cfg->pgsize_bitmap); - iova =3D (1UL << cfg->ias) - size; - if (ops->map_pages(ops, iova, iova, size, 1, - IOMMU_READ | IOMMU_WRITE | - IOMMU_NOEXEC | IOMMU_CACHE, - GFP_KERNEL, &mapped)) - return __FAIL(i); - if (mapped !=3D size) - return __FAIL(i); - if (ops->unmap_pages(ops, iova, size, 1, NULL) !=3D size) - return __FAIL(i); - - free_io_pgtable_ops(ops); - } - - return 0; -} - -static int __init arm_lpae_do_selftests(void) -{ - static const unsigned long pgsize[] __initconst =3D { - SZ_4K | SZ_2M | SZ_1G, - SZ_16K | SZ_32M, - SZ_64K | SZ_512M, - }; - - static const unsigned int address_size[] __initconst =3D { - 32, 36, 40, 42, 44, 48, - }; - - int i, j, k, pass =3D 0, fail =3D 0; - struct faux_device *dev; - struct io_pgtable_cfg cfg =3D { - .tlb =3D &dummy_tlb_ops, - .coherent_walk =3D true, - .quirks =3D IO_PGTABLE_QUIRK_NO_WARN, - }; - - dev =3D faux_device_create("io-pgtable-test", NULL, 0); - if (!dev) - return -ENOMEM; - - cfg.iommu_dev =3D &dev->dev; - - for (i =3D 0; i < ARRAY_SIZE(pgsize); ++i) { - for (j =3D 0; j < ARRAY_SIZE(address_size); ++j) { - /* Don't use ias > oas as it is not valid for stage-2. */ - for (k =3D 0; k <=3D j; ++k) { - cfg.pgsize_bitmap =3D pgsize[i]; - cfg.ias =3D address_size[k]; - cfg.oas =3D address_size[j]; - pr_info("selftest: pgsize_bitmap 0x%08lx, IAS %u OAS %u\n", - pgsize[i], cfg.ias, cfg.oas); - if (arm_lpae_run_tests(&cfg)) - fail++; - else - pass++; - } - } - } - - pr_info("selftest: completed with %d PASS %d FAIL\n", pass, fail); - faux_device_destroy(dev); - - return fail ? -EFAULT : 0; -} -subsys_initcall(arm_lpae_do_selftests); -#endif --=20 2.51.1.930.gacf6e81ea2-goog