From nobody Mon Feb 9 16:18:00 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id C1CFA72614 for ; Mon, 3 Nov 2025 05:26:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762147594; cv=none; b=YYTdZVJdX0R5Zl3c4IqQ0R8VZG2+WhlEe0IR5SnkhRYeNYfbdSj0rBxD58Ld+U9vVUHwv1KCamm/rcusTIXvDM69qx9o+B3QXGiCA8WIxGaaIsXqkVLaZk6zhauqTk4IrVm7Kdg0y+T3zCygWnqyDk2sHoLu2MlPJ08P+Us+3oQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762147594; c=relaxed/simple; bh=NsA6MstwVKVb6qAUKC43Hsur9WtUnv6BWJyTcFCB9aM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=QEqWu3XJp9DiVNeJg3+jlmGmcK9Z3qnrDihqIMd8royTb7zQuBxdysveb420hUz44CeJL0WwmH7bCU9NTNgBiqzcEaAjEDGhAGMGR1zr2qdGNW8w5SDNTSTzoC5HZ4VAtk1A5/AynLNu3B1c/PVQy+vhNknUdIypHS5n+YPFbKE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 626E42938; Sun, 2 Nov 2025 21:26:23 -0800 (PST) Received: from ergosum.cambridge.arm.com (ergosum.cambridge.arm.com [10.1.196.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id CACD53F63F; Sun, 2 Nov 2025 21:26:29 -0800 (PST) From: Anshuman Khandual To: linux-arm-kernel@lists.infradead.org Cc: Anshuman Khandual , Catalin Marinas , Will Deacon , Ryan Roberts , Ard Biesheuvel , linux-kernel@vger.kernel.org Subject: [PATCH 3/6] arm64/mm: Represent TTBR_BADDR_MASK_52 with TTBRx_EL1_BADDR_MASK Date: Mon, 3 Nov 2025 05:26:15 +0000 Message-Id: <20251103052618.586763-4-anshuman.khandual@arm.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20251103052618.586763-1-anshuman.khandual@arm.com> References: <20251103052618.586763-1-anshuman.khandual@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" TTBR_BADDR_MASK_52 discards bit[1] which is RES0, when TTBRx_EL1 register contains 52 bits PA. Let's just keep the custom macro but redefine it via tools sysreg register field format TTBRx_EL1_BADDR_MASK. Cc: Catalin Marinas Cc: Will Deacon Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual --- arch/arm64/include/asm/pgtable-hwdef.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/include/asm/pgtable-hwdef.h b/arch/arm64/include/as= m/pgtable-hwdef.h index f3b77deedfa2..e192c4dc624b 100644 --- a/arch/arm64/include/asm/pgtable-hwdef.h +++ b/arch/arm64/include/asm/pgtable-hwdef.h @@ -332,7 +332,7 @@ /* * TTBR_ELx[1] is RES0 in this configuration. */ -#define TTBR_BADDR_MASK_52 GENMASK_ULL(47, 2) +#define TTBR_BADDR_MASK_52 (TTBRx_EL1_BADDR_MASK & ~GENMASK(1, 1)) #endif =20 #ifdef CONFIG_ARM64_VA_BITS_52 --=20 2.30.2