From nobody Tue Dec 16 11:13:06 2025 Received: from out-176.mta1.migadu.com (out-176.mta1.migadu.com [95.215.58.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9EA232F56 for ; Sun, 2 Nov 2025 21:53:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762120416; cv=none; b=PK4Dxr0gSFMa94ugcOwyVPPKo8c/R2dEUyydXLHgkw3sR1c0VnfqZRPPjr4waHwTKeNEH4zbHr5/gZ2F/akNrBph2Xp8BCygo4Sk2XYR24Ko1QrUqhyIzo+Z2+I58NMgJflsqkSr2jOI4BgPK6RvfIRc8L6MiQG6+pgUhiVKF2w= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762120416; c=relaxed/simple; bh=R775RbbRNLEfj9HOIS+utZQnt0MZztHOU4GczwBLvKQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=IKJrlCmPvLjXeKJar1DPpt9BVL+7ESK1psBZP0M4HoWoHl90yazM9JNPxMkuGvuOVxXQ3scDW7mhq7a44QG6AMG59DsCaRT6auoVkNZFTceOC6Yq3mInr/dQdwmV5GkQYtPkkxaCvgPIgZ4IS9vuz9JYKYQK4IVbbzP1pNDtbIc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=KtbPm6ed; arc=none smtp.client-ip=95.215.58.176 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="KtbPm6ed" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1762120411; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=2bW5Lixhn8DqnxY2a2XosMQ9BFafeoOUC56dKRfdU7Q=; b=KtbPm6edfzU0ukanJxNHFpxG7b26kB0soZJslXgaxSqFaZ0jK2WQ3jm02FclvefgDnZmOG naj+o5c8dn+vVZjB+7k90NWOlOErOq3y9totqD3SmXKXlv5I5jsNMw6wKaVxUzmJNLgESy ZzV1koT96oJuVO7cM88LWh43XuiihIU= From: Denis Benato To: linux-kernel@vger.kernel.org Cc: platform-driver-x86@vger.kernel.org, "Hans de Goede" , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , "Limonciello, Mario" , "Luke D . Jones" , "Alok Tiwari" , "Derek John Clark" , "Mateusz Schyboll" , porfet828@gmail.com, "Denis Benato" , Denis Benato Subject: [PATCH v17 1/9] platform/x86: asus-wmi: export symbols used for read/write WMI Date: Sun, 2 Nov 2025 22:53:11 +0100 Message-ID: <20251102215319.3126879-2-denis.benato@linux.dev> In-Reply-To: <20251102215319.3126879-1-denis.benato@linux.dev> References: <20251102215319.3126879-1-denis.benato@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" From: "Luke D. Jones" Export symbols for reading/writing WMI symbols using a namespace. Existing functions: - asus_wmi_evaluate_method - asus_wmi_set_devstate New function: - asus_wmi_get_devstate_dsts The new function is intended for use with DSTS WMI method only and avoids requiring the asus_wmi driver data to select the WMI method. Co-developed-by: Denis Benato Signed-off-by: Denis Benato Signed-off-by: Luke D. Jones Reviewed-by: Mario Limonciello --- drivers/platform/x86/asus-wmi.c | 46 ++++++++++++++++++++-- include/linux/platform_data/x86/asus-wmi.h | 5 +++ 2 files changed, 48 insertions(+), 3 deletions(-) diff --git a/drivers/platform/x86/asus-wmi.c b/drivers/platform/x86/asus-wm= i.c index e72a2b5d158e..c3e90517ce0f 100644 --- a/drivers/platform/x86/asus-wmi.c +++ b/drivers/platform/x86/asus-wmi.c @@ -390,7 +390,7 @@ int asus_wmi_evaluate_method(u32 method_id, u32 arg0, u= 32 arg1, u32 *retval) { return asus_wmi_evaluate_method3(method_id, arg0, arg1, 0, retval); } -EXPORT_SYMBOL_GPL(asus_wmi_evaluate_method); +EXPORT_SYMBOL_NS_GPL(asus_wmi_evaluate_method, "ASUS_WMI"); =20 static int asus_wmi_evaluate_method5(u32 method_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 arg4, u32 *retval) @@ -554,12 +554,52 @@ static int asus_wmi_get_devstate(struct asus_wmi *asu= s, u32 dev_id, u32 *retval) return 0; } =20 -int asus_wmi_set_devstate(u32 dev_id, u32 ctrl_param, - u32 *retval) +/** + * asus_wmi_get_devstate_dsts() - Get the WMI function state. + * @dev_id: The WMI method ID to call. + * @retval: A pointer to where to store the value returned from WMI. + * + * Returns: + * * %-ENODEV - method ID is unsupported. + * * %0 - successful and retval is filled. + * * %other - error from WMI call. + */ +int asus_wmi_get_devstate_dsts(u32 dev_id, u32 *retval) +{ + int err; + + err =3D asus_wmi_evaluate_method(ASUS_WMI_METHODID_DSTS, dev_id, 0, retva= l); + if (err) + return err; + + if ((*retval & ASUS_WMI_DSTS_PRESENCE_BIT) =3D=3D 0x00) + return -ENODEV; + + return 0; +} +EXPORT_SYMBOL_NS_GPL(asus_wmi_get_devstate_dsts, "ASUS_WMI"); + +/** + * asus_wmi_set_devstate() - Set the WMI function state. + * + * Note: an asus_wmi_set_devstate() call must be paired with a + * asus_wmi_get_devstate_dsts() to check if the WMI function is supported. + * + * @dev_id: The WMI function to call. + * @ctrl_param: The argument to be used for this WMI function. + * @retval: A pointer to where to store the value returned from WMI. + * + * Returns: + * * %-ENODEV - method ID is unsupported. + * * %0 - successful and retval is filled. + * * %other - error from WMI call. + */ +int asus_wmi_set_devstate(u32 dev_id, u32 ctrl_param, u32 *retval) { return asus_wmi_evaluate_method(ASUS_WMI_METHODID_DEVS, dev_id, ctrl_param, retval); } +EXPORT_SYMBOL_NS_GPL(asus_wmi_set_devstate, "ASUS_WMI"); =20 /* Helper for special devices with magic return codes */ static int asus_wmi_get_devstate_bits(struct asus_wmi *asus, diff --git a/include/linux/platform_data/x86/asus-wmi.h b/include/linux/pla= tform_data/x86/asus-wmi.h index 8a515179113d..dbd44d9fbb6f 100644 --- a/include/linux/platform_data/x86/asus-wmi.h +++ b/include/linux/platform_data/x86/asus-wmi.h @@ -166,6 +166,7 @@ enum asus_ally_mcu_hack { #if IS_REACHABLE(CONFIG_ASUS_WMI) void set_ally_mcu_hack(enum asus_ally_mcu_hack status); void set_ally_mcu_powersave(bool enabled); +int asus_wmi_get_devstate_dsts(u32 dev_id, u32 *retval); int asus_wmi_set_devstate(u32 dev_id, u32 ctrl_param, u32 *retval); int asus_wmi_evaluate_method(u32 method_id, u32 arg0, u32 arg1, u32 *retva= l); #else @@ -179,6 +180,10 @@ static inline int asus_wmi_set_devstate(u32 dev_id, u3= 2 ctrl_param, u32 *retval) { return -ENODEV; } +static inline int asus_wmi_get_devstate_dsts(u32 dev_id, u32 *retval) +{ + return -ENODEV; +} static inline int asus_wmi_evaluate_method(u32 method_id, u32 arg0, u32 ar= g1, u32 *retval) { --=20 2.51.2 From nobody Tue Dec 16 11:13:06 2025 Received: from out-174.mta1.migadu.com (out-174.mta1.migadu.com [95.215.58.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D6B8F225A34 for ; Sun, 2 Nov 2025 21:53:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.174 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762120420; cv=none; b=sOFLJ7ZVqFbCq+Z1JJ2NvKuigLCac72/6UI8hM2+6BshqZV5p1HOj0aBNrYDqQeV5Fkv8K7AIopzbrNrepw8bbj9uu2YW8MxauO80LNNkthr0cTPFBKxO7zw+sb5Kz+QtsA/47DupJ5aHraNbhJxcpCdULAMyjxnX3SSIyIHOKE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762120420; c=relaxed/simple; bh=8P8VWxtCLT7DWQ4yS4ZIeX5CuWYKp09rbWi5Hy5rtlc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=eTnuRXfJZBWe0WLbhoYpNEGC/kntVQWGBaMxkFVwrjbPvg0CtcZtzJ/0QP0ORtRcWSxNjjGzhQUSpIM1buJX7+snkjd/2CTBErBkV8FNGXAAXK7h9AMQNgZJp9lt5YAU5rDXYjA6vtx80bOnBQc83dEDA15tmtOjDgqkOrCjuxk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=XoxI7xP7; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1762120414; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=JOLwrE5mYpBWBN/QUoklQH4NcsFS35ygJzCDuE9ps+8=; b=XoxI7xP7Krl3HyM8PLaeT8mBt88ZxFBJ9OqL5lsDA2e5yeWb8dUcULVj9p+SNfkSaBLm5e WFK0CxJRS/iS1qlnIKBFGyft7xJ6MtPwFjwCFG7C4jXRL5xxR0yRtU6dsAoWlPsL7witYg KiEWvPyVnH7gZeM0JyP0lU1/sGKuFyc= From: Denis Benato To: linux-kernel@vger.kernel.org Cc: platform-driver-x86@vger.kernel.org, "Hans de Goede" , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , "Limonciello, Mario" , "Luke D . Jones" , "Alok Tiwari" , "Derek John Clark" , "Mateusz Schyboll" , porfet828@gmail.com, "Denis Benato" , Denis Benato Subject: [PATCH v17 2/9] platform/x86: asus-armoury: move existing tunings to asus-armoury module Date: Sun, 2 Nov 2025 22:53:12 +0100 Message-ID: <20251102215319.3126879-3-denis.benato@linux.dev> In-Reply-To: <20251102215319.3126879-1-denis.benato@linux.dev> References: <20251102215319.3126879-1-denis.benato@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT From: "Luke D. Jones" The fw_attributes_class provides a much cleaner interface to all of the attributes introduced to asus-wmi. This patch moves all of these extra attributes over to fw_attributes_class, and shifts the bulk of these definitions to a new kernel module to reduce the clutter of asus-wmi with the intention of deprecating the asus-wmi attributes in future. The work applies only to WMI methods which don't have a clearly defined place within the sysfs and as a result ended up lumped together in /sys/devices/platform/asus-nb-wmi/ with no standard API. Where possible the fw attrs now implement defaults, min, max, scalar, choices, etc. As en example dgpu_disable becomes: /sys/class/firmware-attributes/asus-armoury/attributes/dgpu_disable/ =E2=94=9C=E2=94=80=E2=94=80 current_value =E2=94=9C=E2=94=80=E2=94=80 display_name =E2=94=9C=E2=94=80=E2=94=80 possible_values =E2=94=94=E2=94=80=E2=94=80 type as do other attributes. Co-developed-by: Denis Benato Signed-off-by: Denis Benato Signed-off-by: Luke D. Jones --- drivers/hid/hid-asus.c | 1 + drivers/platform/x86/Kconfig | 12 + drivers/platform/x86/Makefile | 1 + drivers/platform/x86/asus-armoury.c | 763 ++++++++++++++++++ drivers/platform/x86/asus-armoury.h | 200 +++++ drivers/platform/x86/asus-wmi.c | 10 +- .../platform_data/x86/asus-wmi-leds-ids.h | 50 ++ include/linux/platform_data/x86/asus-wmi.h | 44 +- 8 files changed, 1034 insertions(+), 47 deletions(-) create mode 100644 drivers/platform/x86/asus-armoury.c create mode 100644 drivers/platform/x86/asus-armoury.h create mode 100644 include/linux/platform_data/x86/asus-wmi-leds-ids.h diff --git a/drivers/hid/hid-asus.c b/drivers/hid/hid-asus.c index a444d41e53b6..472bca54642b 100644 --- a/drivers/hid/hid-asus.c +++ b/drivers/hid/hid-asus.c @@ -27,6 +27,7 @@ #include #include #include +#include #include #include /* For to_usb_interface for T100 touchpad intf chec= k */ #include diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig index c122016d82f1..06ea761be25f 100644 --- a/drivers/platform/x86/Kconfig +++ b/drivers/platform/x86/Kconfig @@ -262,6 +262,18 @@ config ASUS_WIRELESS If you choose to compile this driver as a module the module will be called asus-wireless. =20 +config ASUS_ARMOURY + tristate "ASUS Armoury driver" + depends on ASUS_WMI + select FW_ATTR_CLASS + help + Say Y here if you have a WMI aware Asus machine and would like to use t= he + firmware_attributes API to control various settings typically exposed in + the ASUS Armoury Crate application available on Windows. + + To compile this driver as a module, choose M here: the module will + be called asus-armoury. + config ASUS_WMI tristate "ASUS WMI Driver" depends on ACPI_WMI diff --git a/drivers/platform/x86/Makefile b/drivers/platform/x86/Makefile index c7db2a88c11a..4b1220f9b194 100644 --- a/drivers/platform/x86/Makefile +++ b/drivers/platform/x86/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_APPLE_GMUX) +=3D apple-gmux.o # ASUS obj-$(CONFIG_ASUS_LAPTOP) +=3D asus-laptop.o obj-$(CONFIG_ASUS_WIRELESS) +=3D asus-wireless.o +obj-$(CONFIG_ASUS_ARMOURY) +=3D asus-armoury.o obj-$(CONFIG_ASUS_WMI) +=3D asus-wmi.o obj-$(CONFIG_ASUS_NB_WMI) +=3D asus-nb-wmi.o obj-$(CONFIG_ASUS_TF103C_DOCK) +=3D asus-tf103c-dock.o diff --git a/drivers/platform/x86/asus-armoury.c b/drivers/platform/x86/asu= s-armoury.c new file mode 100644 index 000000000000..8294fc8dcdd0 --- /dev/null +++ b/drivers/platform/x86/asus-armoury.c @@ -0,0 +1,763 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Asus Armoury (WMI) attributes driver. + * + * This driver uses the fw_attributes class to expose various WMI functions + * that are present in many gaming and some non-gaming ASUS laptops. + * + * These typically don't fit anywhere else in the sysfs such as under LED = class, + * hwmon or others, and are set in Windows using the ASUS Armoury Crate to= ol. + * + * Copyright(C) 2024 Luke Jones + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "asus-armoury.h" +#include "firmware_attributes_class.h" + +#define ASUS_NB_WMI_EVENT_GUID "0B3CBB35-E3C2-45ED-91C2-4C5A6D195D1C" + +#define ASUS_MINI_LED_MODE_MASK GENMASK(1, 0) +/* Standard modes for devices with only on/off */ +#define ASUS_MINI_LED_OFF 0x00 +#define ASUS_MINI_LED_ON 0x01 +/* Like "on" but the effect is more vibrant or brighter */ +#define ASUS_MINI_LED_STRONG_MODE 0x02 +/* New modes for devices with 3 mini-led mode types */ +#define ASUS_MINI_LED_2024_WEAK 0x00 +#define ASUS_MINI_LED_2024_STRONG 0x01 +#define ASUS_MINI_LED_2024_OFF 0x02 + +struct asus_armoury_priv { + struct device *fw_attr_dev; + struct kset *fw_attr_kset; + + /* + * Mutex to protect eGPU activation/deactivation + * sequences and dGPU connection status: + * do not allow concurrent changes or changes + * before a reboot if dGPU got disabled. + */ + struct mutex egpu_mutex; + + u32 mini_led_dev_id; + u32 gpu_mux_dev_id; +}; + +static struct asus_armoury_priv asus_armoury =3D { + .egpu_mutex =3D __MUTEX_INITIALIZER(asus_armoury.egpu_mutex), +}; + +struct fw_attrs_group { + bool pending_reboot; +}; + +static struct fw_attrs_group fw_attrs =3D { + .pending_reboot =3D false, +}; + +struct asus_attr_group { + const struct attribute_group *attr_group; + u32 wmi_devid; +}; + +static void asus_set_reboot_and_signal_event(void) +{ + fw_attrs.pending_reboot =3D true; + kobject_uevent(&asus_armoury.fw_attr_dev->kobj, KOBJ_CHANGE); +} + +static ssize_t pending_reboot_show(struct kobject *kobj, struct kobj_attri= bute *attr, char *buf) +{ + return sysfs_emit(buf, "%d\n", fw_attrs.pending_reboot); +} + +static struct kobj_attribute pending_reboot =3D __ATTR_RO(pending_reboot); + +static bool asus_bios_requires_reboot(struct kobj_attribute *attr) +{ + return !strcmp(attr->attr.name, "gpu_mux_mode"); +} + +/** + * armoury_has_devstate() - Check presence of the WMI function state. + * + * @dev_id: The WMI method ID to check for presence. + * + * Returns: true iif method is supported. + */ +static bool armoury_has_devstate(u32 dev_id) +{ + u32 retval; + int status; + + status =3D asus_wmi_evaluate_method(ASUS_WMI_METHODID_DSTS, dev_id, 0, &r= etval); + pr_debug("%s called (0x%08x), retval: 0x%08x\n", __func__, dev_id, retval= ); + + return status =3D=3D 0 && (retval & ASUS_WMI_DSTS_PRESENCE_BIT); +} + +/** + * armoury_get_devstate() - Get the WMI function state. + * @attr: NULL or the kobj_attribute associated to called WMI function. + * @dev_id: The WMI method ID to call. + * @retval: + * * non-NULL pointer to where to store the value returned from WMI + * * with the function presence bit cleared. + * + * Intended usage is from sysfs attribute checking associated WMI function. + * + * Returns: + * * %-ENODEV - method ID is unsupported. + * * %0 - successful and retval is filled. + * * %other - error from WMI call. + */ +static int armoury_get_devstate(struct kobj_attribute *attr, u32 *retval, = u32 dev_id) +{ + int err; + + err =3D asus_wmi_get_devstate_dsts(dev_id, retval); + if (err) { + if (attr) + pr_err("Failed to get %s: %d\n", attr->attr.name, err); + else + pr_err("Failed to get devstate for 0x%x: %d\n", dev_id, err); + + return err; + } + + /* + * asus_wmi_get_devstate_dsts will populate retval with WMI return, but + * the true value is expressed when ASUS_WMI_DSTS_PRESENCE_BIT is clear. + */ + *retval &=3D ~ASUS_WMI_DSTS_PRESENCE_BIT; + + return 0; +} + +/** + * armoury_set_devstate() - Set the WMI function state. + * @attr: The kobj_attribute associated to called WMI function. + * @dev_id: The WMI method ID to call. + * @value: The new value to be set. + * @retval: Where to store the value returned from WMI or NULL. + * + * Intended usage is from sysfs attribute setting associated WMI function. + * Before calling the presence of the function should be checked. + * + * Every WMI write MUST go through this function to enforce safety checks. + * + * Results !1 is usually considered a fail by ASUS, but some WMI methods + * (like eGPU or CPU cores) do use > 1 to return a status code or similar: + * in these cases caller is interested in the actual return value + * and should perform relevant checks. + * + * Returns: + * * %-EIO - WMI function returned an error. + * * %0 - successful and retval is filled. + * * %other - error from WMI call. + */ +static int armoury_set_devstate(struct kobj_attribute *attr, + u32 value, u32 *retval, u32 dev_id) +{ + u32 result; + int err; + + err =3D asus_wmi_set_devstate(dev_id, value, retval ? retval : &result); + if (err) { + if (attr) + pr_err("Failed to set %s: %d\n", attr->attr.name, err); + else + pr_err("Failed to set devstate for 0x%x: %d\n", dev_id, err); + + return err; + } + + /* + * If retval =3D=3D NULL caller is uninterested in return value: + * perform the most common result check here. + */ + if ((retval =3D=3D NULL) && (result =3D=3D 0)) { + pr_err("Failed to set %s: (result): 0x%x\n", attr->attr.name, result); + return -EIO; + } + + return 0; +} + +static int armoury_attr_enum_list(char *buf, size_t enum_values) +{ + size_t i; + int len =3D 0; + + for (i =3D 0; i < enum_values; i++) { + if (i =3D=3D 0) + len +=3D sysfs_emit_at(buf, len, "%zu", i); + else + len +=3D sysfs_emit_at(buf, len, ";%zu", i); + } + len +=3D sysfs_emit_at(buf, len, "\n"); + + return len; +} + +ssize_t armoury_attr_uint_store(struct kobject *kobj, struct kobj_attribut= e *attr, + const char *buf, size_t count, u32 min, u32 max, + u32 *store_value, u32 wmi_dev) +{ + u32 value; + int err; + + err =3D kstrtou32(buf, 10, &value); + if (err) + return err; + + if (value < min || value > max) + return -EINVAL; + + err =3D armoury_set_devstate(attr, value, NULL, wmi_dev); + if (err) + return err; + + if (store_value !=3D NULL) + *store_value =3D value; + sysfs_notify(kobj, NULL, attr->attr.name); + + if (asus_bios_requires_reboot(attr)) + asus_set_reboot_and_signal_event(); + + return count; +} + +ssize_t armoury_attr_uint_show(struct kobject *kobj, struct kobj_attribute= *attr, + char *buf, u32 wmi_dev) +{ + u32 result; + int err; + + err =3D armoury_get_devstate(attr, &result, wmi_dev); + if (err) + return err; + + return sysfs_emit(buf, "%u\n", result); +} + +static ssize_t enum_type_show(struct kobject *kobj, struct kobj_attribute = *attr, + char *buf) +{ + return sysfs_emit(buf, "enumeration\n"); +} + +/* Mini-LED mode *********************************************************= *****/ + +/* Values map for mini-led modes on 2023 and earlier models. */ +static u32 mini_led_mode1_map[] =3D { + [0] =3D ASUS_MINI_LED_OFF, + [1] =3D ASUS_MINI_LED_ON, +}; + +/* Values map for mini-led modes on 2024 and later models. */ +static u32 mini_led_mode2_map[] =3D { + [0] =3D ASUS_MINI_LED_2024_OFF, + [1] =3D ASUS_MINI_LED_2024_WEAK, + [2] =3D ASUS_MINI_LED_2024_STRONG, +}; + +static ssize_t mini_led_mode_current_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + u32 *mini_led_mode_map; + size_t mini_led_mode_map_size; + u32 i, mode; + int err; + + switch (asus_armoury.mini_led_dev_id) { + case ASUS_WMI_DEVID_MINI_LED_MODE: + mini_led_mode_map =3D mini_led_mode1_map; + mini_led_mode_map_size =3D ARRAY_SIZE(mini_led_mode1_map); + break; + + case ASUS_WMI_DEVID_MINI_LED_MODE2: + mini_led_mode_map =3D mini_led_mode2_map; + mini_led_mode_map_size =3D ARRAY_SIZE(mini_led_mode2_map); + break; + + default: + pr_err("Unrecognized mini-LED device: %u\n", asus_armoury.mini_led_dev_i= d); + return -ENODEV; + } + + err =3D armoury_get_devstate(attr, &mode, asus_armoury.mini_led_dev_id); + if (err) + return err; + + mode =3D FIELD_GET(ASUS_MINI_LED_MODE_MASK, 0); + + for (i =3D 0; i < mini_led_mode_map_size; i++) + return sysfs_emit(buf, "%u\n", mini_led_mode_map[i]); + + pr_warn("Unrecognized mini-LED mode: %u", mode); + return -EINVAL; +} + +static ssize_t mini_led_mode_current_value_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t count) +{ + u32 *mini_led_mode_map; + size_t mini_led_mode_map_size; + u32 mode; + int err; + + err =3D kstrtou32(buf, 10, &mode); + if (err) + return err; + + switch (asus_armoury.mini_led_dev_id) { + case ASUS_WMI_DEVID_MINI_LED_MODE: + mini_led_mode_map =3D mini_led_mode1_map; + mini_led_mode_map_size =3D ARRAY_SIZE(mini_led_mode1_map); + break; + + case ASUS_WMI_DEVID_MINI_LED_MODE2: + mini_led_mode_map =3D mini_led_mode2_map; + mini_led_mode_map_size =3D ARRAY_SIZE(mini_led_mode2_map); + break; + + default: + pr_err("Unrecognized mini-LED devid: %u\n", asus_armoury.mini_led_dev_id= ); + return -EINVAL; + } + + if (mode >=3D mini_led_mode_map_size) { + return pr_warn("mini-LED mode unrecognized device: %u\n", mode); + return -ENODEV; + } + + return armoury_attr_uint_store(kobj, attr, buf, count, + 0, mini_led_mode_map[mode], + NULL, asus_armoury.mini_led_dev_id); +} + +static ssize_t mini_led_mode_possible_values_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + switch (asus_armoury.mini_led_dev_id) { + case ASUS_WMI_DEVID_MINI_LED_MODE: + return armoury_attr_enum_list(buf, ARRAY_SIZE(mini_led_mode1_map)); + case ASUS_WMI_DEVID_MINI_LED_MODE2: + return armoury_attr_enum_list(buf, ARRAY_SIZE(mini_led_mode2_map)); + default: + return -ENODEV; + } +} +ASUS_ATTR_GROUP_ENUM(mini_led_mode, "mini_led_mode", "Set the mini-LED bac= klight mode"); + +static ssize_t gpu_mux_mode_current_value_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t count) +{ + int result, err; + bool optimus; + + err =3D kstrtobool(buf, &optimus); + if (err) + return err; + + if (armoury_has_devstate(ASUS_WMI_DEVID_DGPU)) { + err =3D armoury_get_devstate(NULL, &result, ASUS_WMI_DEVID_DGPU); + if (err) + return err; + if (result && !optimus) { + pr_warn("Cannot switch MUX to dGPU mode when dGPU is disabled: %02X\n", + result); + return -ENODEV; + } + } + + if (armoury_has_devstate(ASUS_WMI_DEVID_EGPU)) { + err =3D armoury_get_devstate(NULL, &result, ASUS_WMI_DEVID_EGPU); + if (err) + return err; + if (result && !optimus) { + pr_warn("Cannot switch MUX to dGPU mode when eGPU is enabled\n"); + return -EBUSY; + } + } + + err =3D armoury_set_devstate(attr, optimus ? 1 : 0, NULL, asus_armoury.gp= u_mux_dev_id); + if (err) + return err; + + sysfs_notify(kobj, NULL, attr->attr.name); + asus_set_reboot_and_signal_event(); + + return count; +} +ASUS_WMI_SHOW_INT(gpu_mux_mode_current_value, "%u\n", asus_armoury.gpu_mux= _dev_id); +ASUS_ATTR_GROUP_BOOL(gpu_mux_mode, "gpu_mux_mode", "Set the GPU display MU= X mode"); + +static ssize_t dgpu_disable_current_value_store(struct kobject *kobj, + struct kobj_attribute *attr, const char *buf, + size_t count) +{ + int result, err; + bool disable; + + err =3D kstrtobool(buf, &disable); + if (err) + return err; + + if (asus_armoury.gpu_mux_dev_id) { + err =3D armoury_get_devstate(NULL, &result, asus_armoury.gpu_mux_dev_id); + if (err) + return err; + if (!result && disable) { + pr_warn("Cannot disable dGPU when the MUX is in dGPU mode\n"); + return -EBUSY; + } + } + + scoped_guard(mutex, &asus_armoury.egpu_mutex) { + err =3D armoury_set_devstate(attr, disable ? 1 : 0, NULL, ASUS_WMI_DEVID= _DGPU); + if (err) + return err; + } + + sysfs_notify(kobj, NULL, attr->attr.name); + + return count; +} +ASUS_WMI_SHOW_INT(dgpu_disable_current_value, "%d\n", ASUS_WMI_DEVID_DGPU); +ASUS_ATTR_GROUP_BOOL(dgpu_disable, "dgpu_disable", "Disable the dGPU"); + +/* Values map for eGPU activation requests. */ +static u32 egpu_status_map[] =3D { + [0] =3D 0x00000000U, + [1] =3D 0x00000001U, + [2] =3D 0x00000101U, + [3] =3D 0x00000201U, +}; + +/* + * armoury_pci_rescan() - Performs a PCI rescan + * + * Bring up any GPU that has been hotplugged in the system. + */ +static void armoury_pci_rescan(void) +{ + struct pci_bus *b =3D NULL; + + pci_lock_rescan_remove(); + while ((b =3D pci_find_next_bus(b)) !=3D NULL) + pci_rescan_bus(b); + pci_unlock_rescan_remove(); +} + +/* + * The ACPI call to enable the eGPU might also disable the internal dGPU, + * but this is not always the case and on certain models enabling the eGPU + * when the dGPU is either still active or has been disabled without reboo= ting + * will make both GPUs malfunction and the kernel will detect many + * PCI AER unrecoverable errors. + */ +static ssize_t egpu_enable_current_value_store(struct kobject *kobj, struc= t kobj_attribute *attr, + const char *buf, size_t count) +{ + int err; + u32 requested, enable, result; + + err =3D kstrtou32(buf, 10, &requested); + if (err) + return err; + + if (requested >=3D ARRAY_SIZE(egpu_status_map)) + return -EINVAL; + enable =3D egpu_status_map[requested]; + + scoped_guard(mutex, &asus_armoury.egpu_mutex) { + /* Ensure the eGPU is connected before attempting to activate it. */ + if (enable) { + err =3D armoury_get_devstate(NULL, &result, ASUS_WMI_DEVID_EGPU_CONNECT= ED); + if (err) { + pr_warn("Failed to get eGPU connection status: %d\n", err); + return err; + } + if (!result) { + pr_warn("Cannot activate eGPU while undetected\n"); + return -ENOENT; + } + } + + if (asus_armoury.gpu_mux_dev_id) { + err =3D armoury_get_devstate(NULL, &result, asus_armoury.gpu_mux_dev_id= ); + if (err) + return err; + + if (!result && enable) { + pr_warn("Cannot enable eGPU when the MUX is in dGPU mode\n"); + return -ENODEV; + } + } + + err =3D armoury_set_devstate(attr, enable, &result, ASUS_WMI_DEVID_EGPU); + if (err) { + pr_err("Failed to set %s: %d\n", attr->attr.name, err); + return err; + } + + /* + * ACPI returns value 0x01 on success and 0x02 on a partial activation: + * performing a pci rescan will bring up the device in pci-e 3.0 speed, + * after a reboot the device will work at full speed. + */ + switch (result) { + case 0x01: + /* + * When a GPU is in use it does not get disconnected even if + * the ACPI call returns a success. + */ + if (!enable) { + err =3D armoury_get_devstate(attr, &result, ASUS_WMI_DEVID_EGPU); + if (err) { + pr_warn("Failed to ensure eGPU is deactivated: %d\n", err); + return err; + } + + if (result !=3D 0) + return -EBUSY; + } + + pr_debug("Success changing the eGPU status\n"); + break; + case 0x02: + pr_info("Success changing the eGPU status, a reboot is strongly advised= \n"); + asus_set_reboot_and_signal_event(); + break; + default: + pr_err("Failed to change the eGPU status: wmi result is 0x%x\n", result= ); + return -EIO; + } + } + + /* + * Perform a PCI rescan: on every tested model this is necessary + * to make the eGPU visible on the bus without rebooting. + */ + armoury_pci_rescan(); + + sysfs_notify(kobj, NULL, attr->attr.name); + + return count; +} + +static ssize_t egpu_enable_current_value_show(struct kobject *kobj, struct= kobj_attribute *attr, + char *buf) +{ + int i, err; + u32 status; + + scoped_guard(mutex, &asus_armoury.egpu_mutex) { + err =3D armoury_get_devstate(attr, &status, ASUS_WMI_DEVID_EGPU); + if (err) + return err; + } + + for (i =3D 0; i < ARRAY_SIZE(egpu_status_map); i++) { + if (egpu_status_map[i] =3D=3D status) + return sysfs_emit(buf, "%u\n", i); + } + + return -EIO; +} + +static ssize_t egpu_enable_possible_values_show(struct kobject *kobj, stru= ct kobj_attribute *attr, + char *buf) +{ + return armoury_attr_enum_list(buf, ARRAY_SIZE(egpu_status_map)); +} +ASUS_ATTR_GROUP_ENUM(egpu_enable, "egpu_enable", "Enable the eGPU (also di= sables dGPU)"); + +/* Simple attribute creation */ +ASUS_ATTR_GROUP_ENUM_INT_RO(charge_mode, "charge_mode", ASUS_WMI_DEVID_CHA= RGE_MODE, "0;1;2\n", + "Show the current mode of charging"); +ASUS_ATTR_GROUP_BOOL_RW(boot_sound, "boot_sound", ASUS_WMI_DEVID_BOOT_SOUN= D, + "Set the boot POST sound"); +ASUS_ATTR_GROUP_BOOL_RW(mcu_powersave, "mcu_powersave", ASUS_WMI_DEVID_MCU= _POWERSAVE, + "Set MCU powersaving mode"); +ASUS_ATTR_GROUP_BOOL_RW(panel_od, "panel_overdrive", ASUS_WMI_DEVID_PANEL_= OD, + "Set the panel refresh overdrive"); +ASUS_ATTR_GROUP_BOOL_RO(egpu_connected, "egpu_connected", ASUS_WMI_DEVID_E= GPU_CONNECTED, + "Show the eGPU connection status"); + +/* If an attribute does not require any special case handling add it here = */ +static const struct asus_attr_group armoury_attr_groups[] =3D { + { &egpu_connected_attr_group, ASUS_WMI_DEVID_EGPU_CONNECTED }, + { &egpu_enable_attr_group, ASUS_WMI_DEVID_EGPU }, + { &dgpu_disable_attr_group, ASUS_WMI_DEVID_DGPU }, + + { &charge_mode_attr_group, ASUS_WMI_DEVID_CHARGE_MODE }, + { &boot_sound_attr_group, ASUS_WMI_DEVID_BOOT_SOUND }, + { &mcu_powersave_attr_group, ASUS_WMI_DEVID_MCU_POWERSAVE }, + { &panel_od_attr_group, ASUS_WMI_DEVID_PANEL_OD }, +}; + +static int asus_fw_attr_add(void) +{ + int err, i; + + asus_armoury.fw_attr_dev =3D device_create(&firmware_attributes_class, NU= LL, MKDEV(0, 0), + NULL, "%s", DRIVER_NAME); + if (IS_ERR(asus_armoury.fw_attr_dev)) { + err =3D PTR_ERR(asus_armoury.fw_attr_dev); + goto fail_class_get; + } + + asus_armoury.fw_attr_kset =3D kset_create_and_add("attributes", NULL, + &asus_armoury.fw_attr_dev->kobj); + if (!asus_armoury.fw_attr_kset) { + err =3D -ENOMEM; + goto err_destroy_classdev; + } + + err =3D sysfs_create_file(&asus_armoury.fw_attr_kset->kobj, &pending_rebo= ot.attr); + if (err) { + pr_err("Failed to create sysfs level attributes\n"); + goto err_destroy_kset; + } + + asus_armoury.mini_led_dev_id =3D 0; + if (armoury_has_devstate(ASUS_WMI_DEVID_MINI_LED_MODE)) + asus_armoury.mini_led_dev_id =3D ASUS_WMI_DEVID_MINI_LED_MODE; + else if (armoury_has_devstate(ASUS_WMI_DEVID_MINI_LED_MODE2)) + asus_armoury.mini_led_dev_id =3D ASUS_WMI_DEVID_MINI_LED_MODE2; + + if (asus_armoury.mini_led_dev_id) { + err =3D sysfs_create_group(&asus_armoury.fw_attr_kset->kobj, + &mini_led_mode_attr_group); + if (err) { + pr_err("Failed to create sysfs-group for mini_led\n"); + goto err_remove_file; + } + } + + asus_armoury.gpu_mux_dev_id =3D 0; + if (armoury_has_devstate(ASUS_WMI_DEVID_GPU_MUX)) + asus_armoury.gpu_mux_dev_id =3D ASUS_WMI_DEVID_GPU_MUX; + else if (armoury_has_devstate(ASUS_WMI_DEVID_GPU_MUX_VIVO)) + asus_armoury.gpu_mux_dev_id =3D ASUS_WMI_DEVID_GPU_MUX_VIVO; + + if (asus_armoury.gpu_mux_dev_id) { + err =3D sysfs_create_group(&asus_armoury.fw_attr_kset->kobj, + &gpu_mux_mode_attr_group); + if (err) { + pr_err("Failed to create sysfs-group for gpu_mux\n"); + goto err_remove_mini_led_group; + } + } + + for (i =3D 0; i < ARRAY_SIZE(armoury_attr_groups); i++) { + if (!armoury_has_devstate(armoury_attr_groups[i].wmi_devid)) + continue; + + err =3D sysfs_create_group(&asus_armoury.fw_attr_kset->kobj, + armoury_attr_groups[i].attr_group); + if (err) { + pr_err("Failed to create sysfs-group for %s\n", + armoury_attr_groups[i].attr_group->name); + goto err_remove_groups; + } + } + + return 0; + +err_remove_groups: + while (i--) { + if (armoury_has_devstate(armoury_attr_groups[i].wmi_devid)) + sysfs_remove_group(&asus_armoury.fw_attr_kset->kobj, + armoury_attr_groups[i].attr_group); + } + if (asus_armoury.gpu_mux_dev_id) + sysfs_remove_group(&asus_armoury.fw_attr_kset->kobj, &gpu_mux_mode_attr_= group); +err_remove_mini_led_group: + if (asus_armoury.mini_led_dev_id) + sysfs_remove_group(&asus_armoury.fw_attr_kset->kobj, &mini_led_mode_attr= _group); +err_remove_file: + sysfs_remove_file(&asus_armoury.fw_attr_kset->kobj, &pending_reboot.attr); +err_destroy_kset: + kset_unregister(asus_armoury.fw_attr_kset); +err_destroy_classdev: +fail_class_get: + device_destroy(&firmware_attributes_class, MKDEV(0, 0)); + return err; +} + +/* Init / exit ***********************************************************= *****/ + +static int __init asus_fw_init(void) +{ + char *wmi_uid; + + wmi_uid =3D wmi_get_acpi_device_uid(ASUS_WMI_MGMT_GUID); + if (!wmi_uid) + return -ENODEV; + + /* + * if equal to "ASUSWMI" then it's DCTS that can't be used for this + * driver, DSTS is required. + */ + if (!strcmp(wmi_uid, ASUS_ACPI_UID_ASUSWMI)) + return -ENODEV; + + return asus_fw_attr_add(); +} + +static void __exit asus_fw_exit(void) +{ + int i; + + for (i =3D ARRAY_SIZE(armoury_attr_groups) - 1; i >=3D 0; i--) { + if (armoury_has_devstate(armoury_attr_groups[i].wmi_devid)) + sysfs_remove_group(&asus_armoury.fw_attr_kset->kobj, + armoury_attr_groups[i].attr_group); + } + + if (asus_armoury.gpu_mux_dev_id) + sysfs_remove_group(&asus_armoury.fw_attr_kset->kobj, &gpu_mux_mode_attr_= group); + + if (asus_armoury.mini_led_dev_id) + sysfs_remove_group(&asus_armoury.fw_attr_kset->kobj, &mini_led_mode_attr= _group); + + sysfs_remove_file(&asus_armoury.fw_attr_kset->kobj, &pending_reboot.attr); + kset_unregister(asus_armoury.fw_attr_kset); + device_destroy(&firmware_attributes_class, MKDEV(0, 0)); +} + +module_init(asus_fw_init); +module_exit(asus_fw_exit); + +MODULE_IMPORT_NS("ASUS_WMI"); +MODULE_AUTHOR("Luke Jones "); +MODULE_DESCRIPTION("ASUS BIOS Configuration Driver"); +MODULE_LICENSE("GPL"); +MODULE_ALIAS("wmi:" ASUS_NB_WMI_EVENT_GUID); diff --git a/drivers/platform/x86/asus-armoury.h b/drivers/platform/x86/asu= s-armoury.h new file mode 100644 index 000000000000..05d484d32244 --- /dev/null +++ b/drivers/platform/x86/asus-armoury.h @@ -0,0 +1,200 @@ +/* SPDX-License-Identifier: GPL-2.0 + * + * Definitions for kernel modules using asus-armoury driver + * + * Copyright (c) 2024 Luke Jones + */ + +#ifndef _ASUS_ARMOURY_H_ +#define _ASUS_ARMOURY_H_ + +#include +#include +#include + +#define DRIVER_NAME "asus-armoury" + +/** + * armoury_attr_uint_store() - Send an uint to WMI method if within min/ma= x. + * @kobj: Pointer to the driver object. + * @attr: Pointer to the attribute calling this function. + * @buf: The buffer to read from, this is parsed to `uint` type. + * @count: Required by sysfs attribute macros, pass in from the callee att= r. + * @min: Minimum accepted value. Below this returns -EINVAL. + * @max: Maximum accepted value. Above this returns -EINVAL. + * @store_value: Pointer to where the parsed value should be stored. + * @wmi_dev: The WMI function ID to use. + * + * This function is intended to be generic so it can be called from any "_= store" + * attribute which works only with integers. + * + * Integers to be sent to the WMI method is inclusive range checked and + * an error returned if out of range. + * + * If the value is valid and WMI is success then the sysfs attribute is no= tified + * and if asus_bios_requires_reboot() is true then reboot attribute + * is also notified. + * + * Returns: Either count, or an error. + */ +ssize_t armoury_attr_uint_store(struct kobject *kobj, struct kobj_attribut= e *attr, + const char *buf, size_t count, u32 min, u32 max, + u32 *store_value, u32 wmi_dev); + +/** + * armoury_attr_uint_show() - Receive an uint from a WMI method. + * @kobj: Pointer to the driver object. + * @attr: Pointer to the attribute calling this function. + * @buf: The buffer to write to, as an `uint` type. + * @wmi_dev: The WMI function ID to use. + * + * This function is intended to be generic so it can be called from any "_= show" + * attribute which works only with integers. + * + * Returns: Either count, or an error. + */ +ssize_t armoury_attr_uint_show(struct kobject *kobj, struct kobj_attribute= *attr, + char *buf, u32 wmi_dev); + +#define __ASUS_ATTR_RO(_func, _name) \ + { \ + .attr =3D { .name =3D __stringify(_name), .mode =3D 0444 }, \ + .show =3D _func##_##_name##_show, \ + } + +#define __ASUS_ATTR_RO_AS(_name, _show) \ + { \ + .attr =3D { .name =3D __stringify(_name), .mode =3D 0444 }, \ + .show =3D _show, \ + } + +#define __ASUS_ATTR_RW(_func, _name) \ + __ATTR(_name, 0644, _func##_##_name##_show, _func##_##_name##_store) + +#define __WMI_STORE_INT(_attr, _min, _max, _wmi) \ + static ssize_t _attr##_store(struct kobject *kobj, \ + struct kobj_attribute *attr, \ + const char *buf, size_t count) \ + { \ + return armoury_attr_uint_store(kobj, attr, buf, count, _min, \ + _max, NULL, _wmi); \ + } + +#define ASUS_WMI_SHOW_INT(_attr, _fmt, _wmi) \ + static ssize_t _attr##_show(struct kobject *kobj, \ + struct kobj_attribute *attr, char *buf) \ + { \ + return armoury_attr_uint_show(kobj, attr, buf, _wmi); \ + } + +/* Create functions and attributes for use in other macros or on their own= */ + +/* Shows a formatted static variable */ +#define __ATTR_SHOW_FMT(_prop, _attrname, _fmt, _val) \ + static ssize_t _attrname##_##_prop##_show( \ + struct kobject *kobj, struct kobj_attribute *attr, char *buf) \ + { \ + return sysfs_emit(buf, _fmt, _val); \ + } \ + static struct kobj_attribute attr_##_attrname##_##_prop =3D \ + __ASUS_ATTR_RO(_attrname, _prop) + +#define __ATTR_RO_INT_GROUP_ENUM(_attrname, _wmi, _fsname, _possible, _dis= pname)\ + ASUS_WMI_SHOW_INT(_attrname##_current_value, "%d\n", _wmi); \ + static struct kobj_attribute attr_##_attrname##_current_value =3D \ + __ASUS_ATTR_RO(_attrname, current_value); \ + __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \ + __ATTR_SHOW_FMT(possible_values, _attrname, "%s\n", _possible); \ + static struct kobj_attribute attr_##_attrname##_type =3D \ + __ASUS_ATTR_RO_AS(type, enum_type_show); \ + static struct attribute *_attrname##_attrs[] =3D { \ + &attr_##_attrname##_current_value.attr, \ + &attr_##_attrname##_display_name.attr, \ + &attr_##_attrname##_possible_values.attr, \ + &attr_##_attrname##_type.attr, \ + NULL \ + }; \ + static const struct attribute_group _attrname##_attr_group =3D { \ + .name =3D _fsname, .attrs =3D _attrname##_attrs \ + } + +#define __ATTR_RW_INT_GROUP_ENUM(_attrname, _minv, _maxv, _wmi, _fsname,\ + _possible, _dispname) \ + __WMI_STORE_INT(_attrname##_current_value, _minv, _maxv, _wmi); \ + ASUS_WMI_SHOW_INT(_attrname##_current_value, "%d\n", _wmi); \ + static struct kobj_attribute attr_##_attrname##_current_value =3D \ + __ASUS_ATTR_RW(_attrname, current_value); \ + __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \ + __ATTR_SHOW_FMT(possible_values, _attrname, "%s\n", _possible); \ + static struct kobj_attribute attr_##_attrname##_type =3D \ + __ASUS_ATTR_RO_AS(type, enum_type_show); \ + static struct attribute *_attrname##_attrs[] =3D { \ + &attr_##_attrname##_current_value.attr, \ + &attr_##_attrname##_display_name.attr, \ + &attr_##_attrname##_possible_values.attr, \ + &attr_##_attrname##_type.attr, \ + NULL \ + }; \ + static const struct attribute_group _attrname##_attr_group =3D { \ + .name =3D _fsname, .attrs =3D _attrname##_attrs \ + } + +/* Boolean style enumeration, base macro. Requires adding show/store */ +#define __ATTR_GROUP_ENUM(_attrname, _fsname, _possible, _dispname) \ + __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \ + __ATTR_SHOW_FMT(possible_values, _attrname, "%s\n", _possible); \ + static struct kobj_attribute attr_##_attrname##_type =3D \ + __ASUS_ATTR_RO_AS(type, enum_type_show); \ + static struct attribute *_attrname##_attrs[] =3D { \ + &attr_##_attrname##_current_value.attr, \ + &attr_##_attrname##_display_name.attr, \ + &attr_##_attrname##_possible_values.attr, \ + &attr_##_attrname##_type.attr, \ + NULL \ + }; \ + static const struct attribute_group _attrname##_attr_group =3D { \ + .name =3D _fsname, .attrs =3D _attrname##_attrs \ + } + +#define ASUS_ATTR_GROUP_BOOL_RO(_attrname, _fsname, _wmi, _dispname) \ + __ATTR_RO_INT_GROUP_ENUM(_attrname, _wmi, _fsname, "0;1", _dispname) + + +#define ASUS_ATTR_GROUP_BOOL_RW(_attrname, _fsname, _wmi, _dispname) \ + __ATTR_RW_INT_GROUP_ENUM(_attrname, 0, 1, _wmi, _fsname, "0;1", _dispname) + +#define ASUS_ATTR_GROUP_ENUM_INT_RO(_attrname, _fsname, _wmi, _possible, _= dispname) \ + __ATTR_RO_INT_GROUP_ENUM(_attrname, _wmi, _fsname, _possible, _dispname) + +/* + * Requires _current_value_show(), _current_value_show() + */ +#define ASUS_ATTR_GROUP_BOOL(_attrname, _fsname, _dispname) \ + static struct kobj_attribute attr_##_attrname##_current_value =3D \ + __ASUS_ATTR_RW(_attrname, current_value); \ + __ATTR_GROUP_ENUM(_attrname, _fsname, "0;1", _dispname) + +/* + * Requires _current_value_show(), _current_value_show() + * and _possible_values_show() + */ +#define ASUS_ATTR_GROUP_ENUM(_attrname, _fsname, _dispname) \ + __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \ + static struct kobj_attribute attr_##_attrname##_current_value =3D \ + __ASUS_ATTR_RW(_attrname, current_value); \ + static struct kobj_attribute attr_##_attrname##_possible_values =3D \ + __ASUS_ATTR_RO(_attrname, possible_values); \ + static struct kobj_attribute attr_##_attrname##_type =3D \ + __ASUS_ATTR_RO_AS(type, enum_type_show); \ + static struct attribute *_attrname##_attrs[] =3D { \ + &attr_##_attrname##_current_value.attr, \ + &attr_##_attrname##_display_name.attr, \ + &attr_##_attrname##_possible_values.attr, \ + &attr_##_attrname##_type.attr, \ + NULL \ + }; \ + static const struct attribute_group _attrname##_attr_group =3D { \ + .name =3D _fsname, .attrs =3D _attrname##_attrs \ + } + +#endif /* _ASUS_ARMOURY_H_ */ diff --git a/drivers/platform/x86/asus-wmi.c b/drivers/platform/x86/asus-wm= i.c index c3e90517ce0f..ff98267e5981 100644 --- a/drivers/platform/x86/asus-wmi.c +++ b/drivers/platform/x86/asus-wmi.c @@ -15,6 +15,7 @@ =20 #include #include +#include #include #include #include @@ -30,6 +31,7 @@ #include #include #include +#include #include #include #include @@ -55,8 +57,6 @@ module_param(fnlock_default, bool, 0444); #define to_asus_wmi_driver(pdrv) \ (container_of((pdrv), struct asus_wmi_driver, platform_driver)) =20 -#define ASUS_WMI_MGMT_GUID "97845ED0-4E6D-11DE-8A39-0800200C9A66" - #define NOTIFY_BRNUP_MIN 0x11 #define NOTIFY_BRNUP_MAX 0x1f #define NOTIFY_BRNDOWN_MIN 0x20 @@ -105,8 +105,6 @@ module_param(fnlock_default, bool, 0444); #define USB_INTEL_XUSB2PR 0xD0 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31 =20 -#define ASUS_ACPI_UID_ASUSWMI "ASUSWMI" - #define WMI_EVENT_MASK 0xFFFF =20 #define FAN_CURVE_POINTS 8 @@ -561,8 +559,8 @@ static int asus_wmi_get_devstate(struct asus_wmi *asus,= u32 dev_id, u32 *retval) * * Returns: * * %-ENODEV - method ID is unsupported. - * * %0 - successful and retval is filled. - * * %other - error from WMI call. + * * %0 - successful and retval is filled. + * * %other - error from WMI call. */ int asus_wmi_get_devstate_dsts(u32 dev_id, u32 *retval) { diff --git a/include/linux/platform_data/x86/asus-wmi-leds-ids.h b/include/= linux/platform_data/x86/asus-wmi-leds-ids.h new file mode 100644 index 000000000000..281b98ba0ca7 --- /dev/null +++ b/include/linux/platform_data/x86/asus-wmi-leds-ids.h @@ -0,0 +1,50 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +#ifndef __PLATFORM_DATA_X86_ASUS_WMI_LEDS_IDS_H +#define __PLATFORM_DATA_X86_ASUS_WMI_LEDS_IDS_H + +#include +#include + +/* To be used by both hid-asus and asus-wmi to determine which controls kb= d_brightness */ +#if IS_REACHABLE(CONFIG_ASUS_WMI) || IS_REACHABLE(CONFIG_HID_ASUS) +static const struct dmi_system_id asus_use_hid_led_dmi_ids[] =3D { + { + .matches =3D { + DMI_MATCH(DMI_PRODUCT_FAMILY, "ROG Zephyrus"), + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_PRODUCT_FAMILY, "ROG Strix"), + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_PRODUCT_FAMILY, "ROG Flow"), + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_PRODUCT_FAMILY, "ProArt P16"), + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GA403U"), + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GU605M"), + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "RC71L"), + }, + }, + { }, +}; +#endif + +#endif /* __PLATFORM_DATA_X86_ASUS_WMI_LEDS_IDS_H */ diff --git a/include/linux/platform_data/x86/asus-wmi.h b/include/linux/pla= tform_data/x86/asus-wmi.h index dbd44d9fbb6f..8ea8925a0fc5 100644 --- a/include/linux/platform_data/x86/asus-wmi.h +++ b/include/linux/platform_data/x86/asus-wmi.h @@ -4,7 +4,9 @@ =20 #include #include -#include + +#define ASUS_WMI_MGMT_GUID "97845ED0-4E6D-11DE-8A39-0800200C9A66" +#define ASUS_ACPI_UID_ASUSWMI "ASUSWMI" =20 /* WMI Methods */ #define ASUS_WMI_METHODID_SPEC 0x43455053 /* BIOS SPECification */ @@ -191,44 +193,4 @@ static inline int asus_wmi_evaluate_method(u32 method_= id, u32 arg0, u32 arg1, } #endif =20 -/* To be used by both hid-asus and asus-wmi to determine which controls kb= d_brightness */ -static const struct dmi_system_id asus_use_hid_led_dmi_ids[] =3D { - { - .matches =3D { - DMI_MATCH(DMI_PRODUCT_FAMILY, "ROG Zephyrus"), - }, - }, - { - .matches =3D { - DMI_MATCH(DMI_PRODUCT_FAMILY, "ROG Strix"), - }, - }, - { - .matches =3D { - DMI_MATCH(DMI_PRODUCT_FAMILY, "ROG Flow"), - }, - }, - { - .matches =3D { - DMI_MATCH(DMI_PRODUCT_FAMILY, "ProArt P16"), - }, - }, - { - .matches =3D { - DMI_MATCH(DMI_BOARD_NAME, "GA403U"), - }, - }, - { - .matches =3D { - DMI_MATCH(DMI_BOARD_NAME, "GU605M"), - }, - }, - { - .matches =3D { - DMI_MATCH(DMI_BOARD_NAME, "RC71L"), - }, - }, - { }, -}; - #endif /* __PLATFORM_DATA_X86_ASUS_WMI_H */ --=20 2.51.2 From nobody Tue Dec 16 11:13:06 2025 Received: from out-189.mta1.migadu.com (out-189.mta1.migadu.com [95.215.58.189]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 39CFA1EA7EC for ; Sun, 2 Nov 2025 21:53:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.189 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762120420; cv=none; b=eNR2+3lVRMwgAG5xrlobYhh2WPGpDGStDVTyjG4ZySjJBOd6ipYvJbBVK7WsXd/sDKfM4SGPnWHi78lRZOYnwY9EvskNmqojJAFf03I0sURhVyYdVvDnHOxH9Ss1kSiNbZbXmsrbZYEifekKkljibUMXZLdHrgwDuSNOmkcFLXc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762120420; c=relaxed/simple; bh=YT318w6+RjA0aAsE0L7A/5o8TIyoj59ov8/TTy+YF34=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=k74xopD/OcYYnEHcGxuqTWCa+4VBYSmbR8WIeYmTLw9nUV+b/mq9YWtconZCUAIEshto+ryhcPVfiIqT8AOlzcUApMvQZf2cNyEQSPa+HMUK5xDXQX3tz+IRfhN5tyc/AEd1f1kRPqD5gx8BV5/LprnibsirRYQrBYpHu/uqLV8= ARC-Authentication-Results: i=1; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1762120416; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=85HyqfYTSJidaNpE82u0nohWYeslgFmNpkyFRDKVh4s=; b=xapYoBiRF8VuIU5F366GRjLB6X94CvtlTIzSIQz5E8dyoMvTbEZOwbSrOMb9aISWxzjqgi aeDLyNXXVJtDDQ8uZ/fWPJwRcYjibo5246xuxtsgcfhea4uk08Cm6NqjEgqHueiEDWzTQu yhTBAzxFtm2IRYaJ+O+qQczPoBmwvvw= From: Denis Benato To: linux-kernel@vger.kernel.org Cc: platform-driver-x86@vger.kernel.org, "Hans de Goede" , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , "Limonciello, Mario" , "Luke D . Jones" , "Alok Tiwari" , "Derek John Clark" , "Mateusz Schyboll" , porfet828@gmail.com, "Denis Benato" , Denis Benato Subject: [PATCH v17 3/9] platform/x86: asus-armoury: add panel_hd_mode attribute Date: Sun, 2 Nov 2025 22:53:13 +0100 Message-ID: <20251102215319.3126879-4-denis.benato@linux.dev> In-Reply-To: <20251102215319.3126879-1-denis.benato@linux.dev> References: <20251102215319.3126879-1-denis.benato@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT From: "Luke D. Jones" Add panel_hd_mode to toggle the panel mode between single and high definition modes. Signed-off-by: Denis Benato Signed-off-by: Luke D. Jones Reviewed-by: Mario Limonciello Reviewed-by: Ilpo J=C3=A4rvinen --- drivers/platform/x86/asus-armoury.c | 6 +++++- include/linux/platform_data/x86/asus-wmi.h | 1 + 2 files changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/platform/x86/asus-armoury.c b/drivers/platform/x86/asu= s-armoury.c index 8294fc8dcdd0..a6b86968fa37 100644 --- a/drivers/platform/x86/asus-armoury.c +++ b/drivers/platform/x86/asus-armoury.c @@ -96,7 +96,8 @@ static struct kobj_attribute pending_reboot =3D __ATTR_RO= (pending_reboot); =20 static bool asus_bios_requires_reboot(struct kobj_attribute *attr) { - return !strcmp(attr->attr.name, "gpu_mux_mode"); + return !strcmp(attr->attr.name, "gpu_mux_mode") || + !strcmp(attr->attr.name, "panel_hd_mode"); } =20 /** @@ -607,6 +608,8 @@ ASUS_ATTR_GROUP_BOOL_RW(mcu_powersave, "mcu_powersave",= ASUS_WMI_DEVID_MCU_POWER "Set MCU powersaving mode"); ASUS_ATTR_GROUP_BOOL_RW(panel_od, "panel_overdrive", ASUS_WMI_DEVID_PANEL_= OD, "Set the panel refresh overdrive"); +ASUS_ATTR_GROUP_BOOL_RW(panel_hd_mode, "panel_hd_mode", ASUS_WMI_DEVID_PAN= EL_HD, + "Set the panel HD mode to UHD<0> or FHD<1>"); ASUS_ATTR_GROUP_BOOL_RO(egpu_connected, "egpu_connected", ASUS_WMI_DEVID_E= GPU_CONNECTED, "Show the eGPU connection status"); =20 @@ -620,6 +623,7 @@ static const struct asus_attr_group armoury_attr_groups= [] =3D { { &boot_sound_attr_group, ASUS_WMI_DEVID_BOOT_SOUND }, { &mcu_powersave_attr_group, ASUS_WMI_DEVID_MCU_POWERSAVE }, { &panel_od_attr_group, ASUS_WMI_DEVID_PANEL_OD }, + { &panel_hd_mode_attr_group, ASUS_WMI_DEVID_PANEL_HD }, }; =20 static int asus_fw_attr_add(void) diff --git a/include/linux/platform_data/x86/asus-wmi.h b/include/linux/pla= tform_data/x86/asus-wmi.h index 8ea8925a0fc5..3cc235b20be4 100644 --- a/include/linux/platform_data/x86/asus-wmi.h +++ b/include/linux/platform_data/x86/asus-wmi.h @@ -75,6 +75,7 @@ #define ASUS_WMI_DEVID_THROTTLE_THERMAL_POLICY_VIVO 0x00110019 =20 /* Misc */ +#define ASUS_WMI_DEVID_PANEL_HD 0x0005001C #define ASUS_WMI_DEVID_PANEL_OD 0x00050019 #define ASUS_WMI_DEVID_CAMERA 0x00060013 #define ASUS_WMI_DEVID_LID_FLIP 0x00060062 --=20 2.51.2 From nobody Tue Dec 16 11:13:06 2025 Received: from out-183.mta1.migadu.com (out-183.mta1.migadu.com [95.215.58.183]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5E4AA24DCFD for ; Sun, 2 Nov 2025 21:53:41 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.183 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762120423; cv=none; b=BZxkw+JxB3W3p/UPX09rKQpy503LBfQCwS8ZS5wJMwvD66yT6KwG5HLPlPlUy5ljYRodM6RfaR35mzYiWFJe6NDiXNHM6aylLE8sLohM/7UgDBjqT/9Ig2yMliuMNLSA0nQaY1s+6EC0w+VNmoL7yUYYUC8HBnfV9kv1FOrkhOA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762120423; c=relaxed/simple; bh=drLkssrnjGMmjf4Qy02PSWQz7yGQiTpK/LifN+/YdIY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=sks03zK9ywW/2QFL4jNm0rXbsHrZIara28cVvvNY8Vo3CnJdhUQC8tRffCPCmBzvz4GTyKuze88E0xVK/7wggs1hoVIOSsqJUH/IC/zmMIUh56ff1BuNLrM/vUtOh6jRHzDORBH7IPo/G9UOGWMfJIyjhAkPV6dlxfW6W7ic0KM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=m6aRVMnm; arc=none smtp.client-ip=95.215.58.183 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="m6aRVMnm" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1762120418; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=VjWUPCcZBXThnsjowjq/FKoSatTuXX22H85fDHwlDSk=; b=m6aRVMnmcMDdJSC2HUMkRO5MdOQQSrWpQjRFFQfOSJs5TsyZVeJHs0o4jdhXuqPWyG18Lz qlmlPnxiBiPHJ6KvJOmLTz+6eIeskAM+nhjkUC0Fg2+CfkkcD+tTfEyltbL7DFWvsO8tGL rm2WbCKRGKatrn/7cyE5haFQCfF0UPI= From: Denis Benato To: linux-kernel@vger.kernel.org Cc: platform-driver-x86@vger.kernel.org, "Hans de Goede" , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , "Limonciello, Mario" , "Luke D . Jones" , "Alok Tiwari" , "Derek John Clark" , "Mateusz Schyboll" , porfet828@gmail.com, "Denis Benato" , Denis Benato Subject: [PATCH v17 4/9] platform/x86: asus-armoury: add apu-mem control support Date: Sun, 2 Nov 2025 22:53:14 +0100 Message-ID: <20251102215319.3126879-5-denis.benato@linux.dev> In-Reply-To: <20251102215319.3126879-1-denis.benato@linux.dev> References: <20251102215319.3126879-1-denis.benato@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" From: "Luke D. Jones" Implement the APU memory size control under the asus-armoury module using the fw_attributes class. This allows the APU allocated memory size to be adjusted depending on the users priority. A reboot is required after change. Co-developed-by: Denis Benato Signed-off-by: Denis Benato Signed-off-by: Luke D. Jones --- drivers/platform/x86/asus-armoury.c | 98 ++++++++++++++++++++++ include/linux/platform_data/x86/asus-wmi.h | 2 + 2 files changed, 100 insertions(+) diff --git a/drivers/platform/x86/asus-armoury.c b/drivers/platform/x86/asu= s-armoury.c index a6b86968fa37..75fead6091cb 100644 --- a/drivers/platform/x86/asus-armoury.c +++ b/drivers/platform/x86/asus-armoury.c @@ -174,6 +174,7 @@ static int armoury_get_devstate(struct kobj_attribute *= attr, u32 *retval, u32 de * and should perform relevant checks. * * Returns: + * * %-EINVAL - attempt to set a dangerous or unsupported value. * * %-EIO - WMI function returned an error. * * %0 - successful and retval is filled. * * %other - error from WMI call. @@ -184,6 +185,26 @@ static int armoury_set_devstate(struct kobj_attribute = *attr, u32 result; int err; =20 + /* + * Prevent developers from bricking devices or issuing dangerous + * commands that can be difficult or impossible to recover from. + */ + switch (dev_id) { + case ASUS_WMI_DEVID_APU_MEM: + /* + * A hard reset might suffice to save the device, + * but there is no value in sending these commands. + */ + if (value =3D=3D 0x100 || value =3D=3D 0x101) { + pr_err("Refusing to set APU memory to unsafe value: 0x%x\n", value); + return -EINVAL; + } + break; + default: + /* No known problems are known for this dev_id */ + break; + } + err =3D asus_wmi_set_devstate(dev_id, value, retval ? retval : &result); if (err) { if (attr) @@ -599,6 +620,82 @@ static ssize_t egpu_enable_possible_values_show(struct= kobject *kobj, struct kob } ASUS_ATTR_GROUP_ENUM(egpu_enable, "egpu_enable", "Enable the eGPU (also di= sables dGPU)"); =20 +/* Device memory available to APU */ + +/* + * Values map for APU reserved memory (index + 1 number of GB). + * Some looks out of order, but are actually correct. + */ +static u32 apu_mem_map[] =3D { + [0] =3D 0x000, /* called "AUTO" on the BIOS, is the minimum available */ + [1] =3D 0x102, + [2] =3D 0x103, + [3] =3D 0x104, + [4] =3D 0x105, + [5] =3D 0x107, + [6] =3D 0x108, + [7] =3D 0x109, + [8] =3D 0x106, +}; + +static ssize_t apu_mem_current_value_show(struct kobject *kobj, struct kob= j_attribute *attr, + char *buf) +{ + int err; + u32 mem; + + err =3D armoury_get_devstate(attr, &mem, ASUS_WMI_DEVID_APU_MEM); + if (err) + return err; + + /* After 0x000 is set, a read will return 0x100 */ + if (mem =3D=3D 0x100) + return sysfs_emit(buf, "0\n"); + + for (unsigned int i =3D 0; i < ARRAY_SIZE(apu_mem_map); i++) { + if (apu_mem_map[i] =3D=3D mem) + return sysfs_emit(buf, "%u\n", i); + } + + pr_warn("Unrecognised value for APU mem 0x%08x\n", mem); + return -EIO; +} + +static ssize_t apu_mem_current_value_store(struct kobject *kobj, struct ko= bj_attribute *attr, + const char *buf, size_t count) +{ + int result, err; + u32 requested, mem; + + result =3D kstrtou32(buf, 10, &requested); + if (result) + return result; + + if (requested >=3D ARRAY_SIZE(apu_mem_map)) + return -EINVAL; + mem =3D apu_mem_map[requested]; + + err =3D armoury_set_devstate(attr, mem, NULL, ASUS_WMI_DEVID_APU_MEM); + if (err) { + pr_warn("Failed to set apu_mem 0x%x: %d\n", mem, err); + return err; + } + + pr_info("APU memory changed to %uGB, reboot required\n", requested + 1); + sysfs_notify(kobj, NULL, attr->attr.name); + + asus_set_reboot_and_signal_event(); + + return count; +} + +static ssize_t apu_mem_possible_values_show(struct kobject *kobj, struct k= obj_attribute *attr, + char *buf) +{ + return armoury_attr_enum_list(buf, ARRAY_SIZE(apu_mem_map)); +} +ASUS_ATTR_GROUP_ENUM(apu_mem, "apu_mem", "Set available system RAM (in GB)= for the APU to use"); + /* Simple attribute creation */ ASUS_ATTR_GROUP_ENUM_INT_RO(charge_mode, "charge_mode", ASUS_WMI_DEVID_CHA= RGE_MODE, "0;1;2\n", "Show the current mode of charging"); @@ -618,6 +715,7 @@ static const struct asus_attr_group armoury_attr_groups= [] =3D { { &egpu_connected_attr_group, ASUS_WMI_DEVID_EGPU_CONNECTED }, { &egpu_enable_attr_group, ASUS_WMI_DEVID_EGPU }, { &dgpu_disable_attr_group, ASUS_WMI_DEVID_DGPU }, + { &apu_mem_attr_group, ASUS_WMI_DEVID_APU_MEM }, =20 { &charge_mode_attr_group, ASUS_WMI_DEVID_CHARGE_MODE }, { &boot_sound_attr_group, ASUS_WMI_DEVID_BOOT_SOUND }, diff --git a/include/linux/platform_data/x86/asus-wmi.h b/include/linux/pla= tform_data/x86/asus-wmi.h index 3cc235b20be4..9a6433d08973 100644 --- a/include/linux/platform_data/x86/asus-wmi.h +++ b/include/linux/platform_data/x86/asus-wmi.h @@ -136,6 +136,8 @@ /* dgpu on/off */ #define ASUS_WMI_DEVID_DGPU 0x00090020 =20 +#define ASUS_WMI_DEVID_APU_MEM 0x000600C1 + /* gpu mux switch, 0 =3D dGPU, 1 =3D Optimus */ #define ASUS_WMI_DEVID_GPU_MUX 0x00090016 #define ASUS_WMI_DEVID_GPU_MUX_VIVO 0x00090026 --=20 2.51.2 From nobody Tue Dec 16 11:13:06 2025 Received: from out-177.mta1.migadu.com (out-177.mta1.migadu.com [95.215.58.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 98BC824E4A1; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1762120419; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=2BzI8PwQ/VpsZPgHbbUfsUAN7N8BG8dPMwxuVK68r/4=; b=pqtRTIVSPew7BriGRMQXx5dRzYkpyI4nBgiDtO6xLyQwYRck0TJoWQQEXVVO7e5ps9wbDu ofB/QsylvQ+jshppKfXXho9Qb9tHuHjjLAiTeUkRnob015BYxtXgo9JFWf/MM0haKqYzD9 LAPLB3paHHAfaSd+idN0+35dmvCKhi8= From: Denis Benato To: linux-kernel@vger.kernel.org Cc: platform-driver-x86@vger.kernel.org, "Hans de Goede" , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , "Limonciello, Mario" , "Luke D . Jones" , "Alok Tiwari" , "Derek John Clark" , "Mateusz Schyboll" , porfet828@gmail.com, "Denis Benato" , Denis Benato Subject: [PATCH v17 5/9] platform/x86: asus-armoury: add core count control Date: Sun, 2 Nov 2025 22:53:15 +0100 Message-ID: <20251102215319.3126879-6-denis.benato@linux.dev> In-Reply-To: <20251102215319.3126879-1-denis.benato@linux.dev> References: <20251102215319.3126879-1-denis.benato@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" From: "Luke D. Jones" Implement Intel core enablement under the asus-armoury module using the fw_attributes class. This allows users to enable or disable preformance or efficiency cores depending on their requirements. After change a reboot is required. Co-developed-by: Denis Benato Signed-off-by: Denis Benato Signed-off-by: Luke D. Jones --- drivers/platform/x86/asus-armoury.c | 288 +++++++++++++++++++++ drivers/platform/x86/asus-armoury.h | 28 ++ include/linux/platform_data/x86/asus-wmi.h | 5 + 3 files changed, 321 insertions(+) diff --git a/drivers/platform/x86/asus-armoury.c b/drivers/platform/x86/asu= s-armoury.c index 75fead6091cb..161700207435 100644 --- a/drivers/platform/x86/asus-armoury.c +++ b/drivers/platform/x86/asus-armoury.c @@ -48,6 +48,36 @@ #define ASUS_MINI_LED_2024_STRONG 0x01 #define ASUS_MINI_LED_2024_OFF 0x02 =20 +#define ASUS_POWER_CORE_MASK GENMASK(15, 8) +#define ASUS_PERF_CORE_MASK GENMASK(7, 0) + +enum cpu_core_type { + CPU_CORE_PERF =3D 0, + CPU_CORE_POWER, +}; + +enum cpu_core_value { + CPU_CORE_DEFAULT =3D 0, + CPU_CORE_MIN, + CPU_CORE_MAX, + CPU_CORE_CURRENT, +}; + +/* Minimum number of performance cores (P-cores) */ +#define CPU_PERF_CORE_COUNT_MIN 4 +/* Minimum number of efficiency cores (E-cores) */ +#define CPU_POWR_CORE_COUNT_MIN 0 + +/* Tunables provided by ASUS for gaming laptops */ +struct cpu_cores { + u32 cur_perf_cores; + u32 min_perf_cores; + u32 max_perf_cores; + u32 cur_power_cores; + u32 min_power_cores; + u32 max_power_cores; +}; + struct asus_armoury_priv { struct device *fw_attr_dev; struct kset *fw_attr_kset; @@ -60,12 +90,22 @@ struct asus_armoury_priv { */ struct mutex egpu_mutex; =20 + /* + * Mutex to prevent big/little core count changes writing to same + * endpoint at the same time. Must lock during attr store. + */ + struct mutex cpu_core_mutex; + struct cpu_cores *cpu_cores; + bool cpu_cores_changeable; + u32 mini_led_dev_id; u32 gpu_mux_dev_id; }; =20 static struct asus_armoury_priv asus_armoury =3D { .egpu_mutex =3D __MUTEX_INITIALIZER(asus_armoury.egpu_mutex), + + .cpu_core_mutex =3D __MUTEX_INITIALIZER(asus_armoury.cpu_core_mutex), }; =20 struct fw_attrs_group { @@ -97,6 +137,8 @@ static struct kobj_attribute pending_reboot =3D __ATTR_R= O(pending_reboot); static bool asus_bios_requires_reboot(struct kobj_attribute *attr) { return !strcmp(attr->attr.name, "gpu_mux_mode") || + !strcmp(attr->attr.name, "cores_performance") || + !strcmp(attr->attr.name, "cores_efficiency") || !strcmp(attr->attr.name, "panel_hd_mode"); } =20 @@ -200,6 +242,18 @@ static int armoury_set_devstate(struct kobj_attribute = *attr, return -EINVAL; } break; + case ASUS_WMI_DEVID_CORES: + /* + * Prevent risk disabling cores essential for booting the system + * up to a point where system settings can be reset: + * this has already caused unrecoverable bricks in the past. + */ + if ((FIELD_GET(ASUS_POWER_CORE_MASK, value) < CPU_POWR_CORE_COUNT_MIN) || + (FIELD_GET(ASUS_PERF_CORE_MASK, value) < CPU_PERF_CORE_COUNT_MIN)) { + pr_err("Refusing to set CPU cores to unsafe value: 0x%x\n", value); + return -EINVAL; + } + break; default: /* No known problems are known for this dev_id */ break; @@ -290,6 +344,12 @@ static ssize_t enum_type_show(struct kobject *kobj, st= ruct kobj_attribute *attr, return sysfs_emit(buf, "enumeration\n"); } =20 +static ssize_t int_type_show(struct kobject *kobj, struct kobj_attribute *= attr, + char *buf) +{ + return sysfs_emit(buf, "integer\n"); +} + /* Mini-LED mode *********************************************************= *****/ =20 /* Values map for mini-led modes on 2023 and earlier models. */ @@ -696,6 +756,217 @@ static ssize_t apu_mem_possible_values_show(struct ko= bject *kobj, struct kobj_at } ASUS_ATTR_GROUP_ENUM(apu_mem, "apu_mem", "Set available system RAM (in GB)= for the APU to use"); =20 +static struct cpu_cores *init_cpu_cores_ctrl(void) +{ + u32 cores; + int err; + struct cpu_cores *cores_p __free(kfree) =3D NULL; + + cores_p =3D kzalloc(sizeof(struct cpu_cores), GFP_KERNEL); + if (!cores_p) + return ERR_PTR(-ENOMEM); + + err =3D armoury_get_devstate(NULL, &cores, ASUS_WMI_DEVID_CORES_MAX); + if (err) { + pr_err("ACPI does not support CPU core count control\n"); + return ERR_PTR(-ENODEV); + } + + cores_p->max_power_cores =3D FIELD_GET(ASUS_POWER_CORE_MASK, cores); + cores_p->max_perf_cores =3D FIELD_GET(ASUS_PERF_CORE_MASK, cores); + + err =3D armoury_get_devstate(NULL, &cores, ASUS_WMI_DEVID_CORES); + if (err) { + pr_err("Could not get CPU core count: error %d\n", err); + return ERR_PTR(-EIO); + } + + cores_p->cur_power_cores =3D FIELD_GET(ASUS_POWER_CORE_MASK, cores); + cores_p->cur_perf_cores =3D FIELD_GET(ASUS_PERF_CORE_MASK, cores); + + cores_p->min_power_cores =3D CPU_POWR_CORE_COUNT_MIN; + cores_p->min_perf_cores =3D CPU_PERF_CORE_COUNT_MIN; + + if ((cores_p->min_perf_cores > cores_p->max_perf_cores) || + (cores_p->min_power_cores > cores_p->max_power_cores) + ) { + pr_err("Invalid CPU cores count detected: interface is not safe to be us= ed.\n"); + return ERR_PTR(-EINVAL); + } + + if ((cores_p->cur_perf_cores > cores_p->max_perf_cores) || + (cores_p->cur_power_cores > cores_p->max_power_cores) || + (cores_p->cur_perf_cores < cores_p->min_perf_cores) || + (cores_p->cur_power_cores < cores_p->min_power_cores) + ) { + pr_warn("Current CPU cores count are outside safe limits.\n"); + } + + return no_free_ptr(cores_p); +} + +static ssize_t cores_value_show(struct kobject *kobj, struct kobj_attribut= e *attr, char *buf, + enum cpu_core_type core_type, enum cpu_core_value core_value) +{ + u32 cpu_core_value; + + switch (core_value) { + case CPU_CORE_DEFAULT: + case CPU_CORE_MAX: + cpu_core_value =3D (core_type =3D=3D CPU_CORE_PERF) ? + asus_armoury.cpu_cores->max_perf_cores : + asus_armoury.cpu_cores->max_power_cores; + break; + case CPU_CORE_MIN: + cpu_core_value =3D (core_type =3D=3D CPU_CORE_PERF) ? + asus_armoury.cpu_cores->min_perf_cores : + asus_armoury.cpu_cores->min_power_cores; + break; + case CPU_CORE_CURRENT: + cpu_core_value =3D (core_type =3D=3D CPU_CORE_PERF) ? + asus_armoury.cpu_cores->cur_perf_cores : + asus_armoury.cpu_cores->cur_power_cores; + break; + default: + return -EINVAL; + } + + return sysfs_emit(buf, "%u\n", cpu_core_value); +} + +static ssize_t cores_current_value_store(struct kobject *kobj, struct kobj= _attribute *attr, + const char *buf, enum cpu_core_type core_type) +{ + u32 new_cores, perf_cores, power_cores, out_val, min, max, result; + int err; + + result =3D kstrtou32(buf, 10, &new_cores); + if (result) + return result; + + scoped_guard(mutex, &asus_armoury.cpu_core_mutex) { + if (!asus_armoury.cpu_cores_changeable) { + pr_warn("CPU core count change not allowed until reboot\n"); + return -EBUSY; + } + + if (core_type =3D=3D CPU_CORE_PERF) { + perf_cores =3D new_cores; + power_cores =3D asus_armoury.cpu_cores->cur_power_cores; + min =3D asus_armoury.cpu_cores->min_perf_cores; + max =3D asus_armoury.cpu_cores->max_perf_cores; + } else { + perf_cores =3D asus_armoury.cpu_cores->cur_perf_cores; + power_cores =3D new_cores; + min =3D asus_armoury.cpu_cores->min_power_cores; + max =3D asus_armoury.cpu_cores->max_power_cores; + } + + if (new_cores < min || new_cores > max) + return -EINVAL; + + out_val =3D FIELD_PREP(ASUS_PERF_CORE_MASK, perf_cores) | + FIELD_PREP(ASUS_POWER_CORE_MASK, power_cores); + + asus_armoury.cpu_cores_changeable =3D false; + err =3D armoury_set_devstate(attr, out_val, &result, ASUS_WMI_DEVID_CORE= S); + if (err) { + pr_warn("Failed to set CPU core count: %d\n", err); + return err; + } + + if (result > 1) { + pr_warn("Failed to set CPU core count (result): 0x%x\n", result); + return -EIO; + } + } + + pr_info("CPU core count changed, reboot required\n"); + + sysfs_notify(kobj, NULL, attr->attr.name); + asus_set_reboot_and_signal_event(); + + return 0; +} + +static ssize_t cores_performance_min_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_PERF, CPU_CORE_MIN); +} + +static ssize_t cores_performance_max_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_PERF, CPU_CORE_MAX); +} + +static ssize_t cores_performance_default_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_PERF, CPU_CORE_DEFAULT); +} + +static ssize_t cores_performance_current_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_PERF, CPU_CORE_CURRENT); +} + +static ssize_t cores_performance_current_value_store(struct kobject *kobj, + struct kobj_attribute *attr, + const char *buf, size_t count) +{ + int err; + + err =3D cores_current_value_store(kobj, attr, buf, CPU_CORE_PERF); + if (err) + return err; + + return count; +} +ASUS_ATTR_GROUP_CORES_RW(cores_performance, "cores_performance", + "Set the max available performance cores"); + +static ssize_t cores_efficiency_min_value_show(struct kobject *kobj, struc= t kobj_attribute *attr, + char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_POWER, CPU_CORE_MIN); +} + +static ssize_t cores_efficiency_max_value_show(struct kobject *kobj, struc= t kobj_attribute *attr, + char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_POWER, CPU_CORE_MAX); +} + +static ssize_t cores_efficiency_default_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_POWER, CPU_CORE_DEFAULT= ); +} + +static ssize_t cores_efficiency_current_value_show(struct kobject *kobj, + struct kobj_attribute *attr, char *buf) +{ + return cores_value_show(kobj, attr, buf, CPU_CORE_POWER, CPU_CORE_CURRENT= ); +} + +static ssize_t cores_efficiency_current_value_store(struct kobject *kobj, + struct kobj_attribute *attr, const char *buf, + size_t count) +{ + int err; + + err =3D cores_current_value_store(kobj, attr, buf, CPU_CORE_POWER); + if (err) + return err; + + return count; +} +ASUS_ATTR_GROUP_CORES_RW(cores_efficiency, "cores_efficiency", + "Set the max available efficiency cores"); + /* Simple attribute creation */ ASUS_ATTR_GROUP_ENUM_INT_RO(charge_mode, "charge_mode", ASUS_WMI_DEVID_CHA= RGE_MODE, "0;1;2\n", "Show the current mode of charging"); @@ -716,6 +987,8 @@ static const struct asus_attr_group armoury_attr_groups= [] =3D { { &egpu_enable_attr_group, ASUS_WMI_DEVID_EGPU }, { &dgpu_disable_attr_group, ASUS_WMI_DEVID_DGPU }, { &apu_mem_attr_group, ASUS_WMI_DEVID_APU_MEM }, + { &cores_efficiency_attr_group, ASUS_WMI_DEVID_CORES_MAX }, + { &cores_performance_attr_group, ASUS_WMI_DEVID_CORES_MAX }, =20 { &charge_mode_attr_group, ASUS_WMI_DEVID_CHARGE_MODE }, { &boot_sound_attr_group, ASUS_WMI_DEVID_BOOT_SOUND }, @@ -819,6 +1092,8 @@ static int asus_fw_attr_add(void) static int __init asus_fw_init(void) { char *wmi_uid; + struct cpu_cores *cpu_cores_ctrl; + int err; =20 wmi_uid =3D wmi_get_acpi_device_uid(ASUS_WMI_MGMT_GUID); if (!wmi_uid) @@ -831,6 +1106,19 @@ static int __init asus_fw_init(void) if (!strcmp(wmi_uid, ASUS_ACPI_UID_ASUSWMI)) return -ENODEV; =20 + asus_armoury.cpu_cores_changeable =3D false; + if (armoury_has_devstate(ASUS_WMI_DEVID_CORES_MAX)) { + cpu_cores_ctrl =3D init_cpu_cores_ctrl(); + if (IS_ERR(cpu_cores_ctrl)) { + err =3D PTR_ERR(cpu_cores_ctrl); + pr_err("Could not initialise CPU core control: %d\n", err); + return err; + } + + asus_armoury.cpu_cores =3D cpu_cores_ctrl; + asus_armoury.cpu_cores_changeable =3D true; + } + return asus_fw_attr_add(); } =20 diff --git a/drivers/platform/x86/asus-armoury.h b/drivers/platform/x86/asu= s-armoury.h index 05d484d32244..9b5fedc083b0 100644 --- a/drivers/platform/x86/asus-armoury.h +++ b/drivers/platform/x86/asus-armoury.h @@ -197,4 +197,32 @@ ssize_t armoury_attr_uint_show(struct kobject *kobj, s= truct kobj_attribute *attr .name =3D _fsname, .attrs =3D _attrname##_attrs \ } =20 +/* CPU core attributes need a little different in setup */ +#define ASUS_ATTR_GROUP_CORES_RW(_attrname, _fsname, _dispname) \ + __ATTR_SHOW_FMT(scalar_increment, _attrname, "%d\n", 1); \ + __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \ + static struct kobj_attribute attr_##_attrname##_current_value =3D \ + __ASUS_ATTR_RW(_attrname, current_value); \ + static struct kobj_attribute attr_##_attrname##_default_value =3D \ + __ASUS_ATTR_RO(_attrname, default_value); \ + static struct kobj_attribute attr_##_attrname##_min_value =3D \ + __ASUS_ATTR_RO(_attrname, min_value); \ + static struct kobj_attribute attr_##_attrname##_max_value =3D \ + __ASUS_ATTR_RO(_attrname, max_value); \ + static struct kobj_attribute attr_##_attrname##_type =3D \ + __ASUS_ATTR_RO_AS(type, int_type_show); \ + static struct attribute *_attrname##_attrs[] =3D { \ + &attr_##_attrname##_current_value.attr, \ + &attr_##_attrname##_default_value.attr, \ + &attr_##_attrname##_min_value.attr, \ + &attr_##_attrname##_max_value.attr, \ + &attr_##_attrname##_scalar_increment.attr, \ + &attr_##_attrname##_display_name.attr, \ + &attr_##_attrname##_type.attr, \ + NULL \ + }; \ + static const struct attribute_group _attrname##_attr_group =3D { \ + .name =3D _fsname, .attrs =3D _attrname##_attrs \ + } + #endif /* _ASUS_ARMOURY_H_ */ diff --git a/include/linux/platform_data/x86/asus-wmi.h b/include/linux/pla= tform_data/x86/asus-wmi.h index 9a6433d08973..b7ea25986c0d 100644 --- a/include/linux/platform_data/x86/asus-wmi.h +++ b/include/linux/platform_data/x86/asus-wmi.h @@ -136,6 +136,11 @@ /* dgpu on/off */ #define ASUS_WMI_DEVID_DGPU 0x00090020 =20 +/* Intel E-core and P-core configuration in a format 0x0[E]0[P] */ +#define ASUS_WMI_DEVID_CORES 0x001200D2 + /* Maximum Intel E-core and P-core availability */ +#define ASUS_WMI_DEVID_CORES_MAX 0x001200D3 + #define ASUS_WMI_DEVID_APU_MEM 0x000600C1 =20 /* gpu mux switch, 0 =3D dGPU, 1 =3D Optimus */ --=20 2.51.2 From nobody Tue Dec 16 11:13:06 2025 Received: from out-181.mta1.migadu.com (out-181.mta1.migadu.com [95.215.58.181]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E0DB9253B64 for ; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1762120421; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=rowD1HTT32ah8uDzJOJx46m1BzQiGkp4RrWkZftzdQc=; b=PJz2EacSAohi3ZVBtUxeMUDJW7hCGaTk3Do4HPC1q8SBUqwAaqIBGVuYbi8fJT5Ld0IMy1 6qJo0mED3s/1msqr7gFzhS4Z5hjk1kmSiYR4ujXB1sZKQpgjaJt0zs+pKLavFkszTNLX9N vuWv5a9rpfKYSWvs9CSEf/MOYVsW4Rc= From: Denis Benato To: linux-kernel@vger.kernel.org Cc: platform-driver-x86@vger.kernel.org, "Hans de Goede" , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , "Limonciello, Mario" , "Luke D . Jones" , "Alok Tiwari" , "Derek John Clark" , "Mateusz Schyboll" , porfet828@gmail.com, "Denis Benato" , Denis Benato Subject: [PATCH v17 6/9] platform/x86: asus-armoury: add screen auto-brightness toggle Date: Sun, 2 Nov 2025 22:53:16 +0100 Message-ID: <20251102215319.3126879-7-denis.benato@linux.dev> In-Reply-To: <20251102215319.3126879-1-denis.benato@linux.dev> References: <20251102215319.3126879-1-denis.benato@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT From: "Luke D. Jones" Add screen_auto_brightness toggle supported on some laptops. Signed-off-by: Denis Benato Signed-off-by: Luke D. Jones Reviewed-by: Mario Limonciello Reviewed-by: Ilpo J=C3=A4rvinen --- drivers/platform/x86/asus-armoury.c | 4 ++++ include/linux/platform_data/x86/asus-wmi.h | 1 + 2 files changed, 5 insertions(+) diff --git a/drivers/platform/x86/asus-armoury.c b/drivers/platform/x86/asu= s-armoury.c index 161700207435..b5a9783548a6 100644 --- a/drivers/platform/x86/asus-armoury.c +++ b/drivers/platform/x86/asus-armoury.c @@ -978,6 +978,9 @@ ASUS_ATTR_GROUP_BOOL_RW(panel_od, "panel_overdrive", AS= US_WMI_DEVID_PANEL_OD, "Set the panel refresh overdrive"); ASUS_ATTR_GROUP_BOOL_RW(panel_hd_mode, "panel_hd_mode", ASUS_WMI_DEVID_PAN= EL_HD, "Set the panel HD mode to UHD<0> or FHD<1>"); +ASUS_ATTR_GROUP_BOOL_RW(screen_auto_brightness, "screen_auto_brightness", + ASUS_WMI_DEVID_SCREEN_AUTO_BRIGHTNESS, + "Set the panel brightness to Off<0> or On<1>"); ASUS_ATTR_GROUP_BOOL_RO(egpu_connected, "egpu_connected", ASUS_WMI_DEVID_E= GPU_CONNECTED, "Show the eGPU connection status"); =20 @@ -995,6 +998,7 @@ static const struct asus_attr_group armoury_attr_groups= [] =3D { { &mcu_powersave_attr_group, ASUS_WMI_DEVID_MCU_POWERSAVE }, { &panel_od_attr_group, ASUS_WMI_DEVID_PANEL_OD }, { &panel_hd_mode_attr_group, ASUS_WMI_DEVID_PANEL_HD }, + { &screen_auto_brightness_attr_group, ASUS_WMI_DEVID_SCREEN_AUTO_BRIGHTNE= SS }, }; =20 static int asus_fw_attr_add(void) diff --git a/include/linux/platform_data/x86/asus-wmi.h b/include/linux/pla= tform_data/x86/asus-wmi.h index b7ea25986c0d..a906dfb834ab 100644 --- a/include/linux/platform_data/x86/asus-wmi.h +++ b/include/linux/platform_data/x86/asus-wmi.h @@ -82,6 +82,7 @@ #define ASUS_WMI_DEVID_LID_FLIP_ROG 0x00060077 #define ASUS_WMI_DEVID_MINI_LED_MODE 0x0005001E #define ASUS_WMI_DEVID_MINI_LED_MODE2 0x0005002E +#define ASUS_WMI_DEVID_SCREEN_AUTO_BRIGHTNESS 0x0005002A =20 /* Storage */ #define ASUS_WMI_DEVID_CARDREADER 0x00080013 --=20 2.51.2 From nobody Tue Dec 16 11:13:06 2025 Received: from out-171.mta1.migadu.com (out-171.mta1.migadu.com [95.215.58.171]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4977525784F for ; Sun, 2 Nov 2025 21:53:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762120429; cv=none; b=PjrWLCA4YQM2O9IjwCot03XVv6tMa0FKBR31If+EAYFu08MfShCLmxxMu397NkO8YBXHYEl/Ko4fCMcNQuQLyBb7Az6W1NOBB/ctQmKY2A7wb6wkTibolydp0jco1C1pmM8tPo4G3Q9soReRh0ACB228U52YyG7P9ZAixyoJ2UU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762120429; c=relaxed/simple; bh=CyHMA3Hh+rt4c9kicRlvfQeJXd16/zZ+SFLSI6tNMCA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=iDCBhieYqLrhdGbBa4O/Ht+NpgkSLLpqA4LsOpplvK1DrDPWf4313vwJTBdapmaKz7ETtYYuIn4rNwnM1Kq6zcDtoVcmOPRRvrA7mYKnCBTLnMt1W/Kz5p/ZpOM+zq3PdDNhbbttVhF9j37Rcvg19vKo1lNb6qozmtaHNo1SylM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=ZpvbymHX; arc=none smtp.client-ip=95.215.58.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="ZpvbymHX" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1762120422; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=IqX8JxrwP2dp2RCJPMTnr2G/i2FkfDI6etywT3rMugU=; b=ZpvbymHXjaBC4xeEI6PgfcwgSbmPveIeT3HLAYJaTE1Zl58HUZAT0ZHktAJTvC7LNegdd6 rl719yDDHixdpYY34pOrTmDV8ZYGaS9yIjg+ji9972pxOsWbPUtUABNLbFviJfcQoliAPy zPCfvJ+P2t6DdVp3x8tFmFqwgXdjM/Y= From: Denis Benato To: linux-kernel@vger.kernel.org Cc: platform-driver-x86@vger.kernel.org, "Hans de Goede" , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , "Limonciello, Mario" , "Luke D . Jones" , "Alok Tiwari" , "Derek John Clark" , "Mateusz Schyboll" , porfet828@gmail.com, "Denis Benato" , Denis Benato Subject: [PATCH v17 7/9] platform/x86: asus-wmi: deprecate bios features Date: Sun, 2 Nov 2025 22:53:17 +0100 Message-ID: <20251102215319.3126879-8-denis.benato@linux.dev> In-Reply-To: <20251102215319.3126879-1-denis.benato@linux.dev> References: <20251102215319.3126879-1-denis.benato@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" From: "Luke D. Jones" With the existence of the asus-armoury module the attributes no longer need to live under the /sys/devices/platform/asus-nb-wmi/ path. Deprecate all those that were implemented in asus-bioscfg with the goal of removing them fully in the next LTS cycle. Signed-off-by: Denis Benato Signed-off-by: Luke D. Jones Reviewed-by: Mario Limonciello --- .../ABI/testing/sysfs-platform-asus-wmi | 17 +++ drivers/platform/x86/Kconfig | 11 ++ drivers/platform/x86/asus-wmi.c | 121 ++++++++++++++---- 3 files changed, 124 insertions(+), 25 deletions(-) diff --git a/Documentation/ABI/testing/sysfs-platform-asus-wmi b/Documentat= ion/ABI/testing/sysfs-platform-asus-wmi index 28144371a0f1..89acb6638df8 100644 --- a/Documentation/ABI/testing/sysfs-platform-asus-wmi +++ b/Documentation/ABI/testing/sysfs-platform-asus-wmi @@ -63,6 +63,7 @@ Date: Aug 2022 KernelVersion: 6.1 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON: please use asus-armoury Switch the GPU hardware MUX mode. Laptops with this feature can can be toggled to boot with only the dGPU (discrete mode) or in standard Optimus/Hybrid mode. On switch a reboot is required: @@ -75,6 +76,7 @@ Date: Aug 2022 KernelVersion: 5.17 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON: please use asus-armoury Disable discrete GPU: * 0 - Enable dGPU, * 1 - Disable dGPU @@ -84,6 +86,7 @@ Date: Aug 2022 KernelVersion: 5.17 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON: please use asus-armoury Enable the external GPU paired with ROG X-Flow laptops. Toggling this setting will also trigger ACPI to disable the dGPU: =20 @@ -95,6 +98,7 @@ Date: Aug 2022 KernelVersion: 5.17 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON: please use asus-armoury Enable an LCD response-time boost to reduce or remove ghosting: * 0 - Disable, * 1 - Enable @@ -104,6 +108,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON: please use asus-armoury Get the current charging mode being used: * 1 - Barrel connected charger, * 2 - USB-C charging @@ -114,6 +119,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON: please use asus-armoury Show if the egpu (XG Mobile) is correctly connected: * 0 - False, * 1 - True @@ -123,6 +129,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON: please use asus-armoury Change the mini-LED mode: * 0 - Single-zone, * 1 - Multi-zone @@ -133,6 +140,7 @@ Date: Apr 2024 KernelVersion: 6.10 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON: please use asus-armoury List the available mini-led modes. =20 What: /sys/devices/platform//ppt_pl1_spl @@ -140,6 +148,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON: please use asus-armoury Set the Package Power Target total of CPU: PL1 on Intel, SPL on AMD. Shown on Intel+Nvidia or AMD+Nvidia based systems: =20 @@ -150,6 +159,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON: please use asus-armoury Set the Slow Package Power Tracking Limit of CPU: PL2 on Intel, SPPT, on AMD. Shown on Intel+Nvidia or AMD+Nvidia based systems: =20 @@ -160,6 +170,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON: please use asus-armoury Set the Fast Package Power Tracking Limit of CPU. AMD+Nvidia only: * min=3D5, max=3D250 =20 @@ -168,6 +179,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON: please use asus-armoury Set the APU SPPT limit. Shown on full AMD systems only: * min=3D5, max=3D130 =20 @@ -176,6 +188,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON: please use asus-armoury Set the platform SPPT limit. Shown on full AMD systems only: * min=3D5, max=3D130 =20 @@ -184,6 +197,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON: please use asus-armoury Set the dynamic boost limit of the Nvidia dGPU: * min=3D5, max=3D25 =20 @@ -192,6 +206,7 @@ Date: Jun 2023 KernelVersion: 6.5 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON: please use asus-armoury Set the target temperature limit of the Nvidia dGPU: * min=3D75, max=3D87 =20 @@ -200,6 +215,7 @@ Date: Apr 2024 KernelVersion: 6.10 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON: please use asus-armoury Set if the BIOS POST sound is played on boot. * 0 - False, * 1 - True @@ -209,6 +225,7 @@ Date: Apr 2024 KernelVersion: 6.10 Contact: "Luke Jones" Description: + DEPRECATED, WILL BE REMOVED SOON: please use asus-armoury Set if the MCU can go in to low-power mode on system sleep * 0 - False, * 1 - True diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig index 06ea761be25f..aef7e8a746fa 100644 --- a/drivers/platform/x86/Kconfig +++ b/drivers/platform/x86/Kconfig @@ -296,6 +296,17 @@ config ASUS_WMI To compile this driver as a module, choose M here: the module will be called asus-wmi. =20 +config ASUS_WMI_DEPRECATED_ATTRS + bool "BIOS option support in WMI platform (DEPRECATED)" + depends on ASUS_WMI + default y + help + Say Y to expose the configurable BIOS options through the asus-wmi + driver. + + This can be used with or without the asus-armoury driver which + has the same attributes, but more, and better features. + config ASUS_NB_WMI tristate "Asus Notebook WMI Driver" depends on ASUS_WMI diff --git a/drivers/platform/x86/asus-wmi.c b/drivers/platform/x86/asus-wm= i.c index ff98267e5981..6de633d4a748 100644 --- a/drivers/platform/x86/asus-wmi.c +++ b/drivers/platform/x86/asus-wmi.c @@ -338,6 +338,13 @@ struct asus_wmi { /* Global to allow setting externally without requiring driver data */ static enum asus_ally_mcu_hack use_ally_mcu_hack =3D ASUS_WMI_ALLY_MCU_HAC= K_INIT; =20 +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) +static void asus_wmi_show_deprecated(void) +{ + pr_notice_once("Accessing attributes through /sys/bus/platform/asus_wmi i= s deprecated and will be removed in a future release. Please switch over to= /sys/class/firmware_attributes.\n"); +} +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ + /* WMI *******************************************************************= *****/ =20 static int asus_wmi_evaluate_method3(u32 method_id, @@ -730,6 +737,7 @@ static void asus_wmi_tablet_mode_get_state(struct asus_= wmi *asus) } =20 /* Charging mode, 1=3DBarrel, 2=3DUSB ************************************= ******/ +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t charge_mode_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -740,12 +748,16 @@ static ssize_t charge_mode_show(struct device *dev, if (result < 0) return result; =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%d\n", value & 0xff); } =20 static DEVICE_ATTR_RO(charge_mode); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* dGPU ******************************************************************= **/ +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t dgpu_disable_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -756,6 +768,8 @@ static ssize_t dgpu_disable_show(struct device *dev, if (result < 0) return result; =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%d\n", result); } =20 @@ -809,8 +823,10 @@ static ssize_t dgpu_disable_store(struct device *dev, return count; } static DEVICE_ATTR_RW(dgpu_disable); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* eGPU ******************************************************************= **/ +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t egpu_enable_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -821,6 +837,8 @@ static ssize_t egpu_enable_show(struct device *dev, if (result < 0) return result; =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%d\n", result); } =20 @@ -877,8 +895,10 @@ static ssize_t egpu_enable_store(struct device *dev, return count; } static DEVICE_ATTR_RW(egpu_enable); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* Is eGPU connected? ****************************************************= *****/ +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t egpu_connected_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -889,12 +909,16 @@ static ssize_t egpu_connected_show(struct device *dev, if (result < 0) return result; =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%d\n", result); } =20 static DEVICE_ATTR_RO(egpu_connected); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* gpu mux switch ********************************************************= *****/ +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t gpu_mux_mode_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -905,6 +929,8 @@ static ssize_t gpu_mux_mode_show(struct device *dev, if (result < 0) return result; =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%d\n", result); } =20 @@ -963,6 +989,7 @@ static ssize_t gpu_mux_mode_store(struct device *dev, return count; } static DEVICE_ATTR_RW(gpu_mux_mode); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* TUF Laptop Keyboard RGB Modes *****************************************= *****/ static ssize_t kbd_rgb_mode_store(struct device *dev, @@ -1086,6 +1113,7 @@ static const struct attribute_group *kbd_rgb_mode_gro= ups[] =3D { }; =20 /* Tunable: PPT: Intel=3DPL1, AMD=3DSPPT *********************************= ********/ +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t ppt_pl2_sppt_store(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) @@ -1124,6 +1152,8 @@ static ssize_t ppt_pl2_sppt_show(struct device *dev, { struct asus_wmi *asus =3D dev_get_drvdata(dev); =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%u\n", asus->ppt_pl2_sppt); } static DEVICE_ATTR_RW(ppt_pl2_sppt); @@ -1166,6 +1196,8 @@ static ssize_t ppt_pl1_spl_show(struct device *dev, { struct asus_wmi *asus =3D dev_get_drvdata(dev); =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%u\n", asus->ppt_pl1_spl); } static DEVICE_ATTR_RW(ppt_pl1_spl); @@ -1209,6 +1241,8 @@ static ssize_t ppt_fppt_show(struct device *dev, { struct asus_wmi *asus =3D dev_get_drvdata(dev); =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%u\n", asus->ppt_fppt); } static DEVICE_ATTR_RW(ppt_fppt); @@ -1252,6 +1286,8 @@ static ssize_t ppt_apu_sppt_show(struct device *dev, { struct asus_wmi *asus =3D dev_get_drvdata(dev); =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%u\n", asus->ppt_apu_sppt); } static DEVICE_ATTR_RW(ppt_apu_sppt); @@ -1295,6 +1331,8 @@ static ssize_t ppt_platform_sppt_show(struct device *= dev, { struct asus_wmi *asus =3D dev_get_drvdata(dev); =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%u\n", asus->ppt_platform_sppt); } static DEVICE_ATTR_RW(ppt_platform_sppt); @@ -1338,6 +1376,8 @@ static ssize_t nv_dynamic_boost_show(struct device *d= ev, { struct asus_wmi *asus =3D dev_get_drvdata(dev); =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%u\n", asus->nv_dynamic_boost); } static DEVICE_ATTR_RW(nv_dynamic_boost); @@ -1381,9 +1421,12 @@ static ssize_t nv_temp_target_show(struct device *de= v, { struct asus_wmi *asus =3D dev_get_drvdata(dev); =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%u\n", asus->nv_temp_target); } static DEVICE_ATTR_RW(nv_temp_target); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* Ally MCU Powersave ****************************************************= ****/ =20 @@ -1424,6 +1467,7 @@ void set_ally_mcu_powersave(bool enabled) } EXPORT_SYMBOL_NS_GPL(set_ally_mcu_powersave, "ASUS_WMI"); =20 +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t mcu_powersave_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -1434,6 +1478,8 @@ static ssize_t mcu_powersave_show(struct device *dev, if (result < 0) return result; =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%d\n", result); } =20 @@ -1469,6 +1515,7 @@ static ssize_t mcu_powersave_store(struct device *dev, return count; } static DEVICE_ATTR_RW(mcu_powersave); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* Battery ***************************************************************= *****/ =20 @@ -2342,6 +2389,7 @@ static int asus_wmi_rfkill_init(struct asus_wmi *asus) } =20 /* Panel Overdrive *******************************************************= *****/ +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t panel_od_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -2352,6 +2400,8 @@ static ssize_t panel_od_show(struct device *dev, if (result < 0) return result; =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%d\n", result); } =20 @@ -2388,9 +2438,10 @@ static ssize_t panel_od_store(struct device *dev, return count; } static DEVICE_ATTR_RW(panel_od); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* Bootup sound **********************************************************= *****/ - +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t boot_sound_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -2401,6 +2452,8 @@ static ssize_t boot_sound_show(struct device *dev, if (result < 0) return result; =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%d\n", result); } =20 @@ -2436,8 +2489,10 @@ static ssize_t boot_sound_store(struct device *dev, return count; } static DEVICE_ATTR_RW(boot_sound); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* Mini-LED mode *********************************************************= *****/ +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t mini_led_mode_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -2468,6 +2523,8 @@ static ssize_t mini_led_mode_show(struct device *dev, } } =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "%d\n", value); } =20 @@ -2538,10 +2595,13 @@ static ssize_t available_mini_led_mode_show(struct = device *dev, return sysfs_emit(buf, "0 1 2\n"); } =20 + asus_wmi_show_deprecated(); + return sysfs_emit(buf, "0\n"); } =20 static DEVICE_ATTR_RO(available_mini_led_mode); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* Quirks ****************************************************************= *****/ =20 @@ -3829,6 +3889,7 @@ static int throttle_thermal_policy_set_default(struct= asus_wmi *asus) return throttle_thermal_policy_write(asus); } =20 +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) static ssize_t throttle_thermal_policy_show(struct device *dev, struct device_attribute *attr, char *buf) { @@ -3872,6 +3933,7 @@ static ssize_t throttle_thermal_policy_store(struct d= evice *dev, * Throttle thermal policy: 0 - default, 1 - overboost, 2 - silent */ static DEVICE_ATTR_RW(throttle_thermal_policy); +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 /* Platform profile ******************************************************= *****/ static int asus_wmi_platform_profile_get(struct device *dev, @@ -4473,27 +4535,29 @@ static struct attribute *platform_attributes[] =3D { &dev_attr_camera.attr, &dev_attr_cardr.attr, &dev_attr_touchpad.attr, - &dev_attr_charge_mode.attr, - &dev_attr_egpu_enable.attr, - &dev_attr_egpu_connected.attr, - &dev_attr_dgpu_disable.attr, - &dev_attr_gpu_mux_mode.attr, &dev_attr_lid_resume.attr, &dev_attr_als_enable.attr, &dev_attr_fan_boost_mode.attr, - &dev_attr_throttle_thermal_policy.attr, - &dev_attr_ppt_pl2_sppt.attr, - &dev_attr_ppt_pl1_spl.attr, - &dev_attr_ppt_fppt.attr, - &dev_attr_ppt_apu_sppt.attr, - &dev_attr_ppt_platform_sppt.attr, - &dev_attr_nv_dynamic_boost.attr, - &dev_attr_nv_temp_target.attr, - &dev_attr_mcu_powersave.attr, - &dev_attr_boot_sound.attr, - &dev_attr_panel_od.attr, - &dev_attr_mini_led_mode.attr, - &dev_attr_available_mini_led_mode.attr, +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) + &dev_attr_charge_mode.attr, + &dev_attr_egpu_enable.attr, + &dev_attr_egpu_connected.attr, + &dev_attr_dgpu_disable.attr, + &dev_attr_gpu_mux_mode.attr, + &dev_attr_ppt_pl2_sppt.attr, + &dev_attr_ppt_pl1_spl.attr, + &dev_attr_ppt_fppt.attr, + &dev_attr_ppt_apu_sppt.attr, + &dev_attr_ppt_platform_sppt.attr, + &dev_attr_nv_dynamic_boost.attr, + &dev_attr_nv_temp_target.attr, + &dev_attr_mcu_powersave.attr, + &dev_attr_boot_sound.attr, + &dev_attr_panel_od.attr, + &dev_attr_mini_led_mode.attr, + &dev_attr_available_mini_led_mode.attr, + &dev_attr_throttle_thermal_policy.attr, +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ NULL }; =20 @@ -4515,7 +4579,11 @@ static umode_t asus_sysfs_is_visible(struct kobject = *kobj, devid =3D ASUS_WMI_DEVID_LID_RESUME; else if (attr =3D=3D &dev_attr_als_enable.attr) devid =3D ASUS_WMI_DEVID_ALS_ENABLE; - else if (attr =3D=3D &dev_attr_charge_mode.attr) + else if (attr =3D=3D &dev_attr_fan_boost_mode.attr) + ok =3D asus->fan_boost_mode_available; + +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) + if (attr =3D=3D &dev_attr_charge_mode.attr) devid =3D ASUS_WMI_DEVID_CHARGE_MODE; else if (attr =3D=3D &dev_attr_egpu_enable.attr) ok =3D asus->egpu_enable_available; @@ -4553,6 +4621,7 @@ static umode_t asus_sysfs_is_visible(struct kobject *= kobj, ok =3D asus->mini_led_dev_id !=3D 0; else if (attr =3D=3D &dev_attr_available_mini_led_mode.attr) ok =3D asus->mini_led_dev_id !=3D 0; +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 if (devid !=3D -1) { ok =3D !(asus_wmi_get_devstate_simple(asus, devid) < 0); @@ -4808,6 +4877,7 @@ static int asus_wmi_add(struct platform_device *pdev) } =20 /* ensure defaults for tunables */ +#if IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) asus->ppt_pl2_sppt =3D 5; asus->ppt_pl1_spl =3D 5; asus->ppt_apu_sppt =3D 5; @@ -4830,17 +4900,18 @@ static int asus_wmi_add(struct platform_device *pde= v) asus->gpu_mux_dev =3D ASUS_WMI_DEVID_GPU_MUX; else if (asus_wmi_dev_is_present(asus, ASUS_WMI_DEVID_GPU_MUX_VIVO)) asus->gpu_mux_dev =3D ASUS_WMI_DEVID_GPU_MUX_VIVO; - - if (asus_wmi_dev_is_present(asus, ASUS_WMI_DEVID_TUF_RGB_MODE)) - asus->kbd_rgb_dev =3D ASUS_WMI_DEVID_TUF_RGB_MODE; - else if (asus_wmi_dev_is_present(asus, ASUS_WMI_DEVID_TUF_RGB_MODE2)) - asus->kbd_rgb_dev =3D ASUS_WMI_DEVID_TUF_RGB_MODE2; +#endif /* IS_ENABLED(CONFIG_ASUS_WMI_DEPRECATED_ATTRS) */ =20 if (asus_wmi_dev_is_present(asus, ASUS_WMI_DEVID_THROTTLE_THERMAL_POLICY)) asus->throttle_thermal_policy_dev =3D ASUS_WMI_DEVID_THROTTLE_THERMAL_PO= LICY; else if (asus_wmi_dev_is_present(asus, ASUS_WMI_DEVID_THROTTLE_THERMAL_PO= LICY_VIVO)) asus->throttle_thermal_policy_dev =3D ASUS_WMI_DEVID_THROTTLE_THERMAL_PO= LICY_VIVO; =20 + if (asus_wmi_dev_is_present(asus, ASUS_WMI_DEVID_TUF_RGB_MODE)) + asus->kbd_rgb_dev =3D ASUS_WMI_DEVID_TUF_RGB_MODE; + else if (asus_wmi_dev_is_present(asus, ASUS_WMI_DEVID_TUF_RGB_MODE2)) + asus->kbd_rgb_dev =3D ASUS_WMI_DEVID_TUF_RGB_MODE2; + err =3D fan_boost_mode_check_present(asus); if (err) goto fail_fan_boost_mode; --=20 2.51.2 From nobody Tue Dec 16 11:13:06 2025 Received: from out-189.mta1.migadu.com (out-189.mta1.migadu.com [95.215.58.189]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6D450241664 for ; Sun, 2 Nov 2025 21:53:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.189 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762120427; cv=none; b=UZT5rmes+rHEkX5IjbzwJ70lzv6OL/+fyArk7gwk7K71kDkKzO5kWbhQCi+kDf3ye9Z09dFKuA3umEXH6dwDhNuBoiAeOFphyl6eM4ml4rzvy4+RpBk9hVgHd51I2ZL2+EvaDQvLYdpvCTlQci/rVcpbVyqK6rAghv1Epw2FD0s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762120427; 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DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1762120423; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=1TA9DdzkAj9lKIweUDB1nhFYqTGkhxc+xWphLpK6kog=; b=hELUCtOAMxAG0592OhwtaUheZ/+m4ECpkcvsOm+fJKOixsWOo1O4Ag9atDln9PC3kuZcWW aBt5LwFMxT4qIjNxHwVcBMrO79qW8L3lr+bzdxNnFJEIBm7iWHdIWzUmJ6I6w9iw4YDsoT SKksI+D6mrwBkVm/R2AokeIGrGbbUyM= From: Denis Benato To: linux-kernel@vger.kernel.org Cc: platform-driver-x86@vger.kernel.org, "Hans de Goede" , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , "Limonciello, Mario" , "Luke D . Jones" , "Alok Tiwari" , "Derek John Clark" , "Mateusz Schyboll" , porfet828@gmail.com, "Denis Benato" , Denis Benato Subject: [PATCH v17 8/9] platform/x86: asus-wmi: rename ASUS_WMI_DEVID_PPT_FPPT Date: Sun, 2 Nov 2025 22:53:18 +0100 Message-ID: <20251102215319.3126879-9-denis.benato@linux.dev> In-Reply-To: <20251102215319.3126879-1-denis.benato@linux.dev> References: <20251102215319.3126879-1-denis.benato@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" Maintain power-related WMI macros naming consistency: rename ASUS_WMI_DEVID_PPT_FPPT to ASUS_WMI_DEVID_PPT_PL3_FPPT. Link: https://lore.kernel.org/all/cad7b458-5a7a-4975-94a1-d0c74f6f3de5@orac= le.com/ Suggested-by: ALOK TIWARI Signed-off-by: Denis Benato --- drivers/platform/x86/asus-wmi.c | 4 ++-- include/linux/platform_data/x86/asus-wmi.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/platform/x86/asus-wmi.c b/drivers/platform/x86/asus-wm= i.c index 6de633d4a748..64cfc0bf98dd 100644 --- a/drivers/platform/x86/asus-wmi.c +++ b/drivers/platform/x86/asus-wmi.c @@ -1218,7 +1218,7 @@ static ssize_t ppt_fppt_store(struct device *dev, if (value < PPT_TOTAL_MIN || value > PPT_TOTAL_MAX) return -EINVAL; =20 - err =3D asus_wmi_set_devstate(ASUS_WMI_DEVID_PPT_FPPT, value, &result); + err =3D asus_wmi_set_devstate(ASUS_WMI_DEVID_PPT_PL3_FPPT, value, &result= ); if (err) { pr_warn("Failed to set ppt_fppt: %d\n", err); return err; @@ -4602,7 +4602,7 @@ static umode_t asus_sysfs_is_visible(struct kobject *= kobj, else if (attr =3D=3D &dev_attr_ppt_pl1_spl.attr) devid =3D ASUS_WMI_DEVID_PPT_PL1_SPL; else if (attr =3D=3D &dev_attr_ppt_fppt.attr) - devid =3D ASUS_WMI_DEVID_PPT_FPPT; + devid =3D ASUS_WMI_DEVID_PPT_PL3_FPPT; else if (attr =3D=3D &dev_attr_ppt_apu_sppt.attr) devid =3D ASUS_WMI_DEVID_PPT_APU_SPPT; else if (attr =3D=3D &dev_attr_ppt_platform_sppt.attr) diff --git a/include/linux/platform_data/x86/asus-wmi.h b/include/linux/pla= tform_data/x86/asus-wmi.h index a906dfb834ab..2bda18bc4103 100644 --- a/include/linux/platform_data/x86/asus-wmi.h +++ b/include/linux/platform_data/x86/asus-wmi.h @@ -107,7 +107,7 @@ #define ASUS_WMI_DEVID_PPT_PL1_SPL 0x001200A3 #define ASUS_WMI_DEVID_PPT_APU_SPPT 0x001200B0 #define ASUS_WMI_DEVID_PPT_PLAT_SPPT 0x001200B1 -#define ASUS_WMI_DEVID_PPT_FPPT 0x001200C1 +#define ASUS_WMI_DEVID_PPT_PL3_FPPT 0x001200C1 #define ASUS_WMI_DEVID_NV_DYN_BOOST 0x001200C0 #define ASUS_WMI_DEVID_NV_THERM_TARGET 0x001200C2 =20 --=20 2.51.2 From nobody Tue Dec 16 11:13:06 2025 Received: from out-179.mta1.migadu.com (out-179.mta1.migadu.com [95.215.58.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1F61025F98E for ; Sun, 2 Nov 2025 21:53:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.179 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762120433; cv=none; b=rrEiHigWvrm6/IPk+QIss4IoifRnnrKX223lj7GTSbB/5ALwdVfFr4+paIWlgraXm1PpON/k2SNogcHv4fxiI6OnYC4DY2wcd8b4H3sofRCmkFe1IIAMNfkx/yhMe01n3/FYHYL6UuMOhti6eJ/AGN3gFRvTLO2KrZRLBrl1Kp4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762120433; c=relaxed/simple; bh=5M5dfxKMxOgVQuwNsrjhqaiyq5YR2f8lFTDeqxaPNIs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=OMRU8QbAMC1s4n00AmFuaWKWtN8mucquogyeNUIrBL5ziuqVVPq9nVIEnW5i8dVKP3MUec64d5UK3zQD42AAJdn+lKLSEEN0C87ZR03UjmR7BF5m09wPXlpAY4SOo+o+mndkRjdmTnIxW+E5hX3JEeYk/RBEBUuxyEnE1SFEPf8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=rGbAz/Hq; arc=none smtp.client-ip=95.215.58.179 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="rGbAz/Hq" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1762120425; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=QL3UKpHLu5r1XOGPuTVafKA6rYdWFKZTBoB+dqZk8dI=; b=rGbAz/HqsuRYKygSMwwpxBET+rnggjPBppyGm/kBcoD4AFEfWaXqUxQAlmoS9O/FFLv13K 3yKmdh2e3CWN7roIlMA5Yq/mOGMZ/ncOurmtZfz/iJA8FRMM7UVYSO3BJine2XkqPJcI66 hyoX0+F55PYkfit9iYJDY3SAdFOFZbo= From: Denis Benato To: linux-kernel@vger.kernel.org Cc: platform-driver-x86@vger.kernel.org, "Hans de Goede" , =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= , "Limonciello, Mario" , "Luke D . Jones" , "Alok Tiwari" , "Derek John Clark" , "Mateusz Schyboll" , porfet828@gmail.com, "Denis Benato" , Denis Benato Subject: [PATCH v17 9/9] platform/x86: asus-armoury: add ppt_* and nv_* tuning knobs Date: Sun, 2 Nov 2025 22:53:19 +0100 Message-ID: <20251102215319.3126879-10-denis.benato@linux.dev> In-Reply-To: <20251102215319.3126879-1-denis.benato@linux.dev> References: <20251102215319.3126879-1-denis.benato@linux.dev> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Migadu-Flow: FLOW_OUT Content-Type: text/plain; charset="utf-8" From: "Luke D. Jones" Adds the ppt_* and nv_* tuning knobs that are available via WMI methods and adds proper min/max levels plus defaults. The min/max are defined by ASUS and typically gained by looking at what they allow in the ASUS Armoury Crate application - ASUS does not share the values outside of this. It could also be possible to gain the AMD values by use of ryzenadj and testing for the minimum stable value. The general rule of thumb for adding to the match table is that if the model range has a single CPU used throughout, then the DMI match can omit the last letter of the model number as this is the GPU model. If a min or max value is not provided it is assumed that the particular setting is not supported. for example ppt_pl2_sppt_min/max is not set. If a _def is not set then the default is assumed to be _max It is assumed that at least AC settings are available so that the firmware attributes will be created - if no DC table is available and power is on DC, then reading the attributes is -ENODEV. Co-developed-by: Denis Benato Signed-off-by: Denis Benato Signed-off-by: Luke D. Jones Reviewed-by: Mario Limonciello Tested-by: Mateusz Schyboll Tested-by: Porfet Lillian --- drivers/platform/x86/asus-armoury.c | 296 ++++- drivers/platform/x86/asus-armoury.h | 1267 ++++++++++++++++++++ include/linux/platform_data/x86/asus-wmi.h | 3 + 3 files changed, 1560 insertions(+), 6 deletions(-) diff --git a/drivers/platform/x86/asus-armoury.c b/drivers/platform/x86/asu= s-armoury.c index b5a9783548a6..d57fbb5dc3d3 100644 --- a/drivers/platform/x86/asus-armoury.c +++ b/drivers/platform/x86/asus-armoury.c @@ -30,6 +30,7 @@ #include #include #include +#include #include =20 #include "asus-armoury.h" @@ -48,9 +49,23 @@ #define ASUS_MINI_LED_2024_STRONG 0x01 #define ASUS_MINI_LED_2024_OFF 0x02 =20 +/* Power tunable attribute name defines */ +#define ATTR_PPT_PL1_SPL "ppt_pl1_spl" +#define ATTR_PPT_PL2_SPPT "ppt_pl2_sppt" +#define ATTR_PPT_PL3_FPPT "ppt_pl3_fppt" +#define ATTR_PPT_APU_SPPT "ppt_apu_sppt" +#define ATTR_PPT_PLATFORM_SPPT "ppt_platform_sppt" +#define ATTR_NV_DYNAMIC_BOOST "nv_dynamic_boost" +#define ATTR_NV_TEMP_TARGET "nv_temp_target" +#define ATTR_NV_BASE_TGP "nv_base_tgp" +#define ATTR_NV_TGP "nv_tgp" + #define ASUS_POWER_CORE_MASK GENMASK(15, 8) #define ASUS_PERF_CORE_MASK GENMASK(7, 0) =20 +#define ASUS_ROG_TUNABLE_DC 0 +#define ASUS_ROG_TUNABLE_AC 1 + enum cpu_core_type { CPU_CORE_PERF =3D 0, CPU_CORE_POWER, @@ -78,6 +93,19 @@ struct cpu_cores { u32 max_power_cores; }; =20 +struct rog_tunables { + const struct power_limits *power_limits; + u32 ppt_pl1_spl; // cpu + u32 ppt_pl2_sppt; // cpu + u32 ppt_pl3_fppt; // cpu + u32 ppt_apu_sppt; // plat + u32 ppt_platform_sppt; // plat + + u32 nv_dynamic_boost; + u32 nv_temp_target; + u32 nv_tgp; +}; + struct asus_armoury_priv { struct device *fw_attr_dev; struct kset *fw_attr_kset; @@ -98,6 +126,9 @@ struct asus_armoury_priv { struct cpu_cores *cpu_cores; bool cpu_cores_changeable; =20 + /* Index 0 for DC, 1 for AC */ + struct rog_tunables *rog_tunables[2]; + u32 mini_led_dev_id; u32 gpu_mux_dev_id; }; @@ -928,6 +959,15 @@ static ssize_t cores_performance_current_value_store(s= truct kobject *kobj, ASUS_ATTR_GROUP_CORES_RW(cores_performance, "cores_performance", "Set the max available performance cores"); =20 +/* Define helper to access the current power mode tunable values */ +static inline struct rog_tunables *get_current_tunables(void) +{ + if (power_supply_is_system_supplied()) + return asus_armoury.rog_tunables[ASUS_ROG_TUNABLE_AC]; + + return asus_armoury.rog_tunables[ASUS_ROG_TUNABLE_DC]; +} + static ssize_t cores_efficiency_min_value_show(struct kobject *kobj, struc= t kobj_attribute *attr, char *buf) { @@ -983,6 +1023,24 @@ ASUS_ATTR_GROUP_BOOL_RW(screen_auto_brightness, "scre= en_auto_brightness", "Set the panel brightness to Off<0> or On<1>"); ASUS_ATTR_GROUP_BOOL_RO(egpu_connected, "egpu_connected", ASUS_WMI_DEVID_E= GPU_CONNECTED, "Show the eGPU connection status"); +ASUS_ATTR_GROUP_ROG_TUNABLE(ppt_pl1_spl, ATTR_PPT_PL1_SPL, ASUS_WMI_DEVID_= PPT_PL1_SPL, + "Set the CPU slow package limit"); +ASUS_ATTR_GROUP_ROG_TUNABLE(ppt_pl2_sppt, ATTR_PPT_PL2_SPPT, ASUS_WMI_DEVI= D_PPT_PL2_SPPT, + "Set the CPU fast package limit"); +ASUS_ATTR_GROUP_ROG_TUNABLE(ppt_pl3_fppt, ATTR_PPT_PL3_FPPT, ASUS_WMI_DEVI= D_PPT_PL3_FPPT, + "Set the CPU fastest package limit"); +ASUS_ATTR_GROUP_ROG_TUNABLE(ppt_apu_sppt, ATTR_PPT_APU_SPPT, ASUS_WMI_DEVI= D_PPT_APU_SPPT, + "Set the APU package limit"); +ASUS_ATTR_GROUP_ROG_TUNABLE(ppt_platform_sppt, ATTR_PPT_PLATFORM_SPPT, ASU= S_WMI_DEVID_PPT_PLAT_SPPT, + "Set the platform package limit"); +ASUS_ATTR_GROUP_ROG_TUNABLE(nv_dynamic_boost, ATTR_NV_DYNAMIC_BOOST, ASUS_= WMI_DEVID_NV_DYN_BOOST, + "Set the Nvidia dynamic boost limit"); +ASUS_ATTR_GROUP_ROG_TUNABLE(nv_temp_target, ATTR_NV_TEMP_TARGET, ASUS_WMI_= DEVID_NV_THERM_TARGET, + "Set the Nvidia max thermal limit"); +ASUS_ATTR_GROUP_ROG_TUNABLE(nv_tgp, "nv_tgp", ASUS_WMI_DEVID_DGPU_SET_TGP, + "Set the additional TGP on top of the base TGP"); +ASUS_ATTR_GROUP_INT_VALUE_ONLY_RO(nv_base_tgp, ATTR_NV_BASE_TGP, ASUS_WMI_= DEVID_DGPU_BASE_TGP, + "Read the base TGP value"); =20 /* If an attribute does not require any special case handling add it here = */ static const struct asus_attr_group armoury_attr_groups[] =3D { @@ -993,6 +1051,16 @@ static const struct asus_attr_group armoury_attr_grou= ps[] =3D { { &cores_efficiency_attr_group, ASUS_WMI_DEVID_CORES_MAX }, { &cores_performance_attr_group, ASUS_WMI_DEVID_CORES_MAX }, =20 + { &ppt_pl1_spl_attr_group, ASUS_WMI_DEVID_PPT_PL1_SPL }, + { &ppt_pl2_sppt_attr_group, ASUS_WMI_DEVID_PPT_PL2_SPPT }, + { &ppt_pl3_fppt_attr_group, ASUS_WMI_DEVID_PPT_PL3_FPPT }, + { &ppt_apu_sppt_attr_group, ASUS_WMI_DEVID_PPT_APU_SPPT }, + { &ppt_platform_sppt_attr_group, ASUS_WMI_DEVID_PPT_PLAT_SPPT }, + { &nv_dynamic_boost_attr_group, ASUS_WMI_DEVID_NV_DYN_BOOST }, + { &nv_temp_target_attr_group, ASUS_WMI_DEVID_NV_THERM_TARGET }, + { &nv_base_tgp_attr_group, ASUS_WMI_DEVID_DGPU_BASE_TGP }, + { &nv_tgp_attr_group, ASUS_WMI_DEVID_DGPU_SET_TGP }, + { &charge_mode_attr_group, ASUS_WMI_DEVID_CHARGE_MODE }, { &boot_sound_attr_group, ASUS_WMI_DEVID_BOOT_SOUND }, { &mcu_powersave_attr_group, ASUS_WMI_DEVID_MCU_POWERSAVE }, @@ -1001,8 +1069,76 @@ static const struct asus_attr_group armoury_attr_gro= ups[] =3D { { &screen_auto_brightness_attr_group, ASUS_WMI_DEVID_SCREEN_AUTO_BRIGHTNE= SS }, }; =20 +/** + * is_power_tunable_attr - Determines if an attribute is a power-related t= unable + * @name: The name of the attribute to check + * + * This function checks if the given attribute name is related to power tu= ning. + * + * Return: true if the attribute is a power-related tunable, false otherwi= se + */ +static bool is_power_tunable_attr(const char *name) +{ + static const char * const power_tunable_attrs[] =3D { + ATTR_PPT_PL1_SPL, ATTR_PPT_PL2_SPPT, + ATTR_PPT_PL3_FPPT, ATTR_PPT_APU_SPPT, + ATTR_PPT_PLATFORM_SPPT, ATTR_NV_DYNAMIC_BOOST, + ATTR_NV_TEMP_TARGET, ATTR_NV_BASE_TGP, + ATTR_NV_TGP + }; + + for (unsigned int i =3D 0; i < ARRAY_SIZE(power_tunable_attrs); i++) { + if (!strcmp(name, power_tunable_attrs[i])) + return true; + } + + return false; +} + +/** + * has_valid_limit - Checks if a power-related attribute has a valid limit= value + * @name: The name of the attribute to check + * @limits: Pointer to the power_limits structure containing limit values + * + * This function checks if a power-related attribute has a valid limit val= ue. + * It returns false if limits is NULL or if the corresponding limit value = is zero. + * + * Return: true if the attribute has a valid limit value, false otherwise + */ +static bool has_valid_limit(const char *name, const struct power_limits *l= imits) +{ + u32 limit_value =3D 0; + + if (!limits) + return false; + + if (!strcmp(name, ATTR_PPT_PL1_SPL)) + limit_value =3D limits->ppt_pl1_spl_max; + else if (!strcmp(name, ATTR_PPT_PL2_SPPT)) + limit_value =3D limits->ppt_pl2_sppt_max; + else if (!strcmp(name, ATTR_PPT_PL3_FPPT)) + limit_value =3D limits->ppt_pl3_fppt_max; + else if (!strcmp(name, ATTR_PPT_APU_SPPT)) + limit_value =3D limits->ppt_apu_sppt_max; + else if (!strcmp(name, ATTR_PPT_PLATFORM_SPPT)) + limit_value =3D limits->ppt_platform_sppt_max; + else if (!strcmp(name, ATTR_NV_DYNAMIC_BOOST)) + limit_value =3D limits->nv_dynamic_boost_max; + else if (!strcmp(name, ATTR_NV_TEMP_TARGET)) + limit_value =3D limits->nv_temp_target_max; + else if (!strcmp(name, ATTR_NV_BASE_TGP) || + !strcmp(name, ATTR_NV_TGP)) + limit_value =3D limits->nv_tgp_max; + + return limit_value > 0; +} + static int asus_fw_attr_add(void) { + const struct rog_tunables *const ac_rog_tunables =3D asus_armoury.rog_tun= ables[ASUS_ROG_TUNABLE_DC]; + const struct power_limits *limits; + bool should_create; + const char *name; int err, i; =20 asus_armoury.fw_attr_dev =3D device_create(&firmware_attributes_class, NU= LL, MKDEV(0, 0), @@ -1059,12 +1195,28 @@ static int asus_fw_attr_add(void) if (!armoury_has_devstate(armoury_attr_groups[i].wmi_devid)) continue; =20 - err =3D sysfs_create_group(&asus_armoury.fw_attr_kset->kobj, - armoury_attr_groups[i].attr_group); - if (err) { - pr_err("Failed to create sysfs-group for %s\n", - armoury_attr_groups[i].attr_group->name); - goto err_remove_groups; + /* Always create by default, unless PPT is not present */ + should_create =3D true; + name =3D armoury_attr_groups[i].attr_group->name; + + /* Check if this is a power-related tunable requiring limits */ + if (ac_rog_tunables && ac_rog_tunables->power_limits && + is_power_tunable_attr(name)) { + limits =3D ac_rog_tunables->power_limits; + /* Check only AC: if not present then DC won't be either */ + should_create =3D has_valid_limit(name, limits); + if (!should_create) + pr_debug("Missing max value for tunable %s\n", name); + } + + if (should_create) { + err =3D sysfs_create_group(&asus_armoury.fw_attr_kset->kobj, + armoury_attr_groups[i].attr_group); + if (err) { + pr_err("Failed to create sysfs-group for %s\n", + armoury_attr_groups[i].attr_group->name); + goto err_remove_groups; + } } } =20 @@ -1093,6 +1245,132 @@ static int asus_fw_attr_add(void) =20 /* Init / exit ***********************************************************= *****/ =20 +/* Set up the min/max and defaults for ROG tunables */ +static void init_rog_tunables(void) +{ + const struct power_limits *ac_limits, *dc_limits; + struct rog_tunables *ac_rog_tunables =3D NULL, *dc_rog_tunables =3D NULL; + const struct power_data *power_data; + const struct dmi_system_id *dmi_id; + + /* Match the system against the power_limits table */ + dmi_id =3D dmi_first_match(power_limits); + if (!dmi_id) { + pr_warn("No matching power limits found for this system\n"); + return; + } + + /* Get the power data for this system */ + power_data =3D dmi_id->driver_data; + if (!power_data) { + pr_info("No power data available for this system\n"); + return; + } + + /* Initialize AC power tunables */ + ac_limits =3D power_data->ac_data; + if (ac_limits) { + ac_rog_tunables =3D kzalloc(sizeof(*asus_armoury.rog_tunables[ASUS_ROG_T= UNABLE_AC]), + GFP_KERNEL); + if (!ac_rog_tunables) + goto err_nomem; + + asus_armoury.rog_tunables[ASUS_ROG_TUNABLE_AC] =3D ac_rog_tunables; + ac_rog_tunables->power_limits =3D ac_limits; + + /* Set initial AC values */ + ac_rog_tunables->ppt_pl1_spl =3D + ac_limits->ppt_pl1_spl_def ? + ac_limits->ppt_pl1_spl_def : + ac_limits->ppt_pl1_spl_max; + + ac_rog_tunables->ppt_pl2_sppt =3D + ac_limits->ppt_pl2_sppt_def ? + ac_limits->ppt_pl2_sppt_def : + ac_limits->ppt_pl2_sppt_max; + + ac_rog_tunables->ppt_pl3_fppt =3D + ac_limits->ppt_pl3_fppt_def ? + ac_limits->ppt_pl3_fppt_def : + ac_limits->ppt_pl3_fppt_max; + + ac_rog_tunables->ppt_apu_sppt =3D + ac_limits->ppt_apu_sppt_def ? + ac_limits->ppt_apu_sppt_def : + ac_limits->ppt_apu_sppt_max; + + ac_rog_tunables->ppt_platform_sppt =3D + ac_limits->ppt_platform_sppt_def ? + ac_limits->ppt_platform_sppt_def : + ac_limits->ppt_platform_sppt_max; + + ac_rog_tunables->nv_dynamic_boost =3D + ac_limits->nv_dynamic_boost_max; + ac_rog_tunables->nv_temp_target =3D + ac_limits->nv_temp_target_max; + ac_rog_tunables->nv_tgp =3D ac_limits->nv_tgp_max; + + pr_debug("AC power limits initialized for %s\n", dmi_id->matches[0].subs= tr); + } else { + pr_debug("No AC PPT limits defined\n"); + } + + /* Initialize DC power tunables */ + dc_limits =3D power_data->dc_data; + if (dc_limits) { + dc_rog_tunables =3D kzalloc(sizeof(*asus_armoury.rog_tunables[ASUS_ROG_T= UNABLE_DC]), + GFP_KERNEL); + if (!dc_rog_tunables) { + kfree(ac_rog_tunables); + goto err_nomem; + } + + asus_armoury.rog_tunables[ASUS_ROG_TUNABLE_DC] =3D dc_rog_tunables; + dc_rog_tunables->power_limits =3D dc_limits; + + /* Set initial DC values */ + dc_rog_tunables->ppt_pl1_spl =3D + dc_limits->ppt_pl1_spl_def ? + dc_limits->ppt_pl1_spl_def : + dc_limits->ppt_pl1_spl_max; + + dc_rog_tunables->ppt_pl2_sppt =3D + dc_limits->ppt_pl2_sppt_def ? + dc_limits->ppt_pl2_sppt_def : + dc_limits->ppt_pl2_sppt_max; + + dc_rog_tunables->ppt_pl3_fppt =3D + dc_limits->ppt_pl3_fppt_def ? + dc_limits->ppt_pl3_fppt_def : + dc_limits->ppt_pl3_fppt_max; + + dc_rog_tunables->ppt_apu_sppt =3D + dc_limits->ppt_apu_sppt_def ? + dc_limits->ppt_apu_sppt_def : + dc_limits->ppt_apu_sppt_max; + + dc_rog_tunables->ppt_platform_sppt =3D + dc_limits->ppt_platform_sppt_def ? + dc_limits->ppt_platform_sppt_def : + dc_limits->ppt_platform_sppt_max; + + dc_rog_tunables->nv_dynamic_boost =3D + dc_limits->nv_dynamic_boost_max; + dc_rog_tunables->nv_temp_target =3D + dc_limits->nv_temp_target_max; + dc_rog_tunables->nv_tgp =3D dc_limits->nv_tgp_max; + + pr_debug("DC power limits initialized for %s\n", dmi_id->matches[0].subs= tr); + } else { + pr_debug("No DC PPT limits defined\n"); + } + + return; + +err_nomem: + pr_err("Failed to allocate memory for tunables\n"); +} + static int __init asus_fw_init(void) { char *wmi_uid; @@ -1123,6 +1401,9 @@ static int __init asus_fw_init(void) asus_armoury.cpu_cores_changeable =3D true; } =20 + init_rog_tunables(); + + /* Must always be last step to ensure data is available */ return asus_fw_attr_add(); } =20 @@ -1145,6 +1426,9 @@ static void __exit asus_fw_exit(void) sysfs_remove_file(&asus_armoury.fw_attr_kset->kobj, &pending_reboot.attr); kset_unregister(asus_armoury.fw_attr_kset); device_destroy(&firmware_attributes_class, MKDEV(0, 0)); + + kfree(asus_armoury.rog_tunables[ASUS_ROG_TUNABLE_AC]); + kfree(asus_armoury.rog_tunables[ASUS_ROG_TUNABLE_DC]); } =20 module_init(asus_fw_init); diff --git a/drivers/platform/x86/asus-armoury.h b/drivers/platform/x86/asu= s-armoury.h index 9b5fedc083b0..24b68990e2ee 100644 --- a/drivers/platform/x86/asus-armoury.h +++ b/drivers/platform/x86/asus-armoury.h @@ -8,6 +8,7 @@ #ifndef _ASUS_ARMOURY_H_ #define _ASUS_ARMOURY_H_ =20 +#include #include #include #include @@ -225,4 +226,1270 @@ ssize_t armoury_attr_uint_show(struct kobject *kobj,= struct kobj_attribute *attr .name =3D _fsname, .attrs =3D _attrname##_attrs \ } =20 +#define ASUS_ATTR_GROUP_INT_VALUE_ONLY_RO(_attrname, _fsname, _wmi, _dispn= ame) \ + ASUS_WMI_SHOW_INT(_attrname##_current_value, "%d\n", _wmi); \ + static struct kobj_attribute attr_##_attrname##_current_value =3D \ + __ASUS_ATTR_RO(_attrname, current_value); \ + __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \ + static struct kobj_attribute attr_##_attrname##_type =3D \ + __ASUS_ATTR_RO_AS(type, int_type_show); \ + static struct attribute *_attrname##_attrs[] =3D { \ + &attr_##_attrname##_current_value.attr, \ + &attr_##_attrname##_display_name.attr, \ + &attr_##_attrname##_type.attr, NULL \ + }; \ + static const struct attribute_group _attrname##_attr_group =3D { \ + .name =3D _fsname, .attrs =3D _attrname##_attrs \ + } + +/* + * ROG PPT attributes need a little different in setup as they + * require rog_tunables members. + */ + +#define __ROG_TUNABLE_SHOW(_prop, _attrname, _val) \ + static ssize_t _attrname##_##_prop##_show( \ + struct kobject *kobj, struct kobj_attribute *attr, char *buf) \ + { \ + struct rog_tunables *tunables =3D get_current_tunables(); \ + \ + if (!tunables || !tunables->power_limits) \ + return -ENODEV; \ + \ + return sysfs_emit(buf, "%d\n", tunables->power_limits->_val); \ + } \ + static struct kobj_attribute attr_##_attrname##_##_prop =3D \ + __ASUS_ATTR_RO(_attrname, _prop) + +#define __ROG_TUNABLE_SHOW_DEFAULT(_attrname) \ + static ssize_t _attrname##_default_value_show( \ + struct kobject *kobj, struct kobj_attribute *attr, char *buf) \ + { \ + struct rog_tunables *tunables =3D get_current_tunables(); \ + \ + if (!tunables || !tunables->power_limits) \ + return -ENODEV; \ + \ + return sysfs_emit( \ + buf, "%d\n", \ + tunables->power_limits->_attrname##_def ? \ + tunables->power_limits->_attrname##_def : \ + tunables->power_limits->_attrname##_max); \ + } \ + static struct kobj_attribute attr_##_attrname##_default_value =3D \ + __ASUS_ATTR_RO(_attrname, default_value) + +#define __ROG_TUNABLE_RW(_attr, _wmi) \ + static ssize_t _attr##_current_value_store( \ + struct kobject *kobj, struct kobj_attribute *attr, \ + const char *buf, size_t count) \ + { \ + struct rog_tunables *tunables =3D get_current_tunables(); \ + \ + if (!tunables || !tunables->power_limits) \ + return -ENODEV; \ + \ + if (tunables->power_limits->_attr##_min =3D=3D \ + tunables->power_limits->_attr##_max) \ + return -EINVAL; \ + \ + return armoury_attr_uint_store(kobj, attr, buf, count, \ + tunables->power_limits->_attr##_min, \ + tunables->power_limits->_attr##_max, \ + &tunables->_attr, _wmi); \ + } \ + static ssize_t _attr##_current_value_show( \ + struct kobject *kobj, struct kobj_attribute *attr, char *buf) \ + { \ + struct rog_tunables *tunables =3D get_current_tunables(); \ + \ + if (!tunables) \ + return -ENODEV; \ + \ + return sysfs_emit(buf, "%u\n", tunables->_attr); \ + } \ + static struct kobj_attribute attr_##_attr##_current_value =3D \ + __ASUS_ATTR_RW(_attr, current_value) + +#define ASUS_ATTR_GROUP_ROG_TUNABLE(_attrname, _fsname, _wmi, _dispname) \ + __ROG_TUNABLE_RW(_attrname, _wmi); \ + __ROG_TUNABLE_SHOW_DEFAULT(_attrname); \ + __ROG_TUNABLE_SHOW(min_value, _attrname, _attrname##_min); \ + __ROG_TUNABLE_SHOW(max_value, _attrname, _attrname##_max); \ + __ATTR_SHOW_FMT(scalar_increment, _attrname, "%d\n", 1); \ + __ATTR_SHOW_FMT(display_name, _attrname, "%s\n", _dispname); \ + static struct kobj_attribute attr_##_attrname##_type =3D \ + __ASUS_ATTR_RO_AS(type, int_type_show); \ + static struct attribute *_attrname##_attrs[] =3D { \ + &attr_##_attrname##_current_value.attr, \ + &attr_##_attrname##_default_value.attr, \ + &attr_##_attrname##_min_value.attr, \ + &attr_##_attrname##_max_value.attr, \ + &attr_##_attrname##_scalar_increment.attr, \ + &attr_##_attrname##_display_name.attr, \ + &attr_##_attrname##_type.attr, \ + NULL \ + }; \ + static const struct attribute_group _attrname##_attr_group =3D { \ + .name =3D _fsname, .attrs =3D _attrname##_attrs \ + } + +/* Default is always the maximum value unless *_def is specified */ +struct power_limits { + u8 ppt_pl1_spl_min; + u8 ppt_pl1_spl_def; + u8 ppt_pl1_spl_max; + u8 ppt_pl2_sppt_min; + u8 ppt_pl2_sppt_def; + u8 ppt_pl2_sppt_max; + u8 ppt_pl3_fppt_min; + u8 ppt_pl3_fppt_def; + u8 ppt_pl3_fppt_max; + u8 ppt_apu_sppt_min; + u8 ppt_apu_sppt_def; + u8 ppt_apu_sppt_max; + u8 ppt_platform_sppt_min; + u8 ppt_platform_sppt_def; + u8 ppt_platform_sppt_max; + /* Nvidia GPU specific, default is always max */ + u8 nv_dynamic_boost_def; // unused. exists for macro + u8 nv_dynamic_boost_min; + u8 nv_dynamic_boost_max; + u8 nv_temp_target_def; // unused. exists for macro + u8 nv_temp_target_min; + u8 nv_temp_target_max; + u8 nv_tgp_def; // unused. exists for macro + u8 nv_tgp_min; + u8 nv_tgp_max; +}; + +struct power_data { + const struct power_limits *ac_data; + const struct power_limits *dc_data; + bool requires_fan_curve; +}; + +/* + * For each available attribute there must be a min and a max. + * _def is not required and will be assumed to be default =3D=3D max if mi= ssing. + */ +static const struct dmi_system_id power_limits[] =3D { + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA401W"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 80, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_tgp_min =3D 55, + .nv_tgp_max =3D 75, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 30, + .ppt_pl2_sppt_min =3D 31, + .ppt_pl2_sppt_max =3D 44, + .ppt_pl3_fppt_min =3D 45, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA507N"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 80, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 45, + .ppt_pl1_spl_max =3D 65, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 54, + .ppt_pl2_sppt_max =3D 65, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA507R"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 80 + }, + .dc_data =3D NULL, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA507X"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 80, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 20, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_tgp_min =3D 55, + .nv_tgp_max =3D 85, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 45, + .ppt_pl1_spl_max =3D 65, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 54, + .ppt_pl2_sppt_max =3D 65, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA507Z"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 65, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 105, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 15, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_tgp_min =3D 55, + .nv_tgp_max =3D 85, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 45, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_max =3D 60, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA607P"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 30, + .ppt_pl1_spl_def =3D 100, + .ppt_pl1_spl_max =3D 135, + .ppt_pl2_sppt_min =3D 30, + .ppt_pl2_sppt_def =3D 115, + .ppt_pl2_sppt_max =3D 135, + .ppt_pl3_fppt_min =3D 30, + .ppt_pl3_fppt_max =3D 135, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_tgp_min =3D 55, + .nv_tgp_max =3D 115, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_def =3D 45, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_def =3D 60, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 25, + .ppt_pl3_fppt_max =3D 80, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA608WI"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 90, + .ppt_pl1_spl_max =3D 90, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 90, + .ppt_pl2_sppt_max =3D 90, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_def =3D 90, + .ppt_pl3_fppt_max =3D 90, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_tgp_min =3D 55, + .nv_tgp_max =3D 115, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 45, + .ppt_pl1_spl_max =3D 65, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 54, + .ppt_pl2_sppt_max =3D 65, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_def =3D 65, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA617NS"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_apu_sppt_min =3D 15, + .ppt_apu_sppt_max =3D 80, + .ppt_platform_sppt_min =3D 30, + .ppt_platform_sppt_max =3D 120, + }, + .dc_data =3D &(struct power_limits) { + .ppt_apu_sppt_min =3D 25, + .ppt_apu_sppt_max =3D 35, + .ppt_platform_sppt_min =3D 45, + .ppt_platform_sppt_max =3D 100, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA617NT"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_apu_sppt_min =3D 15, + .ppt_apu_sppt_max =3D 80, + .ppt_platform_sppt_min =3D 30, + .ppt_platform_sppt_max =3D 115, + }, + .dc_data =3D &(struct power_limits) { + .ppt_apu_sppt_min =3D 15, + .ppt_apu_sppt_max =3D 45, + .ppt_platform_sppt_min =3D 30, + .ppt_platform_sppt_max =3D 50, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FA617XS"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_apu_sppt_min =3D 15, + .ppt_apu_sppt_max =3D 80, + .ppt_platform_sppt_min =3D 30, + .ppt_platform_sppt_max =3D 120, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_apu_sppt_min =3D 25, + .ppt_apu_sppt_max =3D 35, + .ppt_platform_sppt_min =3D 45, + .ppt_platform_sppt_max =3D 100, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FX507VI"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 135, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 135, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 45, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_max =3D 60, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "FX507Z"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 90, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 135, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 15, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 45, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_max =3D 60, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GA401Q"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 15, + .ppt_pl2_sppt_max =3D 80, + }, + .dc_data =3D NULL, + }, + }, + { + .matches =3D { + // This model is full AMD. No Nvidia dGPU. + DMI_MATCH(DMI_BOARD_NAME, "GA402R"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_apu_sppt_min =3D 15, + .ppt_apu_sppt_max =3D 80, + .ppt_platform_sppt_min =3D 30, + .ppt_platform_sppt_max =3D 115, + }, + .dc_data =3D &(struct power_limits) { + .ppt_apu_sppt_min =3D 25, + .ppt_apu_sppt_def =3D 30, + .ppt_apu_sppt_max =3D 45, + .ppt_platform_sppt_min =3D 40, + .ppt_platform_sppt_max =3D 60, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GA402X"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 35, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_def =3D 65, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 80, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 35, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 35, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GA403U"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 80, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_tgp_min =3D 55, + .nv_tgp_max =3D 65, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 35, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 35, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GA503R"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 35, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 65, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 80, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 20, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 25, + .ppt_pl1_spl_max =3D 65, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 54, + .ppt_pl2_sppt_max =3D 60, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 65, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GA605W"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 80, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 20, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_tgp_min =3D 55, + .nv_tgp_max =3D 85, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 35, + .ppt_pl2_sppt_min =3D 31, + .ppt_pl2_sppt_max =3D 44, + .ppt_pl3_fppt_min =3D 45, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GU603Z"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 60, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 135, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 20, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 40, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 40, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + } + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GU604V"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 65, + .ppt_pl1_spl_max =3D 120, + .ppt_pl2_sppt_min =3D 65, + .ppt_pl2_sppt_max =3D 150, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 40, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 40, + .ppt_pl2_sppt_max =3D 60, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GU605CW"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 45, + .ppt_pl1_spl_max =3D 85, + .ppt_pl2_sppt_min =3D 56, + .ppt_pl2_sppt_max =3D 110, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 20, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_tgp_min =3D 80, + .nv_tgp_def =3D 90, + .nv_tgp_max =3D 110, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 85, + .ppt_pl2_sppt_min =3D 32, + .ppt_pl2_sppt_max =3D 110, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GU605CX"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 45, + .ppt_pl1_spl_max =3D 85, + .ppt_pl2_sppt_min =3D 56, + .ppt_pl2_sppt_max =3D 110, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 20, + .nv_temp_target_min =3D 7, + .nv_temp_target_max =3D 87, + .nv_tgp_min =3D 95, + .nv_tgp_def =3D 100, + .nv_tgp_max =3D 110, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 85, + .ppt_pl2_sppt_min =3D 32, + .ppt_pl2_sppt_max =3D 110, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GU605M"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 90, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 135, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 20, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 35, + .ppt_pl2_sppt_min =3D 38, + .ppt_pl2_sppt_max =3D 53, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GV301Q"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 45, + .ppt_pl2_sppt_min =3D 65, + .ppt_pl2_sppt_max =3D 80, + }, + .dc_data =3D NULL, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GV301R"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 45, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 54, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 35, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 35, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GV601R"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 35, + .ppt_pl1_spl_max =3D 90, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 54, + .ppt_pl2_sppt_max =3D 100, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_def =3D 80, + .ppt_pl3_fppt_max =3D 125, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 28, + .ppt_pl1_spl_max =3D 65, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 54, + .ppt_pl2_sppt_max =3D 60, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_def =3D 80, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GV601V"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_def =3D 100, + .ppt_pl1_spl_max =3D 110, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 135, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 20, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 40, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 40, + .ppt_pl2_sppt_max =3D 60, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "GX650P"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 110, + .ppt_pl1_spl_max =3D 130, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 125, + .ppt_pl2_sppt_max =3D 130, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_def =3D 125, + .ppt_pl3_fppt_max =3D 135, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_def =3D 25, + .ppt_pl1_spl_max =3D 65, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_def =3D 35, + .ppt_pl2_sppt_max =3D 65, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_def =3D 42, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G513I"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + /* Yes this laptop is very limited */ + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 15, + .ppt_pl2_sppt_max =3D 80, + }, + .dc_data =3D NULL, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G513QM"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + /* Yes this laptop is very limited */ + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 100, + .ppt_pl2_sppt_min =3D 15, + .ppt_pl2_sppt_max =3D 190, + }, + .dc_data =3D NULL, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G513R"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 35, + .ppt_pl1_spl_max =3D 90, + .ppt_pl2_sppt_min =3D 54, + .ppt_pl2_sppt_max =3D 100, + .ppt_pl3_fppt_min =3D 54, + .ppt_pl3_fppt_max =3D 125, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 50, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 50, + .ppt_pl3_fppt_min =3D 28, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G614J"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 140, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 175, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 55, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 70, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G634J"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 140, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 175, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 55, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 70, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G713PV"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 30, + .ppt_pl1_spl_def =3D 120, + .ppt_pl1_spl_max =3D 130, + .ppt_pl2_sppt_min =3D 65, + .ppt_pl2_sppt_def =3D 125, + .ppt_pl2_sppt_max =3D 130, + .ppt_pl3_fppt_min =3D 65, + .ppt_pl3_fppt_def =3D 125, + .ppt_pl3_fppt_max =3D 130, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 65, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 65, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 75, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G733C"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 170, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 175, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 35, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 35, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G733P"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 30, + .ppt_pl1_spl_def =3D 100, + .ppt_pl1_spl_max =3D 130, + .ppt_pl2_sppt_min =3D 65, + .ppt_pl2_sppt_def =3D 125, + .ppt_pl2_sppt_max =3D 130, + .ppt_pl3_fppt_min =3D 65, + .ppt_pl3_fppt_def =3D 125, + .ppt_pl3_fppt_max =3D 130, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 65, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 65, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 75, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G814J"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 140, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 140, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 55, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 70, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "G834J"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 28, + .ppt_pl1_spl_max =3D 140, + .ppt_pl2_sppt_min =3D 28, + .ppt_pl2_sppt_max =3D 175, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 25, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 55, + .ppt_pl2_sppt_min =3D 25, + .ppt_pl2_sppt_max =3D 70, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + .requires_fan_curve =3D true, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "H7606W"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 15, + .ppt_pl1_spl_max =3D 80, + .ppt_pl2_sppt_min =3D 35, + .ppt_pl2_sppt_max =3D 80, + .ppt_pl3_fppt_min =3D 35, + .ppt_pl3_fppt_max =3D 80, + .nv_dynamic_boost_min =3D 5, + .nv_dynamic_boost_max =3D 20, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + .nv_tgp_min =3D 55, + .nv_tgp_max =3D 85, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 25, + .ppt_pl1_spl_max =3D 35, + .ppt_pl2_sppt_min =3D 31, + .ppt_pl2_sppt_max =3D 44, + .ppt_pl3_fppt_min =3D 45, + .ppt_pl3_fppt_max =3D 65, + .nv_temp_target_min =3D 75, + .nv_temp_target_max =3D 87, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "RC71"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 7, + .ppt_pl1_spl_max =3D 30, + .ppt_pl2_sppt_min =3D 15, + .ppt_pl2_sppt_max =3D 43, + .ppt_pl3_fppt_min =3D 15, + .ppt_pl3_fppt_max =3D 53, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 7, + .ppt_pl1_spl_def =3D 15, + .ppt_pl1_spl_max =3D 25, + .ppt_pl2_sppt_min =3D 15, + .ppt_pl2_sppt_def =3D 20, + .ppt_pl2_sppt_max =3D 30, + .ppt_pl3_fppt_min =3D 15, + .ppt_pl3_fppt_def =3D 25, + .ppt_pl3_fppt_max =3D 35, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "RC72"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 7, + .ppt_pl1_spl_max =3D 30, + .ppt_pl2_sppt_min =3D 15, + .ppt_pl2_sppt_max =3D 43, + .ppt_pl3_fppt_min =3D 15, + .ppt_pl3_fppt_max =3D 53, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 7, + .ppt_pl1_spl_def =3D 17, + .ppt_pl1_spl_max =3D 25, + .ppt_pl2_sppt_min =3D 15, + .ppt_pl2_sppt_def =3D 24, + .ppt_pl2_sppt_max =3D 30, + .ppt_pl3_fppt_min =3D 15, + .ppt_pl3_fppt_def =3D 30, + .ppt_pl3_fppt_max =3D 35, + }, + }, + }, + { + .matches =3D { + DMI_MATCH(DMI_BOARD_NAME, "RC73XA"), + }, + .driver_data =3D &(struct power_data) { + .ac_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 7, + .ppt_pl1_spl_max =3D 35, + .ppt_pl2_sppt_min =3D 14, + .ppt_pl2_sppt_max =3D 45, + .ppt_pl3_fppt_min =3D 19, + .ppt_pl3_fppt_max =3D 55, + }, + .dc_data =3D &(struct power_limits) { + .ppt_pl1_spl_min =3D 7, + .ppt_pl1_spl_def =3D 17, + .ppt_pl1_spl_max =3D 35, + .ppt_pl2_sppt_min =3D 13, + .ppt_pl2_sppt_def =3D 21, + .ppt_pl2_sppt_max =3D 45, + .ppt_pl3_fppt_min =3D 19, + .ppt_pl3_fppt_def =3D 26, + .ppt_pl3_fppt_max =3D 55, + }, + }, + }, + {} +}; + #endif /* _ASUS_ARMOURY_H_ */ diff --git a/include/linux/platform_data/x86/asus-wmi.h b/include/linux/pla= tform_data/x86/asus-wmi.h index 2bda18bc4103..51b7ccddbdaf 100644 --- a/include/linux/platform_data/x86/asus-wmi.h +++ b/include/linux/platform_data/x86/asus-wmi.h @@ -144,6 +144,9 @@ =20 #define ASUS_WMI_DEVID_APU_MEM 0x000600C1 =20 +#define ASUS_WMI_DEVID_DGPU_BASE_TGP 0x00120099 +#define ASUS_WMI_DEVID_DGPU_SET_TGP 0x00120098 + /* gpu mux switch, 0 =3D dGPU, 1 =3D Optimus */ #define ASUS_WMI_DEVID_GPU_MUX 0x00090016 #define ASUS_WMI_DEVID_GPU_MUX_VIVO 0x00090026 --=20 2.51.2