From nobody Mon Feb 9 03:30:32 2026 Received: from m16.mail.163.com (m16.mail.163.com [220.197.31.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 115C11C3C18; Sun, 2 Nov 2025 14:32:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.31.5 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762093979; cv=none; b=PYP5FZzM09i/oVdoGEATjQLJlmsDWJEdxGTg1QXWAXhRuIODws9fsckdOs5H/M3XEF5+2amN/pGADV4pHApUsKC1i1C1dx1nvFLwte7rMXmsQZ349WnQXV6miC1F8+idj8pqOjFpfoknJJ28KV9aJHf0p2pEsPuUH4qEQpDltXk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762093979; c=relaxed/simple; bh=hEiJbhYD13gFMTAh0JXxdsVAfQ4EQ9Br4DKPtYZ0fW8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=D90nXXUOOtE+RlplKBBIYqVRRV0CYqYQidZEPYQgkB49is/n4Eemq8HBpxVumUM3cKLCsgZcZ8idIZYGkTZZpCMN0U6ynN6aJAczb6ZWWrOUTR/PUJ++MzqkNHUkz9gejx/jR2CgqbCRJnY2zdnnuKTFZGf94U4DzNxYZ4iS2I4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com; spf=pass smtp.mailfrom=163.com; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b=efe4IK8B; arc=none smtp.client-ip=220.197.31.5 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=163.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b="efe4IK8B" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:To:Subject:Date:Message-Id:MIME-Version; bh=Hh ls6A+3/SNax9SaFUeFpATr4kJuyuoT+8CwX9o9kfs=; b=efe4IK8BYjPcCbZyhC UL01GHjWMbSF08QDyXK1AQm9X2zh+cfO9Hm4Af3glGxKj3vQFL8hmfRAituWadQk bfxop0+nfcHnpoXxkgYq4kBt2Y6DqKwwj28Ff4DjdjKoddO5q6gDGGWUrD6OI3ba 57Iqj+JCeRfTDoDBEHqHEuhRA= Received: from zhb.. (unknown []) by gzga-smtp-mtada-g0-1 (Coremail) with SMTP id _____wAH5VdpawdpqU+1BA--.1772S3; Sun, 02 Nov 2025 22:32:10 +0800 (CST) From: Hans Zhang <18255117159@163.com> To: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com, kwilczynski@kernel.org, mani@kernel.org, ilpo.jarvinen@linux.intel.com, jingoohan1@gmail.com Cc: robh@kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Hans Zhang <18255117159@163.com> Subject: [PATCH v4 1/3] PCI: Add public pcie_valid_speed() for shared validation Date: Sun, 2 Nov 2025 22:32:04 +0800 Message-Id: <20251102143206.111347-2-18255117159@163.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251102143206.111347-1-18255117159@163.com> References: <20251102143206.111347-1-18255117159@163.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: _____wAH5VdpawdpqU+1BA--.1772S3 X-Coremail-Antispam: 1Uf129KBjvJXoW7urW5CF43uw45Xw15KF43trb_yoW8WrWxpa yDAa45AF18Ja15ZFsYya18XFy5GFZayFW0krW3u39xZF13A3s3Jay5tayxtry2qrWIyF15 Xa1YyF18CF4jyr7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x0pR0oGdUUUUU= X-CM-SenderInfo: rpryjkyvrrlimvzbiqqrwthudrp/1tbiDxr5o2kHZmtoewAAs- Content-Type: text/plain; charset="utf-8" Extract the PCIe speed validation logic from bwctrl.c's static pcie_valid_speed() into a public static inline function in pci.h. This allows consistent speed range checks (2.5GT/s to 64.0GT/s) across multiple drivers and functions, avoiding duplicate code and ensuring validation consistency as per PCIe specifications. Signed-off-by: Hans Zhang <18255117159@163.com> --- drivers/pci/pci.h | 5 +++++ drivers/pci/pcie/bwctrl.c | 5 ----- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 4492b809094b..e95f2e1d0634 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -526,6 +526,11 @@ void pci_bus_put(struct pci_bus *bus); (speed) =3D=3D PCIE_SPEED_2_5GT ? 2500*8/10 : \ 0) =20 +static inline bool pcie_valid_speed(enum pci_bus_speed speed) +{ + return (speed >=3D PCIE_SPEED_2_5GT) && (speed <=3D PCIE_SPEED_64_0GT); +} + static inline int pcie_dev_speed_mbps(enum pci_bus_speed speed) { switch (speed) { diff --git a/drivers/pci/pcie/bwctrl.c b/drivers/pci/pcie/bwctrl.c index 36f939f23d34..5953b6940992 100644 --- a/drivers/pci/pcie/bwctrl.c +++ b/drivers/pci/pcie/bwctrl.c @@ -48,11 +48,6 @@ struct pcie_bwctrl_data { /* Prevent port removal during Link Speed changes. */ static DECLARE_RWSEM(pcie_bwctrl_setspeed_rwsem); =20 -static bool pcie_valid_speed(enum pci_bus_speed speed) -{ - return (speed >=3D PCIE_SPEED_2_5GT) && (speed <=3D PCIE_SPEED_64_0GT); -} - static u16 pci_bus_speed2lnkctl2(enum pci_bus_speed speed) { static const u8 speed_conv[] =3D { --=20 2.34.1 From nobody Mon Feb 9 03:30:32 2026 Received: from m16.mail.163.com (m16.mail.163.com [117.135.210.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A0F5E221DAD; Sun, 2 Nov 2025 14:32:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=117.135.210.5 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762093968; cv=none; b=GaC3EpjkVcwnSOvtwkQAZgeDrv0QKUyw8+itiKCsvVDPY6l93itjqGT2PRr3rR8sRzICLUMGbjU9LWiBmjPLzVRJQ5R8SDfFAUDuM4/L+NV5XSMkXQ51L0LvL0zCKCXRtGS4UegHgUpevwM20Iqabp7aobsRV2aIzZNRxEOgov4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762093968; c=relaxed/simple; bh=44+9f5QUL8F96KzX9kNDCAOXu+GBFX0MjZJVcoomQmY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=IqNAQon74gYYJ7hmgoRdL1G23tVSvG3jwLdvr9kBCVvvSb7CrcO05zUHGNDCrQaoP56kGLLtPZQJMW0GgQdFMGQssq45kkXHMqxg30tg3rQR6RqP/SeAHnrojICgYhAplxu6xaSBSmqi88QSiD+Afz8V7VrrIvyL2Q2jZtKBt98= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com; spf=pass smtp.mailfrom=163.com; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b=SVL2gEcd; arc=none smtp.client-ip=117.135.210.5 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=163.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b="SVL2gEcd" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:To:Subject:Date:Message-Id:MIME-Version; bh=Vs DxYwS8FJtUeB1QXeElDQeZXyhg/H30pOf2g1BiWjU=; b=SVL2gEcd1JT2zP8O6I g8CVZX7BlbJ55aCdVPjXbxm/MJbBIyWL1ZQNoeB80CD2gR6Lnkw+qSKKANQX3Xgh 9Jdvch2RlET/szs5cMzkVmlhS7wwHABYmd4E9/KzPIzG7KcZhOIEgFMBqUx+YH7y kBMSAMejEAp4Mf8z+Y/9GpwAE= Received: from zhb.. (unknown []) by gzga-smtp-mtada-g0-1 (Coremail) with SMTP id _____wAH5VdpawdpqU+1BA--.1772S4; Sun, 02 Nov 2025 22:32:11 +0800 (CST) From: Hans Zhang <18255117159@163.com> To: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com, kwilczynski@kernel.org, mani@kernel.org, ilpo.jarvinen@linux.intel.com, jingoohan1@gmail.com Cc: robh@kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Hans Zhang <18255117159@163.com> Subject: [PATCH v4 2/3] PCI: Move pci_bus_speed2lnkctl2() to public header Date: Sun, 2 Nov 2025 22:32:05 +0800 Message-Id: <20251102143206.111347-3-18255117159@163.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251102143206.111347-1-18255117159@163.com> References: <20251102143206.111347-1-18255117159@163.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: _____wAH5VdpawdpqU+1BA--.1772S4 X-Coremail-Antispam: 1Uf129KBjvJXoW7Ww4UCw4ktF48ury7Kw1kAFb_yoW5JFy7pa 9rCry5AF18A3W3AFZYg3WkXa45XFn3JFWUCr43W395XFyfA395Ga42yFWFvryaqrWFkryr Ja15JF48C3WUKF7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x0pia0PgUUUUU= X-CM-SenderInfo: rpryjkyvrrlimvzbiqqrwthudrp/xtbCwwsRtGkHa2sPAgAA3O Content-Type: text/plain; charset="utf-8" Move the static array-based pci_bus_speed2lnkctl2() function from bwctrl.c to pci.h as a public inline function. This provides efficient O(1) speed-to-LNKCTL2 value conversion using static array lookup, maintaining optimal performance while enabling code reuse by other PCIe drivers. Signed-off-by: Hans Zhang <18255117159@163.com> --- drivers/pci/pci.h | 17 +++++++++++++++++ drivers/pci/pcie/bwctrl.c | 17 ----------------- 2 files changed, 17 insertions(+), 17 deletions(-) diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index e95f2e1d0634..ff0c56fd6568 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -531,6 +531,23 @@ static inline bool pcie_valid_speed(enum pci_bus_speed= speed) return (speed >=3D PCIE_SPEED_2_5GT) && (speed <=3D PCIE_SPEED_64_0GT); } =20 +static inline u16 pci_bus_speed2lnkctl2(enum pci_bus_speed speed) +{ + static const u8 speed_conv[] =3D { + [PCIE_SPEED_2_5GT] =3D PCI_EXP_LNKCTL2_TLS_2_5GT, + [PCIE_SPEED_5_0GT] =3D PCI_EXP_LNKCTL2_TLS_5_0GT, + [PCIE_SPEED_8_0GT] =3D PCI_EXP_LNKCTL2_TLS_8_0GT, + [PCIE_SPEED_16_0GT] =3D PCI_EXP_LNKCTL2_TLS_16_0GT, + [PCIE_SPEED_32_0GT] =3D PCI_EXP_LNKCTL2_TLS_32_0GT, + [PCIE_SPEED_64_0GT] =3D PCI_EXP_LNKCTL2_TLS_64_0GT, + }; + + if (WARN_ON_ONCE(!pcie_valid_speed(speed))) + return 0; + + return speed_conv[speed]; +} + static inline int pcie_dev_speed_mbps(enum pci_bus_speed speed) { switch (speed) { diff --git a/drivers/pci/pcie/bwctrl.c b/drivers/pci/pcie/bwctrl.c index 5953b6940992..aa98476879e4 100644 --- a/drivers/pci/pcie/bwctrl.c +++ b/drivers/pci/pcie/bwctrl.c @@ -48,23 +48,6 @@ struct pcie_bwctrl_data { /* Prevent port removal during Link Speed changes. */ static DECLARE_RWSEM(pcie_bwctrl_setspeed_rwsem); =20 -static u16 pci_bus_speed2lnkctl2(enum pci_bus_speed speed) -{ - static const u8 speed_conv[] =3D { - [PCIE_SPEED_2_5GT] =3D PCI_EXP_LNKCTL2_TLS_2_5GT, - [PCIE_SPEED_5_0GT] =3D PCI_EXP_LNKCTL2_TLS_5_0GT, - [PCIE_SPEED_8_0GT] =3D PCI_EXP_LNKCTL2_TLS_8_0GT, - [PCIE_SPEED_16_0GT] =3D PCI_EXP_LNKCTL2_TLS_16_0GT, - [PCIE_SPEED_32_0GT] =3D PCI_EXP_LNKCTL2_TLS_32_0GT, - [PCIE_SPEED_64_0GT] =3D PCI_EXP_LNKCTL2_TLS_64_0GT, - }; - - if (WARN_ON_ONCE(!pcie_valid_speed(speed))) - return 0; - - return speed_conv[speed]; -} - static inline u16 pcie_supported_speeds2target_speed(u8 supported_speeds) { return __fls(supported_speeds); --=20 2.34.1 From nobody Mon Feb 9 03:30:32 2026 Received: from m16.mail.163.com (m16.mail.163.com [220.197.31.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 32EAE13635C; Sun, 2 Nov 2025 14:32:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=220.197.31.5 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762093963; cv=none; b=crpAyvURsHYrW5qVVh3cLu8Tg7YajEuub7+a0LdshFnF1lSejHfOg0A8yJXlh8ghg/hwwfsdagBHtUHhnksLM04fSumnItURIJ0QyLRPfJp+WQZ+0aqI/5EJt3CyBa/CuaB+E29R7hCdt9VjdhuYSwBNI19YIRr6FV56y53tDsw= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1762093963; c=relaxed/simple; bh=s27eGuBOjSehs2VSpjzagnyOuK168w1Km3iqgB4Axv8=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=gzHcY8kYqXkxgrvRglWU2aILCgvQsx5gN2rtN7prTOTQ/l1EAJQKIwDxrvitQqCoo5dExi3TAFt6yRfXaZY1ULV6cS9F/2Lzwt2yuCkP4jjfB8NBoWXNaWFU1JrWIm7MxdZDlO3xer1R5mgmvFGjtInbOzu5SutsHiXBFY/An/w= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com; spf=pass smtp.mailfrom=163.com; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b=bqL5aQwn; arc=none smtp.client-ip=220.197.31.5 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=163.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=163.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=163.com header.i=@163.com header.b="bqL5aQwn" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=163.com; s=s110527; h=From:To:Subject:Date:Message-Id:MIME-Version; bh=SG vG/fGHW1BPmlWo1ZKpiTtP2XrTKwTIg+faOGSh7vE=; b=bqL5aQwnokDGDMbQiL asntsJHLLjR1xsUajOD7JWJCDBYxOos9Gurv60KYluiwNkk7bSCRhdcaufBhg1M1 7NhgoAqmhAk3mrFhrr6e3JdmaHnY+QY+wC/HHgUs/KBmCBDxq9huWq8kAAixFy3H OtK2o7M4ZK+IXMZ5ivFGN7VGA= Received: from zhb.. (unknown []) by gzga-smtp-mtada-g0-1 (Coremail) with SMTP id _____wAH5VdpawdpqU+1BA--.1772S5; Sun, 02 Nov 2025 22:32:12 +0800 (CST) From: Hans Zhang <18255117159@163.com> To: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com, kwilczynski@kernel.org, mani@kernel.org, ilpo.jarvinen@linux.intel.com, jingoohan1@gmail.com Cc: robh@kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Hans Zhang <18255117159@163.com> Subject: [PATCH v4 3/3] PCI: dwc: Use common speed conversion function Date: Sun, 2 Nov 2025 22:32:06 +0800 Message-Id: <20251102143206.111347-4-18255117159@163.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251102143206.111347-1-18255117159@163.com> References: <20251102143206.111347-1-18255117159@163.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-CM-TRANSID: _____wAH5VdpawdpqU+1BA--.1772S5 X-Coremail-Antispam: 1Uf129KBjvJXoW7uFWDZFy3tr4UWF4ftw4xZwb_yoW8Ary5pa y3AF40vF18JF43ZFs0ga4kXFyUXFnxGrWDGFZ8Was3XFy2yasxWF10y34Sq34akrZ2yr1a 9r13JrWUG3W7tF7anT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2 9KBjDUYxBIdaVFxhVjvjDU0xZFpf9x0zR3kusUUUUU= X-CM-SenderInfo: rpryjkyvrrlimvzbiqqrwthudrp/1tbiDwP5o2kHZmtoigAAsX Content-Type: text/plain; charset="utf-8" Replace the private switch-based speed conversion in dw_pcie_link_set_max_speed() with the public pci_bus_speed2lnkctl2() function. This eliminates duplicate conversion logic and ensures consistency with other PCIe drivers, while handling invalid speeds by falling back to hardware capabilities. Signed-off-by: Hans Zhang <18255117159@163.com> --- drivers/pci/controller/dwc/pcie-designware.c | 18 +++--------------- 1 file changed, 3 insertions(+), 15 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/con= troller/dwc/pcie-designware.c index c644216995f6..20ba314e82d5 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -717,24 +717,12 @@ static void dw_pcie_link_set_max_speed(struct dw_pcie= *pci) ctrl2 =3D dw_pcie_readl_dbi(pci, offset + PCI_EXP_LNKCTL2); ctrl2 &=3D ~PCI_EXP_LNKCTL2_TLS; =20 - switch (pcie_link_speed[pci->max_link_speed]) { - case PCIE_SPEED_2_5GT: - link_speed =3D PCI_EXP_LNKCTL2_TLS_2_5GT; - break; - case PCIE_SPEED_5_0GT: - link_speed =3D PCI_EXP_LNKCTL2_TLS_5_0GT; - break; - case PCIE_SPEED_8_0GT: - link_speed =3D PCI_EXP_LNKCTL2_TLS_8_0GT; - break; - case PCIE_SPEED_16_0GT: - link_speed =3D PCI_EXP_LNKCTL2_TLS_16_0GT; - break; - default: + link_speed =3D pcie_link_speed[pci->max_link_speed]; + link_speed =3D pci_bus_speed2lnkctl2(link_speed); + if (link_speed =3D=3D 0) { /* Use hardware capability */ link_speed =3D FIELD_GET(PCI_EXP_LNKCAP_SLS, cap); ctrl2 &=3D ~PCI_EXP_LNKCTL2_HASD; - break; } =20 dw_pcie_writel_dbi(pci, offset + PCI_EXP_LNKCTL2, ctrl2 | link_speed); --=20 2.34.1