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Two embedded Ethernet devices are present on one of the downstream ports. As all these ports are present in the node represent the downstream ports and embedded endpoints. Power to the TC9563 is supplied through two LDO regulators, controlled by two GPIOs, which are added as fixed regulators. Configure the TC9563 through I2C. Reviewed-by: Bjorn Andersson Acked-by: Manivannan Sadhasivam Reviewed-by: Dmitry Baryshkov Signed-off-by: Krishna Chaitanya Chundru --- arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts | 128 +++++++++++++++++++++++= ++++ arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- 2 files changed, 129 insertions(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts b/arch/arm64/boot= /dts/qcom/qcs6490-rb3gen2.dts index 18cea8812001421456dc85547c3c711e2c42182a..6aa49519508a2f88afa23f8f801= 5f986c0a5b84e 100644 --- a/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts +++ b/arch/arm64/boot/dts/qcom/qcs6490-rb3gen2.dts @@ -262,6 +262,30 @@ vph_pwr: vph-pwr-regulator { regulator-max-microvolt =3D <3700000>; }; =20 + vdd_ntn_0p9: regulator-vdd-ntn-0p9 { + compatible =3D "regulator-fixed"; + regulator-name =3D "VDD_NTN_0P9"; + gpio =3D <&pm8350c_gpios 2 GPIO_ACTIVE_HIGH>; + regulator-min-microvolt =3D <899400>; + regulator-max-microvolt =3D <899400>; + enable-active-high; + pinctrl-0 =3D <&ntn_0p9_en>; + pinctrl-names =3D "default"; + regulator-enable-ramp-delay =3D <4300>; + }; + + vdd_ntn_1p8: regulator-vdd-ntn-1p8 { + compatible =3D "regulator-fixed"; + regulator-name =3D "VDD_NTN_1P8"; + gpio =3D <&pm8350c_gpios 3 GPIO_ACTIVE_HIGH>; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + enable-active-high; + pinctrl-0 =3D <&ntn_1p8_en>; + pinctrl-names =3D "default"; + regulator-enable-ramp-delay =3D <10000>; + }; + wcn6750-pmu { compatible =3D "qcom,wcn6750-pmu"; pinctrl-0 =3D <&bt_en>; @@ -843,6 +867,78 @@ &pcie1_phy { status =3D "okay"; }; =20 +&pcie1_port0 { + pcie@0,0 { + compatible =3D "pci1179,0623"; + reg =3D <0x10000 0x0 0x0 0x0 0x0>; + #address-cells =3D <3>; + #size-cells =3D <2>; + + device_type =3D "pci"; + ranges; + bus-range =3D <0x2 0xff>; + + vddc-supply =3D <&vdd_ntn_0p9>; + vdd18-supply =3D <&vdd_ntn_1p8>; + vdd09-supply =3D <&vdd_ntn_0p9>; + vddio1-supply =3D <&vdd_ntn_1p8>; + vddio2-supply =3D <&vdd_ntn_1p8>; + vddio18-supply =3D <&vdd_ntn_1p8>; + + i2c-parent =3D <&i2c0 0x77>; + + resx-gpios =3D <&pm8350c_gpios 1 GPIO_ACTIVE_LOW>; + + pinctrl-0 =3D <&tc9563_rsex_n>; + pinctrl-names =3D "default"; + + pcie@1,0 { + reg =3D <0x20800 0x0 0x0 0x0 0x0>; + #address-cells =3D <3>; + #size-cells =3D <2>; + + device_type =3D "pci"; + ranges; + bus-range =3D <0x3 0xff>; + }; + + pcie@2,0 { + reg =3D <0x21000 0x0 0x0 0x0 0x0>; + #address-cells =3D <3>; + #size-cells =3D <2>; + + device_type =3D "pci"; + ranges; + bus-range =3D <0x4 0xff>; + }; + + pcie@3,0 { + reg =3D <0x21800 0x0 0x0 0x0 0x0>; + #address-cells =3D <3>; + #size-cells =3D <2>; + device_type =3D "pci"; + ranges; + bus-range =3D <0x5 0xff>; + + pci@0,0 { + reg =3D <0x50000 0x0 0x0 0x0 0x0>; + #address-cells =3D <3>; + #size-cells =3D <2>; + device_type =3D "pci"; + ranges; + }; + + pci@0,1 { + reg =3D <0x50100 0x0 0x0 0x0 0x0>; + #address-cells =3D <3>; + #size-cells =3D <2>; + device_type =3D "pci"; + ranges; + }; + }; + }; +}; + &pm7325_gpios { kypd_vol_up_n: kypd-vol-up-n-state { pins =3D "gpio6"; @@ -1119,6 +1215,38 @@ right_spkr: speaker@0,2 { }; }; =20 +&pm8350c_gpios { + ntn_0p9_en: ntn-0p9-en-state { + pins =3D "gpio2"; + function =3D "normal"; + + bias-disable; + input-disable; + output-enable; + power-source =3D <0>; + }; + + ntn_1p8_en: ntn-1p8-en-state { + pins =3D "gpio3"; + function =3D "normal"; + + bias-disable; + input-disable; + output-enable; + power-source =3D <0>; + }; + + tc9563_rsex_n: tc9563-resx-state { + pins =3D "gpio1"; + function =3D "normal"; + + bias-disable; + input-disable; + output-enable; + power-source =3D <0>; + }; +}; + &tlmm { gpio-reserved-ranges =3D <32 2>, /* ADSP */ <48 4>; /* NFC */ diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qco= m/sc7280.dtsi index 4b04dea57ec8cc652e37f1d93c410404adaadd5d..23cf2c8c72b0bab67467e4b60cd= 57a3e658efa68 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2424,7 +2424,7 @@ pcie1: pcie@1c08000 { =20 status =3D "disabled"; =20 - pcie@0 { + pcie1_port0: pcie@0 { device_type =3D "pci"; reg =3D <0x0 0x0 0x0 0x0 0x0>; bus-range =3D <0x01 0xff>; --=20 2.34.1