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Signed-off-by: Dmitry Baryshkov Reviewed-by: Konrad Dybcio --- drivers/interconnect/qcom/glymur.c | 21 --------------------- drivers/interconnect/qcom/icc-rpmh.c | 18 +++++------------- drivers/interconnect/qcom/icc-rpmh.h | 5 ----- drivers/interconnect/qcom/milos.c | 12 ------------ drivers/interconnect/qcom/qcs615.c | 8 -------- drivers/interconnect/qcom/qcs8300.c | 13 ------------- drivers/interconnect/qcom/qdu1000.c | 4 ---- drivers/interconnect/qcom/sa8775p.c | 14 -------------- drivers/interconnect/qcom/sar2130p.c | 9 --------- drivers/interconnect/qcom/sc7180.c | 12 ------------ drivers/interconnect/qcom/sc7280.c | 12 ------------ drivers/interconnect/qcom/sc8180x.c | 11 ----------- drivers/interconnect/qcom/sc8280xp.c | 12 ------------ drivers/interconnect/qcom/sdm670.c | 8 -------- drivers/interconnect/qcom/sdm845.c | 8 -------- drivers/interconnect/qcom/sdx55.c | 3 --- drivers/interconnect/qcom/sdx65.c | 3 --- drivers/interconnect/qcom/sdx75.c | 6 ------ drivers/interconnect/qcom/sm6350.c | 10 ---------- drivers/interconnect/qcom/sm7150.c | 10 ---------- drivers/interconnect/qcom/sm8150.c | 10 ---------- drivers/interconnect/qcom/sm8350.c | 10 ---------- drivers/interconnect/qcom/sm8450.c | 11 ----------- drivers/interconnect/qcom/sm8550.c | 14 -------------- drivers/interconnect/qcom/sm8650.c | 14 -------------- drivers/interconnect/qcom/sm8750.c | 14 -------------- drivers/interconnect/qcom/x1e80100.c | 19 ------------------- 27 files changed, 5 insertions(+), 286 deletions(-) diff --git a/drivers/interconnect/qcom/glymur.c b/drivers/interconnect/qcom= /glymur.c index 104ac6c1bd3665de92e15d577cb51111289c794a..e5c07795a6c67ab8a59daf2fc4b= 8a5fa6dd014d6 100644 --- a/drivers/interconnect/qcom/glymur.c +++ b/drivers/interconnect/qcom/glymur.c @@ -1878,7 +1878,6 @@ static const struct qcom_icc_desc glymur_aggre1_noc = =3D { .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, .num_bcms =3D ARRAY_SIZE(aggre1_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_node * const aggre2_noc_nodes[] =3D { @@ -1900,7 +1899,6 @@ static const struct qcom_icc_desc glymur_aggre2_noc = =3D { .config =3D &glymur_aggre2_noc_regmap_config, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), - .alloc_dyn_id =3D true, .qos_requires_clocks =3D true, }; =20 @@ -1929,7 +1927,6 @@ static const struct qcom_icc_desc glymur_aggre3_noc = =3D { .config =3D &glymur_aggre3_noc_regmap_config, .nodes =3D aggre3_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre3_noc_nodes), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const aggre4_noc_bcms[] =3D { @@ -1958,7 +1955,6 @@ static const struct qcom_icc_desc glymur_aggre4_noc = =3D { .num_nodes =3D ARRAY_SIZE(aggre4_noc_nodes), .bcms =3D aggre4_noc_bcms, .num_bcms =3D ARRAY_SIZE(aggre4_noc_bcms), - .alloc_dyn_id =3D true, .qos_requires_clocks =3D true, }; =20 @@ -1982,7 +1978,6 @@ static const struct qcom_icc_desc glymur_clk_virt =3D= { .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, .num_bcms =3D ARRAY_SIZE(clk_virt_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const cnoc_cfg_bcms[] =3D { @@ -2059,7 +2054,6 @@ static const struct qcom_icc_desc glymur_cnoc_cfg =3D= { .num_nodes =3D ARRAY_SIZE(cnoc_cfg_nodes), .bcms =3D cnoc_cfg_bcms, .num_bcms =3D ARRAY_SIZE(cnoc_cfg_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const cnoc_main_bcms[] =3D { @@ -2092,7 +2086,6 @@ static const struct qcom_icc_desc glymur_cnoc_main = =3D { .num_nodes =3D ARRAY_SIZE(cnoc_main_nodes), .bcms =3D cnoc_main_bcms, .num_bcms =3D ARRAY_SIZE(cnoc_main_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const hscnoc_bcms[] =3D { @@ -2136,7 +2129,6 @@ static const struct qcom_icc_desc glymur_hscnoc =3D { .num_nodes =3D ARRAY_SIZE(hscnoc_nodes), .bcms =3D hscnoc_bcms, .num_bcms =3D ARRAY_SIZE(hscnoc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_node * const lpass_ag_noc_nodes[] =3D { @@ -2156,7 +2148,6 @@ static const struct qcom_icc_desc glymur_lpass_ag_noc= =3D { .config =3D &glymur_lpass_ag_noc_regmap_config, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const lpass_lpiaon_noc_bcms[] =3D { @@ -2182,7 +2173,6 @@ static const struct qcom_icc_desc glymur_lpass_lpiaon= _noc =3D { .num_nodes =3D ARRAY_SIZE(lpass_lpiaon_noc_nodes), .bcms =3D lpass_lpiaon_noc_bcms, .num_bcms =3D ARRAY_SIZE(lpass_lpiaon_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_node * const lpass_lpicx_noc_nodes[] =3D { @@ -2202,7 +2192,6 @@ static const struct qcom_icc_desc glymur_lpass_lpicx_= noc =3D { .config =3D &glymur_lpass_lpicx_noc_regmap_config, .nodes =3D lpass_lpicx_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_lpicx_noc_nodes), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const mc_virt_bcms[] =3D { @@ -2220,7 +2209,6 @@ static const struct qcom_icc_desc glymur_mc_virt =3D { .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, .num_bcms =3D ARRAY_SIZE(mc_virt_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const mmss_noc_bcms[] =3D { @@ -2259,7 +2247,6 @@ static const struct qcom_icc_desc glymur_mmss_noc =3D= { .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, .num_bcms =3D ARRAY_SIZE(mmss_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_node * const nsinoc_nodes[] =3D { @@ -2280,7 +2267,6 @@ static const struct qcom_icc_desc glymur_nsinoc =3D { .config =3D &glymur_nsinoc_regmap_config, .nodes =3D nsinoc_nodes, .num_nodes =3D ARRAY_SIZE(nsinoc_nodes), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const nsp_noc_bcms[] =3D { @@ -2306,7 +2292,6 @@ static const struct qcom_icc_desc glymur_nsp_noc =3D { .num_nodes =3D ARRAY_SIZE(nsp_noc_nodes), .bcms =3D nsp_noc_bcms, .num_bcms =3D ARRAY_SIZE(nsp_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_node * const oobm_ss_noc_nodes[] =3D { @@ -2326,7 +2311,6 @@ static const struct qcom_icc_desc glymur_oobm_ss_noc = =3D { .config =3D &glymur_oobm_ss_noc_regmap_config, .nodes =3D oobm_ss_noc_nodes, .num_nodes =3D ARRAY_SIZE(oobm_ss_noc_nodes), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const pcie_east_anoc_bcms[] =3D { @@ -2356,7 +2340,6 @@ static const struct qcom_icc_desc glymur_pcie_east_an= oc =3D { .num_nodes =3D ARRAY_SIZE(pcie_east_anoc_nodes), .bcms =3D pcie_east_anoc_bcms, .num_bcms =3D ARRAY_SIZE(pcie_east_anoc_bcms), - .alloc_dyn_id =3D true, .qos_requires_clocks =3D true, }; =20 @@ -2388,7 +2371,6 @@ static const struct qcom_icc_desc glymur_pcie_east_sl= v_noc =3D { .num_nodes =3D ARRAY_SIZE(pcie_east_slv_noc_nodes), .bcms =3D pcie_east_slv_noc_bcms, .num_bcms =3D ARRAY_SIZE(pcie_east_slv_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const pcie_west_anoc_bcms[] =3D { @@ -2420,7 +2402,6 @@ static const struct qcom_icc_desc glymur_pcie_west_an= oc =3D { .num_nodes =3D ARRAY_SIZE(pcie_west_anoc_nodes), .bcms =3D pcie_west_anoc_bcms, .num_bcms =3D ARRAY_SIZE(pcie_west_anoc_bcms), - .alloc_dyn_id =3D true, .qos_requires_clocks =3D true, }; =20 @@ -2454,7 +2435,6 @@ static const struct qcom_icc_desc glymur_pcie_west_sl= v_noc =3D { .num_nodes =3D ARRAY_SIZE(pcie_west_slv_noc_nodes), .bcms =3D pcie_west_slv_noc_bcms, .num_bcms =3D ARRAY_SIZE(pcie_west_slv_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const system_noc_bcms[] =3D { @@ -2488,7 +2468,6 @@ static const struct qcom_icc_desc glymur_system_noc = =3D { .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, .num_bcms =3D ARRAY_SIZE(system_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static const struct of_device_id qnoc_of_match[] =3D { diff --git a/drivers/interconnect/qcom/icc-rpmh.c b/drivers/interconnect/qc= om/icc-rpmh.c index 001404e91041597eab7f251606873182e52e360c..f90c29111f48ef810a8949ecd25= bfbacf20805cb 100644 --- a/drivers/interconnect/qcom/icc-rpmh.c +++ b/drivers/interconnect/qcom/icc-rpmh.c @@ -280,14 +280,10 @@ int qcom_icc_rpmh_probe(struct platform_device *pdev) if (!qn) continue; =20 - if (desc->alloc_dyn_id) { - if (!qn->node) - qn->node =3D icc_node_create_dyn(); - node =3D qn->node; - } else { - node =3D icc_node_create(qn->id); - } + if (!qn->node) + qn->node =3D icc_node_create_dyn(); =20 + node =3D qn->node; if (IS_ERR(node)) { ret =3D PTR_ERR(node); goto err_remove_nodes; @@ -302,12 +298,8 @@ int qcom_icc_rpmh_probe(struct platform_device *pdev) node->data =3D qn; icc_node_add(node, provider); =20 - for (j =3D 0; j < qn->num_links; j++) { - if (desc->alloc_dyn_id) - icc_link_nodes(node, &qn->link_nodes[j]->node); - else - icc_link_create(node, qn->links[j]); - } + for (j =3D 0; j < qn->num_links; j++) + icc_link_nodes(node, &qn->link_nodes[j]->node); =20 data->nodes[i] =3D node; } diff --git a/drivers/interconnect/qcom/icc-rpmh.h b/drivers/interconnect/qc= om/icc-rpmh.h index b72939cceba38e92154f6af5a93149337fa13479..09d8791402dc4bd67fd092268eb= 1458bcd8c6c8f 100644 --- a/drivers/interconnect/qcom/icc-rpmh.h +++ b/drivers/interconnect/qcom/icc-rpmh.h @@ -81,8 +81,6 @@ struct qcom_icc_qosbox { /** * struct qcom_icc_node - Qualcomm specific interconnect nodes * @name: the node name used in debugfs - * @links: an array of nodes where we can go next while traversing - * @id: a unique node identifier * @link_nodes: links associated with this node * @node: icc_node associated with this node * @num_links: the total number of @links @@ -96,8 +94,6 @@ struct qcom_icc_qosbox { */ struct qcom_icc_node { const char *name; - u16 links[MAX_LINKS]; - u16 id; struct icc_node *node; u16 num_links; u16 channels; @@ -158,7 +154,6 @@ struct qcom_icc_desc { struct qcom_icc_bcm * const *bcms; size_t num_bcms; bool qos_requires_clocks; - bool alloc_dyn_id; }; =20 int qcom_icc_aggregate(struct icc_node *node, u32 tag, u32 avg_bw, diff --git a/drivers/interconnect/qcom/milos.c b/drivers/interconnect/qcom/= milos.c index 814ec0517f6b8f42ae9d7ce3cd5cebcbaae35ae8..d010b106728a37c9384cd0625e5= 3a4f93466ada4 100644 --- a/drivers/interconnect/qcom/milos.c +++ b/drivers/interconnect/qcom/milos.c @@ -1522,7 +1522,6 @@ static const struct qcom_icc_desc milos_aggre1_noc = =3D { .config =3D &milos_aggre1_noc_regmap_config, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const aggre2_noc_bcms[] =3D { @@ -1556,7 +1555,6 @@ static const struct qcom_icc_desc milos_aggre2_noc = =3D { .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, .num_bcms =3D ARRAY_SIZE(aggre2_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const clk_virt_bcms[] =3D { @@ -1576,7 +1574,6 @@ static const struct qcom_icc_desc milos_clk_virt =3D { .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, .num_bcms =3D ARRAY_SIZE(clk_virt_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const cnoc_cfg_bcms[] =3D { @@ -1637,7 +1634,6 @@ static const struct qcom_icc_desc milos_cnoc_cfg =3D { .num_nodes =3D ARRAY_SIZE(cnoc_cfg_nodes), .bcms =3D cnoc_cfg_bcms, .num_bcms =3D ARRAY_SIZE(cnoc_cfg_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const cnoc_main_bcms[] =3D { @@ -1680,7 +1676,6 @@ static const struct qcom_icc_desc milos_cnoc_main =3D= { .num_nodes =3D ARRAY_SIZE(cnoc_main_nodes), .bcms =3D cnoc_main_bcms, .num_bcms =3D ARRAY_SIZE(cnoc_main_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const gem_noc_bcms[] =3D { @@ -1721,7 +1716,6 @@ static const struct qcom_icc_desc milos_gem_noc =3D { .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, .num_bcms =3D ARRAY_SIZE(gem_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_node * const lpass_ag_noc_nodes[] =3D { @@ -1741,7 +1735,6 @@ static const struct qcom_icc_desc milos_lpass_ag_noc = =3D { .config =3D &milos_lpass_ag_noc_regmap_config, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const mc_virt_bcms[] =3D { @@ -1759,7 +1752,6 @@ static const struct qcom_icc_desc milos_mc_virt =3D { .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, .num_bcms =3D ARRAY_SIZE(mc_virt_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const mmss_noc_bcms[] =3D { @@ -1795,7 +1787,6 @@ static const struct qcom_icc_desc milos_mmss_noc =3D { .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, .num_bcms =3D ARRAY_SIZE(mmss_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const nsp_noc_bcms[] =3D { @@ -1821,7 +1812,6 @@ static const struct qcom_icc_desc milos_nsp_noc =3D { .num_nodes =3D ARRAY_SIZE(nsp_noc_nodes), .bcms =3D nsp_noc_bcms, .num_bcms =3D ARRAY_SIZE(nsp_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const pcie_anoc_bcms[] =3D { @@ -1850,7 +1840,6 @@ static const struct qcom_icc_desc milos_pcie_anoc =3D= { .num_nodes =3D ARRAY_SIZE(pcie_anoc_nodes), .bcms =3D pcie_anoc_bcms, .num_bcms =3D ARRAY_SIZE(pcie_anoc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const system_noc_bcms[] =3D { @@ -1885,7 +1874,6 @@ static const struct qcom_icc_desc milos_system_noc = =3D { .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, .num_bcms =3D ARRAY_SIZE(system_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static const struct of_device_id qnoc_of_match[] =3D { diff --git a/drivers/interconnect/qcom/qcs615.c b/drivers/interconnect/qcom= /qcs615.c index fb0f623c0e645dce540afb9857c6f11a24a70cd8..797956eb6ff542c8d9a25a4b564= f1683409e43b9 100644 --- a/drivers/interconnect/qcom/qcs615.c +++ b/drivers/interconnect/qcom/qcs615.c @@ -1214,7 +1214,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc qcs615_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1233,7 +1232,6 @@ static struct qcom_icc_node * const camnoc_virt_nodes= [] =3D { }; =20 static const struct qcom_icc_desc qcs615_camnoc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D camnoc_virt_nodes, .num_nodes =3D ARRAY_SIZE(camnoc_virt_nodes), .bcms =3D camnoc_virt_bcms, @@ -1292,7 +1290,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc qcs615_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1306,7 +1303,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs615_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), }; @@ -1336,7 +1332,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs615_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1354,7 +1349,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs615_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1383,7 +1377,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs615_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1426,7 +1419,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc qcs615_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/qcs8300.c b/drivers/interconnect/qco= m/qcs8300.c index 077f4beb4bd1ae0e508c0683296f0a38cecc0471..70a377bbcf2930a4bdddcf6c3d9= 8e95e4ad92561 100644 --- a/drivers/interconnect/qcom/qcs8300.c +++ b/drivers/interconnect/qcom/qcs8300.c @@ -1600,7 +1600,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc qcs8300_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1626,7 +1625,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc qcs8300_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1649,7 +1647,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs8300_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -1744,7 +1741,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc qcs8300_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1758,7 +1754,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs8300_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), }; @@ -1792,7 +1787,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs8300_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1810,7 +1804,6 @@ static struct qcom_icc_node * const gpdsp_anoc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc qcs8300_gpdsp_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D gpdsp_anoc_nodes, .num_nodes =3D ARRAY_SIZE(gpdsp_anoc_nodes), .bcms =3D gpdsp_anoc_bcms, @@ -1834,7 +1827,6 @@ static struct qcom_icc_node * const lpass_ag_noc_node= s[] =3D { }; =20 static const struct qcom_icc_desc qcs8300_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), .bcms =3D lpass_ag_noc_bcms, @@ -1852,7 +1844,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs8300_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1882,7 +1873,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs8300_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1903,7 +1893,6 @@ static struct qcom_icc_node * const nspa_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qcs8300_nspa_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D nspa_noc_nodes, .num_nodes =3D ARRAY_SIZE(nspa_noc_nodes), .bcms =3D nspa_noc_bcms, @@ -1921,7 +1910,6 @@ static struct qcom_icc_node * const pcie_anoc_nodes[]= =3D { }; =20 static const struct qcom_icc_desc qcs8300_pcie_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D pcie_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_anoc_nodes), .bcms =3D pcie_anoc_bcms, @@ -1950,7 +1938,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc qcs8300_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/qdu1000.c b/drivers/interconnect/qco= m/qdu1000.c index 4de0f17e4c57f77e9bd6f8bc7108359c4370c396..0006413241dc88bcc4397abc5be= ab1b8705dee27 100644 --- a/drivers/interconnect/qcom/qdu1000.c +++ b/drivers/interconnect/qcom/qdu1000.c @@ -834,7 +834,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qdu1000_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -862,7 +861,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] =3D= { }; =20 static const struct qcom_icc_desc qdu1000_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -880,7 +878,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] =3D= { }; =20 static const struct qcom_icc_desc qdu1000_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -967,7 +964,6 @@ static struct qcom_icc_node * const system_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc qdu1000_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sa8775p.c b/drivers/interconnect/qco= m/sa8775p.c index d144e8cb5d1e3a69410975bd6b7abd9578c01407..8ce4e5fe05f2e5d0ad5cee0eb41= 00877ecd144cc 100644 --- a/drivers/interconnect/qcom/sa8775p.c +++ b/drivers/interconnect/qcom/sa8775p.c @@ -1841,7 +1841,6 @@ static const struct qcom_icc_desc sa8775p_aggre1_noc = =3D { .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, .num_bcms =3D ARRAY_SIZE(aggre1_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const aggre2_noc_bcms[] =3D { @@ -1869,7 +1868,6 @@ static const struct qcom_icc_desc sa8775p_aggre2_noc = =3D { .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, .num_bcms =3D ARRAY_SIZE(aggre2_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const clk_virt_bcms[] =3D { @@ -1894,7 +1892,6 @@ static const struct qcom_icc_desc sa8775p_clk_virt = =3D { .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, .num_bcms =3D ARRAY_SIZE(clk_virt_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const config_noc_bcms[] =3D { @@ -2000,7 +1997,6 @@ static const struct qcom_icc_desc sa8775p_config_noc = =3D { .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, .num_bcms =3D ARRAY_SIZE(config_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const dc_noc_bcms[] =3D { @@ -2017,7 +2013,6 @@ static const struct qcom_icc_desc sa8775p_dc_noc =3D { .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), .bcms =3D dc_noc_bcms, .num_bcms =3D ARRAY_SIZE(dc_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const gem_noc_bcms[] =3D { @@ -2054,7 +2049,6 @@ static const struct qcom_icc_desc sa8775p_gem_noc =3D= { .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, .num_bcms =3D ARRAY_SIZE(gem_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const gpdsp_anoc_bcms[] =3D { @@ -2073,7 +2067,6 @@ static const struct qcom_icc_desc sa8775p_gpdsp_anoc = =3D { .num_nodes =3D ARRAY_SIZE(gpdsp_anoc_nodes), .bcms =3D gpdsp_anoc_bcms, .num_bcms =3D ARRAY_SIZE(gpdsp_anoc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const lpass_ag_noc_bcms[] =3D { @@ -2097,7 +2090,6 @@ static const struct qcom_icc_desc sa8775p_lpass_ag_no= c =3D { .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), .bcms =3D lpass_ag_noc_bcms, .num_bcms =3D ARRAY_SIZE(lpass_ag_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const mc_virt_bcms[] =3D { @@ -2115,7 +2107,6 @@ static const struct qcom_icc_desc sa8775p_mc_virt =3D= { .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, .num_bcms =3D ARRAY_SIZE(mc_virt_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const mmss_noc_bcms[] =3D { @@ -2148,7 +2139,6 @@ static const struct qcom_icc_desc sa8775p_mmss_noc = =3D { .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, .num_bcms =3D ARRAY_SIZE(mmss_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const nspa_noc_bcms[] =3D { @@ -2169,7 +2159,6 @@ static const struct qcom_icc_desc sa8775p_nspa_noc = =3D { .num_nodes =3D ARRAY_SIZE(nspa_noc_nodes), .bcms =3D nspa_noc_bcms, .num_bcms =3D ARRAY_SIZE(nspa_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const nspb_noc_bcms[] =3D { @@ -2190,7 +2179,6 @@ static const struct qcom_icc_desc sa8775p_nspb_noc = =3D { .num_nodes =3D ARRAY_SIZE(nspb_noc_nodes), .bcms =3D nspb_noc_bcms, .num_bcms =3D ARRAY_SIZE(nspb_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const pcie_anoc_bcms[] =3D { @@ -2208,7 +2196,6 @@ static const struct qcom_icc_desc sa8775p_pcie_anoc = =3D { .num_nodes =3D ARRAY_SIZE(pcie_anoc_nodes), .bcms =3D pcie_anoc_bcms, .num_bcms =3D ARRAY_SIZE(pcie_anoc_bcms), - .alloc_dyn_id =3D true, }; =20 static struct qcom_icc_bcm * const system_noc_bcms[] =3D { @@ -2237,7 +2224,6 @@ static const struct qcom_icc_desc sa8775p_system_noc = =3D { .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, .num_bcms =3D ARRAY_SIZE(system_noc_bcms), - .alloc_dyn_id =3D true, }; =20 static const struct of_device_id qnoc_of_match[] =3D { diff --git a/drivers/interconnect/qcom/sar2130p.c b/drivers/interconnect/qc= om/sar2130p.c index a0b04929058f7e92a60e441b2cc82ee8984daf41..34cb3fc1f99575d25f397f02b84= 8e4d4066f060d 100644 --- a/drivers/interconnect/qcom/sar2130p.c +++ b/drivers/interconnect/qcom/sar2130p.c @@ -1474,7 +1474,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sar2130p_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -1537,7 +1536,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sar2130p_config_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), @@ -1568,7 +1566,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sar2130p_gem_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), @@ -1592,7 +1589,6 @@ static struct qcom_icc_node * const lpass_ag_noc_node= s[] =3D { }; =20 static const struct qcom_icc_desc sar2130p_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), @@ -1611,7 +1607,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sar2130p_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1640,7 +1635,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sar2130p_mmss_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), @@ -1660,7 +1654,6 @@ static struct qcom_icc_node * const nsp_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sar2130p_nsp_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D nsp_noc_nodes, .num_nodes =3D ARRAY_SIZE(nsp_noc_nodes), @@ -1679,7 +1672,6 @@ static struct qcom_icc_node * const pcie_anoc_nodes[]= =3D { }; =20 static const struct qcom_icc_desc sar2130p_pcie_anoc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D pcie_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_anoc_nodes), @@ -1719,7 +1711,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sar2130p_system_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), diff --git a/drivers/interconnect/qcom/sc7180.c b/drivers/interconnect/qcom= /sc7180.c index 9f94b987c4448a04dc984ad09b0733c33c9bb76a..0ea06facf81e2592e26e36bdf1d= b0fb27a6d8c51 100644 --- a/drivers/interconnect/qcom/sc7180.c +++ b/drivers/interconnect/qcom/sc7180.c @@ -1471,7 +1471,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sc7180_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1495,7 +1494,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sc7180_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1514,7 +1512,6 @@ static struct qcom_icc_node * const camnoc_virt_nodes= [] =3D { }; =20 static const struct qcom_icc_desc sc7180_camnoc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D camnoc_virt_nodes, .num_nodes =3D ARRAY_SIZE(camnoc_virt_nodes), .bcms =3D camnoc_virt_bcms, @@ -1534,7 +1531,6 @@ static struct qcom_icc_node * const compute_noc_nodes= [] =3D { }; =20 static const struct qcom_icc_desc sc7180_compute_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D compute_noc_nodes, .num_nodes =3D ARRAY_SIZE(compute_noc_nodes), .bcms =3D compute_noc_bcms, @@ -1603,7 +1599,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sc7180_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1617,7 +1612,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc7180_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), }; @@ -1646,7 +1640,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc7180_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1664,7 +1657,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc7180_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1692,7 +1684,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc7180_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1714,7 +1705,6 @@ static struct qcom_icc_node * const npu_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc7180_npu_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D npu_noc_nodes, .num_nodes =3D ARRAY_SIZE(npu_noc_nodes), }; @@ -1731,7 +1721,6 @@ static struct qcom_icc_node * const qup_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc7180_qup_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D qup_virt_nodes, .num_nodes =3D ARRAY_SIZE(qup_virt_nodes), .bcms =3D qup_virt_bcms, @@ -1767,7 +1756,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sc7180_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sc7280.c b/drivers/interconnect/qcom= /sc7280.c index 3dc8b81f917d5de69f67112bd313326b4658f77c..c4cb6443f2d49c132b779429d89= 9d660d02ffa2a 100644 --- a/drivers/interconnect/qcom/sc7280.c +++ b/drivers/interconnect/qcom/sc7280.c @@ -1620,7 +1620,6 @@ static const struct regmap_config sc7280_aggre1_noc_r= egmap_config =3D { }; =20 static const struct qcom_icc_desc sc7280_aggre1_noc =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_aggre1_noc_regmap_config, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), @@ -1653,7 +1652,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sc7280_aggre2_noc =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_aggre2_noc_regmap_config, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), @@ -1675,7 +1673,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc7280_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -1746,7 +1743,6 @@ static const struct regmap_config sc7280_cnoc2_regmap= _config =3D { }; =20 static const struct qcom_icc_desc sc7280_cnoc2 =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_cnoc2_regmap_config, .nodes =3D cnoc2_nodes, .num_nodes =3D ARRAY_SIZE(cnoc2_nodes), @@ -1788,7 +1784,6 @@ static const struct regmap_config sc7280_cnoc3_regmap= _config =3D { }; =20 static const struct qcom_icc_desc sc7280_cnoc3 =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_cnoc3_regmap_config, .nodes =3D cnoc3_nodes, .num_nodes =3D ARRAY_SIZE(cnoc3_nodes), @@ -1814,7 +1809,6 @@ static const struct regmap_config sc7280_dc_noc_regma= p_config =3D { }; =20 static const struct qcom_icc_desc sc7280_dc_noc =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_dc_noc_regmap_config, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), @@ -1860,7 +1854,6 @@ static const struct regmap_config sc7280_gem_noc_regm= ap_config =3D { }; =20 static const struct qcom_icc_desc sc7280_gem_noc =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_gem_noc_regmap_config, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), @@ -1890,7 +1883,6 @@ static const struct regmap_config sc7280_lpass_ag_noc= _regmap_config =3D { }; =20 static const struct qcom_icc_desc sc7280_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_lpass_ag_noc_regmap_config, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), @@ -1917,7 +1909,6 @@ static const struct regmap_config sc7280_mc_virt_regm= ap_config =3D { }; =20 static const struct qcom_icc_desc sc7280_mc_virt =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_mc_virt_regmap_config, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), @@ -1954,7 +1945,6 @@ static const struct regmap_config sc7280_mmss_noc_reg= map_config =3D { }; =20 static const struct qcom_icc_desc sc7280_mmss_noc =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_mmss_noc_regmap_config, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), @@ -1983,7 +1973,6 @@ static const struct regmap_config sc7280_nsp_noc_regm= ap_config =3D { }; =20 static const struct qcom_icc_desc sc7280_nsp_noc =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_nsp_noc_regmap_config, .nodes =3D nsp_noc_nodes, .num_nodes =3D ARRAY_SIZE(nsp_noc_nodes), @@ -2018,7 +2007,6 @@ static const struct regmap_config sc7280_system_noc_r= egmap_config =3D { }; =20 static const struct qcom_icc_desc sc7280_system_noc =3D { - .alloc_dyn_id =3D true, .config =3D &sc7280_system_noc_regmap_config, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), diff --git a/drivers/interconnect/qcom/sc8180x.c b/drivers/interconnect/qco= m/sc8180x.c index b80a255ba8c322f72f436a351ee3ea4a354be1fa..c9bf1af54e37f0d67575dfd805e= 2c02ca000f759 100644 --- a/drivers/interconnect/qcom/sc8180x.c +++ b/drivers/interconnect/qcom/sc8180x.c @@ -1790,7 +1790,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sc8180x_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1798,7 +1797,6 @@ static const struct qcom_icc_desc sc8180x_aggre1_noc = =3D { }; =20 static const struct qcom_icc_desc sc8180x_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1806,7 +1804,6 @@ static const struct qcom_icc_desc sc8180x_aggre2_noc = =3D { }; =20 static const struct qcom_icc_desc sc8180x_camnoc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D camnoc_virt_nodes, .num_nodes =3D ARRAY_SIZE(camnoc_virt_nodes), .bcms =3D camnoc_virt_bcms, @@ -1814,7 +1811,6 @@ static const struct qcom_icc_desc sc8180x_camnoc_virt= =3D { }; =20 static const struct qcom_icc_desc sc8180x_compute_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D compute_noc_nodes, .num_nodes =3D ARRAY_SIZE(compute_noc_nodes), .bcms =3D compute_noc_bcms, @@ -1822,7 +1818,6 @@ static const struct qcom_icc_desc sc8180x_compute_noc= =3D { }; =20 static const struct qcom_icc_desc sc8180x_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1830,13 +1825,11 @@ static const struct qcom_icc_desc sc8180x_config_no= c =3D { }; =20 static const struct qcom_icc_desc sc8180x_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), }; =20 static const struct qcom_icc_desc sc8180x_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1844,7 +1837,6 @@ static const struct qcom_icc_desc sc8180x_gem_noc = =3D { }; =20 static const struct qcom_icc_desc sc8180x_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1852,7 +1844,6 @@ static const struct qcom_icc_desc sc8180x_mc_virt = =3D { }; =20 static const struct qcom_icc_desc sc8180x_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1860,7 +1851,6 @@ static const struct qcom_icc_desc sc8180x_mmss_noc = =3D { }; =20 static const struct qcom_icc_desc sc8180x_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, @@ -1881,7 +1871,6 @@ static struct qcom_icc_node * const qup_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc8180x_qup_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D qup_virt_nodes, .num_nodes =3D ARRAY_SIZE(qup_virt_nodes), .bcms =3D qup_virt_bcms, diff --git a/drivers/interconnect/qcom/sc8280xp.c b/drivers/interconnect/qc= om/sc8280xp.c index c46846191e63f41a16dd3af5f0a77919b4b14568..ed2161da37bfee48ac96876f4cf= 9d2054064b868 100644 --- a/drivers/interconnect/qcom/sc8280xp.c +++ b/drivers/interconnect/qcom/sc8280xp.c @@ -1998,7 +1998,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sc8280xp_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -2035,7 +2034,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sc8280xp_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -2058,7 +2056,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc8280xp_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -2163,7 +2160,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sc8280xp_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -2180,7 +2176,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc8280xp_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), .bcms =3D dc_noc_bcms, @@ -2215,7 +2210,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc8280xp_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -2239,7 +2233,6 @@ static struct qcom_icc_node * const lpass_ag_noc_node= s[] =3D { }; =20 static const struct qcom_icc_desc sc8280xp_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), .bcms =3D lpass_ag_noc_bcms, @@ -2257,7 +2250,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc8280xp_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -2289,7 +2281,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc8280xp_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -2310,7 +2301,6 @@ static struct qcom_icc_node * const nspa_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc8280xp_nspa_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D nspa_noc_nodes, .num_nodes =3D ARRAY_SIZE(nspa_noc_nodes), .bcms =3D nspa_noc_bcms, @@ -2331,7 +2321,6 @@ static struct qcom_icc_node * const nspb_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sc8280xp_nspb_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D nspb_noc_nodes, .num_nodes =3D ARRAY_SIZE(nspb_noc_nodes), .bcms =3D nspb_noc_bcms, @@ -2361,7 +2350,6 @@ static struct qcom_icc_node * const system_noc_main_n= odes[] =3D { }; =20 static const struct qcom_icc_desc sc8280xp_system_noc_main =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_main_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_main_nodes), .bcms =3D system_noc_main_bcms, diff --git a/drivers/interconnect/qcom/sdm670.c b/drivers/interconnect/qcom= /sdm670.c index 5e6a5c54f485ebef7be619d76e4d901811956ee4..88f4768b765c58f7338aac34185= 9f7221b4ebc82 100644 --- a/drivers/interconnect/qcom/sdm670.c +++ b/drivers/interconnect/qcom/sdm670.c @@ -1266,7 +1266,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sdm670_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1293,7 +1292,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sdm670_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1349,7 +1347,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sdm670_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1366,7 +1363,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdm670_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), .bcms =3D dc_noc_bcms, @@ -1385,7 +1381,6 @@ static struct qcom_icc_node * const gladiator_noc_nod= es[] =3D { }; =20 static const struct qcom_icc_desc sdm670_gladiator_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gladiator_noc_nodes, .num_nodes =3D ARRAY_SIZE(gladiator_noc_nodes), .bcms =3D gladiator_noc_bcms, @@ -1421,7 +1416,6 @@ static struct qcom_icc_node * const mem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdm670_mem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mem_noc_nodes, .num_nodes =3D ARRAY_SIZE(mem_noc_nodes), .bcms =3D mem_noc_bcms, @@ -1452,7 +1446,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdm670_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1497,7 +1490,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sdm670_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sdm845.c b/drivers/interconnect/qcom= /sdm845.c index 83d7a611cdf72d4b1cc17f86455106574a13cc9b..6d5bbeda0689d7ec8bec575fd38= 4b0414c67ae03 100644 --- a/drivers/interconnect/qcom/sdm845.c +++ b/drivers/interconnect/qcom/sdm845.c @@ -1514,7 +1514,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sdm845_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1544,7 +1543,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sdm845_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1606,7 +1604,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sdm845_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1623,7 +1620,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdm845_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), .bcms =3D dc_noc_bcms, @@ -1642,7 +1638,6 @@ static struct qcom_icc_node * const gladiator_noc_nod= es[] =3D { }; =20 static const struct qcom_icc_desc sdm845_gladiator_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gladiator_noc_nodes, .num_nodes =3D ARRAY_SIZE(gladiator_noc_nodes), .bcms =3D gladiator_noc_bcms, @@ -1678,7 +1673,6 @@ static struct qcom_icc_node * const mem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdm845_mem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mem_noc_nodes, .num_nodes =3D ARRAY_SIZE(mem_noc_nodes), .bcms =3D mem_noc_bcms, @@ -1713,7 +1707,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdm845_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1760,7 +1753,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sdm845_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sdx55.c b/drivers/interconnect/qcom/= sdx55.c index b1a69e430ef444784fdc31edbe1f80877fc63cec..75ced12869198f53ebb5bfbccc6= 03cbf2316aa1b 100644 --- a/drivers/interconnect/qcom/sdx55.c +++ b/drivers/interconnect/qcom/sdx55.c @@ -782,7 +782,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] =3D= { }; =20 static const struct qcom_icc_desc sdx55_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -805,7 +804,6 @@ static struct qcom_icc_node * const mem_noc_nodes[] =3D= { }; =20 static const struct qcom_icc_desc sdx55_mem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mem_noc_nodes, .num_nodes =3D ARRAY_SIZE(mem_noc_nodes), .bcms =3D mem_noc_bcms, @@ -885,7 +883,6 @@ static struct qcom_icc_node * const system_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdx55_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sdx65.c b/drivers/interconnect/qcom/= sdx65.c index 7c8798174e026c9d1fa06b60a75bf15e01a34049..6c5b4e1ec82f5f7cce1a63584cf= 1b718f158d315 100644 --- a/drivers/interconnect/qcom/sdx65.c +++ b/drivers/interconnect/qcom/sdx65.c @@ -769,7 +769,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] =3D= { }; =20 static const struct qcom_icc_desc sdx65_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -792,7 +791,6 @@ static struct qcom_icc_node * const mem_noc_nodes[] =3D= { }; =20 static const struct qcom_icc_desc sdx65_mem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mem_noc_nodes, .num_nodes =3D ARRAY_SIZE(mem_noc_nodes), .bcms =3D mem_noc_bcms, @@ -869,7 +867,6 @@ static struct qcom_icc_node * const system_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdx65_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sdx75.c b/drivers/interconnect/qcom/= sdx75.c index 3721d8f503a022e4c5fde62b0aa9eed9989c1554..e56202b9bc4b66e7824f5969ff0= 01ea67e0e70d4 100644 --- a/drivers/interconnect/qcom/sdx75.c +++ b/drivers/interconnect/qcom/sdx75.c @@ -868,7 +868,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdx75_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -884,7 +883,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] =3D { }; =20 static const struct qcom_icc_desc sdx75_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), }; @@ -911,7 +909,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] =3D= { }; =20 static const struct qcom_icc_desc sdx75_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -928,7 +925,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] =3D= { }; =20 static const struct qcom_icc_desc sdx75_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -948,7 +944,6 @@ static struct qcom_icc_node * const pcie_anoc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdx75_pcie_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D pcie_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_anoc_nodes), .bcms =3D pcie_anoc_bcms, @@ -1027,7 +1022,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sdx75_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sm6350.c b/drivers/interconnect/qcom= /sm6350.c index df2511dbfa96ba7454612ea0fcdf4a8f5fc39540..99c435a5968f6eb659e4713599d= 8cef73965a586 100644 --- a/drivers/interconnect/qcom/sm6350.c +++ b/drivers/interconnect/qcom/sm6350.c @@ -1389,7 +1389,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm6350_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1415,7 +1414,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm6350_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1443,7 +1441,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm6350_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -1463,7 +1460,6 @@ static struct qcom_icc_node * const compute_noc_nodes= [] =3D { }; =20 static const struct qcom_icc_desc sm6350_compute_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D compute_noc_nodes, .num_nodes =3D ARRAY_SIZE(compute_noc_nodes), .bcms =3D compute_noc_bcms, @@ -1524,7 +1520,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm6350_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1541,7 +1536,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm6350_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), .bcms =3D dc_noc_bcms, @@ -1573,7 +1567,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm6350_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1601,7 +1594,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm6350_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1626,7 +1618,6 @@ static struct qcom_icc_node * const npu_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm6350_npu_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D npu_noc_nodes, .num_nodes =3D ARRAY_SIZE(npu_noc_nodes), .bcms =3D npu_noc_bcms, @@ -1663,7 +1654,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm6350_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sm7150.c b/drivers/interconnect/qcom= /sm7150.c index 296cf350a08fb521ea12fce69a6b1ab19b6c97a8..0390d0468b48c10b7bb254c7376= 6fac24e5d6c72 100644 --- a/drivers/interconnect/qcom/sm7150.c +++ b/drivers/interconnect/qcom/sm7150.c @@ -1431,7 +1431,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm7150_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1461,7 +1460,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm7150_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1481,7 +1479,6 @@ static struct qcom_icc_node * const camnoc_virt_nodes= [] =3D { }; =20 static const struct qcom_icc_desc sm7150_camnoc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D camnoc_virt_nodes, .num_nodes =3D ARRAY_SIZE(camnoc_virt_nodes), .bcms =3D camnoc_virt_bcms, @@ -1499,7 +1496,6 @@ static struct qcom_icc_node * const compute_noc_nodes= [] =3D { }; =20 static const struct qcom_icc_desc sm7150_compute_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D compute_noc_nodes, .num_nodes =3D ARRAY_SIZE(compute_noc_nodes), .bcms =3D compute_noc_bcms, @@ -1565,7 +1561,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm7150_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1582,7 +1577,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm7150_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), .bcms =3D dc_noc_bcms, @@ -1614,7 +1608,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm7150_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1632,7 +1625,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm7150_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1664,7 +1656,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm7150_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1701,7 +1692,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm7150_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sm8150.c b/drivers/interconnect/qcom= /sm8150.c index 58a6643921bb4e9c3298352e3fb5755b92162a6d..ae732afbd155864137644e0789c= 6b61ef81a1414 100644 --- a/drivers/interconnect/qcom/sm8150.c +++ b/drivers/interconnect/qcom/sm8150.c @@ -1538,7 +1538,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8150_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1574,7 +1573,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8150_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1593,7 +1591,6 @@ static struct qcom_icc_node * const camnoc_virt_nodes= [] =3D { }; =20 static const struct qcom_icc_desc sm8150_camnoc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D camnoc_virt_nodes, .num_nodes =3D ARRAY_SIZE(camnoc_virt_nodes), .bcms =3D camnoc_virt_bcms, @@ -1611,7 +1608,6 @@ static struct qcom_icc_node * const compute_noc_nodes= [] =3D { }; =20 static const struct qcom_icc_desc sm8150_compute_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D compute_noc_nodes, .num_nodes =3D ARRAY_SIZE(compute_noc_nodes), .bcms =3D compute_noc_bcms, @@ -1680,7 +1676,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8150_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1697,7 +1692,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8150_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), .bcms =3D dc_noc_bcms, @@ -1733,7 +1727,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8150_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1751,7 +1744,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8150_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1782,7 +1774,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8150_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1824,7 +1815,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8150_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sm8350.c b/drivers/interconnect/qcom= /sm8350.c index 75a9b0ddb8d5c5a3d990bbe0e5067a06d5903a86..bb793d72489335aa145c99b0932= 0f8b7faaa37d6 100644 --- a/drivers/interconnect/qcom/sm8350.c +++ b/drivers/interconnect/qcom/sm8350.c @@ -1497,7 +1497,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8350_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1529,7 +1528,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8350_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1609,7 +1607,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8350_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1626,7 +1623,6 @@ static struct qcom_icc_node * const dc_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8350_dc_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D dc_noc_nodes, .num_nodes =3D ARRAY_SIZE(dc_noc_nodes), .bcms =3D dc_noc_bcms, @@ -1663,7 +1659,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8350_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1684,7 +1679,6 @@ static struct qcom_icc_node * const lpass_ag_noc_node= s[] =3D { }; =20 static const struct qcom_icc_desc sm8350_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), .bcms =3D lpass_ag_noc_bcms, @@ -1702,7 +1696,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8350_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1733,7 +1726,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8350_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1753,7 +1745,6 @@ static struct qcom_icc_node * const nsp_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8350_compute_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D nsp_noc_nodes, .num_nodes =3D ARRAY_SIZE(nsp_noc_nodes), .bcms =3D nsp_noc_bcms, @@ -1779,7 +1770,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8350_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sm8450.c b/drivers/interconnect/qcom= /sm8450.c index dd61e03b5a819ac8842afe5928800ed8640ff5ed..669a638bf3efcd9ed594d63f25c= 9022314fa1d54 100644 --- a/drivers/interconnect/qcom/sm8450.c +++ b/drivers/interconnect/qcom/sm8450.c @@ -1490,7 +1490,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8450_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1518,7 +1517,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8450_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1541,7 +1539,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8450_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -1611,7 +1608,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8450_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1647,7 +1643,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8450_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1670,7 +1665,6 @@ static struct qcom_icc_node * const lpass_ag_noc_node= s[] =3D { }; =20 static const struct qcom_icc_desc sm8450_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), .bcms =3D lpass_ag_noc_bcms, @@ -1692,7 +1686,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8450_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1728,7 +1721,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8450_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1747,7 +1739,6 @@ static struct qcom_icc_node * const nsp_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8450_nsp_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D nsp_noc_nodes, .num_nodes =3D ARRAY_SIZE(nsp_noc_nodes), .bcms =3D nsp_noc_bcms, @@ -1767,7 +1758,6 @@ static struct qcom_icc_node * const pcie_anoc_nodes[]= =3D { }; =20 static const struct qcom_icc_desc sm8450_pcie_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D pcie_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_anoc_nodes), .bcms =3D pcie_anoc_bcms, @@ -1796,7 +1786,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8450_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sm8550.c b/drivers/interconnect/qcom= /sm8550.c index 24b682a5bdd1873b4e3e655a9c8021e43987f008..d01762e132722ff445e41efa9a2= 3e898aa66fb74 100644 --- a/drivers/interconnect/qcom/sm8550.c +++ b/drivers/interconnect/qcom/sm8550.c @@ -1241,7 +1241,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8550_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1265,7 +1264,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8550_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1288,7 +1286,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8550_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -1349,7 +1346,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8550_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1374,7 +1370,6 @@ static struct qcom_icc_node * const cnoc_main_nodes[]= =3D { }; =20 static const struct qcom_icc_desc sm8550_cnoc_main =3D { - .alloc_dyn_id =3D true, .nodes =3D cnoc_main_nodes, .num_nodes =3D ARRAY_SIZE(cnoc_main_nodes), .bcms =3D cnoc_main_bcms, @@ -1405,7 +1400,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8550_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1421,7 +1415,6 @@ static struct qcom_icc_node * const lpass_ag_noc_node= s[] =3D { }; =20 static const struct qcom_icc_desc sm8550_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), .bcms =3D lpass_ag_noc_bcms, @@ -1438,7 +1431,6 @@ static struct qcom_icc_node * const lpass_lpiaon_noc_= nodes[] =3D { }; =20 static const struct qcom_icc_desc sm8550_lpass_lpiaon_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_lpiaon_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_lpiaon_noc_nodes), .bcms =3D lpass_lpiaon_noc_bcms, @@ -1454,7 +1446,6 @@ static struct qcom_icc_node * const lpass_lpicx_noc_n= odes[] =3D { }; =20 static const struct qcom_icc_desc sm8550_lpass_lpicx_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_lpicx_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_lpicx_noc_nodes), .bcms =3D lpass_lpicx_noc_bcms, @@ -1472,7 +1463,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8550_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1501,7 +1491,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8550_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1518,7 +1507,6 @@ static struct qcom_icc_node * const nsp_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8550_nsp_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D nsp_noc_nodes, .num_nodes =3D ARRAY_SIZE(nsp_noc_nodes), .bcms =3D nsp_noc_bcms, @@ -1538,7 +1526,6 @@ static struct qcom_icc_node * const pcie_anoc_nodes[]= =3D { }; =20 static const struct qcom_icc_desc sm8550_pcie_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D pcie_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_anoc_nodes), .bcms =3D pcie_anoc_bcms, @@ -1562,7 +1549,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8550_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sm8650.c b/drivers/interconnect/qcom= /sm8650.c index 629ff30e7ee70567beb4c9bd21b9b91f53b39526..cf3ae734d4c357d526d4e310bc0= 3bda7ea602e2a 100644 --- a/drivers/interconnect/qcom/sm8650.c +++ b/drivers/interconnect/qcom/sm8650.c @@ -1595,7 +1595,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8650_aggre1_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), @@ -1618,7 +1617,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8650_aggre2_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), @@ -1642,7 +1640,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8650_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -1704,7 +1701,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8650_config_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), @@ -1733,7 +1729,6 @@ static struct qcom_icc_node * const cnoc_main_nodes[]= =3D { }; =20 static const struct qcom_icc_desc sm8650_cnoc_main =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D cnoc_main_nodes, .num_nodes =3D ARRAY_SIZE(cnoc_main_nodes), @@ -1767,7 +1762,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8650_gem_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), @@ -1781,7 +1775,6 @@ static struct qcom_icc_node * const lpass_ag_noc_node= s[] =3D { }; =20 static const struct qcom_icc_desc sm8650_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), @@ -1797,7 +1790,6 @@ static struct qcom_icc_node * const lpass_lpiaon_noc_= nodes[] =3D { }; =20 static const struct qcom_icc_desc sm8650_lpass_lpiaon_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D lpass_lpiaon_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_lpiaon_noc_nodes), @@ -1811,7 +1803,6 @@ static struct qcom_icc_node * const lpass_lpicx_noc_n= odes[] =3D { }; =20 static const struct qcom_icc_desc sm8650_lpass_lpicx_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D lpass_lpicx_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_lpicx_noc_nodes), @@ -1828,7 +1819,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8650_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1857,7 +1847,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8650_mmss_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), @@ -1875,7 +1864,6 @@ static struct qcom_icc_node * const nsp_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8650_nsp_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D nsp_noc_nodes, .num_nodes =3D ARRAY_SIZE(nsp_noc_nodes), @@ -1896,7 +1884,6 @@ static struct qcom_icc_node * const pcie_anoc_nodes[]= =3D { }; =20 static const struct qcom_icc_desc sm8650_pcie_anoc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D pcie_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_anoc_nodes), @@ -1918,7 +1905,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8650_system_noc =3D { - .alloc_dyn_id =3D true, .config =3D &icc_regmap_config, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), diff --git a/drivers/interconnect/qcom/sm8750.c b/drivers/interconnect/qcom= /sm8750.c index a46c1553ce0fd13b99a7d327eb575b232bc36509..1486c0b8f4c163030913dfcfc4c= 2af7fd3d36fb1 100644 --- a/drivers/interconnect/qcom/sm8750.c +++ b/drivers/interconnect/qcom/sm8750.c @@ -1194,7 +1194,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8750_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), }; @@ -1217,7 +1216,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8750_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1240,7 +1238,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8750_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -1290,7 +1287,6 @@ static struct qcom_icc_node * const config_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8750_config_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D config_noc_nodes, .num_nodes =3D ARRAY_SIZE(config_noc_nodes), .bcms =3D config_noc_bcms, @@ -1320,7 +1316,6 @@ static struct qcom_icc_node * const cnoc_main_nodes[]= =3D { }; =20 static const struct qcom_icc_desc sm8750_cnoc_main =3D { - .alloc_dyn_id =3D true, .nodes =3D cnoc_main_nodes, .num_nodes =3D ARRAY_SIZE(cnoc_main_nodes), .bcms =3D cnoc_main_bcms, @@ -1354,7 +1349,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8750_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1367,7 +1361,6 @@ static struct qcom_icc_node * const lpass_ag_noc_node= s[] =3D { }; =20 static const struct qcom_icc_desc sm8750_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), }; @@ -1382,7 +1375,6 @@ static struct qcom_icc_node * const lpass_lpiaon_noc_= nodes[] =3D { }; =20 static const struct qcom_icc_desc sm8750_lpass_lpiaon_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_lpiaon_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_lpiaon_noc_nodes), .bcms =3D lpass_lpiaon_noc_bcms, @@ -1395,7 +1387,6 @@ static struct qcom_icc_node * const lpass_lpicx_noc_n= odes[] =3D { }; =20 static const struct qcom_icc_desc sm8750_lpass_lpicx_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_lpicx_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_lpicx_noc_nodes), }; @@ -1411,7 +1402,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8750_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1441,7 +1431,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8750_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1458,7 +1447,6 @@ static struct qcom_icc_node * const nsp_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sm8750_nsp_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D nsp_noc_nodes, .num_nodes =3D ARRAY_SIZE(nsp_noc_nodes), .bcms =3D nsp_noc_bcms, @@ -1477,7 +1465,6 @@ static struct qcom_icc_node * const pcie_anoc_nodes[]= =3D { }; =20 static const struct qcom_icc_desc sm8750_pcie_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D pcie_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_anoc_nodes), .bcms =3D pcie_anoc_bcms, @@ -1497,7 +1484,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc sm8750_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/x1e80100.c b/drivers/interconnect/qc= om/x1e80100.c index d5df26f02675de0150e2903df09fe419a8bd8892..2ba2823c7860e98bfbc2e018e8c= b2e6f26be9911 100644 --- a/drivers/interconnect/qcom/x1e80100.c +++ b/drivers/interconnect/qcom/x1e80100.c @@ -1467,7 +1467,6 @@ static struct qcom_icc_node * const aggre1_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc x1e80100_aggre1_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre1_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre1_noc_nodes), .bcms =3D aggre1_noc_bcms, @@ -1490,7 +1489,6 @@ static struct qcom_icc_node * const aggre2_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc x1e80100_aggre2_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D aggre2_noc_nodes, .num_nodes =3D ARRAY_SIZE(aggre2_noc_nodes), .bcms =3D aggre2_noc_bcms, @@ -1513,7 +1511,6 @@ static struct qcom_icc_node * const clk_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc x1e80100_clk_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D clk_virt_nodes, .num_nodes =3D ARRAY_SIZE(clk_virt_nodes), .bcms =3D clk_virt_bcms, @@ -1577,7 +1574,6 @@ static struct qcom_icc_node * const cnoc_cfg_nodes[] = =3D { }; =20 static const struct qcom_icc_desc x1e80100_cnoc_cfg =3D { - .alloc_dyn_id =3D true, .nodes =3D cnoc_cfg_nodes, .num_nodes =3D ARRAY_SIZE(cnoc_cfg_nodes), .bcms =3D cnoc_cfg_bcms, @@ -1608,7 +1604,6 @@ static struct qcom_icc_node * const cnoc_main_nodes[]= =3D { }; =20 static const struct qcom_icc_desc x1e80100_cnoc_main =3D { - .alloc_dyn_id =3D true, .nodes =3D cnoc_main_nodes, .num_nodes =3D ARRAY_SIZE(cnoc_main_nodes), .bcms =3D cnoc_main_bcms, @@ -1639,7 +1634,6 @@ static struct qcom_icc_node * const gem_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc x1e80100_gem_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D gem_noc_nodes, .num_nodes =3D ARRAY_SIZE(gem_noc_nodes), .bcms =3D gem_noc_bcms, @@ -1655,7 +1649,6 @@ static struct qcom_icc_node * const lpass_ag_noc_node= s[] =3D { }; =20 static const struct qcom_icc_desc x1e80100_lpass_ag_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_ag_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_ag_noc_nodes), .bcms =3D lpass_ag_noc_bcms, @@ -1672,7 +1665,6 @@ static struct qcom_icc_node * const lpass_lpiaon_noc_= nodes[] =3D { }; =20 static const struct qcom_icc_desc x1e80100_lpass_lpiaon_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_lpiaon_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_lpiaon_noc_nodes), .bcms =3D lpass_lpiaon_noc_bcms, @@ -1688,7 +1680,6 @@ static struct qcom_icc_node * const lpass_lpicx_noc_n= odes[] =3D { }; =20 static const struct qcom_icc_desc x1e80100_lpass_lpicx_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D lpass_lpicx_noc_nodes, .num_nodes =3D ARRAY_SIZE(lpass_lpicx_noc_nodes), .bcms =3D lpass_lpicx_noc_bcms, @@ -1706,7 +1697,6 @@ static struct qcom_icc_node * const mc_virt_nodes[] = =3D { }; =20 static const struct qcom_icc_desc x1e80100_mc_virt =3D { - .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -1735,7 +1725,6 @@ static struct qcom_icc_node * const mmss_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc x1e80100_mmss_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D mmss_noc_nodes, .num_nodes =3D ARRAY_SIZE(mmss_noc_nodes), .bcms =3D mmss_noc_bcms, @@ -1752,7 +1741,6 @@ static struct qcom_icc_node * const nsp_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc x1e80100_nsp_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D nsp_noc_nodes, .num_nodes =3D ARRAY_SIZE(nsp_noc_nodes), .bcms =3D nsp_noc_bcms, @@ -1770,7 +1758,6 @@ static struct qcom_icc_node * const pcie_center_anoc_= nodes[] =3D { }; =20 static const struct qcom_icc_desc x1e80100_pcie_center_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D pcie_center_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_center_anoc_nodes), .bcms =3D pcie_center_anoc_bcms, @@ -1788,7 +1775,6 @@ static struct qcom_icc_node * const pcie_north_anoc_n= odes[] =3D { }; =20 static const struct qcom_icc_desc x1e80100_pcie_north_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D pcie_north_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_north_anoc_nodes), .bcms =3D pcie_north_anoc_bcms, @@ -1808,7 +1794,6 @@ static struct qcom_icc_node * const pcie_south_anoc_n= odes[] =3D { }; =20 static const struct qcom_icc_desc x1e80100_pcie_south_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D pcie_south_anoc_nodes, .num_nodes =3D ARRAY_SIZE(pcie_south_anoc_nodes), .bcms =3D pcie_south_anoc_bcms, @@ -1831,7 +1816,6 @@ static struct qcom_icc_node * const system_noc_nodes[= ] =3D { }; =20 static const struct qcom_icc_desc x1e80100_system_noc =3D { - .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, @@ -1848,7 +1832,6 @@ static struct qcom_icc_node * const usb_center_anoc_n= odes[] =3D { }; =20 static const struct qcom_icc_desc x1e80100_usb_center_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D usb_center_anoc_nodes, .num_nodes =3D ARRAY_SIZE(usb_center_anoc_nodes), .bcms =3D usb_center_anoc_bcms, @@ -1865,7 +1848,6 @@ static struct qcom_icc_node * const usb_north_anoc_no= des[] =3D { }; =20 static const struct qcom_icc_desc x1e80100_usb_north_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D usb_north_anoc_nodes, .num_nodes =3D ARRAY_SIZE(usb_north_anoc_nodes), .bcms =3D usb_north_anoc_bcms, @@ -1886,7 +1868,6 @@ static struct qcom_icc_node * const usb_south_anoc_no= des[] =3D { }; =20 static const struct qcom_icc_desc x1e80100_usb_south_anoc =3D { - .alloc_dyn_id =3D true, .nodes =3D usb_south_anoc_nodes, .num_nodes =3D ARRAY_SIZE(usb_south_anoc_nodes), .bcms =3D usb_south_anoc_bcms, --=20 2.47.3