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This gives more flexibility and also allows us to drop the .num_links member, saving from possible errors related to it being not set or set incorrectly. Signed-off-by: Dmitry Baryshkov --- drivers/interconnect/qcom/sdx55.c | 492 +++++++++++++++++++---------------= ---- drivers/interconnect/qcom/sdx55.h | 70 ------ 2 files changed, 242 insertions(+), 320 deletions(-) diff --git a/drivers/interconnect/qcom/sdx55.c b/drivers/interconnect/qcom/= sdx55.c index 4117db046fa00c634a43d9287711589315f60210..b1a69e430ef444784fdc31edbe1= f80877fc63cec 100644 --- a/drivers/interconnect/qcom/sdx55.c +++ b/drivers/interconnect/qcom/sdx55.c @@ -17,628 +17,617 @@ =20 #include "bcm-voter.h" #include "icc-rpmh.h" -#include "sdx55.h" + +static struct qcom_icc_node llcc_mc; +static struct qcom_icc_node acm_tcu; +static struct qcom_icc_node qnm_snoc_gc; +static struct qcom_icc_node xm_apps_rdwr; +static struct qcom_icc_node qhm_audio; +static struct qcom_icc_node qhm_blsp1; +static struct qcom_icc_node qhm_qdss_bam; +static struct qcom_icc_node qhm_qpic; +static struct qcom_icc_node qhm_snoc_cfg; +static struct qcom_icc_node qhm_spmi_fetcher1; +static struct qcom_icc_node qnm_aggre_noc; +static struct qcom_icc_node qnm_ipa; +static struct qcom_icc_node qnm_memnoc; +static struct qcom_icc_node qnm_memnoc_pcie; +static struct qcom_icc_node qxm_crypto; +static struct qcom_icc_node xm_emac; +static struct qcom_icc_node xm_ipa2pcie_slv; +static struct qcom_icc_node xm_pcie; +static struct qcom_icc_node xm_qdss_etr; +static struct qcom_icc_node xm_sdc1; +static struct qcom_icc_node xm_usb3; +static struct qcom_icc_node ebi; +static struct qcom_icc_node qns_llcc; +static struct qcom_icc_node qns_memnoc_snoc; +static struct qcom_icc_node qns_sys_pcie; +static struct qcom_icc_node qhs_aop; +static struct qcom_icc_node qhs_aoss; +static struct qcom_icc_node qhs_apss; +static struct qcom_icc_node qhs_audio; +static struct qcom_icc_node qhs_blsp1; +static struct qcom_icc_node qhs_clk_ctl; +static struct qcom_icc_node qhs_crypto0_cfg; +static struct qcom_icc_node qhs_ddrss_cfg; +static struct qcom_icc_node qhs_ecc_cfg; +static struct qcom_icc_node qhs_emac_cfg; +static struct qcom_icc_node qhs_imem_cfg; +static struct qcom_icc_node qhs_ipa; +static struct qcom_icc_node qhs_mss_cfg; +static struct qcom_icc_node qhs_pcie_parf; +static struct qcom_icc_node qhs_pdm; +static struct qcom_icc_node qhs_prng; +static struct qcom_icc_node qhs_qdss_cfg; +static struct qcom_icc_node qhs_qpic; +static struct qcom_icc_node qhs_sdc1; +static struct qcom_icc_node qhs_snoc_cfg; +static struct qcom_icc_node qhs_spmi_fetcher; +static struct qcom_icc_node qhs_spmi_vgi_coex; +static struct qcom_icc_node qhs_tcsr; +static struct qcom_icc_node qhs_tlmm; +static struct qcom_icc_node qhs_usb3; +static struct qcom_icc_node qhs_usb3_phy; +static struct qcom_icc_node qns_aggre_noc; +static struct qcom_icc_node qns_snoc_memnoc; +static struct qcom_icc_node qxs_imem; +static struct qcom_icc_node srvc_snoc; +static struct qcom_icc_node xs_pcie; +static struct qcom_icc_node xs_qdss_stm; +static struct qcom_icc_node xs_sys_tcu_cfg; =20 static struct qcom_icc_node llcc_mc =3D { .name =3D "llcc_mc", - .id =3D SDX55_MASTER_LLCC, .channels =3D 4, .buswidth =3D 4, .num_links =3D 1, - .links =3D { SDX55_SLAVE_EBI_CH0 }, + .link_nodes =3D { &ebi }, }; =20 static struct qcom_icc_node acm_tcu =3D { .name =3D "acm_tcu", - .id =3D SDX55_MASTER_TCU_0, .channels =3D 1, .buswidth =3D 8, .num_links =3D 3, - .links =3D { SDX55_SLAVE_LLCC, - SDX55_SLAVE_MEM_NOC_SNOC, - SDX55_SLAVE_MEM_NOC_PCIE_SNOC - }, + .link_nodes =3D { &qns_llcc, + &qns_memnoc_snoc, + &qns_sys_pcie }, }; =20 static struct qcom_icc_node qnm_snoc_gc =3D { .name =3D "qnm_snoc_gc", - .id =3D SDX55_MASTER_SNOC_GC_MEM_NOC, .channels =3D 1, .buswidth =3D 8, .num_links =3D 1, - .links =3D { SDX55_SLAVE_LLCC }, + .link_nodes =3D { &qns_llcc }, }; =20 static struct qcom_icc_node xm_apps_rdwr =3D { .name =3D "xm_apps_rdwr", - .id =3D SDX55_MASTER_AMPSS_M0, .channels =3D 1, .buswidth =3D 16, .num_links =3D 3, - .links =3D { SDX55_SLAVE_LLCC, - SDX55_SLAVE_MEM_NOC_SNOC, - SDX55_SLAVE_MEM_NOC_PCIE_SNOC - }, + .link_nodes =3D { &qns_llcc, + &qns_memnoc_snoc, + &qns_sys_pcie }, }; =20 static struct qcom_icc_node qhm_audio =3D { .name =3D "qhm_audio", - .id =3D SDX55_MASTER_AUDIO, .channels =3D 1, .buswidth =3D 4, .num_links =3D 1, - .links =3D { SDX55_SLAVE_ANOC_SNOC }, + .link_nodes =3D { &qns_aggre_noc }, }; =20 static struct qcom_icc_node qhm_blsp1 =3D { .name =3D "qhm_blsp1", - .id =3D SDX55_MASTER_BLSP_1, .channels =3D 1, .buswidth =3D 4, .num_links =3D 1, - .links =3D { SDX55_SLAVE_ANOC_SNOC }, + .link_nodes =3D { &qns_aggre_noc }, }; =20 static struct qcom_icc_node qhm_qdss_bam =3D { .name =3D "qhm_qdss_bam", - .id =3D SDX55_MASTER_QDSS_BAM, .channels =3D 1, .buswidth =3D 4, .num_links =3D 28, - .links =3D { SDX55_SLAVE_SNOC_CFG, - SDX55_SLAVE_EMAC_CFG, - SDX55_SLAVE_USB3, - SDX55_SLAVE_TLMM, - SDX55_SLAVE_SPMI_FETCHER, - SDX55_SLAVE_QDSS_CFG, - SDX55_SLAVE_PDM, - SDX55_SLAVE_SNOC_MEM_NOC_GC, - SDX55_SLAVE_TCSR, - SDX55_SLAVE_CNOC_DDRSS, - SDX55_SLAVE_SPMI_VGI_COEX, - SDX55_SLAVE_QPIC, - SDX55_SLAVE_OCIMEM, - SDX55_SLAVE_IPA_CFG, - SDX55_SLAVE_USB3_PHY_CFG, - SDX55_SLAVE_AOP, - SDX55_SLAVE_BLSP_1, - SDX55_SLAVE_SDCC_1, - SDX55_SLAVE_CNOC_MSS, - SDX55_SLAVE_PCIE_PARF, - SDX55_SLAVE_ECC_CFG, - SDX55_SLAVE_AUDIO, - SDX55_SLAVE_AOSS, - SDX55_SLAVE_PRNG, - SDX55_SLAVE_CRYPTO_0_CFG, - SDX55_SLAVE_TCU, - SDX55_SLAVE_CLK_CTL, - SDX55_SLAVE_IMEM_CFG - }, + .link_nodes =3D { &qhs_snoc_cfg, + &qhs_emac_cfg, + &qhs_usb3, + &qhs_tlmm, + &qhs_spmi_fetcher, + &qhs_qdss_cfg, + &qhs_pdm, + &qns_snoc_memnoc, + &qhs_tcsr, + &qhs_ddrss_cfg, + &qhs_spmi_vgi_coex, + &qhs_qpic, + &qxs_imem, + &qhs_ipa, + &qhs_usb3_phy, + &qhs_aop, + &qhs_blsp1, + &qhs_sdc1, + &qhs_mss_cfg, + &qhs_pcie_parf, + &qhs_ecc_cfg, + &qhs_audio, + &qhs_aoss, + &qhs_prng, + &qhs_crypto0_cfg, + &xs_sys_tcu_cfg, + &qhs_clk_ctl, + &qhs_imem_cfg }, }; =20 static struct qcom_icc_node qhm_qpic =3D { .name =3D "qhm_qpic", - .id =3D SDX55_MASTER_QPIC, .channels =3D 1, .buswidth =3D 4, .num_links =3D 5, - .links =3D { SDX55_SLAVE_AOSS, - SDX55_SLAVE_IPA_CFG, - SDX55_SLAVE_ANOC_SNOC, - SDX55_SLAVE_AOP, - SDX55_SLAVE_AUDIO - }, + .link_nodes =3D { &qhs_aoss, + &qhs_ipa, + &qns_aggre_noc, + &qhs_aop, + &qhs_audio }, }; =20 static struct qcom_icc_node qhm_snoc_cfg =3D { .name =3D "qhm_snoc_cfg", - .id =3D SDX55_MASTER_SNOC_CFG, .channels =3D 1, .buswidth =3D 4, .num_links =3D 1, - .links =3D { SDX55_SLAVE_SERVICE_SNOC }, + .link_nodes =3D { &srvc_snoc }, }; =20 static struct qcom_icc_node qhm_spmi_fetcher1 =3D { .name =3D "qhm_spmi_fetcher1", - .id =3D SDX55_MASTER_SPMI_FETCHER, .channels =3D 1, .buswidth =3D 4, .num_links =3D 3, - .links =3D { SDX55_SLAVE_AOSS, - SDX55_SLAVE_ANOC_SNOC, - SDX55_SLAVE_AOP - }, + .link_nodes =3D { &qhs_aoss, + &qns_aggre_noc, + &qhs_aop }, }; =20 static struct qcom_icc_node qnm_aggre_noc =3D { .name =3D "qnm_aggre_noc", - .id =3D SDX55_MASTER_ANOC_SNOC, .channels =3D 1, .buswidth =3D 8, .num_links =3D 30, - .links =3D { SDX55_SLAVE_PCIE_0, - SDX55_SLAVE_SNOC_CFG, - SDX55_SLAVE_SDCC_1, - SDX55_SLAVE_TLMM, - SDX55_SLAVE_SPMI_FETCHER, - SDX55_SLAVE_QDSS_CFG, - SDX55_SLAVE_PDM, - SDX55_SLAVE_SNOC_MEM_NOC_GC, - SDX55_SLAVE_TCSR, - SDX55_SLAVE_CNOC_DDRSS, - SDX55_SLAVE_SPMI_VGI_COEX, - SDX55_SLAVE_QDSS_STM, - SDX55_SLAVE_QPIC, - SDX55_SLAVE_OCIMEM, - SDX55_SLAVE_IPA_CFG, - SDX55_SLAVE_USB3_PHY_CFG, - SDX55_SLAVE_AOP, - SDX55_SLAVE_BLSP_1, - SDX55_SLAVE_USB3, - SDX55_SLAVE_CNOC_MSS, - SDX55_SLAVE_PCIE_PARF, - SDX55_SLAVE_ECC_CFG, - SDX55_SLAVE_APPSS, - SDX55_SLAVE_AUDIO, - SDX55_SLAVE_AOSS, - SDX55_SLAVE_PRNG, - SDX55_SLAVE_CRYPTO_0_CFG, - SDX55_SLAVE_TCU, - SDX55_SLAVE_CLK_CTL, - SDX55_SLAVE_IMEM_CFG - }, + .link_nodes =3D { &xs_pcie, + &qhs_snoc_cfg, + &qhs_sdc1, + &qhs_tlmm, + &qhs_spmi_fetcher, + &qhs_qdss_cfg, + &qhs_pdm, + &qns_snoc_memnoc, + &qhs_tcsr, + &qhs_ddrss_cfg, + &qhs_spmi_vgi_coex, + &xs_qdss_stm, + &qhs_qpic, + &qxs_imem, + &qhs_ipa, + &qhs_usb3_phy, + &qhs_aop, + &qhs_blsp1, + &qhs_usb3, + &qhs_mss_cfg, + &qhs_pcie_parf, + &qhs_ecc_cfg, + &qhs_apss, + &qhs_audio, + &qhs_aoss, + &qhs_prng, + &qhs_crypto0_cfg, + &xs_sys_tcu_cfg, + &qhs_clk_ctl, + &qhs_imem_cfg }, }; =20 static struct qcom_icc_node qnm_ipa =3D { .name =3D "qnm_ipa", - .id =3D SDX55_MASTER_IPA, .channels =3D 1, .buswidth =3D 8, .num_links =3D 27, - .links =3D { SDX55_SLAVE_SNOC_CFG, - SDX55_SLAVE_EMAC_CFG, - SDX55_SLAVE_USB3, - SDX55_SLAVE_AOSS, - SDX55_SLAVE_SPMI_FETCHER, - SDX55_SLAVE_QDSS_CFG, - SDX55_SLAVE_PDM, - SDX55_SLAVE_SNOC_MEM_NOC_GC, - SDX55_SLAVE_TCSR, - SDX55_SLAVE_CNOC_DDRSS, - SDX55_SLAVE_QDSS_STM, - SDX55_SLAVE_QPIC, - SDX55_SLAVE_OCIMEM, - SDX55_SLAVE_IPA_CFG, - SDX55_SLAVE_USB3_PHY_CFG, - SDX55_SLAVE_AOP, - SDX55_SLAVE_BLSP_1, - SDX55_SLAVE_SDCC_1, - SDX55_SLAVE_CNOC_MSS, - SDX55_SLAVE_PCIE_PARF, - SDX55_SLAVE_ECC_CFG, - SDX55_SLAVE_AUDIO, - SDX55_SLAVE_TLMM, - SDX55_SLAVE_PRNG, - SDX55_SLAVE_CRYPTO_0_CFG, - SDX55_SLAVE_CLK_CTL, - SDX55_SLAVE_IMEM_CFG - }, + .link_nodes =3D { &qhs_snoc_cfg, + &qhs_emac_cfg, + &qhs_usb3, + &qhs_aoss, + &qhs_spmi_fetcher, + &qhs_qdss_cfg, + &qhs_pdm, + &qns_snoc_memnoc, + &qhs_tcsr, + &qhs_ddrss_cfg, + &xs_qdss_stm, + &qhs_qpic, + &qxs_imem, + &qhs_ipa, + &qhs_usb3_phy, + &qhs_aop, + &qhs_blsp1, + &qhs_sdc1, + &qhs_mss_cfg, + &qhs_pcie_parf, + &qhs_ecc_cfg, + &qhs_audio, + &qhs_tlmm, + &qhs_prng, + &qhs_crypto0_cfg, + &qhs_clk_ctl, + &qhs_imem_cfg }, }; =20 static struct qcom_icc_node qnm_memnoc =3D { .name =3D "qnm_memnoc", - .id =3D SDX55_MASTER_MEM_NOC_SNOC, .channels =3D 1, .buswidth =3D 8, .num_links =3D 29, - .links =3D { SDX55_SLAVE_SNOC_CFG, - SDX55_SLAVE_EMAC_CFG, - SDX55_SLAVE_USB3, - SDX55_SLAVE_TLMM, - SDX55_SLAVE_SPMI_FETCHER, - SDX55_SLAVE_QDSS_CFG, - SDX55_SLAVE_PDM, - SDX55_SLAVE_TCSR, - SDX55_SLAVE_CNOC_DDRSS, - SDX55_SLAVE_SPMI_VGI_COEX, - SDX55_SLAVE_QDSS_STM, - SDX55_SLAVE_QPIC, - SDX55_SLAVE_OCIMEM, - SDX55_SLAVE_IPA_CFG, - SDX55_SLAVE_USB3_PHY_CFG, - SDX55_SLAVE_AOP, - SDX55_SLAVE_BLSP_1, - SDX55_SLAVE_SDCC_1, - SDX55_SLAVE_CNOC_MSS, - SDX55_SLAVE_PCIE_PARF, - SDX55_SLAVE_ECC_CFG, - SDX55_SLAVE_APPSS, - SDX55_SLAVE_AUDIO, - SDX55_SLAVE_AOSS, - SDX55_SLAVE_PRNG, - SDX55_SLAVE_CRYPTO_0_CFG, - SDX55_SLAVE_TCU, - SDX55_SLAVE_CLK_CTL, - SDX55_SLAVE_IMEM_CFG - }, + .link_nodes =3D { &qhs_snoc_cfg, + &qhs_emac_cfg, + &qhs_usb3, + &qhs_tlmm, + &qhs_spmi_fetcher, + &qhs_qdss_cfg, + &qhs_pdm, + &qhs_tcsr, + &qhs_ddrss_cfg, + &qhs_spmi_vgi_coex, + &xs_qdss_stm, + &qhs_qpic, + &qxs_imem, + &qhs_ipa, + &qhs_usb3_phy, + &qhs_aop, + &qhs_blsp1, + &qhs_sdc1, + &qhs_mss_cfg, + &qhs_pcie_parf, + &qhs_ecc_cfg, + &qhs_apss, + &qhs_audio, + &qhs_aoss, + &qhs_prng, + &qhs_crypto0_cfg, + &xs_sys_tcu_cfg, + &qhs_clk_ctl, + &qhs_imem_cfg }, }; =20 static struct qcom_icc_node qnm_memnoc_pcie =3D { .name =3D "qnm_memnoc_pcie", - .id =3D SDX55_MASTER_MEM_NOC_PCIE_SNOC, .channels =3D 1, .buswidth =3D 8, .num_links =3D 1, - .links =3D { SDX55_SLAVE_PCIE_0 }, + .link_nodes =3D { &xs_pcie }, }; =20 static struct qcom_icc_node qxm_crypto =3D { .name =3D "qxm_crypto", - .id =3D SDX55_MASTER_CRYPTO_CORE_0, .channels =3D 1, .buswidth =3D 8, .num_links =3D 3, - .links =3D { SDX55_SLAVE_AOSS, - SDX55_SLAVE_ANOC_SNOC, - SDX55_SLAVE_AOP - }, + .link_nodes =3D { &qhs_aoss, + &qns_aggre_noc, + &qhs_aop }, }; =20 static struct qcom_icc_node xm_emac =3D { .name =3D "xm_emac", - .id =3D SDX55_MASTER_EMAC, .channels =3D 1, .buswidth =3D 8, .num_links =3D 1, - .links =3D { SDX55_SLAVE_ANOC_SNOC }, + .link_nodes =3D { &qns_aggre_noc }, }; =20 static struct qcom_icc_node xm_ipa2pcie_slv =3D { .name =3D "xm_ipa2pcie_slv", - .id =3D SDX55_MASTER_IPA_PCIE, .channels =3D 1, .buswidth =3D 8, .num_links =3D 1, - .links =3D { SDX55_SLAVE_PCIE_0 }, + .link_nodes =3D { &xs_pcie }, }; =20 static struct qcom_icc_node xm_pcie =3D { .name =3D "xm_pcie", - .id =3D SDX55_MASTER_PCIE, .channels =3D 1, .buswidth =3D 8, .num_links =3D 1, - .links =3D { SDX55_SLAVE_ANOC_SNOC }, + .link_nodes =3D { &qns_aggre_noc }, }; =20 static struct qcom_icc_node xm_qdss_etr =3D { .name =3D "xm_qdss_etr", - .id =3D SDX55_MASTER_QDSS_ETR, .channels =3D 1, .buswidth =3D 8, .num_links =3D 28, - .links =3D { SDX55_SLAVE_SNOC_CFG, - SDX55_SLAVE_EMAC_CFG, - SDX55_SLAVE_USB3, - SDX55_SLAVE_AOSS, - SDX55_SLAVE_SPMI_FETCHER, - SDX55_SLAVE_QDSS_CFG, - SDX55_SLAVE_PDM, - SDX55_SLAVE_SNOC_MEM_NOC_GC, - SDX55_SLAVE_TCSR, - SDX55_SLAVE_CNOC_DDRSS, - SDX55_SLAVE_SPMI_VGI_COEX, - SDX55_SLAVE_QPIC, - SDX55_SLAVE_OCIMEM, - SDX55_SLAVE_IPA_CFG, - SDX55_SLAVE_USB3_PHY_CFG, - SDX55_SLAVE_AOP, - SDX55_SLAVE_BLSP_1, - SDX55_SLAVE_SDCC_1, - SDX55_SLAVE_CNOC_MSS, - SDX55_SLAVE_PCIE_PARF, - SDX55_SLAVE_ECC_CFG, - SDX55_SLAVE_AUDIO, - SDX55_SLAVE_AOSS, - SDX55_SLAVE_PRNG, - SDX55_SLAVE_CRYPTO_0_CFG, - SDX55_SLAVE_TCU, - SDX55_SLAVE_CLK_CTL, - SDX55_SLAVE_IMEM_CFG - }, + .link_nodes =3D { &qhs_snoc_cfg, + &qhs_emac_cfg, + &qhs_usb3, + &qhs_aoss, + &qhs_spmi_fetcher, + &qhs_qdss_cfg, + &qhs_pdm, + &qns_snoc_memnoc, + &qhs_tcsr, + &qhs_ddrss_cfg, + &qhs_spmi_vgi_coex, + &qhs_qpic, + &qxs_imem, + &qhs_ipa, + &qhs_usb3_phy, + &qhs_aop, + &qhs_blsp1, + &qhs_sdc1, + &qhs_mss_cfg, + &qhs_pcie_parf, + &qhs_ecc_cfg, + &qhs_audio, + &qhs_aoss, + &qhs_prng, + &qhs_crypto0_cfg, + &xs_sys_tcu_cfg, + &qhs_clk_ctl, + &qhs_imem_cfg }, }; =20 static struct qcom_icc_node xm_sdc1 =3D { .name =3D "xm_sdc1", - .id =3D SDX55_MASTER_SDCC_1, .channels =3D 1, .buswidth =3D 8, .num_links =3D 5, - .links =3D { SDX55_SLAVE_AOSS, - SDX55_SLAVE_IPA_CFG, - SDX55_SLAVE_ANOC_SNOC, - SDX55_SLAVE_AOP, - SDX55_SLAVE_AUDIO - }, + .link_nodes =3D { &qhs_aoss, + &qhs_ipa, + &qns_aggre_noc, + &qhs_aop, + &qhs_audio }, }; =20 static struct qcom_icc_node xm_usb3 =3D { .name =3D "xm_usb3", - .id =3D SDX55_MASTER_USB3, .channels =3D 1, .buswidth =3D 8, .num_links =3D 1, - .links =3D { SDX55_SLAVE_ANOC_SNOC }, + .link_nodes =3D { &qns_aggre_noc }, }; =20 static struct qcom_icc_node ebi =3D { .name =3D "ebi", - .id =3D SDX55_SLAVE_EBI_CH0, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qns_llcc =3D { .name =3D "qns_llcc", - .id =3D SDX55_SLAVE_LLCC, .channels =3D 1, .buswidth =3D 16, .num_links =3D 1, - .links =3D { SDX55_SLAVE_EBI_CH0 }, + .link_nodes =3D { &ebi }, }; =20 static struct qcom_icc_node qns_memnoc_snoc =3D { .name =3D "qns_memnoc_snoc", - .id =3D SDX55_SLAVE_MEM_NOC_SNOC, .channels =3D 1, .buswidth =3D 8, .num_links =3D 1, - .links =3D { SDX55_MASTER_MEM_NOC_SNOC }, + .link_nodes =3D { &qnm_memnoc }, }; =20 static struct qcom_icc_node qns_sys_pcie =3D { .name =3D "qns_sys_pcie", - .id =3D SDX55_SLAVE_MEM_NOC_PCIE_SNOC, .channels =3D 1, .buswidth =3D 8, .num_links =3D 1, - .links =3D { SDX55_MASTER_MEM_NOC_PCIE_SNOC }, + .link_nodes =3D { &qnm_memnoc_pcie }, }; =20 static struct qcom_icc_node qhs_aop =3D { .name =3D "qhs_aop", - .id =3D SDX55_SLAVE_AOP, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_aoss =3D { .name =3D "qhs_aoss", - .id =3D SDX55_SLAVE_AOSS, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_apss =3D { .name =3D "qhs_apss", - .id =3D SDX55_SLAVE_APPSS, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_audio =3D { .name =3D "qhs_audio", - .id =3D SDX55_SLAVE_AUDIO, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_blsp1 =3D { .name =3D "qhs_blsp1", - .id =3D SDX55_SLAVE_BLSP_1, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_clk_ctl =3D { .name =3D "qhs_clk_ctl", - .id =3D SDX55_SLAVE_CLK_CTL, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_crypto0_cfg =3D { .name =3D "qhs_crypto0_cfg", - .id =3D SDX55_SLAVE_CRYPTO_0_CFG, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_ddrss_cfg =3D { .name =3D "qhs_ddrss_cfg", - .id =3D SDX55_SLAVE_CNOC_DDRSS, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_ecc_cfg =3D { .name =3D "qhs_ecc_cfg", - .id =3D SDX55_SLAVE_ECC_CFG, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_emac_cfg =3D { .name =3D "qhs_emac_cfg", - .id =3D SDX55_SLAVE_EMAC_CFG, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_imem_cfg =3D { .name =3D "qhs_imem_cfg", - .id =3D SDX55_SLAVE_IMEM_CFG, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_ipa =3D { .name =3D "qhs_ipa", - .id =3D SDX55_SLAVE_IPA_CFG, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_mss_cfg =3D { .name =3D "qhs_mss_cfg", - .id =3D SDX55_SLAVE_CNOC_MSS, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_pcie_parf =3D { .name =3D "qhs_pcie_parf", - .id =3D SDX55_SLAVE_PCIE_PARF, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_pdm =3D { .name =3D "qhs_pdm", - .id =3D SDX55_SLAVE_PDM, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_prng =3D { .name =3D "qhs_prng", - .id =3D SDX55_SLAVE_PRNG, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_qdss_cfg =3D { .name =3D "qhs_qdss_cfg", - .id =3D SDX55_SLAVE_QDSS_CFG, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_qpic =3D { .name =3D "qhs_qpic", - .id =3D SDX55_SLAVE_QPIC, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_sdc1 =3D { .name =3D "qhs_sdc1", - .id =3D SDX55_SLAVE_SDCC_1, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_snoc_cfg =3D { .name =3D "qhs_snoc_cfg", - .id =3D SDX55_SLAVE_SNOC_CFG, .channels =3D 1, .buswidth =3D 4, .num_links =3D 1, - .links =3D { SDX55_MASTER_SNOC_CFG }, + .link_nodes =3D { &qhm_snoc_cfg }, }; =20 static struct qcom_icc_node qhs_spmi_fetcher =3D { .name =3D "qhs_spmi_fetcher", - .id =3D SDX55_SLAVE_SPMI_FETCHER, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_spmi_vgi_coex =3D { .name =3D "qhs_spmi_vgi_coex", - .id =3D SDX55_SLAVE_SPMI_VGI_COEX, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_tcsr =3D { .name =3D "qhs_tcsr", - .id =3D SDX55_SLAVE_TCSR, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_tlmm =3D { .name =3D "qhs_tlmm", - .id =3D SDX55_SLAVE_TLMM, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_usb3 =3D { .name =3D "qhs_usb3", - .id =3D SDX55_SLAVE_USB3, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qhs_usb3_phy =3D { .name =3D "qhs_usb3_phy", - .id =3D SDX55_SLAVE_USB3_PHY_CFG, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node qns_aggre_noc =3D { .name =3D "qns_aggre_noc", - .id =3D SDX55_SLAVE_ANOC_SNOC, .channels =3D 1, .buswidth =3D 8, .num_links =3D 1, - .links =3D { SDX55_MASTER_ANOC_SNOC }, + .link_nodes =3D { &qnm_aggre_noc }, }; =20 static struct qcom_icc_node qns_snoc_memnoc =3D { .name =3D "qns_snoc_memnoc", - .id =3D SDX55_SLAVE_SNOC_MEM_NOC_GC, .channels =3D 1, .buswidth =3D 8, .num_links =3D 1, - .links =3D { SDX55_MASTER_SNOC_GC_MEM_NOC }, + .link_nodes =3D { &qnm_snoc_gc }, }; =20 static struct qcom_icc_node qxs_imem =3D { .name =3D "qxs_imem", - .id =3D SDX55_SLAVE_OCIMEM, .channels =3D 1, .buswidth =3D 8, }; =20 static struct qcom_icc_node srvc_snoc =3D { .name =3D "srvc_snoc", - .id =3D SDX55_SLAVE_SERVICE_SNOC, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node xs_pcie =3D { .name =3D "xs_pcie", - .id =3D SDX55_SLAVE_PCIE_0, .channels =3D 1, .buswidth =3D 8, }; =20 static struct qcom_icc_node xs_qdss_stm =3D { .name =3D "xs_qdss_stm", - .id =3D SDX55_SLAVE_QDSS_STM, .channels =3D 1, .buswidth =3D 4, }; =20 static struct qcom_icc_node xs_sys_tcu_cfg =3D { .name =3D "xs_sys_tcu_cfg", - .id =3D SDX55_SLAVE_TCU, .channels =3D 1, .buswidth =3D 8, }; @@ -793,6 +782,7 @@ static struct qcom_icc_node * const mc_virt_nodes[] =3D= { }; =20 static const struct qcom_icc_desc sdx55_mc_virt =3D { + .alloc_dyn_id =3D true, .nodes =3D mc_virt_nodes, .num_nodes =3D ARRAY_SIZE(mc_virt_nodes), .bcms =3D mc_virt_bcms, @@ -815,6 +805,7 @@ static struct qcom_icc_node * const mem_noc_nodes[] =3D= { }; =20 static const struct qcom_icc_desc sdx55_mem_noc =3D { + .alloc_dyn_id =3D true, .nodes =3D mem_noc_nodes, .num_nodes =3D ARRAY_SIZE(mem_noc_nodes), .bcms =3D mem_noc_bcms, @@ -894,6 +885,7 @@ static struct qcom_icc_node * const system_noc_nodes[] = =3D { }; =20 static const struct qcom_icc_desc sdx55_system_noc =3D { + .alloc_dyn_id =3D true, .nodes =3D system_noc_nodes, .num_nodes =3D ARRAY_SIZE(system_noc_nodes), .bcms =3D system_noc_bcms, diff --git a/drivers/interconnect/qcom/sdx55.h b/drivers/interconnect/qcom/= sdx55.h deleted file mode 100644 index 46cbabec8aa1f95be840e50618efd04bcbf89f10..000000000000000000000000000= 0000000000000 --- a/drivers/interconnect/qcom/sdx55.h +++ /dev/null @@ -1,70 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2021, Linaro Ltd. - */ - -#ifndef __DRIVERS_INTERCONNECT_QCOM_SDX55_H -#define __DRIVERS_INTERCONNECT_QCOM_SDX55_H - -/* 0 was used by MASTER_IPA_CORE, now represented as RPMh clock */ -#define SDX55_MASTER_LLCC 1 -#define SDX55_MASTER_TCU_0 2 -#define SDX55_MASTER_SNOC_GC_MEM_NOC 3 -#define SDX55_MASTER_AMPSS_M0 4 -#define SDX55_MASTER_AUDIO 5 -#define SDX55_MASTER_BLSP_1 6 -#define SDX55_MASTER_QDSS_BAM 7 -#define SDX55_MASTER_QPIC 8 -#define SDX55_MASTER_SNOC_CFG 9 -#define SDX55_MASTER_SPMI_FETCHER 10 -#define SDX55_MASTER_ANOC_SNOC 11 -#define SDX55_MASTER_IPA 12 -#define SDX55_MASTER_MEM_NOC_SNOC 13 -#define SDX55_MASTER_MEM_NOC_PCIE_SNOC 14 -#define SDX55_MASTER_CRYPTO_CORE_0 15 -#define SDX55_MASTER_EMAC 16 -#define SDX55_MASTER_IPA_PCIE 17 -#define SDX55_MASTER_PCIE 18 -#define SDX55_MASTER_QDSS_ETR 19 -#define SDX55_MASTER_SDCC_1 20 -#define SDX55_MASTER_USB3 21 -/* 22 was used by SLAVE_IPA_CORE, now represented as RPMh clock */ -#define SDX55_SLAVE_EBI_CH0 23 -#define SDX55_SLAVE_LLCC 24 -#define SDX55_SLAVE_MEM_NOC_SNOC 25 -#define SDX55_SLAVE_MEM_NOC_PCIE_SNOC 26 -#define SDX55_SLAVE_ANOC_SNOC 27 -#define SDX55_SLAVE_SNOC_CFG 28 -#define SDX55_SLAVE_EMAC_CFG 29 -#define SDX55_SLAVE_USB3 30 -#define SDX55_SLAVE_TLMM 31 -#define SDX55_SLAVE_SPMI_FETCHER 32 -#define SDX55_SLAVE_QDSS_CFG 33 -#define SDX55_SLAVE_PDM 34 -#define SDX55_SLAVE_SNOC_MEM_NOC_GC 35 -#define SDX55_SLAVE_TCSR 36 -#define SDX55_SLAVE_CNOC_DDRSS 37 -#define SDX55_SLAVE_SPMI_VGI_COEX 38 -#define SDX55_SLAVE_QPIC 39 -#define SDX55_SLAVE_OCIMEM 40 -#define SDX55_SLAVE_IPA_CFG 41 -#define SDX55_SLAVE_USB3_PHY_CFG 42 -#define SDX55_SLAVE_AOP 43 -#define SDX55_SLAVE_BLSP_1 44 -#define SDX55_SLAVE_SDCC_1 45 -#define SDX55_SLAVE_CNOC_MSS 46 -#define SDX55_SLAVE_PCIE_PARF 47 -#define SDX55_SLAVE_ECC_CFG 48 -#define SDX55_SLAVE_AUDIO 49 -#define SDX55_SLAVE_AOSS 51 -#define SDX55_SLAVE_PRNG 52 -#define SDX55_SLAVE_CRYPTO_0_CFG 53 -#define SDX55_SLAVE_TCU 54 -#define SDX55_SLAVE_CLK_CTL 55 -#define SDX55_SLAVE_IMEM_CFG 56 -#define SDX55_SLAVE_SERVICE_SNOC 57 -#define SDX55_SLAVE_PCIE_0 58 -#define SDX55_SLAVE_QDSS_STM 59 -#define SDX55_SLAVE_APPSS 60 - -#endif --=20 2.47.3