From nobody Sun Feb 8 04:18:05 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C61E03446C4 for ; Fri, 31 Oct 2025 14:35:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761921359; cv=none; b=WDRwtnhu11owtRDvSKaJrdpZZKJNdR8Cu4ns8JbU6m6HAaW7v+2XKTPH23VHkwpSDhRAnFcAnAV+8nyz4qIRHm/JsKysPU6jcHL9Cay5RZ0pYcHaHCMFhsKfyfHeywmnDoKMnJacxFoUJDglTUcjkzg1HnAlJP9dYRDOsKUXtqY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761921359; c=relaxed/simple; bh=Nto1O8E7F5eJtEn7urOazOXUZMZvjmxSVO6WsqWWhjE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=akU9J7f3S11tiYGNy9eAKxljBHgU48Y3Te7ST2fHWX+O1jf7ikkK1VccMcEmFdd1y6a/3sY9wPVINHJLt8HspeS9p9OcPLedOPOqNGUpdcWXn+l4VV5x2tWybWXlQH7Q+lAZwpNIlFM8Qdf/vLSJlYBUF6l9hFc9Z130vqNfDDU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=SVqep/WT; arc=none smtp.client-ip=185.246.84.56 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="SVqep/WT" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-02.galae.net (Postfix) with ESMTPS id 2A21A1A17A7; Fri, 31 Oct 2025 14:35:56 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id EFE8560704; Fri, 31 Oct 2025 14:35:55 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 8FA9811818038; Fri, 31 Oct 2025 15:35:53 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1761921355; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=3MDxKT6qWTpGYlDNP4UwvRsNDZKSMQvEE+tXEiO2EX4=; b=SVqep/WTwpM/G10GwxAS0R6jtgTpo/G/OKyQY6p20xsofowsu1CrJg7uAviu1NyBoalOER TsjgxlIvfA+ckLhBfmQ6yo4Jknitu68rEs/qO7yaGLoqJHzKByCRK9QUXz8K7D7wn6hlR0 ww6kPUfCR0UcD0shm9kdbhnfe8ErhqHqLRhQcOVqzJjQB4s49e5JAfDzp+A91FS0/xYlIN ZrT3h65sklMHz4lhK3f1CaIa3rmVOayuHXGIf9oaBzYwpvoBhNP8h0OOoQKxN13qXmDURE wQcud06/GR2xnNT0PC2oMqQnO7xa9Je39p6l499tUv65WcZjUIlzXt4U17WGRQ== From: =?utf-8?q?Beno=C3=AEt_Monin?= Date: Fri, 31 Oct 2025 15:35:39 +0100 Subject: [PATCH v2 1/5] dt-bindings: i2c: dw: Add Mobileye I2C controllers Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251031-i2c-dw-v2-1-90416874fcc0@bootlin.com> References: <20251031-i2c-dw-v2-0-90416874fcc0@bootlin.com> In-Reply-To: <20251031-i2c-dw-v2-0-90416874fcc0@bootlin.com> To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jarkko Nikula , Mika Westerberg , Andy Shevchenko , Jan Dabros , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Vladimir Kondratiev , Dmitry Guzman , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Add compatible string for the I2C controllers present in Mobileye Eyeq6Lplus SoC. The same controllers are also present in the EyeQ7H. Signed-off-by: Beno=C3=AEt Monin --- Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml= b/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml index d904191bb0c6..bc84631f28d1 100644 --- a/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/snps,designware-i2c.yaml @@ -36,6 +36,7 @@ properties: const: baikal,bt1-sys-i2c - items: - enum: + - mobileye,eyeq6lplus-i2c - mscc,ocelot-i2c - sophgo,sg2044-i2c - thead,th1520-i2c --=20 2.51.1 From nobody Sun Feb 8 04:18:05 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B58B734C982 for ; Fri, 31 Oct 2025 14:35:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.85.4 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761921361; cv=none; b=TND53VrlYBcoHT214yAhuSRoDUicqUYlx/3UWamVmwAluyIsDqFHKKXDT8hKerUJGklyQHyREaI36YKN1VvxqSr3dBeBDSoAg/vpGgp6PQjw2CpKKv8MBBUc6edGcSBgTJYhH2u3Rtufg499XF6XRK/N0M6xlTK2lEJriqDrLv8= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761921361; c=relaxed/simple; bh=QYdwTGffhiIsHPXcV+yojSMBuQCvwVv+QuSeD1Et69Q=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=rg91ZOGq02rGpyCi30wpednjWGmYKWg4Bf5qbmDC5K8r4JvfF2kkCwbyGKWw9wpalRx7lvu3xof5gT0IEOcVy0uf4Op6VICUwxJZ0UyhCXRLtH9KrL4uZehsVDRci5UGgpEAgmO08Nj1yfcd1TN82CYwOVYrDJIX+t7ex3xCp8Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com; spf=pass smtp.mailfrom=bootlin.com; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b=DiqSK31Z; arc=none smtp.client-ip=185.246.85.4 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="DiqSK31Z" Received: from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233]) by smtpout-03.galae.net (Postfix) with ESMTPS id 2D2124E4143E; Fri, 31 Oct 2025 14:35:58 +0000 (UTC) Received: from mail.galae.net (mail.galae.net [212.83.136.155]) by smtpout-01.galae.net (Postfix) with ESMTPS id 0407E60704; Fri, 31 Oct 2025 14:35:58 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 695B811818039; Fri, 31 Oct 2025 15:35:55 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1761921357; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=/r+8Xznx3k7NPhBfqnm1ZY9xbZMhMWI68J+yr6/nu6k=; b=DiqSK31ZShcEOTH4IkEYxhu5kBnbxYiuKxzsSduaxsZVcjfeku3QlVJmxCkAXzBL5oV+f3 Al1oIDRhqRhJttItSLjTH0fXPBvkDFY2U82zK/DAmrkcFDfVHIPLQ4jSAIH3T8uuUJPYwj 5NSLjfrPdnsOK7LK6Ax5fN5YiaYjHfCqvZt+eWZzvNkESkNayCmqCV8Frbxg57qi8oG8E3 XiSBNf1uhzbFW43twbXpZDU1PdYXAQO7bRHYy4/gA6OHtlJQr1HOLaGQV0RFjz08h65J0G ZQ9QxEwEtm1xmNQjdgF9Escl93/Z0jPDI8VEayfu43SzBi9Fnk/JK30kYCIK/Q== From: =?utf-8?q?Beno=C3=AEt_Monin?= Date: Fri, 31 Oct 2025 15:35:40 +0100 Subject: [PATCH v2 2/5] i2c: designware: Optimize flag reading in i2c_dw_read() Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251031-i2c-dw-v2-2-90416874fcc0@bootlin.com> References: <20251031-i2c-dw-v2-0-90416874fcc0@bootlin.com> In-Reply-To: <20251031-i2c-dw-v2-0-90416874fcc0@bootlin.com> To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jarkko Nikula , Mika Westerberg , Andy Shevchenko , Jan Dabros , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Vladimir Kondratiev , Dmitry Guzman , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Optimize the i2c_dw_read() function by reading the message flags only once per message, rather than for every byte. The message index is only modified by the outer loop, so reading the flags in the inner loop was always getting the same value. Signed-off-by: Beno=C3=AEt Monin --- drivers/i2c/busses/i2c-designware-master.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busse= s/i2c-designware-master.c index 41e9b5ecad20..ec4fc2708d03 100644 --- a/drivers/i2c/busses/i2c-designware-master.c +++ b/drivers/i2c/busses/i2c-designware-master.c @@ -586,11 +586,12 @@ i2c_dw_read(struct dw_i2c_dev *dev) unsigned int rx_valid; =20 for (; dev->msg_read_idx < dev->msgs_num; dev->msg_read_idx++) { + u32 flags =3D msgs[dev->msg_read_idx].flags; unsigned int tmp; u32 len; u8 *buf; =20 - if (!(msgs[dev->msg_read_idx].flags & I2C_M_RD)) + if (!(flags & I2C_M_RD)) continue; =20 if (!(dev->status & STATUS_READ_IN_PROGRESS)) { @@ -604,8 +605,6 @@ i2c_dw_read(struct dw_i2c_dev *dev) regmap_read(dev->map, DW_IC_RXFLR, &rx_valid); =20 for (; len > 0 && rx_valid > 0; len--, rx_valid--) { - u32 flags =3D msgs[dev->msg_read_idx].flags; - regmap_read(dev->map, DW_IC_DATA_CMD, &tmp); tmp &=3D DW_IC_DATA_CMD_DAT; /* Ensure length byte is a valid value */ --=20 2.51.1 From nobody Sun Feb 8 04:18:05 2026 Received: from smtpout-02.galae.net (smtpout-02.galae.net [185.246.84.56]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 699AF34CFB5; Fri, 31 Oct 2025 14:36:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.246.84.56 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761921363; cv=none; b=JtFnpaI+ex92cb9N3kArL6BcL7qRJ9lXdkx0GFlPmUQXXx+tghRGoCzC/wn8iH0tXoyxFyKrdnFC3qbHjnnWxMOhg2lc0Nw19fm476SHJHJnuG0x6e6iKIGfqcsO37LBZVrE+wj3LTN8xeAlN98ASP/bpwdxVr73sjfQksfkRVM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761921363; c=relaxed/simple; bh=RrqcL62C+ktzF+tm7bTpoNGenY4mnqrJebw7KbTEIlg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251031-i2c-dw-v2-3-90416874fcc0@bootlin.com> References: <20251031-i2c-dw-v2-0-90416874fcc0@bootlin.com> In-Reply-To: <20251031-i2c-dw-v2-0-90416874fcc0@bootlin.com> To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jarkko Nikula , Mika Westerberg , Andy Shevchenko , Jan Dabros , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Vladimir Kondratiev , Dmitry Guzman , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Reorder the of_device_id structures so that they are in alphabetical order. Also drop the unneeded inner trailing comma in the "snps,designware-i2c" struct. Signed-off-by: Beno=C3=AEt Monin Reviewed-by: Andy Shevchenko --- drivers/i2c/busses/i2c-designware-platdrv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/buss= es/i2c-designware-platdrv.c index 34d881572351..d7d764f7554d 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -345,9 +345,9 @@ static void dw_i2c_plat_remove(struct platform_device *= pdev) } =20 static const struct of_device_id dw_i2c_of_match[] =3D { - { .compatible =3D "snps,designware-i2c", }, - { .compatible =3D "mscc,ocelot-i2c", .data =3D (void *)MODEL_MSCC_OCELOT = }, { .compatible =3D "baikal,bt1-sys-i2c", .data =3D (void *)MODEL_BAIKAL_BT= 1 }, + { .compatible =3D "mscc,ocelot-i2c", .data =3D (void *)MODEL_MSCC_OCELOT = }, + { .compatible =3D "snps,designware-i2c" }, {} }; MODULE_DEVICE_TABLE(of, dw_i2c_of_match); --=20 2.51.1 From nobody Sun Feb 8 04:18:05 2026 Received: from smtpout-03.galae.net (smtpout-03.galae.net [185.246.85.4]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6A94E34D4D7 for ; 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bh=8wBld+iTHvg/W6Ysw3IhzKMYKstkStW0Df/bDSMM+9Y=; b=N/fL39rYnp1pKdGPyPZu2a9JAHu8hWWlbIXFc7LkFLlrTSdIS2BiiFX6aqkOMf33NcrVB+ kL1z/knY+J1Tpdc9w3JdinRk+vi7+9M1TNlV6MVLAWeY9y64xW6U6XNkGCFy0XFpncoWJW UfeJYNKLg86KLfTwvJckogvcPH2vWs9e+WtWQ6UXAgEi5MLpsUxwS3eFDutttcrPtKLqtC ktDbE2RgbvT30HILGWDaOOxpioyTKjhYqPfTDrSH5hx8nmOhSZMRh+upMlNbU/gYTYbISl 4XWGQqSWXD4NiPGiKt76vWZwcveuAlyaHnL8trhWgYHL836i/bd4hSPMZJzmYA== From: =?utf-8?q?Beno=C3=AEt_Monin?= Date: Fri, 31 Oct 2025 15:35:42 +0100 Subject: [PATCH v2 4/5] i2c: designware: Implement I2C_M_STOP support Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251031-i2c-dw-v2-4-90416874fcc0@bootlin.com> References: <20251031-i2c-dw-v2-0-90416874fcc0@bootlin.com> In-Reply-To: <20251031-i2c-dw-v2-0-90416874fcc0@bootlin.com> To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jarkko Nikula , Mika Westerberg , Andy Shevchenko , Jan Dabros , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Vladimir Kondratiev , Dmitry Guzman , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 Add the support of the I2C_M_STOP flag in i2c_msg by splitting i2c_dw_xfer() in two: __i2c_dw_xfer_unlocked() for the core transfer logic and i2c_dw_xfer() for handling the high-level transaction management. In detail __i2c_dw_xfer_unlocked() starts a transaction and wait for its completion, either with a STOP on the bus or an error. i2c_dw_xfer() loops over the messages to search for the I2C_M_STOP flag and calls __i2c_dw_xfer_unlocked() for each part of the messages up to a STOP or the end of the messages array. i2c_dw_xfer() holds the device lock while calling __i2c_dw_xfer_unlocked(), this allows to group multiple accesses to device that support a STOP in a transaction when done via i2c_dev I2C_RDWR ioctl, in a single-master configuration. Also, now that we have a lookup of the messages in i2c_dw_xfer() prior to each transaction, we use it to make sure the messages are valid for the transaction. We check that the target address does not change before starting the transaction instead of aborting the transfer while it is happening, as it was done in i2c_dw_xfer_msg(). The target address can only be changed after an I2C_M_STOP flag, thus a STOP on the i2c bus. The I2C_FUNC_PROTOCOL_MANGLING flag is added to the list of functionalities supported by the adapter, except for the AMD NAVI i2c controller which uses its own xfer() function and is left untouched. Signed-off-by: Beno=C3=AEt Monin --- drivers/i2c/busses/i2c-designware-master.c | 103 ++++++++++++++++++++-----= ---- 1 file changed, 70 insertions(+), 33 deletions(-) diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busse= s/i2c-designware-master.c index ec4fc2708d03..da1963d25def 100644 --- a/drivers/i2c/busses/i2c-designware-master.c +++ b/drivers/i2c/busses/i2c-designware-master.c @@ -431,7 +431,6 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev) struct i2c_msg *msgs =3D dev->msgs; u32 intr_mask; int tx_limit, rx_limit; - u32 addr =3D msgs[dev->msg_write_idx].addr; u32 buf_len =3D dev->tx_buf_len; u8 *buf =3D dev->tx_buf; bool need_restart =3D false; @@ -442,18 +441,6 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev) for (; dev->msg_write_idx < dev->msgs_num; dev->msg_write_idx++) { u32 flags =3D msgs[dev->msg_write_idx].flags; =20 - /* - * If target address has changed, we need to - * reprogram the target address in the I2C - * adapter when we are done with this transfer. - */ - if (msgs[dev->msg_write_idx].addr !=3D addr) { - dev_err(dev->dev, - "%s: invalid target address\n", __func__); - dev->msg_err =3D -EINVAL; - break; - } - if (!(dev->status & STATUS_WRITE_IN_PROGRESS)) { /* new i2c_msg */ buf =3D msgs[dev->msg_write_idx].buf; @@ -801,26 +788,15 @@ static int i2c_dw_wait_transfer(struct dw_i2c_dev *de= v) } =20 /* - * Prepare controller for a transaction and call i2c_dw_xfer_msg. + * Prepare controller for a transaction, start the transfer of the msgs + * and wait for completion. + * Caller must hold the device lock. */ static int -i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) +__i2c_dw_xfer_unlocked(struct dw_i2c_dev *dev, struct i2c_msg msgs[], int = num) { - struct dw_i2c_dev *dev =3D i2c_get_adapdata(adap); int ret; =20 - dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num); - - pm_runtime_get_sync(dev->dev); - - switch (dev->flags & MODEL_MASK) { - case MODEL_AMD_NAVI_GPU: - ret =3D amd_i2c_dw_xfer_quirk(adap, msgs, num); - goto done_nolock; - default: - break; - } - reinit_completion(&dev->cmd_complete); dev->msgs =3D msgs; dev->msgs_num =3D num; @@ -832,10 +808,6 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg m= sgs[], int num) dev->abort_source =3D 0; dev->rx_outstanding =3D 0; =20 - ret =3D i2c_dw_acquire_lock(dev); - if (ret) - goto done_nolock; - ret =3D i2c_dw_wait_bus_not_busy(dev); if (ret < 0) goto done; @@ -896,13 +868,75 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg = msgs[], int num) =20 ret =3D -EIO; =20 +done: + return ret; +} + +static int +i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) +{ + struct dw_i2c_dev *dev =3D i2c_get_adapdata(adap); + struct i2c_msg *msg; + int ret, cnt; + + dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num); + + pm_runtime_get_sync(dev->dev); + + switch (dev->flags & MODEL_MASK) { + case MODEL_AMD_NAVI_GPU: + ret =3D amd_i2c_dw_xfer_quirk(adap, msgs, num); + goto done_nolock; + default: + break; + } + + ret =3D i2c_dw_acquire_lock(dev); + if (ret) + goto done_nolock; + + /* + * If the I2C_M_STOP is present in some the messages, + * we do one transaction for each part up to the STOP. + */ + for (msg =3D msgs; msg < msgs + num; msg +=3D cnt) { + u16 addr =3D msg->addr; + + /* + * Count the messages in a transaction, up to a STOP + * or the end of the msgs. + */ + for (cnt =3D 1; ; cnt++) { + /* + * We cannot change the target address during + * a transaction, so make sure the address stays + * the same. + */ + if (msg[cnt - 1].addr !=3D addr) { + dev_err(dev->dev, "invalid target address\n"); + ret =3D -EINVAL; + goto done; + } + + if ((msg[cnt - 1].flags & I2C_M_STOP) || + (msg + cnt =3D=3D msgs + num)) + break; + } + + ret =3D __i2c_dw_xfer_unlocked(dev, msg, cnt); + if (ret < 0) + goto done; + } + done: i2c_dw_release_lock(dev); =20 done_nolock: pm_runtime_put_autosuspend(dev->dev); =20 - return ret; + if (ret < 0) + return ret; + return num; } =20 static const struct i2c_algorithm i2c_dw_algo =3D { @@ -920,6 +954,9 @@ void i2c_dw_configure_master(struct dw_i2c_dev *dev) =20 dev->functionality =3D I2C_FUNC_10BIT_ADDR | DW_IC_DEFAULT_FUNCTIONALITY; =20 + if ((dev->flags & MODEL_MASK) !=3D MODEL_AMD_NAVI_GPU) + dev->functionality |=3D I2C_FUNC_PROTOCOL_MANGLING; + dev->master_cfg =3D DW_IC_CON_MASTER | DW_IC_CON_SLAVE_DISABLE | DW_IC_CON_RESTART_EN; =20 --=20 2.51.1 From nobody Sun Feb 8 04:18:05 2026 Received: from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5FF7D34D920; Fri, 31 Oct 2025 14:36:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.171.202.116 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761921368; cv=none; b=inTKba/fJXPek/x/VwUBf+Xg92f/OhSZUndzDLJHTqUYhQDSrlx3C/FHWUvNwHj2GZoltpCoec9Q3H53iU6idJXxoHbPMjxnn7lD3YzYKjNseHyEZCGmoRfOOf/yb4Yf49XCc3GsGr+rtRZn0RLa6u2HOLn1q+yrTbHcG17zXoE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761921368; c=relaxed/simple; bh=oYqfSNYYpiWI0OuWeWxkEUd864M2lIUa8tVkyB+4/yg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; 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Fri, 31 Oct 2025 14:36:03 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id E603F11818039; Fri, 31 Oct 2025 15:36:00 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim; t=1761921362; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding:in-reply-to:references; bh=Yjw4loEByKZMSXlcWfDPJgtA8NYHT/wALSWYb98nyPw=; b=m8L6cbPZmgJCiqjqzYkEPHExt+JkstsO7k6vP4FZwASJwA8kN8mCGppuK0fXspCC+eWCpm xqPHz0IJ8pr/+UrzdyIYULaXVVp2HBUP05lfRK96qEy/J9Sr1KIDROznexXx54Uk+SH8DW xwBbrmDkFOVTthuG6991Pxzie3YYRYch/AYmMlwiBijk/xfPC5dsLq9ES7k8uOoF/QoAgG sZ3ptJZHwOgDHxIUH4YCuHDWX4zqSoY0sDJiOsJNCuqSux2IUpXvI8s2Otd53lxze11eKn H4azEHPIny+2YuXHEomTrnYXcG32C4zoOecMX1accXciWNN2tX7Z1PgGAt4hSA== From: =?utf-8?q?Beno=C3=AEt_Monin?= Date: Fri, 31 Oct 2025 15:35:43 +0100 Subject: [PATCH v2 5/5] i2c: designware: Support of controller with IC_EMPTYFIFO_HOLD_MASTER disabled Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251031-i2c-dw-v2-5-90416874fcc0@bootlin.com> References: <20251031-i2c-dw-v2-0-90416874fcc0@bootlin.com> In-Reply-To: <20251031-i2c-dw-v2-0-90416874fcc0@bootlin.com> To: Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Jarkko Nikula , Mika Westerberg , Andy Shevchenko , Jan Dabros , Sebastian Andrzej Siewior , Clark Williams , Steven Rostedt Cc: Thomas Petazzoni , Gregory CLEMENT , =?utf-8?q?Th=C3=A9o_Lebrun?= , Tawfik Bayouk , Vladimir Kondratiev , Dmitry Guzman , linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rt-devel@lists.linux.dev, =?utf-8?q?Beno=C3=AEt_Monin?= X-Mailer: b4 0.14.3 X-Last-TLS-Session-Version: TLSv1.3 If IC_EMPTYFIFO_HOLD_MASTER_EN parameter is 0, "Stop" and "Repeated Start" bits in command register does not exist, thus it is impossible to send several consecutive write messages in a single hardware batch. The existing implementation worked with such configuration incorrectly: all consecutive write messages are joined into a single message without any Start/Stop or Repeated Start conditions. For example, the following command: i2ctransfer -y 0 w1@0x55 0x00 w1@0x55 0x01 does the same as i2ctransfer -y 0 w2@0x55 0x00 0x01 In i2c_dw_xfer(), we ensure that we do not have such sequence of messages requiring a RESTART, aborting the transfer on controller that cannot emit them explicitly. This behavior is activated by compatible entries because the state of the IC_EMPTYFIFO_HOLD_MASTER_EN parameter cannot be detected at runtime. Add the compatible entry for Mobileye SoCs needing the workaround. There is another possible problem with this controller configuration: When the CPU is putting commands to the FIFO, this process must not be interrupted because if FIFO buffer gets empty, the controller finishes the I2C transaction and generates STOP condition on the bus. If we continue writing the remainder of the message to the FIFO, the controller will start emitting a new transaction with those data. This turns a single a single message into multiple I2C transactions. To ensure that we do not keep processing a message after a FIFO underrun, checks are added in two places. First in i2c_dw_xfer_msg() we check the raw interrupt status register to see if a STOP condition was detected while filling the FIFO, and abort if so. This can happen with threaded interrupt on a PREEMPT_RT kernel if we are preempted during the processing of each bytes of the message. Second in i2c_dw_process_transfer(), we abort if a STOP is detected while a read or a write is in progress. This can occur when processing a message larger than the FIFO. In that case the message is processed in parts, and rely on the TW EMPTY interrupt to refill the FIFO when it gets below a threshold. If servicing this interrupt is delayed for too long, it can trigger a FIFO underrun, thus an unwanted STOP. Originally-by: Dmitry Guzman Signed-off-by: Beno=C3=AEt Monin --- drivers/i2c/busses/i2c-designware-core.h | 1 + drivers/i2c/busses/i2c-designware-master.c | 51 +++++++++++++++++++++++++= ++++ drivers/i2c/busses/i2c-designware-platdrv.c | 1 + 3 files changed, 53 insertions(+) diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/= i2c-designware-core.h index 347843b4f5dd..a31a8698e511 100644 --- a/drivers/i2c/busses/i2c-designware-core.h +++ b/drivers/i2c/busses/i2c-designware-core.h @@ -311,6 +311,7 @@ struct dw_i2c_dev { #define ACCESS_NO_IRQ_SUSPEND BIT(1) #define ARBITRATION_SEMAPHORE BIT(2) #define ACCESS_POLLING BIT(3) +#define NO_EMPTYFIFO_HOLD_MASTER BIT(4) =20 #define MODEL_MSCC_OCELOT BIT(8) #define MODEL_BAIKAL_BT1 BIT(9) diff --git a/drivers/i2c/busses/i2c-designware-master.c b/drivers/i2c/busse= s/i2c-designware-master.c index da1963d25def..329bb69485f4 100644 --- a/drivers/i2c/busses/i2c-designware-master.c +++ b/drivers/i2c/busses/i2c-designware-master.c @@ -463,6 +463,7 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev) rx_limit =3D dev->rx_fifo_depth - flr; =20 while (buf_len > 0 && tx_limit > 0 && rx_limit > 0) { + unsigned int raw_stat; u32 cmd =3D 0; =20 /* @@ -487,6 +488,21 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev) need_restart =3D false; } =20 + /* + * With threaded interrupt on a PREEMPT-RT kernel, we may + * be interrupted while filling the FIFO. Abort the + * transfer in case of a FIFO underrun on controller that + * emits a STOP in that case. + */ + if (dev->flags & NO_EMPTYFIFO_HOLD_MASTER) { + regmap_read(dev->map, DW_IC_RAW_INTR_STAT, + &raw_stat); + if (raw_stat & DW_IC_INTR_STOP_DET) { + dev->msg_err =3D -EIO; + goto done; + } + } + if (msgs[dev->msg_write_idx].flags & I2C_M_RD) { =20 /* Avoid rx buffer overrun */ @@ -526,6 +542,7 @@ i2c_dw_xfer_msg(struct dw_i2c_dev *dev) dev->status &=3D ~STATUS_WRITE_IN_PROGRESS; } =20 +done: /* * If i2c_msg index search is completed, we don't need TX_EMPTY * interrupt any more. @@ -706,6 +723,14 @@ static void i2c_dw_process_transfer(struct dw_i2c_dev = *dev, unsigned int stat) if (stat & DW_IC_INTR_TX_EMPTY) i2c_dw_xfer_msg(dev); =20 + /* Abort if we detect a STOP in the middle of a read or a write */ + if ((stat & DW_IC_INTR_STOP_DET) && + (dev->status & (STATUS_READ_IN_PROGRESS | STATUS_WRITE_IN_PROGRESS)))= { + dev_err(dev->dev, "spurious STOP detected\n"); + dev->rx_outstanding =3D 0; + dev->msg_err =3D -EIO; + } + /* * No need to modify or disable the interrupt mask here. * i2c_dw_xfer_msg() will take care of it according to @@ -872,6 +897,21 @@ __i2c_dw_xfer_unlocked(struct dw_i2c_dev *dev, struct = i2c_msg msgs[], int num) return ret; } =20 +/* + * Return true if the message needs an explicit RESTART before being sent. + * Without an explicit RESTART, two consecutive messages in the same direc= tion + * will be merged into a single transfer. + * The adapter always emits a RESTART when the direction changes. + */ +static inline bool i2c_dw_msg_need_restart(struct i2c_msg msgs[], int idx) +{ + /* No need for a RESTART on the first message */ + if (idx =3D=3D 0) + return false; + + return (msgs[idx - 1].flags & I2C_M_RD) =3D=3D (msgs[idx].flags & I2C_M_R= D); +} + static int i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num) { @@ -918,6 +958,17 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg m= sgs[], int num) goto done; } =20 + /* + * Make sure we don't need explicit RESTART for + * controllers that cannot emit them. + */ + if (dev->flags & NO_EMPTYFIFO_HOLD_MASTER && + i2c_dw_msg_need_restart(msg, cnt - 1)) { + dev_err(dev->dev, "cannot emit RESTART\n"); + ret =3D -EINVAL; + goto done; + } + if ((msg[cnt - 1].flags & I2C_M_STOP) || (msg + cnt =3D=3D msgs + num)) break; diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/buss= es/i2c-designware-platdrv.c index d7d764f7554d..4aad3dc51fbc 100644 --- a/drivers/i2c/busses/i2c-designware-platdrv.c +++ b/drivers/i2c/busses/i2c-designware-platdrv.c @@ -346,6 +346,7 @@ static void dw_i2c_plat_remove(struct platform_device *= pdev) =20 static const struct of_device_id dw_i2c_of_match[] =3D { { .compatible =3D "baikal,bt1-sys-i2c", .data =3D (void *)MODEL_BAIKAL_BT= 1 }, + { .compatible =3D "mobileye,eyeq6lplus-i2c", .data =3D (void *)NO_EMPTYFI= FO_HOLD_MASTER }, { .compatible =3D "mscc,ocelot-i2c", .data =3D (void *)MODEL_MSCC_OCELOT = }, { .compatible =3D "snps,designware-i2c" }, {} --=20 2.51.1