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[176.247.57.96]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b7044d00de6sm394089566b.74.2025.10.30.00.27.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Oct 2025 00:27:54 -0700 (PDT) From: Francesco Lavra To: Lorenzo Bianconi , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/9] iio: imu: st_lsm6dsx: dynamically initialize iio_chan_spec data Date: Thu, 30 Oct 2025 08:27:44 +0100 Message-Id: <20251030072752.349633-2-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251030072752.349633-1-flavra@baylibre.com> References: <20251030072752.349633-1-flavra@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=10487; i=flavra@baylibre.com; h=from:subject; bh=rLKIJIR5n/24I4E8NSjNiQ7FAoDMdyFHbSEQW/3F2Cs=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBpAxNIzfPd4xHTFizoqCtDo/6TG3u3yqb3zkuRr LH0+N9YDVKJAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaQMTSAAKCRDt8TtzzpQ2 X0YODACfoc+lsjiexNlwWCPJHrBSCJN5z8yse/xMhnY2EpamcT1/8/J0lhDgJQIVPUffSruan3h 5q/AHghvEv9M2jL/eItGnq1iHvlc+6zFDfl53y/N0AJEC+oClEpuiAUcd39N58U9pyF9iUEavA8 EpHfw+d62RD/V+4MtzZqdDBOts2Y8P4+Ru4hBsZSgrIn8ySOgLoJ1io84v33uNJSnx0Wj9oHXNx CSbVbZL/956r9fENcUGN3YMUDutpGr/iHRE8C+ETNZX7eVrxfbWflSaDO1e9S52eTg7FW0+pdX1 EQ61S3hRwp9o+sBfAbQOdQr+tofcndH/tFCVwIW5/hMcncH9mI2kynYRmwhakzuomtTKy0cliIy hzHhjCkixIVwGckU7PdTSfs48qvmI844A22wIk4cXSlKGw1bm+jvzwFeTuhdq6yg23a5+xj0Hbe lx7gPBQxowLOuaz1u2BeBRIzPCE4Se8wbQ7YgJurNwAswPe9nTqF6WUC5xDDNbgU08ZtA= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Using the ST_LSM6DSX_CHANNEL_ACC() macro as a static initializer for the iio_chan_spec struct arrays makes all sensors advertise channel event capabilities regardless of whether they actually support event generation. And if userspace tries to configure accelerometer wakeup events on a sensor device that does not support them (e.g. LSM6DS0), st_lsm6dsx_write_event() dereferences a NULL pointer when trying to write to the wakeup register. Replace usage of the ST_LSM6DSX_CHANNEL_ACC() and ST_LSM6DSX_CHANNEL() macros with dynamic allocation and initialization of struct iio_chan_spec arrays, where the st_lsm6dsx_event structure is only used for sensors that support wakeup events; besides fixing the above bug, this serves as a preliminary step for adding support for more event types. Signed-off-by: Francesco Lavra --- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h | 26 +-- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 164 ++++++++----------- 2 files changed, 71 insertions(+), 119 deletions(-) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_l= sm6dsx/st_lsm6dsx.h index a4f558899767..db863bd1898d 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h @@ -80,27 +80,6 @@ enum st_lsm6dsx_hw_id { * ST_LSM6DSX_TAGGED_SAMPLE_SIZE) #define ST_LSM6DSX_SHIFT_VAL(val, mask) (((val) << __ffs(mask)) & (mask)) =20 -#define ST_LSM6DSX_CHANNEL_ACC(chan_type, addr, mod, scan_idx) \ -{ \ - .type =3D chan_type, \ - .address =3D addr, \ - .modified =3D 1, \ - .channel2 =3D mod, \ - .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW), \ - .info_mask_shared_by_type =3D BIT(IIO_CHAN_INFO_SCALE), \ - .info_mask_shared_by_all =3D BIT(IIO_CHAN_INFO_SAMP_FREQ), \ - .scan_index =3D scan_idx, \ - .scan_type =3D { \ - .sign =3D 's', \ - .realbits =3D 16, \ - .storagebits =3D 16, \ - .endianness =3D IIO_LE, \ - }, \ - .event_spec =3D &st_lsm6dsx_event, \ - .ext_info =3D st_lsm6dsx_ext_info, \ - .num_event_specs =3D 1, \ -} - #define ST_LSM6DSX_CHANNEL(chan_type, addr, mod, scan_idx) \ { \ .type =3D chan_type, \ @@ -328,10 +307,7 @@ struct st_lsm6dsx_settings { const char *name; u8 wai; } id[ST_LSM6DSX_MAX_ID]; - struct { - const struct iio_chan_spec *chan; - int len; - } channels[2]; + u8 chan_addr_base[2]; struct { struct st_lsm6dsx_reg irq1; struct st_lsm6dsx_reg irq2; diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu= /st_lsm6dsx/st_lsm6dsx_core.c index 216160549b5a..17b46e15cce5 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -96,26 +96,7 @@ =20 #define ST_LSM6DSX_TS_SENSITIVITY 25000UL /* 25us */ =20 -static const struct iio_chan_spec st_lsm6dsx_acc_channels[] =3D { - ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x28, IIO_MOD_X, 0), - ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2a, IIO_MOD_Y, 1), - ST_LSM6DSX_CHANNEL_ACC(IIO_ACCEL, 0x2c, IIO_MOD_Z, 2), - IIO_CHAN_SOFT_TIMESTAMP(3), -}; - -static const struct iio_chan_spec st_lsm6dsx_gyro_channels[] =3D { - ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x22, IIO_MOD_X, 0), - ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x24, IIO_MOD_Y, 1), - ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x26, IIO_MOD_Z, 2), - IIO_CHAN_SOFT_TIMESTAMP(3), -}; - -static const struct iio_chan_spec st_lsm6ds0_gyro_channels[] =3D { - ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x18, IIO_MOD_X, 0), - ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1a, IIO_MOD_Y, 1), - ST_LSM6DSX_CHANNEL(IIO_ANGL_VEL, 0x1c, IIO_MOD_Z, 2), - IIO_CHAN_SOFT_TIMESTAMP(3), -}; +#define ST_LSM6DSX_CHAN_COUNT 4 =20 static const struct st_lsm6dsx_settings st_lsm6dsx_sensor_settings[] =3D { { @@ -142,15 +123,9 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sen= sor_settings[] =3D { .wai =3D 0x68, }, }, - .channels =3D { - [ST_LSM6DSX_ID_ACC] =3D { - .chan =3D st_lsm6dsx_acc_channels, - .len =3D ARRAY_SIZE(st_lsm6dsx_acc_channels), - }, - [ST_LSM6DSX_ID_GYRO] =3D { - .chan =3D st_lsm6ds0_gyro_channels, - .len =3D ARRAY_SIZE(st_lsm6ds0_gyro_channels), - }, + .chan_addr_base =3D { + [ST_LSM6DSX_ID_ACC] =3D 0x28, + [ST_LSM6DSX_ID_GYRO] =3D 0x18, }, .odr_table =3D { [ST_LSM6DSX_ID_ACC] =3D { @@ -246,15 +221,9 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sen= sor_settings[] =3D { .wai =3D 0x69, }, }, - .channels =3D { - [ST_LSM6DSX_ID_ACC] =3D { - .chan =3D st_lsm6dsx_acc_channels, - .len =3D ARRAY_SIZE(st_lsm6dsx_acc_channels), - }, - [ST_LSM6DSX_ID_GYRO] =3D { - .chan =3D st_lsm6dsx_gyro_channels, - .len =3D ARRAY_SIZE(st_lsm6dsx_gyro_channels), - }, + .chan_addr_base =3D { + [ST_LSM6DSX_ID_ACC] =3D 0x28, + [ST_LSM6DSX_ID_GYRO] =3D 0x22, }, .odr_table =3D { [ST_LSM6DSX_ID_ACC] =3D { @@ -412,15 +381,9 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sen= sor_settings[] =3D { .wai =3D 0x69, }, }, - .channels =3D { - [ST_LSM6DSX_ID_ACC] =3D { - .chan =3D st_lsm6dsx_acc_channels, - .len =3D ARRAY_SIZE(st_lsm6dsx_acc_channels), - }, - [ST_LSM6DSX_ID_GYRO] =3D { - .chan =3D st_lsm6dsx_gyro_channels, - .len =3D ARRAY_SIZE(st_lsm6dsx_gyro_channels), - }, + .chan_addr_base =3D { + [ST_LSM6DSX_ID_ACC] =3D 0x28, + [ST_LSM6DSX_ID_GYRO] =3D 0x22, }, .odr_table =3D { [ST_LSM6DSX_ID_ACC] =3D { @@ -590,15 +553,9 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sen= sor_settings[] =3D { .wai =3D 0x6a, }, }, - .channels =3D { - [ST_LSM6DSX_ID_ACC] =3D { - .chan =3D st_lsm6dsx_acc_channels, - .len =3D ARRAY_SIZE(st_lsm6dsx_acc_channels), - }, - [ST_LSM6DSX_ID_GYRO] =3D { - .chan =3D st_lsm6dsx_gyro_channels, - .len =3D ARRAY_SIZE(st_lsm6dsx_gyro_channels), - }, + .chan_addr_base =3D { + [ST_LSM6DSX_ID_ACC] =3D 0x28, + [ST_LSM6DSX_ID_GYRO] =3D 0x22, }, .odr_table =3D { [ST_LSM6DSX_ID_ACC] =3D { @@ -847,15 +804,9 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sen= sor_settings[] =3D { .wai =3D 0x6d, }, }, - .channels =3D { - [ST_LSM6DSX_ID_ACC] =3D { - .chan =3D st_lsm6dsx_acc_channels, - .len =3D ARRAY_SIZE(st_lsm6dsx_acc_channels), - }, - [ST_LSM6DSX_ID_GYRO] =3D { - .chan =3D st_lsm6dsx_gyro_channels, - .len =3D ARRAY_SIZE(st_lsm6dsx_gyro_channels), - }, + .chan_addr_base =3D { + [ST_LSM6DSX_ID_ACC] =3D 0x28, + [ST_LSM6DSX_ID_GYRO] =3D 0x22, }, .drdy_mask =3D { .addr =3D 0x13, @@ -1060,15 +1011,9 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_s= ensor_settings[] =3D { .wai =3D 0x6b, }, }, - .channels =3D { - [ST_LSM6DSX_ID_ACC] =3D { - .chan =3D st_lsm6dsx_acc_channels, - .len =3D ARRAY_SIZE(st_lsm6dsx_acc_channels), - }, - [ST_LSM6DSX_ID_GYRO] =3D { - .chan =3D st_lsm6dsx_gyro_channels, - .len =3D ARRAY_SIZE(st_lsm6dsx_gyro_channels), - }, + .chan_addr_base =3D { + [ST_LSM6DSX_ID_ACC] =3D 0x28, + [ST_LSM6DSX_ID_GYRO] =3D 0x22, }, .drdy_mask =3D { .addr =3D 0x13, @@ -1237,15 +1182,9 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_s= ensor_settings[] =3D { .wai =3D 0x70, }, }, - .channels =3D { - [ST_LSM6DSX_ID_ACC] =3D { - .chan =3D st_lsm6dsx_acc_channels, - .len =3D ARRAY_SIZE(st_lsm6dsx_acc_channels), - }, - [ST_LSM6DSX_ID_GYRO] =3D { - .chan =3D st_lsm6dsx_gyro_channels, - .len =3D ARRAY_SIZE(st_lsm6dsx_gyro_channels), - }, + .chan_addr_base =3D { + [ST_LSM6DSX_ID_ACC] =3D 0x28, + [ST_LSM6DSX_ID_GYRO] =3D 0x22, }, .drdy_mask =3D { .addr =3D 0x13, @@ -1443,15 +1382,9 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_s= ensor_settings[] =3D { .wai =3D 0x22, } }, - .channels =3D { - [ST_LSM6DSX_ID_ACC] =3D { - .chan =3D st_lsm6dsx_acc_channels, - .len =3D ARRAY_SIZE(st_lsm6dsx_acc_channels), - }, - [ST_LSM6DSX_ID_GYRO] =3D { - .chan =3D st_lsm6dsx_gyro_channels, - .len =3D ARRAY_SIZE(st_lsm6dsx_gyro_channels), - }, + .chan_addr_base =3D { + [ST_LSM6DSX_ID_ACC] =3D 0x28, + [ST_LSM6DSX_ID_GYRO] =3D 0x22, }, .odr_table =3D { [ST_LSM6DSX_ID_ACC] =3D { @@ -2366,21 +2299,64 @@ static int st_lsm6dsx_init_device(struct st_lsm6dsx= _hw *hw) return st_lsm6dsx_init_hw_timer(hw); } =20 +static int st_lsm6dsx_chan_init(struct iio_chan_spec *channels, struct st_= lsm6dsx_hw *hw, + enum st_lsm6dsx_sensor_id id, int index) +{ + struct iio_chan_spec *chan =3D &channels[index]; + + chan->type =3D (id =3D=3D ST_LSM6DSX_ID_ACC) ? IIO_ACCEL : IIO_ANGL_VEL; + chan->address =3D hw->settings->chan_addr_base[id] + index * ST_LSM6DSX_C= HAN_SIZE; + chan->modified =3D 1; + chan->channel2 =3D IIO_MOD_X + index; + chan->info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW); + chan->info_mask_shared_by_type =3D BIT(IIO_CHAN_INFO_SCALE); + chan->info_mask_shared_by_all =3D BIT(IIO_CHAN_INFO_SAMP_FREQ); + chan->scan_index =3D index; + chan->scan_type.sign =3D 's'; + chan->scan_type.realbits =3D 16; + chan->scan_type.storagebits =3D 16; + chan->scan_type.endianness =3D IIO_LE; + chan->ext_info =3D st_lsm6dsx_ext_info; + if (id =3D=3D ST_LSM6DSX_ID_ACC) { + if (hw->settings->event_settings.wakeup_reg.addr) { + chan->event_spec =3D &st_lsm6dsx_event; + chan->num_event_specs =3D 1; + } + } + return 0; +} + static struct iio_dev *st_lsm6dsx_alloc_iiodev(struct st_lsm6dsx_hw *hw, enum st_lsm6dsx_sensor_id id, const char *name) { struct st_lsm6dsx_sensor *sensor; struct iio_dev *iio_dev; + struct iio_chan_spec *channels; + int i; =20 iio_dev =3D devm_iio_device_alloc(hw->dev, sizeof(*sensor)); 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[176.247.57.96]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b6d853f98adsm1636197366b.49.2025.10.30.00.27.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Oct 2025 00:27:55 -0700 (PDT) From: Francesco Lavra To: Lorenzo Bianconi , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/9] iio: imu: st_lsm6dsx: make event_settings more generic Date: Thu, 30 Oct 2025 08:27:45 +0100 Message-Id: <20251030072752.349633-3-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251030072752.349633-1-flavra@baylibre.com> References: <20251030072752.349633-1-flavra@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=8864; i=flavra@baylibre.com; h=from:subject; bh=3i6TmZy38WX7WjId5K7zj8RwsRnHvMYK+XMl1I3L4Vg=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBpAxNIlCNm6znDWf19r1q0ljsU0Akp3kpaTA5jk S1Tpv4QB66JAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaQMTSAAKCRDt8TtzzpQ2 X+QcDACbVDo/H7DUrCyRumfJV1cFjgV8pyb3qpzMK7JgXPL+a1NW6oPgLXYtFA5jP/xiLZ0D5QF moJGjq92wH8yLpQkLjW9nkUGmcscDCgJmoRHGSTJ5+ydr6NcRyb72fzVvVbKISzfMSOOw3mbeGZ byN+bJA0f/I+5+XnABmBd5758KovWJi4UQlPo3PPAHBS4Y/BmeaVnPWEIP3Nfg9FcrngEX8ybOF RYxHbtPfnxxboAffPsoKS2F2LMAsC87/7D9U6Ee/4SAH3g/bHnt0x9aQEgn+S+PC+Q0TQhi8FmY r8+I1rvKLtS98apzXQhLbdKkPE+E8TDmvMMXB1CrOpgDRwBRb6CvYEdtPHmVSVHMy9ZQK3AavR7 wpbi+V7MqP//Np6li8L2r87YGTqzi1EQVjXAMmihd8nJDoIOSTkWRWB0ktIIaCtVX8UWvUVougT 73E6NlHODNIKQPjYp2MTNrpGSeMn6Fb3gDvq1pgfSqCEBgopJm1s41W58l00e/BzJOaY4= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The st_lsm6dsx_event_settings structure contains fields specific for one event type (wakeup). In preparation for adding support for more event types, introduce an event id enum and a generic event source structure, and replace wakeup-specific data in struct st_lsm6dsx_event_settings with an array of event source structures. Signed-off-by: Francesco Lavra --- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h | 21 ++- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 136 +++++++++++-------- 2 files changed, 96 insertions(+), 61 deletions(-) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_l= sm6dsx/st_lsm6dsx.h index db863bd1898d..05689887f7ec 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h @@ -221,14 +221,23 @@ struct st_lsm6dsx_shub_settings { u8 pause; }; =20 +enum st_lsm6dsx_event_id { + ST_LSM6DSX_EVENT_WAKEUP, + ST_LSM6DSX_EVENT_MAX +}; + +struct st_lsm6dsx_event_src { + struct st_lsm6dsx_reg value; + u8 status_reg; + u8 status_mask; + u8 status_x_mask; + u8 status_y_mask; + u8 status_z_mask; +}; + struct st_lsm6dsx_event_settings { struct st_lsm6dsx_reg enable_reg; - struct st_lsm6dsx_reg wakeup_reg; - u8 wakeup_src_reg; - u8 wakeup_src_status_mask; - u8 wakeup_src_z_mask; - u8 wakeup_src_y_mask; - u8 wakeup_src_x_mask; + struct st_lsm6dsx_event_src sources[ST_LSM6DSX_EVENT_MAX]; }; =20 enum st_lsm6dsx_ext_sensor_id { diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu= /st_lsm6dsx/st_lsm6dsx_core.c index 17b46e15cce5..bb4c4c531128 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -350,15 +350,19 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_se= nsor_settings[] =3D { }, }, .event_settings =3D { - .wakeup_reg =3D { - .addr =3D 0x5B, - .mask =3D GENMASK(5, 0), + .sources =3D { + [ST_LSM6DSX_EVENT_WAKEUP] =3D { + .value =3D { + .addr =3D 0x5b, + .mask =3D GENMASK(5, 0), + }, + .status_reg =3D 0x1b, + .status_mask =3D BIT(3), + .status_z_mask =3D BIT(0), + .status_y_mask =3D BIT(1), + .status_x_mask =3D BIT(2), + }, }, - .wakeup_src_reg =3D 0x1b, - .wakeup_src_status_mask =3D BIT(3), - .wakeup_src_z_mask =3D BIT(0), - .wakeup_src_y_mask =3D BIT(1), - .wakeup_src_x_mask =3D BIT(2), }, }, { @@ -510,15 +514,19 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_se= nsor_settings[] =3D { }, }, .event_settings =3D { - .wakeup_reg =3D { - .addr =3D 0x5B, - .mask =3D GENMASK(5, 0), + .sources =3D { + [ST_LSM6DSX_EVENT_WAKEUP] =3D { + .value =3D { + .addr =3D 0x5b, + .mask =3D GENMASK(5, 0), + }, + .status_reg =3D 0x1b, + .status_mask =3D BIT(3), + .status_z_mask =3D BIT(0), + .status_y_mask =3D BIT(1), + .status_x_mask =3D BIT(2), + }, }, - .wakeup_src_reg =3D 0x1b, - .wakeup_src_status_mask =3D BIT(3), - .wakeup_src_z_mask =3D BIT(0), - .wakeup_src_y_mask =3D BIT(1), - .wakeup_src_x_mask =3D BIT(2), }, }, { @@ -741,15 +749,19 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_se= nsor_settings[] =3D { .addr =3D 0x58, .mask =3D BIT(7), }, - .wakeup_reg =3D { - .addr =3D 0x5B, - .mask =3D GENMASK(5, 0), + .sources =3D { + [ST_LSM6DSX_EVENT_WAKEUP] =3D { + .value =3D { + .addr =3D 0x5b, + .mask =3D GENMASK(5, 0), + }, + .status_reg =3D 0x1b, + .status_mask =3D BIT(3), + .status_z_mask =3D BIT(0), + .status_y_mask =3D BIT(1), + .status_x_mask =3D BIT(2), + }, }, - .wakeup_src_reg =3D 0x1b, - .wakeup_src_status_mask =3D BIT(3), - .wakeup_src_z_mask =3D BIT(0), - .wakeup_src_y_mask =3D BIT(1), - .wakeup_src_x_mask =3D BIT(2), }, }, { @@ -972,15 +984,19 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_se= nsor_settings[] =3D { .addr =3D 0x58, .mask =3D BIT(7), }, - .wakeup_reg =3D { - .addr =3D 0x5b, - .mask =3D GENMASK(5, 0), + .sources =3D { + [ST_LSM6DSX_EVENT_WAKEUP] =3D { + .value =3D { + .addr =3D 0x5b, + .mask =3D GENMASK(5, 0), + }, + .status_reg =3D 0x1b, + .status_mask =3D BIT(3), + .status_z_mask =3D BIT(0), + .status_y_mask =3D BIT(1), + .status_x_mask =3D BIT(2), + }, }, - .wakeup_src_reg =3D 0x1b, - .wakeup_src_status_mask =3D BIT(3), - .wakeup_src_z_mask =3D BIT(0), - .wakeup_src_y_mask =3D BIT(1), - .wakeup_src_x_mask =3D BIT(2), }, }, { @@ -1147,15 +1163,19 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_= sensor_settings[] =3D { .addr =3D 0x58, .mask =3D BIT(7), }, - .wakeup_reg =3D { - .addr =3D 0x5B, - .mask =3D GENMASK(5, 0), + .sources =3D { + [ST_LSM6DSX_EVENT_WAKEUP] =3D { + .value =3D { + .addr =3D 0x5b, + .mask =3D GENMASK(5, 0), + }, + .status_reg =3D 0x1b, + .status_mask =3D BIT(3), + .status_z_mask =3D BIT(0), + .status_y_mask =3D BIT(1), + .status_x_mask =3D BIT(2), + }, }, - .wakeup_src_reg =3D 0x1b, - .wakeup_src_status_mask =3D BIT(3), - .wakeup_src_z_mask =3D BIT(0), - .wakeup_src_y_mask =3D BIT(1), - .wakeup_src_x_mask =3D BIT(2), }, }, { @@ -1347,15 +1367,19 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_= sensor_settings[] =3D { .addr =3D 0x50, .mask =3D BIT(7), }, - .wakeup_reg =3D { - .addr =3D 0x5b, - .mask =3D GENMASK(5, 0), + .sources =3D { + [ST_LSM6DSX_EVENT_WAKEUP] =3D { + .value =3D { + .addr =3D 0x5b, + .mask =3D GENMASK(5, 0), + }, + .status_reg =3D 0x45, + .status_mask =3D BIT(3), + .status_z_mask =3D BIT(0), + .status_y_mask =3D BIT(1), + .status_x_mask =3D BIT(2), + }, }, - .wakeup_src_reg =3D 0x45, - .wakeup_src_status_mask =3D BIT(3), - .wakeup_src_z_mask =3D BIT(0), - .wakeup_src_y_mask =3D BIT(1), - .wakeup_src_x_mask =3D BIT(2), }, }, { @@ -1861,7 +1885,7 @@ st_lsm6dsx_write_event(struct iio_dev *iio_dev, if (val < 0 || val > 31) return -EINVAL; =20 - reg =3D &hw->settings->event_settings.wakeup_reg; + reg =3D &hw->settings->event_settings.sources[ST_LSM6DSX_EVENT_WAKEUP].va= lue; data =3D ST_LSM6DSX_SHIFT_VAL(val, reg->mask); err =3D st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data); @@ -2318,7 +2342,7 @@ static int st_lsm6dsx_chan_init(struct iio_chan_spec = *channels, struct st_lsm6ds chan->scan_type.endianness =3D IIO_LE; chan->ext_info =3D st_lsm6dsx_ext_info; if (id =3D=3D ST_LSM6DSX_ID_ACC) { - if (hw->settings->event_settings.wakeup_reg.addr) { + if (hw->settings->event_settings.sources[ST_LSM6DSX_EVENT_WAKEUP].value.= addr) { chan->event_spec =3D &st_lsm6dsx_event; chan->num_event_specs =3D 1; } @@ -2389,6 +2413,7 @@ static bool st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw) { const struct st_lsm6dsx_event_settings *event_settings; + const struct st_lsm6dsx_event_src *event_src; int err, data; s64 timestamp; =20 @@ -2396,13 +2421,14 @@ st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw= *hw) return false; =20 event_settings =3D &hw->settings->event_settings; - err =3D st_lsm6dsx_read_locked(hw, event_settings->wakeup_src_reg, + event_src =3D &event_settings->sources[ST_LSM6DSX_EVENT_WAKEUP]; + err =3D st_lsm6dsx_read_locked(hw, event_src->status_reg, &data, sizeof(data)); if (err < 0) return false; =20 timestamp =3D iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]); - if ((data & hw->settings->event_settings.wakeup_src_z_mask) && + if ((data & event_src->status_z_mask) && (hw->enable_event & BIT(IIO_MOD_Z))) iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], IIO_MOD_EVENT_CODE(IIO_ACCEL, @@ -2412,7 +2438,7 @@ st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *= hw) IIO_EV_DIR_EITHER), timestamp); =20 - if ((data & hw->settings->event_settings.wakeup_src_y_mask) && + if ((data & event_src->status_y_mask) && (hw->enable_event & BIT(IIO_MOD_Y))) iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], IIO_MOD_EVENT_CODE(IIO_ACCEL, @@ -2422,7 +2448,7 @@ st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *= hw) IIO_EV_DIR_EITHER), timestamp); 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[176.247.57.96]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b6d85398439sm1682670866b.36.2025.10.30.00.27.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Oct 2025 00:27:57 -0700 (PDT) From: Francesco Lavra To: Lorenzo Bianconi , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 3/9] iio: imu: st_lsm6dsx: move wakeup event enable mask to event_src Date: Thu, 30 Oct 2025 08:27:46 +0100 Message-Id: <20251030072752.349633-4-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251030072752.349633-1-flavra@baylibre.com> References: <20251030072752.349633-1-flavra@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=7477; i=flavra@baylibre.com; h=from:subject; bh=5udrDdlPMpudCr1yZSepm0qaGnwL+JdHE+fbHDma8IU=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBpAxNJUqwdeZd2hE7bzBsdS7ZsaGVJIXj6S1gwW zjdQ38hhwaJAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaQMTSQAKCRDt8TtzzpQ2 X4seC/0YTo0aLdkslaQoGRrOIQuzRI+uwzb2ayKLfNeD6SWwEZtlcTvAVmMwFsk4TYnU6DrKrcF yrPe/XiYDq+NYjgM43qBOxdUoIrdyd6lRmc7kpw3YuVdbi0MlFYtn1nb+eF8q4c8EKIxaywxi+d kE/349O5UhcRji18ZQvhdChVDR2DoqXKhHMek2ro7JxGxu5azF9Pk+Fnq6Gqtw/IGB+4R9lNj3F /PI88/j9Gl80stNv8Z2fKavy5ISg36zevNUAgEQU+j8+0EfscDUnNHKtx5PKfuSmbavb9lGfize 8kOTPAH92QSLdI2yLUJri+VdQ2Hd8TRUJfpuSqGZotZWrBLWPLoVUMnwbURcjaXtC7hS8VC9vyS zVyWSvl84WgtAIhFbgt+/zVezCWEN3LWLZDoBULPWqpMMfelgmkeSg+dEdCDYXXKSpLy65OjF9r qG10M91YleUlgyNRJzL2M2qVBtO8syciMVNF5v2CgRYBOG2eQqMucAGdWjLFTqZPKxha4= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The mask value being assigned to the irq1_func and irq2_func fields of the irq_config struct is specific to a single event source (i.e. the wakeup event), and as such it should be separate from the definition of the interrupt function registers, which cover multiple event sources. In preparation for adding support for more event types, change the irq1_func and irq2_func type from an {address, mask} pair to an address, and move the mask value to a new field of struct st_lsm6dsx_event_src. No functional changes. Signed-off-by: Francesco Lavra --- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h | 7 +- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 80 +++++++------------- 2 files changed, 30 insertions(+), 57 deletions(-) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_l= sm6dsx/st_lsm6dsx.h index 05689887f7ec..5c73156b714a 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h @@ -228,6 +228,7 @@ enum st_lsm6dsx_event_id { =20 struct st_lsm6dsx_event_src { struct st_lsm6dsx_reg value; + u8 enable_mask; u8 status_reg; u8 status_mask; u8 status_x_mask; @@ -320,8 +321,8 @@ struct st_lsm6dsx_settings { struct { struct st_lsm6dsx_reg irq1; struct st_lsm6dsx_reg irq2; - struct st_lsm6dsx_reg irq1_func; - struct st_lsm6dsx_reg irq2_func; + u8 irq1_func; + u8 irq2_func; struct st_lsm6dsx_reg lir; struct st_lsm6dsx_reg clear_on_read; struct st_lsm6dsx_reg hla; @@ -420,7 +421,7 @@ struct st_lsm6dsx_hw { u8 ts_sip; u8 sip; =20 - const struct st_lsm6dsx_reg *irq_routing; + u8 irq_routing; u8 event_threshold; u8 enable_event; =20 diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu= /st_lsm6dsx/st_lsm6dsx_core.c index bb4c4c531128..4bae5da8910e 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -290,14 +290,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sen= sor_settings[] =3D { .addr =3D 0x58, .mask =3D BIT(0), }, - .irq1_func =3D { - .addr =3D 0x5e, - .mask =3D BIT(5), - }, - .irq2_func =3D { - .addr =3D 0x5f, - .mask =3D BIT(5), - }, + .irq1_func =3D 0x5e, + .irq2_func =3D 0x5f, .hla =3D { .addr =3D 0x12, .mask =3D BIT(5), @@ -356,6 +350,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sens= or_settings[] =3D { .addr =3D 0x5b, .mask =3D GENMASK(5, 0), }, + .enable_mask =3D BIT(5), .status_reg =3D 0x1b, .status_mask =3D BIT(3), .status_z_mask =3D BIT(0), @@ -454,14 +449,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sen= sor_settings[] =3D { .addr =3D 0x58, .mask =3D BIT(0), }, - .irq1_func =3D { - .addr =3D 0x5e, - .mask =3D BIT(5), - }, - .irq2_func =3D { - .addr =3D 0x5f, - .mask =3D BIT(5), - }, + .irq1_func =3D 0x5e, + .irq2_func =3D 0x5f, .hla =3D { .addr =3D 0x12, .mask =3D BIT(5), @@ -520,6 +509,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sens= or_settings[] =3D { .addr =3D 0x5b, .mask =3D GENMASK(5, 0), }, + .enable_mask =3D BIT(5), .status_reg =3D 0x1b, .status_mask =3D BIT(3), .status_z_mask =3D BIT(0), @@ -648,14 +638,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sen= sor_settings[] =3D { .addr =3D 0x58, .mask =3D BIT(0), }, - .irq1_func =3D { - .addr =3D 0x5e, - .mask =3D BIT(5), - }, - .irq2_func =3D { - .addr =3D 0x5f, - .mask =3D BIT(5), - }, + .irq1_func =3D 0x5e, + .irq2_func =3D 0x5f, .hla =3D { .addr =3D 0x12, .mask =3D BIT(5), @@ -755,6 +739,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sens= or_settings[] =3D { .addr =3D 0x5b, .mask =3D GENMASK(5, 0), }, + .enable_mask =3D BIT(5), .status_reg =3D 0x1b, .status_mask =3D BIT(3), .status_z_mask =3D BIT(0), @@ -895,14 +880,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sen= sor_settings[] =3D { .addr =3D 0x56, .mask =3D BIT(6), }, - .irq1_func =3D { - .addr =3D 0x5e, - .mask =3D BIT(5), - }, - .irq2_func =3D { - .addr =3D 0x5f, - .mask =3D BIT(5), - }, + .irq1_func =3D 0x5e, + .irq2_func =3D 0x5f, .hla =3D { .addr =3D 0x12, .mask =3D BIT(5), @@ -990,6 +969,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_sens= or_settings[] =3D { .addr =3D 0x5b, .mask =3D GENMASK(5, 0), }, + .enable_mask =3D BIT(5), .status_reg =3D 0x1b, .status_mask =3D BIT(3), .status_z_mask =3D BIT(0), @@ -1106,14 +1086,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_s= ensor_settings[] =3D { .addr =3D 0x56, .mask =3D BIT(6), }, - .irq1_func =3D { - .addr =3D 0x5e, - .mask =3D BIT(5), - }, - .irq2_func =3D { - .addr =3D 0x5f, - .mask =3D BIT(5), - }, + .irq1_func =3D 0x5e, + .irq2_func =3D 0x5f, .hla =3D { .addr =3D 0x12, .mask =3D BIT(5), @@ -1169,6 +1143,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_se= nsor_settings[] =3D { .addr =3D 0x5b, .mask =3D GENMASK(5, 0), }, + .enable_mask =3D BIT(5), .status_reg =3D 0x1b, .status_mask =3D BIT(3), .status_z_mask =3D BIT(0), @@ -1279,14 +1254,8 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_s= ensor_settings[] =3D { .addr =3D 0x56, .mask =3D BIT(0), }, - .irq1_func =3D { - .addr =3D 0x5e, - .mask =3D BIT(5), - }, - .irq2_func =3D { - .addr =3D 0x5f, - .mask =3D BIT(5), - }, + .irq1_func =3D 0x5e, + .irq2_func =3D 0x5f, .hla =3D { .addr =3D 0x03, .mask =3D BIT(4), @@ -1373,6 +1342,7 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_se= nsor_settings[] =3D { .addr =3D 0x5b, .mask =3D GENMASK(5, 0), }, + .enable_mask =3D BIT(5), .status_reg =3D 0x45, .status_mask =3D BIT(3), .status_z_mask =3D BIT(0), @@ -1825,10 +1795,11 @@ static int st_lsm6dsx_write_raw(struct iio_dev *iio= _dev, static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, bool state) { const struct st_lsm6dsx_reg *reg; + u8 enable_mask; unsigned int data; int err; =20 - if (!hw->settings->irq_config.irq1_func.addr) + if (!hw->irq_routing) return -ENOTSUPP; =20 reg =3D &hw->settings->event_settings.enable_reg; @@ -1841,9 +1812,10 @@ static int st_lsm6dsx_event_setup(struct st_lsm6dsx_= hw *hw, bool state) } =20 /* Enable wakeup interrupt */ - data =3D ST_LSM6DSX_SHIFT_VAL(state, hw->irq_routing->mask); - return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing->addr, - hw->irq_routing->mask, data); + enable_mask =3D hw->settings->event_settings.sources[ST_LSM6DSX_EVENT_WAK= EUP].enable_mask; + data =3D ST_LSM6DSX_SHIFT_VAL(state, enable_mask); + return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing, + enable_mask, data); } =20 static int st_lsm6dsx_read_event(struct iio_dev *iio_dev, @@ -2097,11 +2069,11 @@ st_lsm6dsx_get_drdy_reg(struct st_lsm6dsx_hw *hw, =20 switch (drdy_pin) { case 1: - hw->irq_routing =3D &hw->settings->irq_config.irq1_func; + hw->irq_routing =3D hw->settings->irq_config.irq1_func; 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[176.247.57.96]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-63ecf3686c5sm8034374a12.36.2025.10.30.00.27.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Oct 2025 00:27:58 -0700 (PDT) From: Francesco Lavra To: Lorenzo Bianconi , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/9] iio: imu: st_lsm6dsx: dynamically allocate iio_event_spec structs Date: Thu, 30 Oct 2025 08:27:47 +0100 Message-Id: <20251030072752.349633-5-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251030072752.349633-1-flavra@baylibre.com> References: <20251030072752.349633-1-flavra@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2725; i=flavra@baylibre.com; h=from:subject; bh=x+eFJ5CRKeqdWM1Y7tN74EI8+EOeuEga+N/lyxWUhz8=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBpAxNJIJY8+sB5pNRhti3rWg61By1DSPqWWm4su tU6e1YEkpSJAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaQMTSQAKCRDt8TtzzpQ2 X9hyC/4t/k98okusX9PWyJbekqmq7Ihh/vhHJ2mPraEdj5pJoETotg7VEaxgirOPCPrfpqa7H+X EnR5PzveLRB7A1ULLZSVtp20fN0a59g6q3JPPfHcqzS/F1DFaKxTcE/pmo8oDvyPzWxV/oBa93s lbAjXmKSIkJ6TgwxgygyYIt58TmQDxA+VZTAEeQlmh/ln+LYrNsCxS9XlKCiOe8lZ0UioZirPP1 rKiPXZypu1SBPZqzsTKQaBwZlgeuK6/+/xYzOeA0rzvrIKTiL1mHUl0ipIoT9rYAE3BgNL6fIFF ma3qsZVkP5YucRy7OHc/ujcPo735DZPfkw2CVKksWpf0VZ4AAyK4rLuYPisP2i3bdhXkg1rCG0/ GFAb8SXS/Nt7Zn0qasQJ4GUkBxD8htBSb8OKOI2SRzw46Bsa4rjSb9yryeSECY8TgZqstIVSG0m OptwKSrsD9yLrnpuE74eyueH+ogA+FKZM2bmCQCkVO6E+kdtY5wRb/0Ec02RUzA5FRbqY= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In preparation for adding support for more event types, drop the static declaration of a single struct iio_event_spec variable, in favor of allocating and initializing the iio_event_spec array dynamically, so that it can contain more than one entry if a given sensor supports more than one event source. Signed-off-by: Francesco Lavra --- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h | 7 ----- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 30 ++++++++++++++++++-- 2 files changed, 27 insertions(+), 10 deletions(-) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_l= sm6dsx/st_lsm6dsx.h index 5c73156b714a..ec4efb29c4cc 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h @@ -439,13 +439,6 @@ struct st_lsm6dsx_hw { } scan[ST_LSM6DSX_ID_MAX]; }; =20 -static __maybe_unused const struct iio_event_spec st_lsm6dsx_event =3D { - .type =3D IIO_EV_TYPE_THRESH, - .dir =3D IIO_EV_DIR_EITHER, - .mask_separate =3D BIT(IIO_EV_INFO_VALUE) | - BIT(IIO_EV_INFO_ENABLE) -}; - static __maybe_unused const unsigned long st_lsm6dsx_available_scan_masks[= ] =3D { 0x7, 0x0, }; diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu= /st_lsm6dsx/st_lsm6dsx_core.c index 4bae5da8910e..76025971c05d 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -2314,9 +2314,33 @@ static int st_lsm6dsx_chan_init(struct iio_chan_spec= *channels, struct st_lsm6ds chan->scan_type.endianness =3D IIO_LE; chan->ext_info =3D st_lsm6dsx_ext_info; if (id =3D=3D ST_LSM6DSX_ID_ACC) { - if (hw->settings->event_settings.sources[ST_LSM6DSX_EVENT_WAKEUP].value.= addr) { - chan->event_spec =3D &st_lsm6dsx_event; - chan->num_event_specs =3D 1; + const struct st_lsm6dsx_event_src *event_src; + unsigned int event_sources; + int event; + + event_src =3D hw->settings->event_settings.sources; + event_sources =3D 0; + for (event =3D 0; event < ST_LSM6DSX_EVENT_MAX; event++) { + if (event_src[event].status_reg) { + event_sources |=3D BIT(event); + chan->num_event_specs++; + } + } + if (event_sources) { + struct iio_event_spec *event_spec; + + event_spec =3D devm_kzalloc(hw->dev, + chan->num_event_specs * sizeof(*event_spec), + GFP_KERNEL); + if (!event_spec) + return -ENOMEM; + chan->event_spec =3D event_spec; + if (event_sources & BIT(ST_LSM6DSX_EVENT_WAKEUP)) { + event_spec->type =3D IIO_EV_TYPE_THRESH; + event_spec->dir =3D IIO_EV_DIR_EITHER; + event_spec->mask_separate =3D BIT(IIO_EV_INFO_VALUE) | + BIT(IIO_EV_INFO_ENABLE); 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[176.247.57.96]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b6d8536968csm1685933366b.29.2025.10.30.00.27.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Oct 2025 00:27:59 -0700 (PDT) From: Francesco Lavra To: Lorenzo Bianconi , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 5/9] iio: imu: st_lsm6dsx: rework code to check for enabled events Date: Thu, 30 Oct 2025 08:27:48 +0100 Message-Id: <20251030072752.349633-6-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251030072752.349633-1-flavra@baylibre.com> References: <20251030072752.349633-1-flavra@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2663; i=flavra@baylibre.com; h=from:subject; bh=Q+pY5HlZqzp8d24g9WNWApNUCq5yqQgOxp3B34hW/uI=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBpAxNJKCWlxgi4/ZnYsQDZ4vSnVm8krv2CHT0fN us7wnzgonaJAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaQMTSQAKCRDt8TtzzpQ2 X6S/C/9vHbJkvEDDf4MRA1ZyOsLosL+qRvBHwdceDO6Ecw1q9QByAliTbIv+Lkjwz8uD3lci/oq wgS1zTlMzkVcwQiM4E3HGDIqEYLiQrGoTnIFlTMfRJYrOJZIHzX9HcAEsqGKaf230JzEsxipoQu E6YrD69YFpVxeJIcIhNqIB554PB9f0Cz/nORQRFASxd5KKjq1NcOlT0jQtQXsN9UVsmEBLrvNY8 YCz0mFrpWbYuiBdQcNz7OQBaKnd5/Qdfa8N1JNdt1JDwejj3hPuezzaABNN9p+qgs3wHJ44xmAQ ece9ybp7LEIgcM7Dlunsdg6ROtMr8N+cXYBFbIjTh3+bJTbVOBX1b7/Ig6TKFtg/uqVLiZHjHXV 3MUHzqIUajFzeWa7gmsRm+tGzFdrDPCfLpYFO4Ls4v9zqKMelLVjq22bTXTHzD0NhYAgCI2XGbV mfTMph1i6dPwqMMRk7xbR4vy886UHiD2Fu2gnA1xNaXM2RH2Dl95aQyt6XFgPHQEJnfQE= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The enable_event field in struct st_lsm6dsx_hw does not lend itself well to handling multiple event sources, so it will have to be modified to add support for more event sources. As a preparatory step, remove references to this field from code that does not deal with event management; rework the st_lsm6dsx_check_events() function so that it returns whether any events are currently enabled on a given sensor. Signed-off-by: Francesco Lavra --- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu= /st_lsm6dsx/st_lsm6dsx_core.c index 76025971c05d..157bc2615dc6 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -1670,11 +1670,11 @@ __st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_se= nsor *sensor, } =20 static int -st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor, bool enable) +st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor) { struct st_lsm6dsx_hw *hw =3D sensor->hw; =20 - if (sensor->id =3D=3D ST_LSM6DSX_ID_GYRO || enable) + if (sensor->id !=3D ST_LSM6DSX_ID_ACC) return 0; =20 return hw->enable_event; @@ -1683,7 +1683,7 @@ st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sen= sor, bool enable) int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, bool enable) { - if (st_lsm6dsx_check_events(sensor, enable)) + if (st_lsm6dsx_check_events(sensor)) return 0; =20 return __st_lsm6dsx_sensor_set_enable(sensor, enable); @@ -1711,11 +1711,9 @@ static int st_lsm6dsx_read_oneshot(struct st_lsm6dsx= _sensor *sensor, if (err < 0) return err; =20 - if (!hw->enable_event) { - err =3D st_lsm6dsx_sensor_set_enable(sensor, false); - if (err < 0) - return err; - } + err =3D st_lsm6dsx_sensor_set_enable(sensor, false); + if (err < 0) + return err; =20 *val =3D (s16)le16_to_cpu(data); =20 @@ -2743,7 +2741,7 @@ static int st_lsm6dsx_suspend(struct device *dev) continue; =20 if (device_may_wakeup(dev) && - sensor->id =3D=3D ST_LSM6DSX_ID_ACC && hw->enable_event) { + st_lsm6dsx_check_events(sensor)) { /* Enable wake from IRQ */ enable_irq_wake(hw->irq); continue; @@ -2774,7 +2772,7 @@ static int st_lsm6dsx_resume(struct device *dev) =20 sensor =3D iio_priv(hw->iio_devs[i]); if (device_may_wakeup(dev) && - sensor->id =3D=3D ST_LSM6DSX_ID_ACC && hw->enable_event) + st_lsm6dsx_check_events(sensor)) disable_irq_wake(hw->irq); =20 if (!(hw->suspend_mask & BIT(sensor->id))) --=20 2.39.5 From nobody Sun Feb 8 00:49:25 2026 Received: from mail-ed1-f43.google.com (mail-ed1-f43.google.com [209.85.208.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 17444337B9D for ; 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[176.247.57.96]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-63e7ef8288asm14128438a12.10.2025.10.30.00.27.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Oct 2025 00:28:00 -0700 (PDT) From: Francesco Lavra To: Lorenzo Bianconi , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 6/9] iio: imu: st_lsm6dsx: remove event_threshold field from hw struct Date: Thu, 30 Oct 2025 08:27:49 +0100 Message-Id: <20251030072752.349633-7-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251030072752.349633-1-flavra@baylibre.com> References: <20251030072752.349633-1-flavra@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2449; i=flavra@baylibre.com; h=from:subject; bh=b7Dh9immXL0raytQ5VJzXmvSgU6Eg8zKWr14CvTFrQI=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBpAxNK2vYG8vGV/Fkd4xN4etrjC5aDxbKlwjtbe g/iAEenn6iJAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaQMTSgAKCRDt8TtzzpQ2 X7B9C/9Dr35JbHqe3T9yYUEs/dpWOJDYkCA024XIf6eIPF2OaKWYtW7tl/o0lpmzEzazRXH+zEl O8HEcPNs/JSm1mg602ZOV0TO5C9FTNehbpBBZN7SdQZG7e3inJDqyxG3DAU8yHiigNmlVi4PcKU ialKHxEqWkVwj3aDHkblUBYRKxBy85PMnVo7MzaTTj7xeqs63A2VSL1imLFjZCqe0p1VPjKx/M9 m4I+OTDyeag7b2W5ZIKZ2y1goXaLvFwzzPrfuGB1fC7GpLKnlDwzrOo4JxV+plynLgnDn+UfObS teeVRfVjITra8nmFE/sdumDhBo/zw5VBWqhUnzi4T/Oxd85gz9vHgVN/eQghjLsGLSFmzl+X8l7 KAuXajxfiaEoN8UEs8IPxatmY5StDjVD3sT4+4pptEWXpecrZU9T5538+W6eFOeQ7qGizGsgBXW Ax8nyGxhNB3Vlmu4MW/LLOGJrc46RXHjoqolVPQ2VwXEUmkl+wKfPxqrOM0Qqm2+hjIsA= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" This field is used to store the wakeup event detection threshold value. When adding support for more event types, some of which may have different threshold values for different axes, storing all threshold values for all event sources would be cumbersome. Thus, remove this field altogether, and read the currently configured value from the sensor when requested by userspace. Signed-off-by: Francesco Lavra --- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h | 2 -- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 12 +++++++++--- 2 files changed, 9 insertions(+), 5 deletions(-) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_l= sm6dsx/st_lsm6dsx.h index ec4efb29c4cc..98aa3cfb711b 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h @@ -398,7 +398,6 @@ struct st_lsm6dsx_sensor { * @sip: Total number of samples (acc/gyro/ts) in a given pattern. * @buff: Device read buffer. * @irq_routing: pointer to interrupt routing configuration. - * @event_threshold: wakeup event threshold. * @enable_event: enabled event bitmask. * @iio_devs: Pointers to acc/gyro iio_dev instances. * @settings: Pointer to the specific sensor settings in use. @@ -422,7 +421,6 @@ struct st_lsm6dsx_hw { u8 sip; =20 u8 irq_routing; - u8 event_threshold; u8 enable_event; =20 u8 *buff; diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu= /st_lsm6dsx/st_lsm6dsx_core.c index 157bc2615dc6..ea145e15cd36 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -1825,12 +1825,20 @@ static int st_lsm6dsx_read_event(struct iio_dev *ii= o_dev, { struct st_lsm6dsx_sensor *sensor =3D iio_priv(iio_dev); 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[176.247.57.96]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-63e7efd0c1fsm14169118a12.37.2025.10.30.00.28.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Oct 2025 00:28:01 -0700 (PDT) From: Francesco Lavra To: Lorenzo Bianconi , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 7/9] iio: imu: st_lsm6dsx: make event management functions generic Date: Thu, 30 Oct 2025 08:27:50 +0100 Message-Id: <20251030072752.349633-8-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251030072752.349633-1-flavra@baylibre.com> References: <20251030072752.349633-1-flavra@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=10622; i=flavra@baylibre.com; h=from:subject; bh=0sz89vOoi9XThb3/LzM6VeN7Ln7cg0blyYM2zJrNbw4=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBpAxNK6LKzYbG7YSAxCK3YxmBaXo9nZmsazEkyi Nh28yoCweWJAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaQMTSgAKCRDt8TtzzpQ2 X35bC/9LTOS2CH1TRDAM/HegTkJYrHwsg7AZxenPPe7O9gC9KKpDKz7esODZ/16Oisgx1kOctyY G91h3rO6Af6OaT+T7S6MeEiEzZtjcq85irmAsR+1PRtD4b9Vkpu6O1YvdYTW+Do/BKqXW4sE5jd WEjj1Ti+qE47LaiKCf6Pj5IFYR+Ez6v+E0qJZfgmFim2fpR72jalSWFIRaLaBMCfcirRzQOJgXo tqZsiOtE9Od2Hm/xva94q8FmEcFFig1E1J04Zz0nbqHLIFTvW1jAGUKDSRVwKalMWCGsb3y+WeF iMK3QULTeLhCrq+xRKR3Mk9CCPWRr+KtFBem8p50UcJ9H0Y+hAPy0MGvbxMldM/oqmCR9fPWpfm li935z7SOjkHOkpNaV4gbQBolWT5MWqnIHaQ/4rAUesXMHhWoygHJdKSt8gi+gWjxD+6RYuP48C rXuhxyKmUc694oCTeeGV1xrdSVaDcB5HF9Z1DrEILJjRMJ+8SnpyIPfLtDzFiZN/dnpS0= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In preparation for adding support for more event types, use an array indexed by event ID instead of a scalar value to store enabled events, and refactor the functions to configure and report events so that their implementation is not specific for wakeup events. Move the logic to update the global event interrupt enable flag from st_lsm6dsx_event_setup() to its calling function, so that it can take into account also event sources different from the source being configured. While changing the signature of the st_lsm6dsx_event_setup() function, opportunistically add the currently unused `axis` parameter, which will be used when adding support for enabling and disabling events on a per axis basis. Signed-off-by: Francesco Lavra --- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h | 2 +- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 127 +++++++++++++------ 2 files changed, 88 insertions(+), 41 deletions(-) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_l= sm6dsx/st_lsm6dsx.h index 98aa3cfb711b..0e0642ca1b6f 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h @@ -421,7 +421,7 @@ struct st_lsm6dsx_hw { u8 sip; =20 u8 irq_routing; - u8 enable_event; + u8 enable_event[ST_LSM6DSX_EVENT_MAX]; =20 u8 *buff; =20 diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu= /st_lsm6dsx/st_lsm6dsx_core.c index ea145e15cd36..87d40e70ca26 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -1673,11 +1673,16 @@ static int st_lsm6dsx_check_events(struct st_lsm6dsx_sensor *sensor) { struct st_lsm6dsx_hw *hw =3D sensor->hw; + int event; =20 if (sensor->id !=3D ST_LSM6DSX_ID_ACC) return 0; =20 - return hw->enable_event; + for (event =3D 0; event < ST_LSM6DSX_EVENT_MAX; event++) { + if (hw->enable_event[event]) + return true; + } + return false; } =20 int st_lsm6dsx_sensor_set_enable(struct st_lsm6dsx_sensor *sensor, @@ -1790,9 +1795,10 @@ static int st_lsm6dsx_write_raw(struct iio_dev *iio_= dev, return err; } =20 -static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, bool state) +static int st_lsm6dsx_event_setup(struct st_lsm6dsx_hw *hw, enum st_lsm6ds= x_event_id event, + int axis, bool state) { - const struct st_lsm6dsx_reg *reg; + const struct st_lsm6dsx_event_src *src =3D &hw->settings->event_settings.= sources[event]; u8 enable_mask; unsigned int data; int err; @@ -1800,22 +1806,23 @@ static int st_lsm6dsx_event_setup(struct st_lsm6dsx= _hw *hw, bool state) if (!hw->irq_routing) return -ENOTSUPP; =20 - reg =3D &hw->settings->event_settings.enable_reg; - if (reg->addr) { - data =3D ST_LSM6DSX_SHIFT_VAL(state, reg->mask); - err =3D st_lsm6dsx_update_bits_locked(hw, reg->addr, - reg->mask, data); - if (err < 0) - return err; - } - - /* Enable wakeup interrupt */ - enable_mask =3D hw->settings->event_settings.sources[ST_LSM6DSX_EVENT_WAK= EUP].enable_mask; + /* Enable/disable event interrupt */ + enable_mask =3D src->enable_mask; data =3D ST_LSM6DSX_SHIFT_VAL(state, enable_mask); return st_lsm6dsx_update_bits_locked(hw, hw->irq_routing, enable_mask, data); } =20 +static enum st_lsm6dsx_event_id st_lsm6dsx_get_event_id(enum iio_event_typ= e type) +{ + switch (type) { + case IIO_EV_TYPE_THRESH: + return ST_LSM6DSX_EVENT_WAKEUP; + default: + return ST_LSM6DSX_EVENT_MAX; + } +} + static int st_lsm6dsx_read_event(struct iio_dev *iio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, @@ -1825,14 +1832,15 @@ static int st_lsm6dsx_read_event(struct iio_dev *ii= o_dev, { struct st_lsm6dsx_sensor *sensor =3D iio_priv(iio_dev); struct st_lsm6dsx_hw *hw =3D sensor->hw; + enum st_lsm6dsx_event_id event =3D st_lsm6dsx_get_event_id(type); const struct st_lsm6dsx_reg *reg; u8 data; int err; =20 - if (type !=3D IIO_EV_TYPE_THRESH) + if (event =3D=3D ST_LSM6DSX_EVENT_MAX) return -EINVAL; =20 - reg =3D &hw->settings->event_settings.sources[ST_LSM6DSX_EVENT_WAKEUP].va= lue; + reg =3D &hw->settings->event_settings.sources[event].value; err =3D st_lsm6dsx_read_locked(hw, reg->addr, &data, sizeof(data)); if (err < 0) return err; @@ -1851,19 +1859,20 @@ st_lsm6dsx_write_event(struct iio_dev *iio_dev, enum iio_event_info info, int val, int val2) { + enum st_lsm6dsx_event_id event =3D st_lsm6dsx_get_event_id(type); struct st_lsm6dsx_sensor *sensor =3D iio_priv(iio_dev); struct st_lsm6dsx_hw *hw =3D sensor->hw; const struct st_lsm6dsx_reg *reg; unsigned int data; int err; =20 - if (type !=3D IIO_EV_TYPE_THRESH) + if (event =3D=3D ST_LSM6DSX_EVENT_MAX) return -EINVAL; =20 if (val < 0 || val > 31) return -EINVAL; =20 - reg =3D &hw->settings->event_settings.sources[ST_LSM6DSX_EVENT_WAKEUP].va= lue; + reg =3D &hw->settings->event_settings.sources[event].value; data =3D ST_LSM6DSX_SHIFT_VAL(val, reg->mask); err =3D st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data); @@ -1879,13 +1888,14 @@ st_lsm6dsx_read_event_config(struct iio_dev *iio_de= v, enum iio_event_type type, enum iio_event_direction dir) { + enum st_lsm6dsx_event_id event =3D st_lsm6dsx_get_event_id(type); struct st_lsm6dsx_sensor *sensor =3D iio_priv(iio_dev); struct st_lsm6dsx_hw *hw =3D sensor->hw; =20 - if (type !=3D IIO_EV_TYPE_THRESH) + if (event =3D=3D ST_LSM6DSX_EVENT_MAX) return -EINVAL; =20 - return !!(hw->enable_event & BIT(chan->channel2)); + return !!(hw->enable_event[event] & BIT(chan->channel2)); } =20 static int @@ -1894,22 +1904,25 @@ st_lsm6dsx_write_event_config(struct iio_dev *iio_d= ev, enum iio_event_type type, enum iio_event_direction dir, bool state) { + enum st_lsm6dsx_event_id event =3D st_lsm6dsx_get_event_id(type); struct st_lsm6dsx_sensor *sensor =3D iio_priv(iio_dev); struct st_lsm6dsx_hw *hw =3D sensor->hw; + int axis =3D chan->channel2; u8 enable_event; int err; + bool any_events_enabled =3D false; =20 - if (type !=3D IIO_EV_TYPE_THRESH) + if (event =3D=3D ST_LSM6DSX_EVENT_MAX) return -EINVAL; =20 if (state) { - enable_event =3D hw->enable_event | BIT(chan->channel2); + enable_event =3D hw->enable_event[event] | BIT(axis); =20 /* do not enable events if they are already enabled */ - if (hw->enable_event) + if (hw->enable_event[event]) goto out; } else { - enable_event =3D hw->enable_event & ~BIT(chan->channel2); + enable_event =3D hw->enable_event[event] & ~BIT(axis); =20 /* only turn off sensor if no events is enabled */ if (enable_event) @@ -1917,22 +1930,43 @@ st_lsm6dsx_write_event_config(struct iio_dev *iio_d= ev, } =20 /* stop here if no changes have been made */ - if (hw->enable_event =3D=3D enable_event) + if (hw->enable_event[event] =3D=3D enable_event) return 0; =20 - err =3D st_lsm6dsx_event_setup(hw, state); + err =3D st_lsm6dsx_event_setup(hw, event, axis, state); if (err < 0) return err; =20 mutex_lock(&hw->conf_lock); - if (enable_event || !(hw->fifo_mask & BIT(sensor->id))) + if (!enable_event) { + enum st_lsm6dsx_event_id other_event; + + for (other_event =3D 0; other_event < ST_LSM6DSX_EVENT_MAX; other_event+= +) { + if (other_event !=3D event && hw->enable_event[other_event]) { + any_events_enabled =3D true; + break; + } + } + } + if (enable_event || !any_events_enabled) { + const struct st_lsm6dsx_reg *reg =3D &hw->settings->event_settings.enabl= e_reg; + + if (reg->addr) { + err =3D regmap_update_bits(hw->regmap, reg->addr, reg->mask, + ST_LSM6DSX_SHIFT_VAL(state, reg->mask)); + if (err < 0) + goto unlock_out; + } + } + if (enable_event || (!any_events_enabled && !(hw->fifo_mask & BIT(sensor-= >id)))) err =3D __st_lsm6dsx_sensor_set_enable(sensor, state); +unlock_out: mutex_unlock(&hw->conf_lock); if (err < 0) return err; =20 out: - hw->enable_event =3D enable_event; + hw->enable_event[event] =3D enable_event; =20 return 0; } @@ -2410,18 +2444,20 @@ static struct iio_dev *st_lsm6dsx_alloc_iiodev(stru= ct st_lsm6dsx_hw *hw, } =20 static bool -st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *hw) +st_lsm6dsx_report_events(struct st_lsm6dsx_hw *hw, enum st_lsm6dsx_event_i= d id, + enum iio_event_type type, enum iio_event_direction dir) { + u8 enable_event =3D hw->enable_event[id]; const struct st_lsm6dsx_event_settings *event_settings; const struct st_lsm6dsx_event_src *event_src; int err, data; s64 timestamp; =20 - if (!hw->enable_event) + if (!enable_event) return false; =20 event_settings =3D &hw->settings->event_settings; - event_src =3D &event_settings->sources[ST_LSM6DSX_EVENT_WAKEUP]; + event_src =3D &event_settings->sources[id]; err =3D st_lsm6dsx_read_locked(hw, event_src->status_reg, &data, sizeof(data)); if (err < 0) @@ -2429,38 +2465,49 @@ st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw= *hw) =20 timestamp =3D iio_get_time_ns(hw->iio_devs[ST_LSM6DSX_ID_ACC]); if ((data & event_src->status_z_mask) && - (hw->enable_event & BIT(IIO_MOD_Z))) + (enable_event & BIT(IIO_MOD_Z))) iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Z, - IIO_EV_TYPE_THRESH, - IIO_EV_DIR_EITHER), + type, + dir), timestamp); =20 if ((data & event_src->status_y_mask) && - (hw->enable_event & BIT(IIO_MOD_Y))) + (enable_event & BIT(IIO_MOD_Y))) iio_push_event(hw->iio_devs[ST_LSM6DSX_ID_ACC], IIO_MOD_EVENT_CODE(IIO_ACCEL, 0, IIO_MOD_Y, - IIO_EV_TYPE_THRESH, - IIO_EV_DIR_EITHER), + type, + dir), timestamp); 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[176.247.57.96]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-63e7ef9a5cbsm14151348a12.23.2025.10.30.00.28.02 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Oct 2025 00:28:02 -0700 (PDT) From: Francesco Lavra To: Lorenzo Bianconi , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 8/9] iio: imu: st_lsm6dsx: add event configurability on a per axis basis Date: Thu, 30 Oct 2025 08:27:51 +0100 Message-Id: <20251030072752.349633-9-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251030072752.349633-1-flavra@baylibre.com> References: <20251030072752.349633-1-flavra@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=5102; i=flavra@baylibre.com; h=from:subject; bh=WcwF899ijzMkV7KsctD1Rs0qOwaqBA4nOWWB8G5J4uI=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBpAxNL4n9ehavBMpqRL2pwa2X216ad7wnHUYFlu w9apBAI6Y2JAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaQMTSwAKCRDt8TtzzpQ2 X8T7C/9rHBv1KulTrWD/56agpc3fL1uB0j7Yl1kfeit7xbnJADo2NKexHNOOkE6cPNuqV9ICL7H Q4y81WOD7z+9+X3zDW7etoUkFDQas78lsEAVAlGeyEXASz7cSMxAIqnHKnFT2Mch3ppwFcSoGtc 7e8CP7035Zpt51QtAmNw+GE5GegUf6ZJFka+ZlwR57PNrlEIvFZZSttAZw7iQw5emt32JuSe576 Fy6jaoS5XrlhEfrVlyjbOH5Ro75qJ3YIkw/mM2EymvLo/C40MvfC23fAs2Uw6QDm8yqV2tE3lyP 0OjthEhx+jADriOiMh+6UYdMtxBOvDhqpx5JWrUY5/ns02dyfbXE5Mf4XAd9EC5suyV2Heaa9aD qyft9xvM7fav9JtvTHtmml2dPo36dJIHvjEcQZdB0liA/dSq5WeGDd7pzdWKPbHPPiLk+976XKN woEKoe94PF2evpksGNM9i9rur83Tye6+Al2LQAWSKmQbHNNFARpaPv9m3b1mRHL6u0QBo= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" In order to be able to configure event detection on a per axis basis (for either setting an event threshold/sensitivity value, or enabling/disabling event detection), add new axis-specific fields to struct st_lsm6dsx_event_src, and modify the logic that handles event configuration to properly handle axis-specific settings when supported by a given event source. A future commit will add actual event sources with per-axis configurability. Signed-off-by: Francesco Lavra --- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h | 7 ++ drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 77 ++++++++++++++++---- 2 files changed, 70 insertions(+), 14 deletions(-) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_l= sm6dsx/st_lsm6dsx.h index 0e0642ca1b6f..62edd177c87c 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h @@ -228,7 +228,14 @@ enum st_lsm6dsx_event_id { =20 struct st_lsm6dsx_event_src { struct st_lsm6dsx_reg value; + struct st_lsm6dsx_reg x_value; + struct st_lsm6dsx_reg y_value; + struct st_lsm6dsx_reg z_value; u8 enable_mask; + u8 enable_axis_reg; + u8 enable_x_mask; + u8 enable_y_mask; + u8 enable_z_mask; u8 status_reg; u8 status_mask; u8 status_x_mask; diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu= /st_lsm6dsx/st_lsm6dsx_core.c index 87d40e70ca26..6d1b7b2a371a 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -1802,10 +1802,38 @@ static int st_lsm6dsx_event_setup(struct st_lsm6dsx= _hw *hw, enum st_lsm6dsx_even u8 enable_mask; unsigned int data; int err; + u8 old_enable, new_enable; =20 if (!hw->irq_routing) return -ENOTSUPP; =20 + if (src->enable_axis_reg) { + switch (axis) { + case IIO_MOD_X: + enable_mask =3D src->enable_x_mask; + break; + case IIO_MOD_Y: + enable_mask =3D src->enable_y_mask; + break; + case IIO_MOD_Z: + enable_mask =3D src->enable_z_mask; + break; + default: + enable_mask =3D 0; + } + if (enable_mask) { + data =3D ST_LSM6DSX_SHIFT_VAL(state, enable_mask); + err =3D st_lsm6dsx_update_bits_locked(hw, src->enable_axis_reg, + enable_mask, data); + if (err < 0) + return err; + } + } + old_enable =3D hw->enable_event[event]; + new_enable =3D state ? (old_enable | BIT(axis)) : (old_enable & ~BIT(axis= )); + if (!!old_enable =3D=3D !!new_enable) + return 0; + /* Enable/disable event interrupt */ enable_mask =3D src->enable_mask; data =3D ST_LSM6DSX_SHIFT_VAL(state, enable_mask); @@ -1823,6 +1851,31 @@ static enum st_lsm6dsx_event_id st_lsm6dsx_get_event= _id(enum iio_event_type type } } =20 +static const struct st_lsm6dsx_reg *st_lsm6dsx_get_event_reg(struct st_lsm= 6dsx_hw *hw, + enum st_lsm6dsx_event_id event, + const struct iio_chan_spec *chan) +{ + const struct st_lsm6dsx_event_src *src =3D &hw->settings->event_settings.= sources[event]; + const struct st_lsm6dsx_reg *reg; + + switch (chan->channel2) { + case IIO_MOD_X: + reg =3D &src->x_value; + break; + case IIO_MOD_Y: + reg =3D &src->y_value; + break; + case IIO_MOD_Z: + reg =3D &src->z_value; + break; + default: + return NULL; + } + if (!reg->addr) + reg =3D &src->value; + return reg; +} + static int st_lsm6dsx_read_event(struct iio_dev *iio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, @@ -1840,7 +1893,10 @@ static int st_lsm6dsx_read_event(struct iio_dev *iio= _dev, if (event =3D=3D ST_LSM6DSX_EVENT_MAX) return -EINVAL; =20 - reg =3D &hw->settings->event_settings.sources[event].value; + reg =3D st_lsm6dsx_get_event_reg(hw, event, chan); + if (!reg) + return -EINVAL; + err =3D st_lsm6dsx_read_locked(hw, reg->addr, &data, sizeof(data)); if (err < 0) return err; @@ -1872,7 +1928,10 @@ st_lsm6dsx_write_event(struct iio_dev *iio_dev, if (val < 0 || val > 31) return -EINVAL; =20 - reg =3D &hw->settings->event_settings.sources[event].value; + reg =3D st_lsm6dsx_get_event_reg(hw, event, chan); + if (!reg) + return -EINVAL; + data =3D ST_LSM6DSX_SHIFT_VAL(val, reg->mask); err =3D st_lsm6dsx_update_bits_locked(hw, reg->addr, reg->mask, data); @@ -1915,20 +1974,11 @@ st_lsm6dsx_write_event_config(struct iio_dev *iio_d= ev, if (event =3D=3D ST_LSM6DSX_EVENT_MAX) return -EINVAL; =20 - if (state) { + if (state) enable_event =3D hw->enable_event[event] | BIT(axis); - - /* do not enable events if they are already enabled */ - if (hw->enable_event[event]) - goto out; - } else { + else enable_event =3D hw->enable_event[event] & ~BIT(axis); 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[176.247.57.96]) by smtp.gmail.com with ESMTPSA id a640c23a62f3a-b6d854763b1sm1661301666b.71.2025.10.30.00.28.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 30 Oct 2025 00:28:03 -0700 (PDT) From: Francesco Lavra To: Lorenzo Bianconi , Jonathan Cameron , David Lechner , =?UTF-8?q?Nuno=20S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 9/9] iio: imu: st_lsm6dsx: add tap event detection Date: Thu, 30 Oct 2025 08:27:52 +0100 Message-Id: <20251030072752.349633-10-flavra@baylibre.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251030072752.349633-1-flavra@baylibre.com> References: <20251030072752.349633-1-flavra@baylibre.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3025; i=flavra@baylibre.com; h=from:subject; bh=ryWrHwVNfLrlYPtWRwT19syvjek2k+I8uWyDlcucveg=; b=owEB7QES/pANAwAKAe3xO3POlDZfAcsmYgBpAxNLuoGQgeF2bVzRfpEk/5RAI+1zVrRkSrMrR b1W978ht+qJAbMEAAEKAB0WIQSGV4VPlTvcox7DFObt8TtzzpQ2XwUCaQMTSwAKCRDt8TtzzpQ2 X9unC/41B/+tkoh1a9dryX84uhL23mUeKgMj7JYCt1IIZ1qSNZBtB2rLTi1m5wwg54p3FODIsRo QJ5cE8soOw4PEvXngPTLIEK5YsAfdNRLa58GMegk4x603vcjzw7CrF8gGDc8/SdWv7OIPtG+TQy ODt4rU3HltHbDEMce9jR0xwdc24dsrh89KyQZkoBnnuIPOMNl99Bp6v750rQdOHGIkwR3fLgDRz dgfDEnNAFiZVtL9QXZ9PPnaheX6uxLT3gP51wRm285M0PR9+p+MqKDKb3msjzi5bm3KHR/gzUQP oc8edF75oSicvW/mTBb3UXWlxxVWq+8qL9KjFmpw5CEzDFN4rPbKCiAbkwaM4RlLxAb0YEHPpXn 7l7kFfwLOr4QPQ4+9Djh1NnNTNMN5wjAy3jsLiVVys5KM9AMCYt68y34dMRdTv6qEV5mr71Deh1 gy0n0m6yh8F55IZOKa3K0IGNpY4s3xxJnPTv2r/wsIo+MwbQUtShc1IzdESuLo//GCq0k= X-Developer-Key: i=flavra@baylibre.com; a=openpgp; fpr=8657854F953BDCA31EC314E6EDF13B73CE94365F Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add the logic to advertise tap event capability and report tap events; define a tap event source for the LSM6DSV chip family. Tested on LSMDSV16X. Signed-off-by: Francesco Lavra --- drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h | 1 + drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c | 35 ++++++++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h b/drivers/iio/imu/st_l= sm6dsx/st_lsm6dsx.h index 62edd177c87c..75953a78fc04 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx.h @@ -223,6 +223,7 @@ struct st_lsm6dsx_shub_settings { =20 enum st_lsm6dsx_event_id { ST_LSM6DSX_EVENT_WAKEUP, + ST_LSM6DSX_EVENT_TAP, ST_LSM6DSX_EVENT_MAX }; =20 diff --git a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c b/drivers/iio/imu= /st_lsm6dsx/st_lsm6dsx_core.c index 6d1b7b2a371a..1bc69c6c1b9d 100644 --- a/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c +++ b/drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c @@ -1349,6 +1349,30 @@ static const struct st_lsm6dsx_settings st_lsm6dsx_s= ensor_settings[] =3D { .status_y_mask =3D BIT(1), .status_x_mask =3D BIT(2), }, + [ST_LSM6DSX_EVENT_TAP] =3D { + .x_value =3D { + .addr =3D 0x57, + .mask =3D GENMASK(4, 0), + }, + .y_value =3D { + .addr =3D 0x58, + .mask =3D GENMASK(4, 0), + }, + .z_value =3D { + .addr =3D 0x59, + .mask =3D GENMASK(4, 0), + }, + .enable_mask =3D BIT(6), + .enable_axis_reg =3D 0x56, + .enable_x_mask =3D BIT(3), + .enable_y_mask =3D BIT(2), + .enable_z_mask =3D BIT(1), + .status_reg =3D 0x46, + .status_mask =3D BIT(5), + .status_x_mask =3D BIT(2), + .status_y_mask =3D BIT(1), + .status_z_mask =3D BIT(0), + }, }, }, }, @@ -1846,6 +1870,8 @@ static enum st_lsm6dsx_event_id st_lsm6dsx_get_event_= id(enum iio_event_type type switch (type) { case IIO_EV_TYPE_THRESH: return ST_LSM6DSX_EVENT_WAKEUP; + case IIO_EV_TYPE_GESTURE: + return ST_LSM6DSX_EVENT_TAP; default: return ST_LSM6DSX_EVENT_MAX; } @@ -2427,6 +2453,13 @@ static int st_lsm6dsx_chan_init(struct iio_chan_spec= *channels, struct st_lsm6ds event_spec->dir =3D IIO_EV_DIR_EITHER; event_spec->mask_separate =3D BIT(IIO_EV_INFO_VALUE) | BIT(IIO_EV_INFO_ENABLE); + event_spec++; + } + if (event_sources & BIT(ST_LSM6DSX_EVENT_TAP)) { + event_spec->type =3D IIO_EV_TYPE_GESTURE; + event_spec->dir =3D IIO_EV_DIR_SINGLETAP; + event_spec->mask_separate =3D BIT(IIO_EV_INFO_VALUE) | + BIT(IIO_EV_INFO_ENABLE); } } } @@ -2553,6 +2586,8 @@ st_lsm6dsx_report_motion_event(struct st_lsm6dsx_hw *= hw) =20 events_found =3D st_lsm6dsx_report_events(hw, ST_LSM6DSX_EVENT_WAKEUP, II= O_EV_TYPE_THRESH, IIO_EV_DIR_EITHER); + events_found |=3D st_lsm6dsx_report_events(hw, ST_LSM6DSX_EVENT_TAP, IIO_= EV_TYPE_GESTURE, + IIO_EV_DIR_SINGLETAP); =20 return events_found; } --=20 2.39.5