From nobody Mon Feb 9 01:50:21 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EF5F53655D2; Thu, 30 Oct 2025 15:47:25 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761839246; cv=none; b=I33Pm/dE4aRa5h1tl01aH7CtLnvbpqq2TBwyn90yOIEeGf/qjevY9xWp43/2pPSVEBsGlppPHDbfek5d6/Z8azypxnSKRq7hQlUOBw7519tsT32/LfZ3jbDjEtWSGnfrRoLsZ++E1k8Mp6EDy/RWXaXbwRNUx+IkEGXPxkVP8ic= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761839246; c=relaxed/simple; bh=RdNQKxgZm3NWUTfwaPWZhZgP0H44bwRSahfMp4ZPmWY=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=Je0qxgaqYUo+B0XFwSxucHpCbrftyhOnJENFVWYgQUeN35banwXraVKjQrpA1PVf8X08l6UjbRDUpUD3aAhALb0pL9A0e9u23Heh1sk3oY5pWpDbrUSjMsv2yurRLHIUSvc8RgOmSr45pZVyRQzkNabaFe4SCyFJi5rQon5//Wg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=DA5G9/Pw; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="DA5G9/Pw" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2FBB2C113D0; Thu, 30 Oct 2025 15:47:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1761839245; bh=RdNQKxgZm3NWUTfwaPWZhZgP0H44bwRSahfMp4ZPmWY=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=DA5G9/Pw9cgz97DXNdIYP8VJ3q+DBW0IgNHCZ7t35zr0LDzFwDTJzsNJHrgXXnK8m 8Mt1oiUotucM+wBF27yrAb07N07VcozXDDbp+krp8g7087tVq63mPbqU9Dw7lgJy00 morVrrJi2tr+p60ZIYCwrWV50hlZKULV/brQP5iFhZELlyAvymblmqmxtjBfy5PgwP VaZtx022N+OWckUBb4Xtc2w26MTHV9AcBIAW7Hna3yQlmfjAiK6eyHf/T2LANsMv9W NcvUO70VrOzEyYi2FebFqa9+zJSCoDm9VG+aZteS3OCjXkZhPw2BplzyzLYKcjt+fu B/l477g2zJs6g== From: Mark Brown Date: Thu, 30 Oct 2025 15:42:47 +0000 Subject: [PATCH 1/3] KVM: selftests: arm64: Report set_id_reg reads of test registers as tests Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251030-kvm-arm64-set-id-regs-aarch64-v1-1-96fe0d2b178e@kernel.org> References: <20251030-kvm-arm64-set-id-regs-aarch64-v1-0-96fe0d2b178e@kernel.org> In-Reply-To: <20251030-kvm-arm64-set-id-regs-aarch64-v1-0-96fe0d2b178e@kernel.org> To: Marc Zyngier , Oliver Upton , Joey Gouly , Suzuki K Poulose , Paolo Bonzini , Shuah Khan Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mark Brown X-Mailer: b4 0.15-dev-88d78 X-Developer-Signature: v=1; a=openpgp-sha256; l=4838; i=broonie@kernel.org; h=from:subject:message-id; bh=RdNQKxgZm3NWUTfwaPWZhZgP0H44bwRSahfMp4ZPmWY=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBpA4iGOWQm7b1TevTko2QKgW79+FZJVEkb/pqxr eshNc7xXxCJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCaQOIhgAKCRAk1otyXVSH 0HvNB/wOcrkcmEVW4UUKLbGwV2y0JWvcuhRiWfQH16TPBjMFmJo101hM913WPdnXLUxZLWN97po DuJ6i/Pb8TMy6ph8uggd/izFRaFCApdRYgwMOK1AwMa6LjLdsezjaLI/8gXYdzsxGuE7Qq+KMGf Ggog4vc/CC41m+Fxg1onaWDPc9xEsGjoBxPNM4GeoQ0Kkc9RZ+bB+hJsriyO0e6sxQTjuZPRfBp W1ZtITupDX7dbQeaK1nUAx3B4675bgHPX2avROkrpar2XSC9MBtr92ccbSZ/PdVHacvUTN7iDpt iX53RYCA9SNJpRIvTEh5kTeW7NgsL56FXsQQqoT26gzGPEIL X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB Currently when we run guest code to validate that the values we wrote to the registers are seen by the guest we assert that these values match using a KVM selftests level assert, resulting in unclear diagnostics if the test fails. Replace this assert with reporting a kselftest test per register. In order to support getting the names of the registers we repaint the array of ID_ registers to store the names and open code the rest. Signed-off-by: Mark Brown --- tools/testing/selftests/kvm/arm64/set_id_regs.c | 74 +++++++++++++++++++--= ---- 1 file changed, 57 insertions(+), 17 deletions(-) diff --git a/tools/testing/selftests/kvm/arm64/set_id_regs.c b/tools/testin= g/selftests/kvm/arm64/set_id_regs.c index 5e24f77868b5..7a759e976c2c 100644 --- a/tools/testing/selftests/kvm/arm64/set_id_regs.c +++ b/tools/testing/selftests/kvm/arm64/set_id_regs.c @@ -40,6 +40,7 @@ struct reg_ftr_bits { }; =20 struct test_feature_reg { + const char *name; uint32_t reg; const struct reg_ftr_bits *ftr_bits; }; @@ -218,24 +219,25 @@ static const struct reg_ftr_bits ftr_id_aa64zfr0_el1[= ] =3D { =20 #define TEST_REG(id, table) \ { \ - .reg =3D id, \ + .name =3D #id, \ + .reg =3D SYS_ ## id, \ .ftr_bits =3D &((table)[0]), \ } =20 static struct test_feature_reg test_regs[] =3D { - TEST_REG(SYS_ID_AA64DFR0_EL1, ftr_id_aa64dfr0_el1), - TEST_REG(SYS_ID_DFR0_EL1, ftr_id_dfr0_el1), - TEST_REG(SYS_ID_AA64ISAR0_EL1, ftr_id_aa64isar0_el1), - TEST_REG(SYS_ID_AA64ISAR1_EL1, ftr_id_aa64isar1_el1), - TEST_REG(SYS_ID_AA64ISAR2_EL1, ftr_id_aa64isar2_el1), - TEST_REG(SYS_ID_AA64ISAR3_EL1, ftr_id_aa64isar3_el1), - TEST_REG(SYS_ID_AA64PFR0_EL1, ftr_id_aa64pfr0_el1), - TEST_REG(SYS_ID_AA64PFR1_EL1, ftr_id_aa64pfr1_el1), - TEST_REG(SYS_ID_AA64MMFR0_EL1, ftr_id_aa64mmfr0_el1), - TEST_REG(SYS_ID_AA64MMFR1_EL1, ftr_id_aa64mmfr1_el1), - TEST_REG(SYS_ID_AA64MMFR2_EL1, ftr_id_aa64mmfr2_el1), - TEST_REG(SYS_ID_AA64MMFR3_EL1, ftr_id_aa64mmfr3_el1), - TEST_REG(SYS_ID_AA64ZFR0_EL1, ftr_id_aa64zfr0_el1), + TEST_REG(ID_AA64DFR0_EL1, ftr_id_aa64dfr0_el1), + TEST_REG(ID_DFR0_EL1, ftr_id_dfr0_el1), + TEST_REG(ID_AA64ISAR0_EL1, ftr_id_aa64isar0_el1), + TEST_REG(ID_AA64ISAR1_EL1, ftr_id_aa64isar1_el1), + TEST_REG(ID_AA64ISAR2_EL1, ftr_id_aa64isar2_el1), + TEST_REG(ID_AA64ISAR3_EL1, ftr_id_aa64isar3_el1), + TEST_REG(ID_AA64PFR0_EL1, ftr_id_aa64pfr0_el1), + TEST_REG(ID_AA64PFR1_EL1, ftr_id_aa64pfr1_el1), + TEST_REG(ID_AA64MMFR0_EL1, ftr_id_aa64mmfr0_el1), + TEST_REG(ID_AA64MMFR1_EL1, ftr_id_aa64mmfr1_el1), + TEST_REG(ID_AA64MMFR2_EL1, ftr_id_aa64mmfr2_el1), + TEST_REG(ID_AA64MMFR3_EL1, ftr_id_aa64mmfr3_el1), + TEST_REG(ID_AA64ZFR0_EL1, ftr_id_aa64zfr0_el1), }; =20 #define GUEST_REG_SYNC(id) GUEST_SYNC_ARGS(0, id, read_sysreg_s(id), 0, 0); @@ -265,6 +267,34 @@ static void guest_code(void) GUEST_DONE(); } =20 +#define GUEST_READ_TEST (ARRAY_SIZE(test_regs) + 6) + +static const char *get_reg_name(u64 id) +{ + int i; + + for (i =3D 0; i < ARRAY_SIZE(test_regs); i++) + if (test_regs[i].reg =3D=3D id) + return test_regs[i].name; + + switch (id) { + case SYS_MPIDR_EL1: + return "MPIDR_EL1"; + case SYS_CLIDR_EL1: + return "CLIDR_EL1"; + case SYS_CTR_EL0: + return "CTR_EL0"; + case SYS_MIDR_EL1: + return "MIDR_EL1"; + case SYS_REVIDR_EL1: + return "REVIDR_EL1"; + case SYS_AIDR_EL1: + return "AIDR_EL1"; + default: + TEST_FAIL("Unknown register"); + } +} + /* Return a safe value to a given ftr_bits an ftr value */ uint64_t get_safe_value(const struct reg_ftr_bits *ftr_bits, uint64_t ftr) { @@ -635,6 +665,8 @@ static void test_guest_reg_read(struct kvm_vcpu *vcpu) { bool done =3D false; struct ucall uc; + uint64_t reg_id, expected_val, guest_val; + bool match; =20 while (!done) { vcpu_run(vcpu); @@ -645,8 +677,16 @@ static void test_guest_reg_read(struct kvm_vcpu *vcpu) break; case UCALL_SYNC: /* Make sure the written values are seen by guest */ - TEST_ASSERT_EQ(test_reg_vals[encoding_to_range_idx(uc.args[2])], - uc.args[3]); + reg_id =3D uc.args[2]; + guest_val =3D uc.args[3]; + expected_val =3D test_reg_vals[encoding_to_range_idx(reg_id)]; + match =3D expected_val =3D=3D guest_val; + if (!match) + ksft_print_msg("%lx !=3D %lx\n", + expected_val, guest_val); + ksft_test_result(match, + "%s value seen in guest\n", + get_reg_name(reg_id)); break; case UCALL_DONE: done =3D true; @@ -786,7 +826,7 @@ int main(void) =20 ksft_print_header(); =20 - test_cnt =3D 3 + MPAM_IDREG_TEST + MTE_IDREG_TEST; + test_cnt =3D 3 + MPAM_IDREG_TEST + MTE_IDREG_TEST + GUEST_READ_TEST; for (i =3D 0; i < ARRAY_SIZE(test_regs); i++) for (j =3D 0; test_regs[i].ftr_bits[j].type !=3D FTR_END; j++) test_cnt++; --=20 2.47.2 From nobody Mon Feb 9 01:50:21 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 70EB83655F3; Thu, 30 Oct 2025 15:47:28 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761839249; cv=none; b=HDSOc4ItsK+kRPMO3jux4t/JnWFBu4zpBgm+Ygqa/jNk1mFcxj+j7fR/aCB8kiJ4/9ZKy/yxEuGXqyKGjDON56TDwfLKC9mURzr8LOeK6pldrFO5nKi5syzk3kGwdOZyLJw/HGpXQPn/gahN9dwx83Pc6UWqM+kj906b5nhKS1I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761839249; c=relaxed/simple; bh=NZCHWtWgDq5zz30CCAR3ifMlNJpsHOdaSLoln4mIKFs=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=CfpyC9defKqVUkKDWvTg9ZHRstNMhpHA4fH+x1NmyE3kcl2Pk+y6ghZp76NvoalVtjYYU+ggRWfb3Scs62Buwe28hgmhDLuotaF3n5c58ndz27xqPnlfRHP48HH3eKCbM1LmjZm+UnpqEJqrXxicOWFvcIPvzXS/Cu6AML1yFAg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=FFvIALRb; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="FFvIALRb" Received: by smtp.kernel.org (Postfix) with ESMTPSA id DE71AC4CEFF; Thu, 30 Oct 2025 15:47:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1761839248; bh=NZCHWtWgDq5zz30CCAR3ifMlNJpsHOdaSLoln4mIKFs=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=FFvIALRbAweVCw2UoxmIuKV8ciopyH/0U0RPhAY6EFh+wONWJWJG+paNTnnWtK+mv itTIuVHb/sK7nVeUQSiWAvSIY5l6QIerAxUvsxSTCg0cwOmfr6OSS09tVxn+2mrigC t/fAmJOfIDPfpU2LjAkqUMsFOuzAHdLDrQL+oJ5iLvDDKiV6f567WMFtBsFMYNFBZ/ DbyH0ZH6+STkyfdfsUgObz6blaPGNiH1IZB407FTa6NL+dIopu/Zb1YP52nth2F+NM IdG8qsWfP11gL4NEFgJnHpvoO1JqFe/3Fox3ES+rvzQ2PBsHP14yU1ZY7+z3uTjN+V w74/54Prjl4vg== From: Mark Brown Date: Thu, 30 Oct 2025 15:42:48 +0000 Subject: [PATCH 2/3] KVM: selftests: arm64: Report register reset tests individually Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251030-kvm-arm64-set-id-regs-aarch64-v1-2-96fe0d2b178e@kernel.org> References: <20251030-kvm-arm64-set-id-regs-aarch64-v1-0-96fe0d2b178e@kernel.org> In-Reply-To: <20251030-kvm-arm64-set-id-regs-aarch64-v1-0-96fe0d2b178e@kernel.org> To: Marc Zyngier , Oliver Upton , Joey Gouly , Suzuki K Poulose , Paolo Bonzini , Shuah Khan Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mark Brown X-Mailer: b4 0.15-dev-88d78 X-Developer-Signature: v=1; a=openpgp-sha256; l=2202; i=broonie@kernel.org; h=from:subject:message-id; bh=NZCHWtWgDq5zz30CCAR3ifMlNJpsHOdaSLoln4mIKFs=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBpA4iGyvPLC38rdS2RIy+FJ+eOECrgfTa4QqA8i pePN12GnbCJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCaQOIhgAKCRAk1otyXVSH 0EMVB/9sVxjcnfn5VzQgHVPjt2KP3qIKdpSoNTV6oWRIyMcs56td9lA4MRkrfXW8dkGbbZMd8gH Xz9rdLGvnb2/gHZnT1+z2HA5WEt06Od6luR+XPAEFMZ64ibXEHdXx8OhdemAspmT+Tk9eyy7ijc Gx+efN/IGXq1EeuEmVo75d8c6pk+IZ/Kpi6qHKBfNJcYdE0pAgjBtZumqiEnC5dVFWitMzzp8bY pcmTw4W5Z8Tvzs+raAD1H/FSktJihHS5kn/6u7QDaDQOG3g+C71dRh5kgz9JvcD92hEZq2KWcqM eh5JqP5bcc42u5QeIo7ZKML3+inb4wQrpaFrGQ5ZBZwRxYGI X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB set_id_regs tests that registers have their values preserved over reset. Currently it reports all registers in a single test with an instantly fatal assert which isn't great for diagnostics, it's hard to tell which register failed or if it's just one register. Change this to report each register as a separate test so that it's clear from the program output which registers have problems. Signed-off-by: Mark Brown --- tools/testing/selftests/kvm/arm64/set_id_regs.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/tools/testing/selftests/kvm/arm64/set_id_regs.c b/tools/testin= g/selftests/kvm/arm64/set_id_regs.c index 7a759e976c2c..1a53f3a4be8d 100644 --- a/tools/testing/selftests/kvm/arm64/set_id_regs.c +++ b/tools/testing/selftests/kvm/arm64/set_id_regs.c @@ -775,11 +775,18 @@ static void test_assert_id_reg_unchanged(struct kvm_v= cpu *vcpu, uint32_t encodin { size_t idx =3D encoding_to_range_idx(encoding); uint64_t observed; + bool pass; =20 observed =3D vcpu_get_reg(vcpu, KVM_ARM64_SYS_REG(encoding)); - TEST_ASSERT_EQ(test_reg_vals[idx], observed); + pass =3D test_reg_vals[idx] =3D=3D observed; + if (!pass) + ksft_print_msg("%lx !=3D %lx\n", test_reg_vals[idx], observed); + ksft_test_result(pass, "%s unchanged by reset\n", + get_reg_name(encoding)); } =20 +#define ID_REG_RESET_UNCHANGED_TEST (ARRAY_SIZE(test_regs) + 6) + static void test_reset_preserves_id_regs(struct kvm_vcpu *vcpu) { /* @@ -797,8 +804,6 @@ static void test_reset_preserves_id_regs(struct kvm_vcp= u *vcpu) test_assert_id_reg_unchanged(vcpu, SYS_MIDR_EL1); test_assert_id_reg_unchanged(vcpu, SYS_REVIDR_EL1); test_assert_id_reg_unchanged(vcpu, SYS_AIDR_EL1); - - ksft_test_result_pass("%s\n", __func__); } =20 int main(void) @@ -826,7 +831,8 @@ int main(void) =20 ksft_print_header(); =20 - test_cnt =3D 3 + MPAM_IDREG_TEST + MTE_IDREG_TEST + GUEST_READ_TEST; + test_cnt =3D 2 + MPAM_IDREG_TEST + MTE_IDREG_TEST + GUEST_READ_TEST + + ID_REG_RESET_UNCHANGED_TEST; for (i =3D 0; i < ARRAY_SIZE(test_regs); i++) for (j =3D 0; test_regs[i].ftr_bits[j].type !=3D FTR_END; j++) test_cnt++; --=20 2.47.2 From nobody Mon Feb 9 01:50:21 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 33434365D38; Thu, 30 Oct 2025 15:47:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761839251; cv=none; b=plclE/ZLJuUaAX0Jc+jE+WX7eZQhu0ytDhSiiOxrBh45/JLCvF4J8HbkyySR/JHqP1mGpIaf/hTEKuEVaDyFZgolD+6falfQlGzo+jVZtTxHnrUOAh48PPc2SeWAHi8Z+EOYuq4BjNlUxT+Ttf7tnGsUOJi+lc2iSTJxshCLoZE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761839251; c=relaxed/simple; bh=OOWNdlvS0e5zsqxUjtF1fvoktLBbLPB8K99I3mro3t0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=VCQcdqCRa9PQeL59mAc/YhmCWW5qGAoV+vKPBOL2MZ/nE4VVI+3RAEmwBzyjOkIuQVEhQtLvqfXZpq0jtS1BSFVhsOskxjaPTikDlRDe1sv5y+1bY+E7Kj0nscYSYzA94cDR0Ic0bIHWY80ZxzyqwJH+3IcB37v3lYEvwt5zGr4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=Z462vBn/; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="Z462vBn/" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 5D954C4CEF8; Thu, 30 Oct 2025 15:47:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1761839250; bh=OOWNdlvS0e5zsqxUjtF1fvoktLBbLPB8K99I3mro3t0=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=Z462vBn/RLoPlxhd7s73he8E4WGDucxQzqbALxMU6rdKxBYIkwJNgRoA9SxAgMF+m UTzeMswMREfTIsCmp9OkeBrR4QypyN8MLnUB90lRznZcUbjNIjODbtV4sv1DXRROOn YVGYuMoxvtPDX8plp7gH8rAenc64CyRl1To8ybkCC6nBOb7ilPufyuOKBsIS8pCgO4 xYZADFOfTZQiHPPPVS6Nj7lCt3kf3oupx0OjH8n9npAoqGVdog9r9AC7Hl7L7dN6L7 rqawx5pL3oMAR8E2zUcohw+NEUTzTfLrPW/Y+MQa0aTC+xrKYR8H878NhFL+Fpk77z cnJ+uyFJJYTRg== From: Mark Brown Date: Thu, 30 Oct 2025 15:42:49 +0000 Subject: [PATCH 3/3] KVM: selftests: arm64: Make set_id_regs bitfield validatity checks non-fatal Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251030-kvm-arm64-set-id-regs-aarch64-v1-3-96fe0d2b178e@kernel.org> References: <20251030-kvm-arm64-set-id-regs-aarch64-v1-0-96fe0d2b178e@kernel.org> In-Reply-To: <20251030-kvm-arm64-set-id-regs-aarch64-v1-0-96fe0d2b178e@kernel.org> To: Marc Zyngier , Oliver Upton , Joey Gouly , Suzuki K Poulose , Paolo Bonzini , Shuah Khan Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, linux-kselftest@vger.kernel.org, linux-kernel@vger.kernel.org, Mark Brown X-Mailer: b4 0.15-dev-88d78 X-Developer-Signature: v=1; a=openpgp-sha256; l=3523; i=broonie@kernel.org; h=from:subject:message-id; bh=OOWNdlvS0e5zsqxUjtF1fvoktLBbLPB8K99I3mro3t0=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBpA4iH5fN2/5Tff1LcMsCzge14FRk/8Ks3KBfZ4 yt+NPnAH4aJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCaQOIhwAKCRAk1otyXVSH 0PTUB/4uSDubuCl1B4f68EVzEGnKq9mBneLwADJ3ffqD+fWz9cNQwtlSfdhONTTGLA6vlTJIkRO NhxPI1sfzazP7CZaiMWuR9Wsl9UqVQsbWSdMq+Y1ymue32Jca4wobaBqpeLeTa0p6RdE6jkk3Zf Tsjp2uMVnyGk9nyHiwdMhK4NRO6J6eGgV0SCVy8Fs+PcfQOLPOKFy4Dylfz5rmALisoY+95hYpA 1uzMJLbMjtGCi9ycAiTcOvmFyCfFYzidA82BZuntLsz8v9pRIkYu3xON8eNYPsSqoZXUt/m1Y9o qsFdhrAf/UEkl/Wj7Ke39z4xTo/zZ2vTHVJWbUI08/KO9+Qa X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB Currently when set_id_regs encounters a problem checking validation of writes to feature registers it uses an immediately fatal assert to report the problem. This is not idiomatic for kselftest, and it is also not great for usability. The affected bitfield is not clearly reported and further tests do not have their results reported. Switch to using standard kselftest result reporting for the two asserts we do, these are non-fatal asserts so allow the program to continue and the test names include the affected field. Signed-off-by: Mark Brown --- tools/testing/selftests/kvm/arm64/set_id_regs.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/tools/testing/selftests/kvm/arm64/set_id_regs.c b/tools/testin= g/selftests/kvm/arm64/set_id_regs.c index 1a53f3a4be8d..abe97f9293c9 100644 --- a/tools/testing/selftests/kvm/arm64/set_id_regs.c +++ b/tools/testing/selftests/kvm/arm64/set_id_regs.c @@ -405,6 +405,7 @@ static uint64_t test_reg_set_success(struct kvm_vcpu *v= cpu, uint64_t reg, uint8_t shift =3D ftr_bits->shift; uint64_t mask =3D ftr_bits->mask; uint64_t val, new_val, ftr; + bool match; =20 val =3D vcpu_get_reg(vcpu, reg); ftr =3D (val & mask) >> shift; @@ -417,7 +418,10 @@ static uint64_t test_reg_set_success(struct kvm_vcpu *= vcpu, uint64_t reg, =20 vcpu_set_reg(vcpu, reg, val); new_val =3D vcpu_get_reg(vcpu, reg); - TEST_ASSERT_EQ(new_val, val); + match =3D new_val =3D=3D val; + if (!match) + ksft_print_msg("%lx !=3D %lx\n", new_val, val); + ksft_test_result(match, "%s valid write succeeded\n", ftr_bits->name); =20 return new_val; } @@ -429,6 +433,7 @@ static void test_reg_set_fail(struct kvm_vcpu *vcpu, ui= nt64_t reg, uint64_t mask =3D ftr_bits->mask; uint64_t val, old_val, ftr; int r; + bool match; =20 val =3D vcpu_get_reg(vcpu, reg); ftr =3D (val & mask) >> shift; @@ -445,7 +450,10 @@ static void test_reg_set_fail(struct kvm_vcpu *vcpu, u= int64_t reg, "Unexpected KVM_SET_ONE_REG error: r=3D%d, errno=3D%d", r, errno); =20 val =3D vcpu_get_reg(vcpu, reg); - TEST_ASSERT_EQ(val, old_val); + match =3D val =3D=3D old_val; + if (!match) + ksft_print_msg("%lx !=3D %lx\n", val, old_val); + ksft_test_result(match, "%s invalid write rejected\n", ftr_bits->name); } =20 static uint64_t test_reg_vals[KVM_ARM_FEATURE_ID_RANGE_SIZE]; @@ -485,7 +493,11 @@ static void test_vm_ftr_id_regs(struct kvm_vcpu *vcpu,= bool aarch64_only) for (int j =3D 0; ftr_bits[j].type !=3D FTR_END; j++) { /* Skip aarch32 reg on aarch64 only system, since they are RAZ/WI. */ if (aarch64_only && sys_reg_CRm(reg_id) < 4) { - ksft_test_result_skip("%s on AARCH64 only system\n", + ksft_print_msg("%s on AARCH64 only system\n", + ftr_bits[j].name); + ksft_test_result_skip("%s invalid write rejected\n", + ftr_bits[j].name); + ksft_test_result_skip("%s valid write succeeded\n", ftr_bits[j].name); continue; } @@ -497,8 +509,6 @@ static void test_vm_ftr_id_regs(struct kvm_vcpu *vcpu, = bool aarch64_only) =20 test_reg_vals[idx] =3D test_reg_set_success(vcpu, reg, &ftr_bits[j]); - - ksft_test_result_pass("%s\n", ftr_bits[j].name); } } } @@ -835,7 +845,7 @@ int main(void) ID_REG_RESET_UNCHANGED_TEST; for (i =3D 0; i < ARRAY_SIZE(test_regs); i++) for (j =3D 0; test_regs[i].ftr_bits[j].type !=3D FTR_END; j++) - test_cnt++; + test_cnt +=3D 2; =20 ksft_set_plan(test_cnt); =20 --=20 2.47.2