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Wed, 29 Oct 2025 04:27:38 -0700 (PDT) From: Himanshu Chauhan To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-acpi@vger.kernel.org, linux-efi@vger.kernel.org, acpica-devel@lists.linux.dev Cc: paul.walmsley@sifive.com, palmer@dabbelt.com, lenb@kernel.org, james.morse@arm.com, tony.luck@intel.com, ardb@kernel.org, conor@kernel.org, cleger@rivosinc.com, robert.moore@intel.com, sunilvl@ventanamicro.com, apatel@ventanamicro.com, Himanshu Chauhan Subject: [RFC PATCH v2 07/10] riscv: Add RISC-V entries in processor type and ISA strings Date: Wed, 29 Oct 2025 16:56:45 +0530 Message-ID: <20251029112649.3811657-8-hchauhan@ventanamicro.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251029112649.3811657-1-hchauhan@ventanamicro.com> References: <20251029112649.3811657-1-hchauhan@ventanamicro.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add RISCV and RISCV32/64 strings in the in processor type and ISA strings respectively. These are defined for cper records. Signed-off-by: Himanshu Chauhan --- drivers/firmware/efi/cper.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/firmware/efi/cper.c b/drivers/firmware/efi/cper.c index 928409199a1a..ebdd92ba1e15 100644 --- a/drivers/firmware/efi/cper.c +++ b/drivers/firmware/efi/cper.c @@ -110,6 +110,7 @@ static const char * const proc_type_strs[] =3D { "IA32/X64", "IA64", "ARM", + "RISCV", }; =20 static const char * const proc_isa_strs[] =3D { @@ -118,6 +119,8 @@ static const char * const proc_isa_strs[] =3D { "X64", "ARM A32/T32", "ARM A64", + "RISCV32", + "RISCV64", }; =20 const char * const cper_proc_error_type_strs[] =3D { --=20 2.43.0