From nobody Tue Dec 16 02:17:14 2025 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5662131AF10; Wed, 29 Oct 2025 08:17:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.61.82.184 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761725852; cv=none; b=sn0Urm/yJ3a+6hk9ua+hrswVse0TbaU0Ze6PfYxjnvdmg+XLs4W4uFDnzi+yKqzwl02ut9MO/KqxIqlAlKTdmhcO4/LZTK17o+TX98GAVn95zoQmnnH109cpezJ8mwCz49frYvOb2zfkDIbwyx8LDGdjpqaj/+Z7wZJBGpvkp58= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761725852; c=relaxed/simple; bh=e6rQ1Cl074u9Ik/iNwcu3jv2NZ4doPQLqmGTKfh7xS8=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=mPUUE7UxShK1idD47lvgYvlDQGIoAdfTLou43bZyXPgLTBeXa9YQbvwZv/VvSK48XAsGWNFroN9vSrm8wl7ubv1WMtuew3jA+ATyH6ScYFqfeRh9U9OiyA7mtvYnQffGGCiRePRt/0RyMB134tfMs6iPkVe4Sr0WjlkMWwnQstM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com; spf=pass smtp.mailfrom=mediatek.com; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b=Apk2XVMU; arc=none smtp.client-ip=210.61.82.184 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=mediatek.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=mediatek.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Apk2XVMU" X-UUID: b20b5664b49f11f0b33aeb1e7f16c2b6-20251029 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Type:Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:To:From; bh=9tS9P9lsCMvlE4Hv9PQbyZ612jvorQ69IHcFkEX/D9Q=; b=Apk2XVMUoyV10kimbMKaCiuw4mjdCeAar+Dtc6AnV6pcH9PheHnXsXrodnVYcHKJy49/FnzaT7/LHWk6ZAxENrCcM2DQOEK0s8hu8EANcyuoKhdqYI7XVwkunzB+q+USMaKtUoa9Ca5UDPKzxxXNKpjDS4SNzqBpt5T8QKsNFUs=; X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.3.6,REQID:5b40f814-a0c9-463e-81a3-e00cafc24edd,IP:0,UR L:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,BULK:0,RULE:Release_Ham,ACTION:r elease,TS:0 X-CID-META: VersionHash:a9d874c,CLOUDID:336ef23a-b16f-49fc-bb37-560773c432f7,B ulkID:nil,BulkQuantity:0,Recheck:0,SF:81|82|102|836|888|898,TC:-5,Content: 0|15|50,EDM:-3,IP:nil,URL:0,File:130,RT:0,Bulk:nil,QS:nil,BEC:nil,COL:0,OS I:0,OSA:0,AV:0,LES:1,SPR:NO,DKR:0,DKP:0,BRR:0,BRE:0,ARC:0 X-CID-BVR: 2,SSN|SDN X-CID-BAS: 2,SSN|SDN,0,_ X-CID-FACTOR: TF_CID_SPAM_SNR X-CID-RHF: D41D8CD98F00B204E9800998ECF8427E X-UUID: b20b5664b49f11f0b33aeb1e7f16c2b6-20251029 Received: from mtkmbs10n1.mediatek.inc [(172.21.101.34)] by mailgw02.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 134287564; Wed, 29 Oct 2025 16:17:22 +0800 Received: from mtkmbs11n1.mediatek.inc (172.21.101.185) by MTKMBS14N1.mediatek.inc (172.21.101.75) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.26; Wed, 29 Oct 2025 16:17:20 +0800 Received: from mhfsdcap04.gcn.mediatek.inc (10.17.3.154) by mtkmbs11n1.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.2.1748.26 via Frontend Transport; Wed, 29 Oct 2025 16:17:20 +0800 From: Kyrie Wu To: Hans Verkuil , Mauro Carvalho Chehab , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , AngeloGioacchino Del Regno , Kyrie Wu , , , , , Subject: [RESEND v10 01/12] media: mediatek: jpeg: fix jpeg hw count setting Date: Wed, 29 Oct 2025 16:17:06 +0800 Message-ID: <20251029081717.29551-2-kyrie.wu@mediatek.com> X-Mailer: git-send-email 2.46.0 In-Reply-To: <20251029081717.29551-1-kyrie.wu@mediatek.com> References: <20251029081717.29551-1-kyrie.wu@mediatek.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-MTK: N Content-Type: text/plain; charset="utf-8" Different ICs have different amounts of hardware, use a variable to set the amount of hardware. Fixes: 934e8bccac95 ("mtk-jpegenc: support jpegenc multi-hardware") Fixes: 0fa49df4222f ("media: mtk-jpegdec: support jpegdec multi-hardware") Signed-off-by: Kyrie Wu --- drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c | 8 ++++---- drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h | 2 ++ drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c | 1 + drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c | 1 + 4 files changed, 8 insertions(+), 4 deletions(-) diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.c index d08fe365cbb2..030d2a75972a 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.c @@ -1460,7 +1460,7 @@ static int mtk_jpegenc_get_hw(struct mtk_jpeg_ctx *ct= x) int i; =20 spin_lock_irqsave(&jpeg->hw_lock, flags); - for (i =3D 0; i < MTK_JPEGENC_HW_MAX; i++) { + for (i =3D 0; i < jpeg->max_hw_count; i++) { comp_jpeg =3D jpeg->enc_hw_dev[i]; if (comp_jpeg->hw_state =3D=3D MTK_JPEG_HW_IDLE) { hw_id =3D i; @@ -1507,7 +1507,7 @@ static int mtk_jpegdec_get_hw(struct mtk_jpeg_ctx *ct= x) int i; =20 spin_lock_irqsave(&jpeg->hw_lock, flags); - for (i =3D 0; i < MTK_JPEGDEC_HW_MAX; i++) { + for (i =3D 0; i < jpeg->max_hw_count; i++) { comp_jpeg =3D jpeg->dec_hw_dev[i]; if (comp_jpeg->hw_state =3D=3D MTK_JPEG_HW_IDLE) { hw_id =3D i; @@ -1590,7 +1590,7 @@ static void mtk_jpegenc_worker(struct work_struct *wo= rk) jpeg_work); struct mtk_jpeg_dev *jpeg =3D ctx->jpeg; =20 - for (i =3D 0; i < MTK_JPEGENC_HW_MAX; i++) + for (i =3D 0; i < jpeg->max_hw_count; i++) comp_jpeg[i] =3D jpeg->enc_hw_dev[i]; i =3D 0; =20 @@ -1685,7 +1685,7 @@ static void mtk_jpegdec_worker(struct work_struct *wo= rk) struct mtk_jpeg_fb fb; unsigned long flags; =20 - for (i =3D 0; i < MTK_JPEGDEC_HW_MAX; i++) + for (i =3D 0; i < jpeg->max_hw_count; i++) comp_jpeg[i] =3D jpeg->dec_hw_dev[i]; i =3D 0; =20 diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h b/drivers= /media/platform/mediatek/jpeg/mtk_jpeg_core.h index 02ed0ed5b736..6be5cf30dea1 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_core.h @@ -212,6 +212,7 @@ struct mtk_jpegdec_comp_dev { * @reg_decbase: jpg decode register base addr * @dec_hw_dev: jpg decode hardware device * @hw_index: jpg hw index + * @max_hw_count: jpeg hw-core count */ struct mtk_jpeg_dev { struct mutex lock; @@ -234,6 +235,7 @@ struct mtk_jpeg_dev { void __iomem *reg_decbase[MTK_JPEGDEC_HW_MAX]; struct mtk_jpegdec_comp_dev *dec_hw_dev[MTK_JPEGDEC_HW_MAX]; atomic_t hw_index; + u32 max_hw_count; }; =20 /** diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c b/drive= rs/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c index 32372781daf5..4534caeb104f 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_dec_hw.c @@ -664,6 +664,7 @@ static int mtk_jpegdec_hw_probe(struct platform_device = *pdev) master_dev->dec_hw_dev[i] =3D dev; master_dev->reg_decbase[i] =3D dev->reg_base; dev->master_dev =3D master_dev; + master_dev->max_hw_count++; =20 platform_set_drvdata(pdev, dev); pm_runtime_enable(&pdev->dev); diff --git a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c b/drive= rs/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c index b6f5b2249f1f..2765dafab4ad 100644 --- a/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c +++ b/drivers/media/platform/mediatek/jpeg/mtk_jpeg_enc_hw.c @@ -386,6 +386,7 @@ static int mtk_jpegenc_hw_probe(struct platform_device = *pdev) master_dev->enc_hw_dev[i] =3D dev; master_dev->reg_encbase[i] =3D dev->reg_base; dev->master_dev =3D master_dev; + master_dev->max_hw_count++; =20 platform_set_drvdata(pdev, dev); pm_runtime_enable(&pdev->dev); --=20 2.45.2