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X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 29 Oct 2025 08:06:10.1464 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 78747c45-e70d-449c-3f2c-08de16c2055e X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.23.195];Helo=[lewvzet201.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000A346.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW4PR10MB6369 Content-Type: text/plain; charset="utf-8" The 'pci-keystone.c' driver is the application/glue/wrapper driver for the Designware PCIe Controllers on TI SoCs. Now that all of the helper APIs that the 'pci-keystone.c' driver depends upon have been exported for use, enable support to build the driver as a loadable module. Additionally, the functions marked by the '__init' keyword may be invoked: a) After a probe deferral OR b) During a delayed probe - Delay attributed to driver being built as a loadable module In both of the cases mentioned above, the '__init' memory will be freed before the functions are invoked. This results in an exception of the form: Unable to handle kernel paging request at virtual address ... Mem abort info: ... pc : ks_pcie_host_init+0x0/0x540 lr : dw_pcie_host_init+0x170/0x498 ... ks_pcie_host_init+0x0/0x540 (P) ks_pcie_probe+0x728/0x84c platform_probe+0x5c/0x98 really_probe+0xbc/0x29c __driver_probe_device+0x78/0x12c driver_probe_device+0xd8/0x15c ... To address this, introduce a new function namely 'ks_pcie_init()' to register the 'fault handler' while removing the '__init' keyword from existing functions. Signed-off-by: Siddharth Vadapalli --- v4: https://lore.kernel.org/r/20251022095724.997218-5-s-vadapalli@ti.com/ Changes since v4: - To fix the build error on ARM32 platforms as reported at: https://lore.kernel.org/r/202510281008.jw19XuyP-lkp@intel.com/ patch 4 in the series has been updated by introducing a new config named "PCI_KEYSTONE_TRISTATE" which allows building the driver as a loadable module. Additionally, this newly introduced config can be enabled only for non-ARM32 platforms. As a result, ARM32 platforms continue using the existing PCI_KEYSTONE config which is a bool, while ARM64 platforms can use PCI_KEYSTONE_TRISTATE which is a tristate, and can optionally enabled loadable module support being enabled by this series. Regards, Siddharth. drivers/pci/controller/dwc/Kconfig | 15 +++-- drivers/pci/controller/dwc/Makefile | 3 + drivers/pci/controller/dwc/pci-keystone.c | 78 +++++++++++++---------- 3 files changed, 59 insertions(+), 37 deletions(-) diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dw= c/Kconfig index 349d4657393c..c5bc2f0b1f39 100644 --- a/drivers/pci/controller/dwc/Kconfig +++ b/drivers/pci/controller/dwc/Kconfig @@ -482,15 +482,21 @@ config PCI_DRA7XX_EP to enable device-specific features PCI_DRA7XX_EP must be selected. This uses the DesignWare core. =20 +# ARM32 platforms use hook_fault_code() and cannot support loadable module. config PCI_KEYSTONE bool =20 +# On non-ARM32 platforms, loadable module can be supported. +config PCI_KEYSTONE_TRISTATE + tristate + config PCI_KEYSTONE_HOST - bool "TI Keystone PCIe controller (host mode)" + tristate "TI Keystone PCIe controller (host mode)" depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST depends on PCI_MSI select PCIE_DW_HOST - select PCI_KEYSTONE + select PCI_KEYSTONE if ARM + select PCI_KEYSTONE_TRISTATE if !ARM help Enables support for the PCIe controller in the Keystone SoC to work in host mode. The PCI controller on Keystone is based on @@ -498,11 +504,12 @@ config PCI_KEYSTONE_HOST DesignWare core functions to implement the driver. =20 config PCI_KEYSTONE_EP - bool "TI Keystone PCIe controller (endpoint mode)" + tristate "TI Keystone PCIe controller (endpoint mode)" depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST depends on PCI_ENDPOINT select PCIE_DW_EP - select PCI_KEYSTONE + select PCI_KEYSTONE if ARM + select PCI_KEYSTONE_TRISTATE if !ARM help Enables support for the PCIe controller in the Keystone SoC to work in endpoint mode. The PCI controller on Keystone is based diff --git a/drivers/pci/controller/dwc/Makefile b/drivers/pci/controller/d= wc/Makefile index 7ae28f3b0fb3..7c8de0067612 100644 --- a/drivers/pci/controller/dwc/Makefile +++ b/drivers/pci/controller/dwc/Makefile @@ -11,7 +11,10 @@ obj-$(CONFIG_PCI_EXYNOS) +=3D pci-exynos.o obj-$(CONFIG_PCIE_FU740) +=3D pcie-fu740.o obj-$(CONFIG_PCI_IMX6) +=3D pci-imx6.o obj-$(CONFIG_PCIE_SPEAR13XX) +=3D pcie-spear13xx.o +# ARM32 platforms use hook_fault_code() and cannot support loadable module. obj-$(CONFIG_PCI_KEYSTONE) +=3D pci-keystone.o +# On non-ARM32 platforms, loadable module can be supported. +obj-$(CONFIG_PCI_KEYSTONE_TRISTATE) +=3D pci-keystone.o obj-$(CONFIG_PCI_LAYERSCAPE) +=3D pci-layerscape.o obj-$(CONFIG_PCI_LAYERSCAPE_EP) +=3D pci-layerscape-ep.o obj-$(CONFIG_PCIE_QCOM_COMMON) +=3D pcie-qcom-common.o diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/contro= ller/dwc/pci-keystone.c index 25b8193ffbcf..53f88b31ad43 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -777,29 +778,7 @@ static int ks_pcie_config_intx_irq(struct keystone_pci= e *ks_pcie) return ret; } =20 -#ifdef CONFIG_ARM -/* - * When a PCI device does not exist during config cycles, keystone host - * gets a bus error instead of returning 0xffffffff (PCI_ERROR_RESPONSE). - * This handler always returns 0 for this kind of fault. - */ -static int ks_pcie_fault(unsigned long addr, unsigned int fsr, - struct pt_regs *regs) -{ - unsigned long instr =3D *(unsigned long *) instruction_pointer(regs); - - if ((instr & 0x0e100090) =3D=3D 0x00100090) { - int reg =3D (instr >> 12) & 15; - - regs->uregs[reg] =3D -1; - regs->ARM_pc +=3D 4; - } - - return 0; -} -#endif - -static int __init ks_pcie_init_id(struct keystone_pcie *ks_pcie) +static int ks_pcie_init_id(struct keystone_pcie *ks_pcie) { int ret; unsigned int id; @@ -831,7 +810,7 @@ static int __init ks_pcie_init_id(struct keystone_pcie = *ks_pcie) return 0; } =20 -static int __init ks_pcie_host_init(struct dw_pcie_rp *pp) +static int ks_pcie_host_init(struct dw_pcie_rp *pp) { struct dw_pcie *pci =3D to_dw_pcie_from_pp(pp); struct keystone_pcie *ks_pcie =3D to_keystone_pcie(pci); @@ -861,15 +840,6 @@ static int __init ks_pcie_host_init(struct dw_pcie_rp = *pp) if (ret < 0) return ret; =20 -#ifdef CONFIG_ARM - /* - * PCIe access errors that result into OCP errors are caught by ARM as - * "External aborts" - */ - hook_fault_code(17, ks_pcie_fault, SIGBUS, 0, - "Asynchronous external abort"); -#endif - return 0; } =20 @@ -1134,6 +1104,7 @@ static const struct of_device_id ks_pcie_of_match[] = =3D { }, { }, }; +MODULE_DEVICE_TABLE(of, ks_pcie_of_match); =20 static int ks_pcie_probe(struct platform_device *pdev) { @@ -1381,4 +1352,45 @@ static struct platform_driver ks_pcie_driver =3D { .of_match_table =3D ks_pcie_of_match, }, }; + +#ifdef CONFIG_ARM +/* + * When a PCI device does not exist during config cycles, keystone host + * gets a bus error instead of returning 0xffffffff (PCI_ERROR_RESPONSE). + * This handler always returns 0 for this kind of fault. + */ +static int ks_pcie_fault(unsigned long addr, unsigned int fsr, + struct pt_regs *regs) +{ + unsigned long instr =3D *(unsigned long *)instruction_pointer(regs); + + if ((instr & 0x0e100090) =3D=3D 0x00100090) { + int reg =3D (instr >> 12) & 15; + + regs->uregs[reg] =3D -1; + regs->ARM_pc +=3D 4; + } + + return 0; +} + +static int __init ks_pcie_init(void) +{ + /* + * PCIe access errors that result into OCP errors are caught by ARM as + * "External aborts" + */ + if (of_find_matching_node(NULL, ks_pcie_of_match)) + hook_fault_code(17, ks_pcie_fault, SIGBUS, 0, + "Asynchronous external abort"); + + return platform_driver_register(&ks_pcie_driver); +} +device_initcall(ks_pcie_init); +#else builtin_platform_driver(ks_pcie_driver); +#endif + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("PCIe controller driver for Texas Instruments Keystone = SoCs"); +MODULE_AUTHOR("Murali Karicheri "); --=20 2.51.0