From nobody Sun Feb 8 01:52:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4C6B928D8D1; Tue, 28 Oct 2025 17:36:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.17 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761672984; cv=none; b=r7xZAI5TE+x7UfXkfAZd+SfqwUD1STArPmW3DmQv++vK0GIIx8VcX2EN9E/nMlfEgQ4m/SwgwQDfqVagVHTDotz31DiSLX9rM2C2ePIGb7wJHkwFND2vtosqahdRmFIvQ9aGvuzmokGE8+hNEFHWRJ8BCtiooLPIBdwmPyrTXtM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761672984; c=relaxed/simple; bh=bZ8RzX3XhmEbNTDlxF5oMlGveV2u4y/v84rMSalX5XY=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=ihhq0FZt9nL0gMYQ5ixPqw7gxUdVaHC3u0mdXISPagc53OYIR/CzrU8dfGV+ZwCifd5qMFXcQfj4VEXBg3AzYYlwmQjE0ASJdEfjMfYPyiO3isCh9f+44KfmpQqUzwmKsDL0/wkptSnMsKy9aVI1DC5QApp8ShNfej5tm3lZIw4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=BKeiTJNX; arc=none smtp.client-ip=192.198.163.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="BKeiTJNX" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761672982; x=1793208982; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=bZ8RzX3XhmEbNTDlxF5oMlGveV2u4y/v84rMSalX5XY=; b=BKeiTJNXmnxznDnQxOkZiaj7r+6s9/MY/wFmWcO6VxAJbJjHItqTsmcV LJl/GtHVuNWcxqzeL6D17pDcYIOJILt7Arvqi61nz/nrEz0jqpcrehzzp PYuQrmRpA5Wd0UViMm9ZYBtauO8RlytVipyE9cKuNxnMqcoLgaolwl4zE yqjfC/+9CVjeSWU9VhtSVK4KOFdlK8uAUrRjljuu7WUQPOMW52qIHGOAN R7VJT+U64mLljBhEwOWXPdz8MClaeYH708VTr3GxvfUSCvZfx1+OONT2n qNckHiM9tq0xvLKxnXA+2VIWOhU7y7h6rMJOrNHW5VOL2CvSkVyqrOJN+ A==; X-CSE-ConnectionGUID: Mz6WSF0JTYqVUbAAPgBLBw== X-CSE-MsgGUID: nAKLDDWwQreazz8D9A1gTA== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="63690080" X-IronPort-AV: E=Sophos;i="6.19,261,1754982000"; d="scan'208";a="63690080" Received: from orviesa005.jf.intel.com ([10.64.159.145]) by fmvoesa111.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Oct 2025 10:36:20 -0700 X-CSE-ConnectionGUID: TkYtyQbvR7qXL+36gyfpQg== X-CSE-MsgGUID: uP1tK2S7QiS2CwBKUQKvLw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,261,1754982000"; d="scan'208";a="190548630" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.244.182]) by orviesa005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Oct 2025 10:36:13 -0700 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Simon Richter , Lucas De Marchi , Alex Deucher , amd-gfx@lists.freedesktop.org, Bjorn Helgaas , David Airlie , dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, Jani Nikula , Joonas Lahtinen , linux-pci@vger.kernel.org, Rodrigo Vivi , Simona Vetter , Tvrtko Ursulin , =?UTF-8?q?Christian=20K=C3=B6nig?= , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , =?UTF-8?q?Micha=C5=82=20Winiarski?= , linux-kernel@vger.kernel.org Cc: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Subject: [PATCH 1/9] PCI: Prevent resource tree corruption when BAR resize fails Date: Tue, 28 Oct 2025 19:35:43 +0200 Message-Id: <20251028173551.22578-2-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251028173551.22578-1-ilpo.jarvinen@linux.intel.com> References: <20251028173551.22578-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable pbus_reassign_bridge_resources() saves bridge windows into the saved list before attempting to adjust resource assignments to perform a BAR resize operation. If resource adjustments cannot be completed fully, rollback is attempted by restoring the resource from the saved list. The rollback, however, does not check whether the resources it restores were assigned by the partial resize attempt. If restore changes addresses of the resource, it can result in corrupting the resource tree. An example of a corrupted resource tree with overlapping addresses: 6200000000000-6203fbfffffff : pciex@620c3c0000000 6200000000000-6203fbff0ffff : PCI Bus 0030:01 6200020000000-62000207fffff : 0030:01:00.0 6200000000000-6203fbff0ffff : PCI Bus 0030:02 A resource that are assigned into the resource tree must remain unchanged. Thus, release such a resource before attempting to restore and claim it back. For simplicity, always do the release and claim back for the resource even in the cases where it is restored to the same address range. Note: this fix may "break" some cases where devices "worked" because the resource tree corruption allowed address space double counting to fit more resource than what can now be assigned without double counting. The upcoming changes to BAR resizing should address those scenarios (to the extent possible). Fixes: 8bb705e3e79d ("PCI: Add pci_resize_resource() for resizing BARs") Reported-by: Simon Richter Reported-by: Alex Benn=C3=A9e Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/pci/setup-bus.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 4a8735b275e4..e6984bb530ae 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -2504,6 +2504,11 @@ int pbus_reassign_bridge_resources(struct pci_bus *b= us, struct resource *res) bridge =3D dev_res->dev; i =3D pci_resource_num(bridge, res); =20 + if (res->parent) { + release_child_resources(res); + pci_release_resource(bridge, i); + } + restore_dev_resource(dev_res); =20 pci_claim_resource(bridge, i); --=20 2.39.5 From nobody Sun Feb 8 01:52:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 934B234575E; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable pci_rebar_set_size() adjusts BAR size for both normal and IOV BARs. The struct pci_srvio keeps a cached copy of BAR size in unit of resource_size_t in ->barsz[] which is not adjusted by pci_rebar_set_size() but by pci_iov_resource_set_size(). pci_iov_resource_set_size() is called also from pci_resize_resource_set_size(). The current arrangement is problematic once BAR resize algorithm starts to roll back changes properly in case of a failure. The normal resource fitting algorithm rolls back resource size using the struct pci_dev_resource easily but having to call also pci_resize_resource_set_size() or pci_iov_resource_set_size() to roll back BAR size would be an extra burden, whereas combining ->barsz[] update with pci_rebar_set_size() naturally rolls back it when restoring the old BAR size on a different layer of the BAR resize operation. Thus, rework pci_rebar_set_size() to also update ->barsz[]. Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/pci/iov.c | 15 ++++----------- drivers/pci/pci.c | 4 ++++ drivers/pci/pci.h | 5 ++--- drivers/pci/setup-res.c | 10 ++++------ 4 files changed, 14 insertions(+), 20 deletions(-) diff --git a/drivers/pci/iov.c b/drivers/pci/iov.c index 77dee43b7858..04b675e90963 100644 --- a/drivers/pci/iov.c +++ b/drivers/pci/iov.c @@ -158,8 +158,7 @@ resource_size_t pci_iov_resource_size(struct pci_dev *d= ev, int resno) return dev->sriov->barsz[pci_resource_num_to_vf_bar(resno)]; } =20 -void pci_iov_resource_set_size(struct pci_dev *dev, int resno, - resource_size_t size) +void pci_iov_resource_set_size(struct pci_dev *dev, int resno, int size) { if (!pci_resource_is_iov(resno)) { pci_warn(dev, "%s is not an IOV resource\n", @@ -167,7 +166,8 @@ void pci_iov_resource_set_size(struct pci_dev *dev, int= resno, return; } =20 - dev->sriov->barsz[pci_resource_num_to_vf_bar(resno)] =3D size; + resno =3D pci_resource_num_to_vf_bar(resno); + dev->sriov->barsz[resno] =3D pci_rebar_size_to_bytes(size); } =20 bool pci_iov_is_memory_decoding_enabled(struct pci_dev *dev) @@ -1340,7 +1340,6 @@ EXPORT_SYMBOL_GPL(pci_sriov_configure_simple); int pci_iov_vf_bar_set_size(struct pci_dev *dev, int resno, int size) { u32 sizes; - int ret; =20 if (!pci_resource_is_iov(resno)) return -EINVAL; @@ -1355,13 +1354,7 @@ int pci_iov_vf_bar_set_size(struct pci_dev *dev, int= resno, int size) if (!(sizes & BIT(size))) return -EINVAL; =20 - ret =3D pci_rebar_set_size(dev, resno, size); - if (ret) - return ret; - - pci_iov_resource_set_size(dev, resno, pci_rebar_size_to_bytes(size)); - - return 0; + return pci_rebar_set_size(dev, resno, size); } EXPORT_SYMBOL_GPL(pci_iov_vf_bar_set_size); =20 diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index b14dd064006c..7dfc58b0e55e 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -3803,6 +3803,10 @@ int pci_rebar_set_size(struct pci_dev *pdev, int bar= , int size) ctrl &=3D ~PCI_REBAR_CTRL_BAR_SIZE; ctrl |=3D FIELD_PREP(PCI_REBAR_CTRL_BAR_SIZE, size); pci_write_config_dword(pdev, pos + PCI_REBAR_CTRL, ctrl); + + if (pci_resource_is_iov(bar)) + pci_iov_resource_set_size(pdev, bar, size); + return 0; } =20 diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 4492b809094b..bf1a577e9623 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -808,8 +808,7 @@ void pci_iov_update_resource(struct pci_dev *dev, int r= esno); resource_size_t pci_sriov_resource_alignment(struct pci_dev *dev, int resn= o); void pci_restore_iov_state(struct pci_dev *dev); int pci_iov_bus_range(struct pci_bus *bus); -void pci_iov_resource_set_size(struct pci_dev *dev, int resno, - resource_size_t size); +void pci_iov_resource_set_size(struct pci_dev *dev, int resno, int size); bool pci_iov_is_memory_decoding_enabled(struct pci_dev *dev); static inline u16 pci_iov_vf_rebar_cap(struct pci_dev *dev) { @@ -851,7 +850,7 @@ static inline int pci_iov_bus_range(struct pci_bus *bus) return 0; } static inline void pci_iov_resource_set_size(struct pci_dev *dev, int resn= o, - resource_size_t size) { } + int size) { } static inline bool pci_iov_is_memory_decoding_enabled(struct pci_dev *dev) { return false; diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c index c3ba4ccecd43..3d0b0b3f60c4 100644 --- a/drivers/pci/setup-res.c +++ b/drivers/pci/setup-res.c @@ -450,12 +450,10 @@ static void pci_resize_resource_set_size(struct pci_d= ev *dev, int resno, resource_size_t res_size =3D pci_rebar_size_to_bytes(size); struct resource *res =3D pci_resource_n(dev, resno); =20 - if (!pci_resource_is_iov(resno)) { - resource_set_size(res, res_size); - } else { - resource_set_size(res, res_size * pci_sriov_get_totalvfs(dev)); - pci_iov_resource_set_size(dev, resno, res_size); - } + if (pci_resource_is_iov(resno)) + res_size *=3D pci_sriov_get_totalvfs(dev); + + resource_set_size(res, res_size); } =20 int pci_resize_resource(struct pci_dev *dev, int resno, int size) --=20 2.39.5 From nobody Sun Feb 8 01:52:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C093434575E; 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a="86410717" X-IronPort-AV: E=Sophos;i="6.19,261,1754982000"; d="scan'208";a="86410717" Received: from orviesa003.jf.intel.com ([10.64.159.143]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Oct 2025 10:36:46 -0700 X-CSE-ConnectionGUID: cIhGgUyjTVSF3DcB+zd31g== X-CSE-MsgGUID: KKP4sCC5Tvq+pn6ETKCdlg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,261,1754982000"; d="scan'208";a="189465498" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.244.182]) by ORVIESA003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Oct 2025 10:36:39 -0700 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Simon Richter , Lucas De Marchi , Alex Deucher , amd-gfx@lists.freedesktop.org, Bjorn Helgaas , David Airlie , dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, Jani Nikula , Joonas Lahtinen , linux-pci@vger.kernel.org, Rodrigo Vivi , Simona Vetter , Tvrtko Ursulin , =?UTF-8?q?Christian=20K=C3=B6nig?= , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , =?UTF-8?q?Micha=C5=82=20Winiarski?= , linux-kernel@vger.kernel.org Cc: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Subject: [PATCH 3/9] PCI: Change pci_dev variable from 'bridge' to 'dev' Date: Tue, 28 Oct 2025 19:35:45 +0200 Message-Id: <20251028173551.22578-4-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251028173551.22578-1-ilpo.jarvinen@linux.intel.com> References: <20251028173551.22578-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Upcoming fix to BAR resize will store also device BAR resource into the saved list. Change the pci_dev variable in the loop from 'bridge' to 'dev' as the former would be misleading with non-bridges in the list. This is in a separate change to reduce churn in the upcoming BAR resize fix. While it appears that the logic in the loop doing pci_setup_bridge() is altered as 'bridge' variable is no longer updated, a bridge should never appear more than once in the saved list so the if check can only match to the first entry. As such, the code with two distinct pci_dev variables better represent the intention of the check compared with the old code where bridge variable was reused for different purpose. Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/pci/setup-bus.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index e6984bb530ae..d58f025aeaff 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -2479,12 +2479,13 @@ int pbus_reassign_bridge_resources(struct pci_bus *= bus, struct resource *res) } =20 list_for_each_entry(dev_res, &saved, list) { + struct pci_dev *dev =3D dev_res->dev; + /* Skip the bridge we just assigned resources for */ - if (bridge =3D=3D dev_res->dev) + if (bridge =3D=3D dev) continue; =20 - bridge =3D dev_res->dev; - pci_setup_bridge(bridge->subordinate); + pci_setup_bridge(dev->subordinate); } =20 free_list(&saved); @@ -2500,19 +2501,19 @@ int pbus_reassign_bridge_resources(struct pci_bus *= bus, struct resource *res) /* Revert to the old configuration */ list_for_each_entry(dev_res, &saved, list) { struct resource *res =3D dev_res->res; + struct pci_dev *dev =3D dev_res->dev; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable Usually, resizing BARs requires releasing bridge windows in order to resize it to fit a larged BAR into the window. This is not always the case, however, FW could have made the window large enough to accomodate larger BAR as is, or the user might prefer to shrink a BAR to make more space for another Resizable BAR. Thus, replace the check that requires that at least one bridge window was released with a check that simply ensures bridge is not NULL. Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/pci/setup-bus.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index d58f025aeaff..76a4259ab076 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -2459,10 +2459,8 @@ int pbus_reassign_bridge_resources(struct pci_bus *b= us, struct resource *res) bus =3D bus->parent; } =20 - if (list_empty(&saved)) { - up_read(&pci_bus_sem); + if (!bridge) return -ENOENT; - } =20 __pci_bus_size_bridges(bridge->subordinate, &added); __pci_bridge_assign_resources(bridge, &added, &failed); --=20 2.39.5 From nobody Sun Feb 8 01:52:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4A4BF3314B8; Tue, 28 Oct 2025 17:37:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.13 ARC-Seal: i=1; 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a="74901595" X-IronPort-AV: E=Sophos;i="6.19,261,1754982000"; d="scan'208";a="74901595" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Oct 2025 10:37:13 -0700 X-CSE-ConnectionGUID: E5Edt0WoRfO3JJ720iobsA== X-CSE-MsgGUID: uxBzOToVRBaZotqYJKVqbA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,261,1754982000"; d="scan'208";a="222635764" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.244.182]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Oct 2025 10:37:05 -0700 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Simon Richter , Lucas De Marchi , Alex Deucher , amd-gfx@lists.freedesktop.org, Bjorn Helgaas , David Airlie , dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, Jani Nikula , Joonas Lahtinen , linux-pci@vger.kernel.org, Rodrigo Vivi , Simona Vetter , Tvrtko Ursulin , =?UTF-8?q?Christian=20K=C3=B6nig?= , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , =?UTF-8?q?Micha=C5=82=20Winiarski?= , linux-kernel@vger.kernel.org Cc: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Subject: [PATCH 5/9] PCI: Fix restoring BARs on BAR resize rollback path Date: Tue, 28 Oct 2025 19:35:47 +0200 Message-Id: <20251028173551.22578-6-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251028173551.22578-1-ilpo.jarvinen@linux.intel.com> References: <20251028173551.22578-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable BAR resize operation is implemented in the pci_resize_resource() and pbus_reassign_bridge_resources() functions. pci_resize_resource() can be called either from __resource_resize_store() from sysfs or directly by the driver for the Endpoint Device. The pci_resize_resource() requires that caller has released the device resources that share the bridge window with the BAR to be resized as otherwise the bridge window is pinned in place and cannot be changed. pbus_reassign_bridge_resources() implement rollback of the resources if the resize operation fails, but rollback is performed only for the bridge windows. Because releasing the device resources are done by the caller of the BAR resize interface, these functions performing the BAR resize do not have access to the device resources as they were before the resize. pbus_reassign_bridge_resources() could try to __pci_bridge_assign_resources() after rolling back the bridge windows as they were, however, it will not guarantee the resource are assigned due to differences how FW and the kernel may want to assign the resources (alignment of the start address and tail). In order to perform rollback robustly, the BAR resize interface has to be altered to also release the device resources that share the bridge window with the BAR to be resized. Also, remove restoring from the entries failed list as saved list should now contain both the bridge windows and device resources so the extra restore is duplicated work. This change (together with the driver side changes) is to counter the resource releases that had to be done to prevent resource tree corruption in the ("PCI: Release assigned resource before restoring them") change. As such, it likely restores functionality in cases where device resources were released to avoid resource tree conflicts which appeared to be "working" when such conflicts were not correctly detected by the kernel. Reported-by: Simon Richter Reported-by: Alex Benn=C3=A9e Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/pci/pci-sysfs.c | 15 +------ drivers/pci/pci.h | 3 +- drivers/pci/setup-bus.c | 95 ++++++++++++++++++++++++++++++----------- drivers/pci/setup-res.c | 20 ++------- 4 files changed, 77 insertions(+), 56 deletions(-) diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index 9d6f74bd95f8..caffd20abb9f 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c @@ -1599,18 +1599,13 @@ static ssize_t __resource_resize_store(struct devic= e *dev, int n, { struct pci_dev *pdev =3D to_pci_dev(dev); struct pci_bus *bus =3D pdev->bus; - struct resource *b_win, *res; unsigned long size; - int ret, i; + int ret; u16 cmd; =20 if (kstrtoul(buf, 0, &size) < 0) return -EINVAL; =20 - b_win =3D pbus_select_window(bus, pci_resource_n(pdev, n)); - if (!b_win) - return -EINVAL; - device_lock(dev); if (dev->driver || pci_num_vf(pdev)) { ret =3D -EBUSY; @@ -1632,14 +1627,6 @@ static ssize_t __resource_resize_store(struct device= *dev, int n, =20 pci_remove_resource_files(pdev); =20 - pci_dev_for_each_resource(pdev, res, i) { - if (i >=3D PCI_BRIDGE_RESOURCES) - break; - - if (b_win =3D=3D pbus_select_window(bus, res)) - pci_release_resource(pdev, i); - } - ret =3D pci_resize_resource(pdev, n, size); =20 pci_assign_unassigned_bus_resources(bus); diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index bf1a577e9623..d22e595b3891 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h @@ -421,8 +421,9 @@ enum pci_bar_type { struct device *pci_get_host_bridge_device(struct pci_dev *dev); void pci_put_host_bridge_device(struct device *dev); =20 +void pci_resize_resource_set_size(struct pci_dev *dev, int resno, int size= ); +int pci_do_resource_release_and_resize(struct pci_dev *dev, int resno, int= size); unsigned int pci_rescan_bus_bridge_resize(struct pci_dev *bridge); -int pbus_reassign_bridge_resources(struct pci_bus *bus, struct resource *r= es); int __must_check pci_reassign_resource(struct pci_dev *dev, int i, resourc= e_size_t add_size, resource_size_t align); =20 int pci_configure_extended_tags(struct pci_dev *dev, void *ign); diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 76a4259ab076..8da83b612c59 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -2420,18 +2420,16 @@ EXPORT_SYMBOL_GPL(pci_assign_unassigned_bridge_reso= urces); * release it when possible. If the bridge window contains assigned * resources, it cannot be released. */ -int pbus_reassign_bridge_resources(struct pci_bus *bus, struct resource *r= es) +static int pbus_reassign_bridge_resources(struct pci_bus *bus, struct reso= urce *res, + struct list_head *saved) { unsigned long type =3D res->flags; struct pci_dev_resource *dev_res; struct pci_dev *bridge; - LIST_HEAD(saved); LIST_HEAD(added); LIST_HEAD(failed); unsigned int i; - int ret; - - down_read(&pci_bus_sem); + int ret =3D 0; =20 while (!pci_is_root_bus(bus)) { bridge =3D bus->self; @@ -2443,9 +2441,9 @@ int pbus_reassign_bridge_resources(struct pci_bus *bu= s, struct resource *res) =20 /* Ignore BARs which are still in use */ if (!res->child) { - ret =3D add_to_list(&saved, bridge, res, 0, 0); + ret =3D add_to_list(saved, bridge, res, 0, 0); if (ret) - goto cleanup; + return ret; =20 pci_release_resource(bridge, i); } else { @@ -2468,34 +2466,73 @@ int pbus_reassign_bridge_resources(struct pci_bus *= bus, struct resource *res) free_list(&added); =20 if (!list_empty(&failed)) { - if (pci_required_resource_failed(&failed, type)) { + if (pci_required_resource_failed(&failed, type)) ret =3D -ENOSPC; - goto cleanup; - } - /* Only resources with unrelated types failed (again) */ free_list(&failed); + if (ret) + return ret; + + /* Only resources with unrelated types failed (again) */ } =20 - list_for_each_entry(dev_res, &saved, list) { + list_for_each_entry(dev_res, saved, list) { struct pci_dev *dev =3D dev_res->dev; =20 /* Skip the bridge we just assigned resources for */ if (bridge =3D=3D dev) continue; =20 + if (!dev->subordinate) + continue; + pci_setup_bridge(dev->subordinate); } =20 - free_list(&saved); - up_read(&pci_bus_sem); return 0; +} =20 -cleanup: - /* Restore size and flags */ - list_for_each_entry(dev_res, &failed, list) - restore_dev_resource(dev_res); - free_list(&failed); +int pci_do_resource_release_and_resize(struct pci_dev *pdev, int resno, in= t size) +{ + struct resource *res =3D pci_resource_n(pdev, resno); + struct pci_dev_resource *dev_res; + struct pci_bus *bus =3D pdev->bus; + struct resource *b_win, *r; + LIST_HEAD(saved); + unsigned int i; + int ret; + + b_win =3D pbus_select_window(bus, res); + if (!b_win) + return -EINVAL; + + pci_dev_for_each_resource(pdev, r, i) { + if (i >=3D PCI_BRIDGE_RESOURCES) + break; =20 + if (b_win !=3D pbus_select_window(bus, r)) + continue; + + ret =3D add_to_list(&saved, pdev, r, 0, 0); + if (ret) + goto restore; + pci_release_resource(pdev, i); + } + + pci_resize_resource_set_size(pdev, resno, size); + + if (!bus->self) + goto out; + + guard(rwsem_read)(&pci_bus_sem); + ret =3D pbus_reassign_bridge_resources(bus, res, &saved); + if (ret) + goto restore; + +out: + free_list(&saved); + return ret; + +restore: /* Revert to the old configuration */ list_for_each_entry(dev_res, &saved, list) { struct resource *res =3D dev_res->res; @@ -2510,13 +2547,21 @@ int pbus_reassign_bridge_resources(struct pci_bus *= bus, struct resource *res) =20 restore_dev_resource(dev_res); =20 - pci_claim_resource(dev, i); - pci_setup_bridge(dev->subordinate); - } - free_list(&saved); - up_read(&pci_bus_sem); + ret =3D pci_claim_resource(dev, i); + if (ret) + continue; =20 - return ret; + if (i < PCI_BRIDGE_RESOURCES) { + const char *res_name =3D pci_resource_name(dev, i); + + pci_update_resource(dev, i); + pci_info(dev, "%s %pR: old value restored\n", + res_name, res); + } + if (dev->subordinate) + pci_setup_bridge(dev->subordinate); + } + goto out; } =20 void pci_assign_unassigned_bus_resources(struct pci_bus *bus) diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c index 3d0b0b3f60c4..93c70f8a8552 100644 --- a/drivers/pci/setup-res.c +++ b/drivers/pci/setup-res.c @@ -444,8 +444,7 @@ static bool pci_resize_is_memory_decoding_enabled(struc= t pci_dev *dev, return cmd & PCI_COMMAND_MEMORY; } =20 -static void pci_resize_resource_set_size(struct pci_dev *dev, int resno, - int size) +void pci_resize_resource_set_size(struct pci_dev *dev, int resno, int size) { resource_size_t res_size =3D pci_rebar_size_to_bytes(size); struct resource *res =3D pci_resource_n(dev, resno); @@ -458,7 +457,6 @@ static void pci_resize_resource_set_size(struct pci_dev= *dev, int resno, =20 int pci_resize_resource(struct pci_dev *dev, int resno, int size) { - struct resource *res =3D pci_resource_n(dev, resno); struct pci_host_bridge *host; int old, ret; u32 sizes; @@ -468,10 +466,6 @@ int pci_resize_resource(struct pci_dev *dev, int resno= , int size) if (host->preserve_config) return -ENOTSUPP; =20 - /* Make sure the resource isn't assigned before resizing it. */ - if (!(res->flags & IORESOURCE_UNSET)) - return -EBUSY; - if (pci_resize_is_memory_decoding_enabled(dev, resno)) return -EBUSY; =20 @@ -490,19 +484,13 @@ int pci_resize_resource(struct pci_dev *dev, int resn= o, int size) if (ret) return ret; =20 - pci_resize_resource_set_size(dev, resno, size); - - /* Check if the new config works by trying to assign everything. */ - if (dev->bus->self) { - ret =3D pbus_reassign_bridge_resources(dev->bus, res); - if (ret) - goto error_resize; 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charset="utf-8" Content-Transfer-Encoding: quoted-printable PCI core handles releasing device's resources and their rollback in case of failure of a BAR resizing operation. Releasing resource prior to calling pci_resize_resource() prevents PCI core from restoring the BARs as they were. Remove driver-side release of BARs from the xe driver. Signed-off-by: Ilpo J=C3=A4rvinen Cc: Lucas De Marchi Acked-by: Lucas De Marchi --- drivers/gpu/drm/xe/xe_vram.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_vram.c b/drivers/gpu/drm/xe/xe_vram.c index b44ebf50fedb..929412f0d131 100644 --- a/drivers/gpu/drm/xe/xe_vram.c +++ b/drivers/gpu/drm/xe/xe_vram.c @@ -33,9 +33,6 @@ _resize_bar(struct xe_device *xe, int resno, resource_siz= e_t size) int bar_size =3D pci_rebar_bytes_to_size(size); int ret; =20 - if (pci_resource_len(pdev, resno)) - pci_release_resource(pdev, resno); - ret =3D pci_resize_resource(pdev, resno, bar_size); if (ret) { drm_info(&xe->drm, "Failed to resize BAR%d to %dM (%pe). Consider enabli= ng 'Resizable BAR' support in your BIOS\n", --=20 2.39.5 From nobody Sun Feb 8 01:52:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.20]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 44914337107; Tue, 28 Oct 2025 17:37:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.20 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761673059; cv=none; b=gSBYPxxdc1S2EOpIGCq14vEFz/LL8aA6zwiwDa59TnwKhFt0ZDPFdPcbiHGYTZpxn5+o2yf/MhpJe4pPWRZdk9J98I08D87l/vLzbucZik4YI/lSdtqe2aep64wCookpZ6DnCxJwrDrnsH2GZ4aFqVEcHO0VxpevPJznXo3F748= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761673059; c=relaxed/simple; bh=p0wHURDhEqxjdHQHtDybrhCJVt2NJrZ5/+N6qg46xHM=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=XCnQJ/YiICACGnhaYFB66IAOtVAceq3QYmA92JVK78SDrbV4+qCCQAqJa6H8CIHSOKtyrQ6aPyfZcLdpBS8MRn2HhCA1BdmvCFyWoTeOV2EsARTaTKbXzr5nroOcpBch9U73sYCqgEYR5/EGyhHpUt69nn8PplOlPsLTl3Mo1vY= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com; spf=pass smtp.mailfrom=linux.intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=jEDnLZpM; arc=none smtp.client-ip=198.175.65.20 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="jEDnLZpM" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761673059; x=1793209059; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=p0wHURDhEqxjdHQHtDybrhCJVt2NJrZ5/+N6qg46xHM=; b=jEDnLZpMAA9V7AKokdNYQuOS/qnD9RHMHjpKuiXtpkOJ50f6tuYNyr7w hsMk1tpiQsQogi9jJQ14k49AYtsdGywB5W+06lCVqIcZoV7M1qg8JuvRy WCKIAcHzxTFG91wS/5zcSjbc4iCqfK4Vc0/QrSn3DKrdE2NozTiY08oZ7 RH3ZbBxK1y953HKeuGt5vfrbMPR1QwxzeW8JuMGcDEAMUSIn6wuo10+gV 9kw+ptAc5LgPd/PvUdPKZ05+ggKUK8tCrq3Vmf/+sD3mXvvnEnWzqivWq WRC73TKwxRdRj2ut8ycOO0zMm1KVN5W1kK1m0y3Kqu62EvER6YMMYOtya w==; X-CSE-ConnectionGUID: aBK9zKW0SIePgVoeQhuS6g== X-CSE-MsgGUID: KwAG66ygS3SCKNDFZilzVg== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="63485045" X-IronPort-AV: E=Sophos;i="6.19,261,1754982000"; d="scan'208";a="63485045" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by orvoesa112.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Oct 2025 10:37:38 -0700 X-CSE-ConnectionGUID: aXywd5SLRtOwizDbGtwfqQ== X-CSE-MsgGUID: eG48uwFjQWGOxO2mxr2acw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,261,1754982000"; d="scan'208";a="185746898" Received: from ijarvine-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.244.182]) by fmviesa008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 28 Oct 2025 10:37:30 -0700 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Simon Richter , Lucas De Marchi , Alex Deucher , amd-gfx@lists.freedesktop.org, Bjorn Helgaas , David Airlie , dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, Jani Nikula , Joonas Lahtinen , linux-pci@vger.kernel.org, Rodrigo Vivi , Simona Vetter , Tvrtko Ursulin , =?UTF-8?q?Christian=20K=C3=B6nig?= , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , =?UTF-8?q?Micha=C5=82=20Winiarski?= , linux-kernel@vger.kernel.org Cc: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Subject: [PATCH 7/9] drm/i915: Remove driver side BAR release before resize Date: Tue, 28 Oct 2025 19:35:49 +0200 Message-Id: <20251028173551.22578-8-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251028173551.22578-1-ilpo.jarvinen@linux.intel.com> References: <20251028173551.22578-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable PCI core handles releasing device's resources and their rollback in case of failure of a BAR resizing operation. Releasing resource prior to calling pci_resize_resource() prevents PCI core from restoring the BARs as they were. Remove driver-side release of BARs from the i915 driver. Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/gpu/drm/i915/gt/intel_region_lmem.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_region_lmem.c b/drivers/gpu/drm/= i915/gt/intel_region_lmem.c index 51bb27e10a4f..ca3de61451a3 100644 --- a/drivers/gpu/drm/i915/gt/intel_region_lmem.c +++ b/drivers/gpu/drm/i915/gt/intel_region_lmem.c @@ -18,16 +18,6 @@ #include "gt/intel_gt_regs.h" =20 #ifdef CONFIG_64BIT -static void _release_bars(struct pci_dev *pdev) -{ - int resno; - - for (resno =3D PCI_STD_RESOURCES; resno < PCI_STD_RESOURCE_END; resno++) { - if (pci_resource_len(pdev, resno)) - pci_release_resource(pdev, resno); - } -} - static void _resize_bar(struct drm_i915_private *i915, int resno, resource_size_t size) { @@ -35,8 +25,6 @@ _resize_bar(struct drm_i915_private *i915, int resno, res= ource_size_t size) int bar_size =3D pci_rebar_bytes_to_size(size); int ret; =20 - _release_bars(pdev); - ret =3D pci_resize_resource(pdev, resno, bar_size); if (ret) { drm_info(&i915->drm, "Failed to resize BAR%d to %dM (%pe)\n", --=20 2.39.5 From nobody Sun Feb 8 01:52:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 348C934DB41; Tue, 28 Oct 2025 17:38:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=192.198.163.19 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761673082; cv=none; b=HJmcotgaMRmDZTqM0DCzON4IKfwd+2cP7MvDT+C+BKbLS+qdLRK0Lq7Uv7w1N9ILQXxOPANcC8LTcQC0owR6BpWSYCHzIKoOBXXCNslPo2hDgNSVIeWHSBDkIIDfLG3wy232dz+ya20UhkIMXwgxnTgIWBj4uoYDiwAksHrDpcc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761673082; c=relaxed/simple; bh=8HzYU02dn6gqkOKj2vIFpqRrMZ6pFIdvNMAeG0Ynh8Y=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; 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28 Oct 2025 10:37:43 -0700 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Simon Richter , Lucas De Marchi , Alex Deucher , amd-gfx@lists.freedesktop.org, Bjorn Helgaas , David Airlie , dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, Jani Nikula , Joonas Lahtinen , linux-pci@vger.kernel.org, Rodrigo Vivi , Simona Vetter , Tvrtko Ursulin , =?UTF-8?q?Christian=20K=C3=B6nig?= , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , =?UTF-8?q?Micha=C5=82=20Winiarski?= , linux-kernel@vger.kernel.org Cc: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Subject: [PATCH 8/9] drm/amdgpu: Remove driver side BAR release before resize Date: Tue, 28 Oct 2025 19:35:50 +0200 Message-Id: <20251028173551.22578-9-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251028173551.22578-1-ilpo.jarvinen@linux.intel.com> References: <20251028173551.22578-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable PCI core handles releasing device's resources and their rollback in case of failure of a BAR resizing operation. Releasing resource prior to calling pci_resize_resource() prevents PCI core from restoring the BARs as they were. Remove driver-side release of BARs from the amdgpu driver. Also remove the driver initiated assignment as pci_resize_resource() should try to assign as much as possible. If the driver side call manages to get more required resources assigned in some scenario, such a problem should be fixed inside pci_resize_resource() instead. Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/a= md/amdgpu/amdgpu_device.c index 7a899fb4de29..65474d365229 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -1729,12 +1729,8 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device= *adev) pci_write_config_word(adev->pdev, PCI_COMMAND, cmd & ~PCI_COMMAND_MEMORY); =20 - /* Free the VRAM and doorbell BAR, we most likely need to move both. */ + /* Tear down doorbell as resizing will release BARs */ amdgpu_doorbell_fini(adev); - if (adev->asic_type >=3D CHIP_BONAIRE) - pci_release_resource(adev->pdev, 2); - - pci_release_resource(adev->pdev, 0); =20 r =3D pci_resize_resource(adev->pdev, 0, rbar_size); if (r =3D=3D -ENOSPC) @@ -1743,8 +1739,6 @@ int amdgpu_device_resize_fb_bar(struct amdgpu_device = *adev) else if (r && r !=3D -ENOTSUPP) dev_err(adev->dev, "Problem resizing BAR0 (%d).", r); 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28 Oct 2025 10:37:56 -0700 From: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= To: =?UTF-8?q?Alex=20Benn=C3=A9e?= , Simon Richter , Lucas De Marchi , Alex Deucher , amd-gfx@lists.freedesktop.org, Bjorn Helgaas , David Airlie , dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, Jani Nikula , Joonas Lahtinen , linux-pci@vger.kernel.org, Rodrigo Vivi , Simona Vetter , Tvrtko Ursulin , =?UTF-8?q?Christian=20K=C3=B6nig?= , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , =?UTF-8?q?Micha=C5=82=20Winiarski?= , linux-kernel@vger.kernel.org Cc: =?UTF-8?q?Ilpo=20J=C3=A4rvinen?= Subject: [PATCH 9/9] PCI: Prevent restoring assigned resources Date: Tue, 28 Oct 2025 19:35:51 +0200 Message-Id: <20251028173551.22578-10-ilpo.jarvinen@linux.intel.com> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251028173551.22578-1-ilpo.jarvinen@linux.intel.com> References: <20251028173551.22578-1-ilpo.jarvinen@linux.intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable restore_dev_resource() copies saved addresses and flags from the struct pci_dev_resource back to the struct resource, typically, during rollback from a failure or in preparation for a retry attempt. If the resource is within resource tree, the resource must not be modified as the resource tree could be corrupted. Thus, it's a bug to call restore_dev_resource() for assigned resources (which did happen due to logic flaws in the BAR resize rollback). Add WARN_ON_ONCE() into restore_dev_resource() to detect such bugs easily and return without altering the resource to prevent corruption. Signed-off-by: Ilpo J=C3=A4rvinen --- drivers/pci/setup-bus.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 8da83b612c59..28d6ae822c0b 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -15,6 +15,7 @@ */ =20 #include +#include #include #include #include @@ -135,6 +136,9 @@ static void restore_dev_resource(struct pci_dev_resourc= e *dev_res) { struct resource *res =3D dev_res->res; =20 + if (WARN_ON_ONCE(res->parent)) + return; + res->start =3D dev_res->start; res->end =3D dev_res->end; res->flags =3D dev_res->flags; --=20 2.39.5