From nobody Mon Feb 9 17:14:31 2026 Received: from ahti.lucaweiss.eu (ahti.lucaweiss.eu [128.199.32.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D696283C9D; Tue, 28 Oct 2025 16:47:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=128.199.32.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761670075; cv=none; b=CrL6FwRLhkc30BdfkpnO/gSI8drDdQDEUZVoDi/7GkGOuvYoZakhXjBRjJyIaJ6uoN9zu5V8zqEOVccpTrzto1w8Z19165kZegJhf3IP9BEGF8TIzCLre8Dbb15bYTxJfgheIkdlvB7uDxbUNyUviJJ6CIge4wdmVHJWRQGf3TU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761670075; c=relaxed/simple; bh=HnbUuYbJUTqAHZTrrDO/uWTlecqDBisfi+I6pu+bMuE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=lvDCL27q+hKebDoAiBYsGs8KFfWhcjVFSv2JA+xJ9pAo9GErZWRQZjRsWSsrJa3HK3g9LfuwJo4pyLvigLGQBXVgdbPB+UAM4Y9T1/OFKISRCSd+5XUbkrjBsorJbQ/n6wdXonaAXivnymvW9BiX3EmUwBhYcUcPrsCTbxdCoyQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=lucaweiss.eu; spf=pass smtp.mailfrom=lucaweiss.eu; dkim=pass (1024-bit key) header.d=lucaweiss.eu header.i=@lucaweiss.eu header.b=4wHTYlyk; arc=none smtp.client-ip=128.199.32.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=lucaweiss.eu Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lucaweiss.eu Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lucaweiss.eu header.i=@lucaweiss.eu header.b="4wHTYlyk" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=lucaweiss.eu; s=s1; t=1761669687; bh=HnbUuYbJUTqAHZTrrDO/uWTlecqDBisfi+I6pu+bMuE=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=4wHTYlyk0Z/J3lS6O+MorUVMHdvXmHPOES0Nkr9ygP057u5C73tPVD0Pp1ppJ8p6+ coqU5wjvaDDOx9WSwrSHaNvG2XxAzp4jTyZS1wZCeWIAe7ecyWa1I8rWTgL/XKmBCu dBaU4E6sQVHTSSoIzKQryVNMrcrKwCx1j/NRoDfs= From: Luca Weiss Date: Tue, 28 Oct 2025 17:40:46 +0100 Subject: [PATCH v2 1/7] dt-bindings: i2c: qcom-cci: Document msm8953 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251028-msm8953-cci-v2-1-b5f9f7135326@lucaweiss.eu> References: <20251028-msm8953-cci-v2-0-b5f9f7135326@lucaweiss.eu> In-Reply-To: <20251028-msm8953-cci-v2-0-b5f9f7135326@lucaweiss.eu> To: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=910; i=luca@lucaweiss.eu; h=from:subject:message-id; bh=HnbUuYbJUTqAHZTrrDO/uWTlecqDBisfi+I6pu+bMuE=; b=owEBbQKS/ZANAwAKAXLYQ7idTddWAcsmYgBpAPIv4THAMamxS+KKrjbKMM9qprCrK3otd4Eoa zWbIsIB6AKJAjMEAAEKAB0WIQQ5utIvCCzakboVj/py2EO4nU3XVgUCaQDyLwAKCRBy2EO4nU3X VuHuD/9y9BkUleCzzohbV8PKin3K/OvkqiK0EVO/p8XeS++TBEfoUbpICMdOqWWDj6oRFPpto33 XGdZk69FNNB4K9+0AB/P9FttjFZi+XFgs/i8H7rNsABCdibkeUiuLdwsk1Pt/3vgsCA15qmEYGA JolRXhatbhgwh0LEP3vihftmyXnaQhNEwh4oLses3tuca4SHdARrCa3WVBfOuhsazQ+VDg2b2mG ThfHmbnTHM/gBSi3cSh2rpWl2wbTeidEn4TD0sgjhvOIw/bn80EURo8++HoNcraU1vjsve0auAf tdpIA/JE/yCSQKBFEmsOGX7S6faDYDDBPXcuJ/bKbvAIhAENMlSCU677YxyRZfXGztptOgloVaR ezrQHiKabPqzRPNVXbRxdCg7pHRO3RiPwgh/JbKGcFDZo+NGYrY7Sqtj/wPL1TBTj4HKccP+UBd MCKzpv29RDcKZqvYdidRkXbGqdXe9ksE9Jira2QFbUhVABPXafLRDgFiIjdcBn4MmeVZ7furmp7 uPhvBbNoIqe8FVtHvcfpJ1e9ga2DYffpnREjLuCH2ZAktEhcwfQIQXT1wtg0VzhvcD+KbLUFTG4 kiisC4uMIY7RxwIL3cGup1/W9r9jqbSI3vUl0FFUTIRJbjCg0Vg2xAfi+5RLGNFHndbZCB93Zov WabE/N8yMyByBSg== X-Developer-Key: i=luca@lucaweiss.eu; a=openpgp; fpr=BD04DA24C971B8D587B2B8D7FAF69CF6CD2D02CD Add the msm8953 CCI device string compatible. Signed-off-by: Luca Weiss Reviewed-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml b/Docu= mentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml index 9bc99d736343..ef8f5fe3a8e1 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-cci.yaml @@ -15,6 +15,7 @@ properties: oneOf: - enum: - qcom,msm8226-cci + - qcom,msm8953-cci - qcom,msm8974-cci - qcom,msm8996-cci =20 @@ -146,6 +147,7 @@ allOf: - contains: enum: - qcom,msm8916-cci + - qcom,msm8953-cci =20 - const: qcom,msm8996-cci then: --=20 2.51.2 From nobody Mon Feb 9 17:14:31 2026 Received: from ahti.lucaweiss.eu (ahti.lucaweiss.eu [128.199.32.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 620F4307ADA; Tue, 28 Oct 2025 16:47:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=128.199.32.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761670075; cv=none; b=jn3Prz9QYyl1q/pphsqCipQWBh2HRxaxHTZO8eNjlhCaOyPMqGTlsRoP/fj0+uKZT72Dx+yA+HznEGrG1jt6yR2ubgUnL8G1G0pNlfIADHFmnqxOFcKAMFrqmQS2gNS4y/CE4E6n3Ux3C3KMZLncP5ZynVh6WwpMVCD6/v2QGME= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761670075; c=relaxed/simple; bh=55EWec7cjRgTapTeWKtewYWvmLGUXFyRyTixXR7yoZI=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=fhDBAMEeRFbIqerC2g6wjD4PZlX4NtpH211VmnX+SpwGYQSwmgkrDXYy8fKpVrYLEEXADOVi7+iwo3IdDs7WZuE1YMh2f9Kp0BAMivae0OIWfWGrwJDSUER0xRFJNRRD3RzUzn7y/3uzsqDaCy8CW4c8H362o9YogMxWgrYo1dw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=lucaweiss.eu; spf=pass smtp.mailfrom=lucaweiss.eu; dkim=pass (1024-bit key) header.d=lucaweiss.eu header.i=@lucaweiss.eu header.b=QXQMhl+4; arc=none smtp.client-ip=128.199.32.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=lucaweiss.eu Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lucaweiss.eu Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lucaweiss.eu header.i=@lucaweiss.eu header.b="QXQMhl+4" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=lucaweiss.eu; s=s1; t=1761669687; bh=55EWec7cjRgTapTeWKtewYWvmLGUXFyRyTixXR7yoZI=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=QXQMhl+47LswF0Pvdvp4DPfXrCiNx2TjZjBS+HY+XE72UcIJGpyhKEE2JmXSUDCYy YBRKBwNmWifaZDZiK5gF+iT0OxJ2kVBsuN/TK//suiDVVGwLp7iIJ3NjMaL0Er20Xj KUqKd2UgITXmNf5QDRHpu21v7TjIbTfAo2X3GFn4= From: Luca Weiss Date: Tue, 28 Oct 2025 17:40:47 +0100 Subject: [PATCH v2 2/7] i2c: qcom-cci: Add msm8953 compatible Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251028-msm8953-cci-v2-2-b5f9f7135326@lucaweiss.eu> References: <20251028-msm8953-cci-v2-0-b5f9f7135326@lucaweiss.eu> In-Reply-To: <20251028-msm8953-cci-v2-0-b5f9f7135326@lucaweiss.eu> To: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss , Wolfram Sang X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=1885; i=luca@lucaweiss.eu; h=from:subject:message-id; bh=55EWec7cjRgTapTeWKtewYWvmLGUXFyRyTixXR7yoZI=; b=owEBbQKS/ZANAwAKAXLYQ7idTddWAcsmYgBpAPIwS/fM3LkjFEaNaRvpGv6yObdO/fX0bpFmH RDxUG2Y1qmJAjMEAAEKAB0WIQQ5utIvCCzakboVj/py2EO4nU3XVgUCaQDyMAAKCRBy2EO4nU3X VlTYD/4yQlfHJrF0Ztr2aWgY3FTHs5NmBTUbH2O8CxBE+Zh10t5sB/NIzaFBu8i0CMCf07MiqOw 64rVU4wW81mNay8krTq0WoLAAa0itmgJpkyrFoIGhlfMRriMzIC+uqsrieV6xAS/B1H0Z9R3ixw zNzOiHo09UDRo3GqNLhQgl/r9HlTpjx7jlXQHtrF0Hh82O3BfMAt775/fdhLXa/9dxblF4Y7Jgj pKdh3UO9rEYR7ySl8n64xqJY31Bm4puo2dJGnkRPULFXe6V9gC5OTeyr53QuPkRxlXPW34OqM2J 871Jn/cR0lODKouok2mjGLyoA8RfPvSSCn1uTiC/PQdso8WiJZhDiVc/UyPYqfU+0mi1jGW464p xhspdM08a+Ur7sjLBd86rt6CtcHG4r5+S+DAuuujR9EmMNMZ0lfJmKoRm1n57OBpIK6pfspIbLD oVUmuM4SfA47Cw86iK/mQuWUso8sMRhivRiQxhbNScODXsD7bd9+l16kCfcLZU06SWsxE/2O1yL M2AjMnYBEWB9gKra/cxJmiOZ2OAsj0vSMf1i1SHReObdcJ2v3eC2IRQrHkMLl3UURp+ncKYRkiZ /Uls+hVr0WGZ/s6e0Y5Q2yrpqlMCIoEHhYM9EVok1nOHNHs7OowoxZgo9Z6tI3v8i6rAX0o15IL uSdMX+OkG1yMIPQ== X-Developer-Key: i=luca@lucaweiss.eu; a=openpgp; fpr=BD04DA24C971B8D587B2B8D7FAF69CF6CD2D02CD Add a config for the v1.2.5 CCI found on msm8953 which has different values in .params compared to others already supported in the driver. Reviewed-by: Loic Poulain Acked-by: Wolfram Sang Signed-off-by: Luca Weiss Acked-by I assume he's not going to pick it up? Reviewed-by: Dmitry Baryshkov --- drivers/i2c/busses/i2c-qcom-cci.c | 46 +++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 46 insertions(+) diff --git a/drivers/i2c/busses/i2c-qcom-cci.c b/drivers/i2c/busses/i2c-qco= m-cci.c index e631d79baf14..884055df1560 100644 --- a/drivers/i2c/busses/i2c-qcom-cci.c +++ b/drivers/i2c/busses/i2c-qcom-cci.c @@ -783,8 +783,54 @@ static const struct cci_data cci_v2_data =3D { }, }; =20 +static const struct cci_data cci_msm8953_data =3D { + .num_masters =3D 2, + .queue_size =3D { 64, 16 }, + .quirks =3D { + .max_write_len =3D 11, + .max_read_len =3D 12, + }, + .params[I2C_MODE_STANDARD] =3D { + .thigh =3D 78, + .tlow =3D 114, + .tsu_sto =3D 28, + .tsu_sta =3D 28, + .thd_dat =3D 10, + .thd_sta =3D 77, + .tbuf =3D 118, + .scl_stretch_en =3D 0, + .trdhld =3D 6, + .tsp =3D 1 + }, + .params[I2C_MODE_FAST] =3D { + .thigh =3D 20, + .tlow =3D 28, + .tsu_sto =3D 21, + .tsu_sta =3D 21, + .thd_dat =3D 13, + .thd_sta =3D 18, + .tbuf =3D 32, + .scl_stretch_en =3D 0, + .trdhld =3D 6, + .tsp =3D 3 + }, + .params[I2C_MODE_FAST_PLUS] =3D { + .thigh =3D 16, + .tlow =3D 22, + .tsu_sto =3D 17, + .tsu_sta =3D 18, + .thd_dat =3D 16, + .thd_sta =3D 15, + .tbuf =3D 19, + .scl_stretch_en =3D 1, + .trdhld =3D 3, + .tsp =3D 3 + }, +}; + static const struct of_device_id cci_dt_match[] =3D { { .compatible =3D "qcom,msm8226-cci", .data =3D &cci_v1_data}, + { .compatible =3D "qcom,msm8953-cci", .data =3D &cci_msm8953_data}, { .compatible =3D "qcom,msm8974-cci", .data =3D &cci_v1_5_data}, { .compatible =3D "qcom,msm8996-cci", .data =3D &cci_v2_data}, =20 --=20 2.51.2 From nobody Mon Feb 9 17:14:31 2026 Received: from ahti.lucaweiss.eu (ahti.lucaweiss.eu [128.199.32.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D701293C42; Tue, 28 Oct 2025 16:47:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=128.199.32.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761670075; cv=none; b=PIjPvGcemoydVnVxn/rvyQ7ezsgR17RGTPIi9yq3zU8hUO2ltslEc0dZ8Yl3XqFAl1KbznkeoClUB6cfxtNTrnYqLVNJZ9h+gv/QOWsO2PsSCl09fEg5yBdTzylYaMmlNs3GzSQ7x4SYuFGEP47tRTSGc6a4DhGMlAzochuLfWU= ARC-Message-Signature: i=1; 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a=rsa-sha256; c=relaxed/simple; d=lucaweiss.eu; s=s1; t=1761669688; bh=nS7gTTRWepKP0GOGqBnqwKJ8cql464B2EpaOiSj6rEo=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=QvajOrTlzOwJwJy3x01o6A4OE1Z2R2Qnj+om1VUKn0Rn1KXfzcDsuMqle4TtTPA0p 2OHHGfaLJWF4CQLPOKNN8CMVXkDm9myKp1f5te+qkqAkEwViXDeA27WgkfXIyOdUl7 Axteql62adWMIjuc7//4+1B5qnk5j0RxlQAgsS8A= From: Luca Weiss Date: Tue, 28 Oct 2025 17:40:48 +0100 Subject: [PATCH v2 3/7] dt-bindings: eeprom: at24: Add compatible for Belling BL24S64 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251028-msm8953-cci-v2-3-b5f9f7135326@lucaweiss.eu> References: <20251028-msm8953-cci-v2-0-b5f9f7135326@lucaweiss.eu> In-Reply-To: <20251028-msm8953-cci-v2-0-b5f9f7135326@lucaweiss.eu> To: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; 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a=openpgp; fpr=BD04DA24C971B8D587B2B8D7FAF69CF6CD2D02CD Add the compatible for an 64Kb EEPROM from Belling. Signed-off-by: Luca Weiss Acked-by: Krzysztof Kozlowski --- Documentation/devicetree/bindings/eeprom/at24.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documenta= tion/devicetree/bindings/eeprom/at24.yaml index 50af7ccf6e21..c21282634780 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.yaml +++ b/Documentation/devicetree/bindings/eeprom/at24.yaml @@ -131,6 +131,7 @@ properties: - const: atmel,24c32 - items: - enum: + - belling,bl24s64 - onnn,n24s64b - puya,p24c64f - const: atmel,24c64 --=20 2.51.2 From nobody Mon Feb 9 17:14:31 2026 Received: from ahti.lucaweiss.eu (ahti.lucaweiss.eu [128.199.32.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5D62125BEF1; Tue, 28 Oct 2025 16:47:53 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=128.199.32.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761670075; cv=none; b=H6ejXqmHrxk4X9Pwcv6bLLgX1hRzz3cJS7HKRiJxgmHtsBNH9ESNTRNsz5qdOzroSKulxnzkVvweQbsfJ/x3tkCgUUo6/PopOxK7ekss1lsnsN1fWtkLAsBpZvw0iqErSBG5JvqW4LtnIS77V78zFnaOQXbXvYLiQblNnPNuuF4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761670075; c=relaxed/simple; bh=V+IfWvce/o4FPRxrzB8Oy/wcqBjaSEpXgKLk5iNy6oQ=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=ndGrN57aomKKUPoolauICTs4X0WWXfvFq+M5zRhZTtTAAveHbODWh1JCDS6IZp8g1AUbGStL0z5RjamdxKEjkfezPklgxm4NmIMhpdGc2HhJAWNj3YSgd986RM9voJd0Kogp1zU8EKgbmr+2PpvbV1vgBlMmQA6BSCigYtW0EOw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=lucaweiss.eu; spf=pass smtp.mailfrom=lucaweiss.eu; dkim=pass (1024-bit key) header.d=lucaweiss.eu header.i=@lucaweiss.eu header.b=Odrd5Fk1; arc=none smtp.client-ip=128.199.32.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=lucaweiss.eu Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lucaweiss.eu Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lucaweiss.eu header.i=@lucaweiss.eu header.b="Odrd5Fk1" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=lucaweiss.eu; s=s1; t=1761669689; bh=V+IfWvce/o4FPRxrzB8Oy/wcqBjaSEpXgKLk5iNy6oQ=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=Odrd5Fk1lXjI3mCer/rnLCeFs3sC7VDqQiKlcUCpfpm+JF+Yql/9Mq+nM5cE64K6d wCAPv2fc3z+qRz5KwxgiRw/1BycjvL+nVfunLCS0uRSMDoXENAh61aMSFEFEne/umc +eoT10D3kyfmIroeSmj7G7PYE9zGCZF5+Jbl4S6w= From: Luca Weiss Date: Tue, 28 Oct 2025 17:40:49 +0100 Subject: [PATCH v2 4/7] arm64: dts: qcom: msm8953: Re-sort tlmm pinctrl states Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251028-msm8953-cci-v2-4-b5f9f7135326@lucaweiss.eu> References: <20251028-msm8953-cci-v2-0-b5f9f7135326@lucaweiss.eu> In-Reply-To: <20251028-msm8953-cci-v2-0-b5f9f7135326@lucaweiss.eu> To: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss , Konrad Dybcio X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=openpgp-sha256; l=14474; i=luca@lucaweiss.eu; h=from:subject:message-id; bh=V+IfWvce/o4FPRxrzB8Oy/wcqBjaSEpXgKLk5iNy6oQ=; b=owEBbQKS/ZANAwAKAXLYQ7idTddWAcsmYgBpAPIxUvUJqgcZcpsyWCFVfEQsdbVq5IyQVNAbR unJcTsDUKqJAjMEAAEKAB0WIQQ5utIvCCzakboVj/py2EO4nU3XVgUCaQDyMQAKCRBy2EO4nU3X VvJUEACd5K6T/RO1ktP4DuEbLJikoOmgI049DsHzFE/m4Ev3m50sWD3qqr8T0fYnJzovhmZ9vZY GEnpnwKawus3HeJmocRcSoJPXx4KWR2Ik3YQ3ZCaYgXu/SJZyWhGGYPOlLRx/5Oio55WOdP+R+C o7qAiZvzZLsfuI+9D1zLVqJG95BrDAyTmbzOZYqWUUurpu6MTxNk2WHqfkba6lrbkolVk7ikDAs wo6CXL5L0SvKRJyhEseihYS8/qQ4+YfBV+Hp2aVtlxIbaaQnBMizLWm9UAJrmtZWlQ2p1Njb3AE 29n3SPH09a9eOlVi60go5nawCh2lWOvJHrGx9I5x640m5ZZT8/gcBAnGowswN6My6muf2D2AovH y/EkFQxxjsPv4s/TrBns0bzI1L61UNTpzPYbVgCW46z9xUOgdb8mGE69k/V9RSXg8G6hl4O+6kX hmNerqBtt6kL6uktBMbLiHMUnMMWajQA9TFTE8G05X/6D06IrQpov40FUOD4Ty37qr2YY/gSkWG k0oI/fPCeqvgtC3xI6+VshZA6YTTN8LFAwd/SlQwHMZbA4RapoWvcqjZMhQ+R13SfZlKG55JBU3 VUIbtI0Ba+zQWOkvNbKopSNUbrrx7c2thYVIJH64oEj7S+KE7XCLLt7a+LeJ2k85RW51FplSJU4 WM0Ra5aKnVt6YVA== X-Developer-Key: i=luca@lucaweiss.eu; a=openpgp; fpr=BD04DA24C971B8D587B2B8D7FAF69CF6CD2D02CD Follow the Devicetree Sources Coding Style and sort the pinctrl nodes by the pins property. This makes it simpler to add new pinctrl states in the future. Reviewed-by: Konrad Dybcio Signed-off-by: Luca Weiss --- arch/arm64/boot/dts/qcom/msm8953.dtsi | 611 +++++++++++++++++-------------= ---- 1 file changed, 305 insertions(+), 306 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qc= om/msm8953.dtsi index 76317c578349..7884a3ed8aef 100644 --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi @@ -545,6 +545,20 @@ tlmm: pinctrl@1000000 { interrupt-controller; #interrupt-cells =3D <2>; =20 + i2c_1_default: i2c-1-default-state { + pins =3D "gpio2", "gpio3"; + function =3D "blsp_i2c1"; + drive-strength =3D <2>; + bias-disable; + }; + + i2c_1_sleep: i2c-1-sleep-state { + pins =3D "gpio2", "gpio3"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + uart_console_active: uart-console-active-state { pins =3D "gpio4", "gpio5"; function =3D "blsp_uart2"; @@ -559,6 +573,297 @@ uart_console_sleep: uart-console-sleep-state { bias-pull-down; }; =20 + i2c_2_default: i2c-2-default-state { + pins =3D "gpio6", "gpio7"; + function =3D "blsp_i2c2"; + drive-strength =3D <2>; + bias-disable; + }; + + i2c_2_sleep: i2c-2-sleep-state { + pins =3D "gpio6", "gpio7"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + spi_3_default: spi-3-default-state { + cs-pins { + pins =3D "gpio10"; + function =3D "blsp_spi3"; + drive-strength =3D <2>; + bias-disable; + }; + + spi-pins { + pins =3D "gpio8", "gpio9", "gpio11"; + function =3D "blsp_spi3"; + drive-strength =3D <12>; + bias-disable; + }; + }; + + spi_3_sleep: spi-3-sleep-state { + cs-pins { + pins =3D "gpio10"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + spi-pins { + pins =3D "gpio8", "gpio9", "gpio11"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + }; + + i2c_3_default: i2c-3-default-state { + pins =3D "gpio10", "gpio11"; + function =3D "blsp_i2c3"; + drive-strength =3D <2>; + bias-disable; + }; + + i2c_3_sleep: i2c-3-sleep-state { + pins =3D "gpio10", "gpio11"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + i2c_4_default: i2c-4-default-state { + pins =3D "gpio14", "gpio15"; + function =3D "blsp_i2c4"; + drive-strength =3D <2>; + bias-disable; + }; + + i2c_4_sleep: i2c-4-sleep-state { + pins =3D "gpio14", "gpio15"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + spi_5_default: spi-5-default-state { + cs-pins { + pins =3D "gpio18"; + function =3D "blsp_spi5"; + drive-strength =3D <2>; + bias-disable; + }; + + spi-pins { + pins =3D "gpio16", "gpio17", "gpio19"; + function =3D "blsp_spi5"; + drive-strength =3D <12>; + bias-disable; + }; + }; + + spi_5_sleep: spi-5-sleep-state { + cs-pins { + pins =3D "gpio18"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + spi-pins { + pins =3D "gpio16", "gpio17", "gpio19"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + }; + + uart_5_default: uart-5-default-state { + pins =3D "gpio16", "gpio17", "gpio18", "gpio19"; + function =3D "blsp_uart5"; + drive-strength =3D <16>; + bias-disable; + }; + + uart_5_sleep: uart-5-sleep-state { + pins =3D "gpio16", "gpio17", "gpio18", "gpio19"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + i2c_5_default: i2c-5-default-state { + pins =3D "gpio18", "gpio19"; + function =3D "blsp_i2c5"; + drive-strength =3D <2>; + bias-disable; + }; + + i2c_5_sleep: i2c-5-sleep-state { + pins =3D "gpio18", "gpio19"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + spi_6_default: spi-6-default-state { + cs-pins { + pins =3D "gpio22"; + function =3D "blsp_spi6"; + drive-strength =3D <2>; + bias-disable; + }; + + spi-pins { + pins =3D "gpio20", "gpio21", "gpio23"; + function =3D "blsp_spi6"; + drive-strength =3D <12>; + bias-disable; + }; + }; + + spi_6_sleep: spi-6-sleep-state { + cs-pins { + pins =3D "gpio22"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + spi-pins { + pins =3D "gpio20", "gpio21", "gpio23"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + }; + + i2c_6_default: i2c-6-default-state { + pins =3D "gpio22", "gpio23"; + function =3D "blsp_i2c6"; + drive-strength =3D <2>; + bias-disable; + }; + + i2c_6_sleep: i2c-6-sleep-state { + pins =3D "gpio22", "gpio23"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + wcnss_pin_a: wcnss-active-state { + wcss-wlan2-pins { + pins =3D "gpio76"; + function =3D "wcss_wlan2"; + drive-strength =3D <6>; + bias-pull-up; + }; + + wcss-wlan1-pins { + pins =3D "gpio77"; + function =3D "wcss_wlan1"; + drive-strength =3D <6>; + bias-pull-up; + }; + + wcss-wlan0-pins { + pins =3D "gpio78"; + function =3D "wcss_wlan0"; + drive-strength =3D <6>; + bias-pull-up; + }; + + wcss-wlan-pins { + pins =3D "gpio79", "gpio80"; + function =3D "wcss_wlan"; + drive-strength =3D <6>; + bias-pull-up; + }; + }; + + gpio_key_default: gpio-key-default-state { + pins =3D "gpio85"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + + i2c_8_default: i2c-8-default-state { + pins =3D "gpio98", "gpio99"; + function =3D "blsp_i2c8"; + drive-strength =3D <2>; + bias-disable; + }; + + i2c_8_sleep: i2c-8-sleep-state { + pins =3D "gpio98", "gpio99"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + sdc2_cd_on: cd-on-state { + pins =3D "gpio133"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-up; + }; + + sdc2_cd_off: cd-off-state { + pins =3D "gpio133"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + i2c_7_default: i2c-7-default-state { + pins =3D "gpio135", "gpio136"; + function =3D "blsp_i2c7"; + drive-strength =3D <2>; + bias-disable; + }; + + i2c_7_sleep: i2c-7-sleep-state { + pins =3D "gpio135", "gpio136"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + spi_7_default: spi-7-default-state { + cs-pins { + pins =3D "gpio136"; + function =3D "blsp_spi7"; + drive-strength =3D <2>; + bias-disable; + }; + + spi-pins { + pins =3D "gpio135", "gpio137", "gpio138"; + function =3D "blsp_spi7"; + drive-strength =3D <12>; + bias-disable; + }; + }; + + spi_7_sleep: spi-7-sleep-state { + cs-pins { + pins =3D "gpio136"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-disable; + }; + + spi-pins { + pins =3D "gpio135", "gpio137", "gpio138"; + function =3D "gpio"; + drive-strength =3D <2>; + bias-pull-down; + }; + }; + sdc1_clk_on: sdc1-clk-on-state { pins =3D "sdc1_clk"; bias-disable; @@ -640,312 +945,6 @@ sdc2_data_off: sdc2-data-off-state { bias-pull-up; drive-strength =3D <2>; }; - - sdc2_cd_on: cd-on-state { - pins =3D "gpio133"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-pull-up; - }; - - sdc2_cd_off: cd-off-state { - pins =3D "gpio133"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; - }; - - gpio_key_default: gpio-key-default-state { - pins =3D "gpio85"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-pull-up; - }; - - i2c_1_default: i2c-1-default-state { - pins =3D "gpio2", "gpio3"; - function =3D "blsp_i2c1"; - drive-strength =3D <2>; - bias-disable; - }; - - i2c_1_sleep: i2c-1-sleep-state { - pins =3D "gpio2", "gpio3"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; - }; - - i2c_2_default: i2c-2-default-state { - pins =3D "gpio6", "gpio7"; - function =3D "blsp_i2c2"; - drive-strength =3D <2>; - bias-disable; - }; - - i2c_2_sleep: i2c-2-sleep-state { - pins =3D "gpio6", "gpio7"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; - }; - - i2c_3_default: i2c-3-default-state { - pins =3D "gpio10", "gpio11"; - function =3D "blsp_i2c3"; - drive-strength =3D <2>; - bias-disable; - }; - - i2c_3_sleep: i2c-3-sleep-state { - pins =3D "gpio10", "gpio11"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; - }; - - i2c_4_default: i2c-4-default-state { - pins =3D "gpio14", "gpio15"; - function =3D "blsp_i2c4"; - drive-strength =3D <2>; - bias-disable; - }; - - i2c_4_sleep: i2c-4-sleep-state { - pins =3D "gpio14", "gpio15"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; - }; - - i2c_5_default: i2c-5-default-state { - pins =3D "gpio18", "gpio19"; - function =3D "blsp_i2c5"; - drive-strength =3D <2>; - bias-disable; - }; - - i2c_5_sleep: i2c-5-sleep-state { - pins =3D "gpio18", "gpio19"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; - }; - - i2c_6_default: i2c-6-default-state { - pins =3D "gpio22", "gpio23"; - function =3D "blsp_i2c6"; - drive-strength =3D <2>; - bias-disable; - }; - - i2c_6_sleep: i2c-6-sleep-state { - pins =3D "gpio22", "gpio23"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; - }; - - i2c_7_default: i2c-7-default-state { - pins =3D "gpio135", "gpio136"; - function =3D "blsp_i2c7"; - drive-strength =3D <2>; - bias-disable; - }; - - i2c_7_sleep: i2c-7-sleep-state { - pins =3D "gpio135", "gpio136"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; - }; - - i2c_8_default: i2c-8-default-state { - pins =3D "gpio98", "gpio99"; - function =3D "blsp_i2c8"; - drive-strength =3D <2>; - bias-disable; - }; - - i2c_8_sleep: i2c-8-sleep-state { - pins =3D "gpio98", "gpio99"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; - }; - - spi_3_default: spi-3-default-state { - cs-pins { - pins =3D "gpio10"; - function =3D "blsp_spi3"; - drive-strength =3D <2>; - bias-disable; - }; - - spi-pins { - pins =3D "gpio8", "gpio9", "gpio11"; - function =3D "blsp_spi3"; - drive-strength =3D <12>; - bias-disable; - }; - }; - - spi_3_sleep: spi-3-sleep-state { - cs-pins { - pins =3D "gpio10"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; - }; - - spi-pins { - pins =3D "gpio8", "gpio9", "gpio11"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-pull-down; - }; - }; - - spi_5_default: spi-5-default-state { - cs-pins { - pins =3D "gpio18"; - function =3D "blsp_spi5"; - drive-strength =3D <2>; - bias-disable; - }; - - spi-pins { - pins =3D "gpio16", "gpio17", "gpio19"; - function =3D "blsp_spi5"; - drive-strength =3D <12>; - bias-disable; - }; - }; - - spi_5_sleep: spi-5-sleep-state { - cs-pins { - pins =3D "gpio18"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; - }; - - spi-pins { - pins =3D "gpio16", "gpio17", "gpio19"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-pull-down; - }; - }; - - spi_6_default: spi-6-default-state { - cs-pins { - pins =3D "gpio22"; - function =3D "blsp_spi6"; - drive-strength =3D <2>; - bias-disable; - }; - - spi-pins { - pins =3D "gpio20", "gpio21", "gpio23"; - function =3D "blsp_spi6"; - drive-strength =3D <12>; - bias-disable; - }; - }; - - spi_6_sleep: spi-6-sleep-state { - cs-pins { - pins =3D "gpio22"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; - }; - - spi-pins { - pins =3D "gpio20", "gpio21", "gpio23"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-pull-down; - }; - }; - - spi_7_default: spi-7-default-state { - cs-pins { - pins =3D "gpio136"; - function =3D "blsp_spi7"; - drive-strength =3D <2>; - bias-disable; - }; - - spi-pins { - pins =3D "gpio135", "gpio137", "gpio138"; - function =3D "blsp_spi7"; - drive-strength =3D <12>; - bias-disable; - }; - }; - - spi_7_sleep: spi-7-sleep-state { - cs-pins { - pins =3D "gpio136"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; - }; - - spi-pins { - pins =3D "gpio135", "gpio137", "gpio138"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-pull-down; - }; - }; - - uart_5_default: uart-5-default-state { - pins =3D "gpio16", "gpio17", "gpio18", "gpio19"; - function =3D "blsp_uart5"; - drive-strength =3D <16>; - bias-disable; - }; - - uart_5_sleep: uart-5-sleep-state { - pins =3D "gpio16", "gpio17", "gpio18", "gpio19"; - function =3D "gpio"; - drive-strength =3D <2>; - bias-disable; - }; - - wcnss_pin_a: wcnss-active-state { - - wcss-wlan2-pins { - pins =3D "gpio76"; - function =3D "wcss_wlan2"; - drive-strength =3D <6>; - bias-pull-up; - }; - - wcss-wlan1-pins { - pins =3D "gpio77"; - function =3D "wcss_wlan1"; - drive-strength =3D <6>; - bias-pull-up; - }; - - wcss-wlan0-pins { - pins =3D "gpio78"; - function =3D "wcss_wlan0"; - drive-strength =3D <6>; - bias-pull-up; - }; - - wcss-wlan-pins { - pins =3D "gpio79", "gpio80"; - function =3D "wcss_wlan"; - drive-strength =3D <6>; - bias-pull-up; - }; - }; }; =20 gcc: clock-controller@1800000 { --=20 2.51.2 From nobody Mon Feb 9 17:14:31 2026 Received: from ahti.lucaweiss.eu (ahti.lucaweiss.eu [128.199.32.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6662D316188; Tue, 28 Oct 2025 16:41:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=128.199.32.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761669699; cv=none; b=F/yczfX4VNnd70yiHiFmYZbtFpR1zWMuSbqkS8PppTQ4w2MOL/lX+XTs3xKsximmWoLohRO2GPyHhtTFLpnFi23Lz3cSpLdkGjMUJ6Mqck+0D9o0wO/uYGVyCUg+LiObkz97wkVDgMQPXjB1BH60BNDP9sw5ki+FWYcNu3jPBo0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761669699; c=relaxed/simple; bh=JspfmZYH6Dhqmrq1yZUtc6zW6CjlDHYA43A+bE8HOE8=; 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h=From:Date:Subject:References:In-Reply-To:To:Cc; b=l6mayBT1Q5kDwBlXmfoyFZp+hNrp09t5JwQgSkffnZOPvgvKnkzFYc7NH4QYCZtEt PpqBea+FTCMRMdkq53i5+DCiZu6qAjMuw6etomTQW/YrAcEH0ANCUsaA/itwE113ZZ KtgnRRDTai32hsu267mn/WWKpQlizqJJg3AteHY8= From: Luca Weiss Date: Tue, 28 Oct 2025 17:40:50 +0100 Subject: [PATCH v2 5/7] arm64: dts: qcom: msm8953: Add CCI nodes Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251028-msm8953-cci-v2-5-b5f9f7135326@lucaweiss.eu> References: <20251028-msm8953-cci-v2-0-b5f9f7135326@lucaweiss.eu> In-Reply-To: <20251028-msm8953-cci-v2-0-b5f9f7135326@lucaweiss.eu> To: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss , Konrad Dybcio X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; 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a=openpgp; fpr=BD04DA24C971B8D587B2B8D7FAF69CF6CD2D02CD Add the nodes for the camera I2C bus on the MSM8953 SoC. Reviewed-by: Konrad Dybcio Signed-off-by: Luca Weiss --- arch/arm64/boot/dts/qcom/msm8953.dtsi | 57 +++++++++++++++++++++++++++++++= ++++ 1 file changed, 57 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/msm8953.dtsi b/arch/arm64/boot/dts/qc= om/msm8953.dtsi index 7884a3ed8aef..753167c3f861 100644 --- a/arch/arm64/boot/dts/qcom/msm8953.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8953.dtsi @@ -753,6 +753,20 @@ i2c_6_sleep: i2c-6-sleep-state { bias-disable; }; =20 + cci0_default: cci0-default-state { + pins =3D "gpio29", "gpio30"; + function =3D "cci_i2c"; + drive-strength =3D <2>; + bias-disable; + }; + + cci1_default: cci1-default-state { + pins =3D "gpio31", "gpio32"; + function =3D "cci_i2c"; + drive-strength =3D <2>; + bias-disable; + }; + wcnss_pin_a: wcnss-active-state { wcss-wlan2-pins { pins =3D "gpio76"; @@ -1200,6 +1214,49 @@ mdss_dsi1_phy: phy@1a96400 { }; }; =20 + cci: cci@1b0c000 { + compatible =3D "qcom,msm8953-cci"; + reg =3D <0x1b0c000 0x4000>; + + interrupts =3D ; + + clocks =3D <&gcc GCC_CAMSS_TOP_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_CLK>, + <&gcc GCC_CAMSS_AHB_CLK>; + clock-names =3D "camss_top_ahb", + "cci_ahb", + "cci", + "camss_ahb"; + + assigned-clocks =3D <&gcc GCC_CAMSS_CCI_AHB_CLK>, + <&gcc GCC_CAMSS_CCI_CLK>; + assigned-clock-rates =3D <80000000>, + <19200000>; + + pinctrl-0 =3D <&cci0_default &cci1_default>; + pinctrl-names =3D "default"; + + #address-cells =3D <1>; + #size-cells =3D <0>; + + status =3D "disabled"; + + cci_i2c0: i2c-bus@0 { + reg =3D <0>; + clock-frequency =3D <400000>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + cci_i2c1: i2c-bus@1 { + reg =3D <1>; + clock-frequency =3D <400000>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; + gpu: gpu@1c00000 { compatible =3D "qcom,adreno-506.0", "qcom,adreno"; reg =3D <0x01c00000 0x40000>; --=20 2.51.2 From nobody Mon Feb 9 17:14:31 2026 Received: from ahti.lucaweiss.eu (ahti.lucaweiss.eu [128.199.32.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 666CE33EAF3; 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arc=none smtp.client-ip=128.199.32.197 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=lucaweiss.eu Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=lucaweiss.eu Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lucaweiss.eu header.i=@lucaweiss.eu header.b="CVMuYvRE" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=lucaweiss.eu; s=s1; t=1761669690; bh=nHiJxy5dVZZ2fzE8k0XZk3dvoZtjPMtg8+vtSGKAiAE=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=CVMuYvREn4hw9EbYQdy0q/zTdbzNg6OB1HSCY5FQK70sMqNTpwF8EmS2nLgFsji5N cDxXmHTaDya+j0m4CO6d/rh9wyHzb1RBxZIGIr/y6iKd1c9+DxN6x8Z2A18kAv0POB ON1SML+UVwVvKHg3oOy3mM0PfiY45eY0FgJpLpPw= From: Luca Weiss Date: Tue, 28 Oct 2025 17:40:51 +0100 Subject: [PATCH v2 6/7] arm64: dts: qcom: sdm632-fairphone-fp3: Add camera fixed regulators Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; 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a=openpgp; fpr=BD04DA24C971B8D587B2B8D7FAF69CF6CD2D02CD Add the definitions for a few fixed regulators found on the Fairphone 3. Reviewed-by: Konrad Dybcio Signed-off-by: Luca Weiss --- arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts | 36 +++++++++++++++++++= ++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts b/arch/arm64= /boot/dts/qcom/sdm632-fairphone-fp3.dts index 55a45b528bd3..557925a66276 100644 --- a/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts +++ b/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts @@ -36,6 +36,42 @@ key-volume-up { }; }; =20 + vreg_cam_af_2p85: regulator-cam-af-2p85 { + compatible =3D "regulator-fixed"; + regulator-name =3D "cam_af_2p85"; + regulator-min-microvolt =3D <2850000>; + regulator-max-microvolt =3D <2850000>; + + gpio =3D <&tlmm 128 GPIO_ACTIVE_HIGH>; + enable-active-high; + + vin-supply =3D <&vph_pwr>; + }; + + vreg_cam_io_1p8: regulator-cam-io-1p8 { + compatible =3D "regulator-fixed"; + regulator-name =3D "cam_io_1p8"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + gpio =3D <&tlmm 130 GPIO_ACTIVE_HIGH>; + enable-active-high; + + vin-supply =3D <&vph_pwr>; + }; + + vreg_cam2_dig_1p2: regulator-cam2-dig-1p2 { + compatible =3D "regulator-fixed"; + regulator-name =3D "cam2_dig_1p2"; + regulator-min-microvolt =3D <1200000>; + regulator-max-microvolt =3D <1200000>; + + gpio =3D <&tlmm 46 GPIO_ACTIVE_HIGH>; + enable-active-high; + + vin-supply =3D <&vph_pwr>; + }; + /* Dummy regulator until PMI632 has LCDB VSP/VSN support */ lcdb_dummy: regulator-lcdb-dummy { compatible =3D "regulator-fixed"; --=20 2.51.2 From nobody Mon Feb 9 17:14:31 2026 Received: from ahti.lucaweiss.eu (ahti.lucaweiss.eu [128.199.32.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 665AC305E31; Tue, 28 Oct 2025 16:41:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=128.199.32.197 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761669698; cv=none; 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spf=pass smtp.mailfrom=lucaweiss.eu Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=lucaweiss.eu header.i=@lucaweiss.eu header.b="66mPCvAI" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=lucaweiss.eu; s=s1; t=1761669691; bh=ecnA0KG481FICL1IxqZl/Uq99VZDiX0xPco/otlm9Gw=; h=From:Date:Subject:References:In-Reply-To:To:Cc; b=66mPCvAIA9hoc9ACXaoEmKAXo4oK0mTdFFeT+MrBYeoJbYOwojrRpcCzv/SXpZQ63 Qjb+n+2BhOTYM4F78vTpVjcIHRZ1JQ9hw0EXyJf/mX5ff3sC0mpiUNa0Hq6da9Alkw yPXHve/7WKAWNVpbftwcjoo6RM5MMBTpdAh5WcLc= From: Luca Weiss Date: Tue, 28 Oct 2025 17:40:52 +0100 Subject: [PATCH v2 7/7] arm64: dts: qcom: sdm632-fairphone-fp3: Enable CCI and add EEPROM Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251028-msm8953-cci-v2-7-b5f9f7135326@lucaweiss.eu> References: <20251028-msm8953-cci-v2-0-b5f9f7135326@lucaweiss.eu> In-Reply-To: <20251028-msm8953-cci-v2-0-b5f9f7135326@lucaweiss.eu> To: ~postmarketos/upstreaming@lists.sr.ht, phone-devel@vger.kernel.org, Loic Poulain , Robert Foss , Andi Shyti , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Bartosz Golaszewski , Bjorn Andersson , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-i2c@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Luca Weiss , Konrad Dybcio X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; 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a=openpgp; fpr=BD04DA24C971B8D587B2B8D7FAF69CF6CD2D02CD Enable the CCI where the camera modules are connected to, and add a node for the EEPROM found next to the IMX363 rear camera. Reviewed-by: Konrad Dybcio Signed-off-by: Luca Weiss --- arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts | 21 +++++++++++++++++++= ++ 1 file changed, 21 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts b/arch/arm64= /boot/dts/qcom/sdm632-fairphone-fp3.dts index 557925a66276..0edb2992b902 100644 --- a/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts +++ b/arch/arm64/boot/dts/qcom/sdm632-fairphone-fp3.dts @@ -88,6 +88,27 @@ vph_pwr: vph-pwr-regulator { }; }; =20 +&cci { + status =3D "okay"; +}; + +&cci_i2c0 { + /* Sony IMX363 (rear) @ 0x10 */ + + eeprom@50 { + compatible =3D "belling,bl24s64", "atmel,24c64"; + reg =3D <0x50>; + vcc-supply =3D <&vreg_cam_io_1p8>; + read-only; + }; + + /* ON Semi LC898217 VCM @ 0x72 */ +}; + +&cci_i2c1 { + /* Samsung S5K4H7YX (front) @ 0x10 */ +}; + &gpu { status =3D "okay"; }; --=20 2.51.2