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[75.72.117.212]) by smtp.gmail.com with ESMTPSA id 8926c6da1cb9f-5aea78e2fd4sm3093057173.26.2025.10.27.06.30.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 27 Oct 2025 06:30:29 -0700 (PDT) From: Alex Elder To: pjw@kernel.org, palmer@dabbelt.com, aou@eecs.berkeley.edu, alex@ghiti.fr, conor.dooley@microchip.com, dlan@gentoo.org Cc: Frank.li@nxp.com, guodong@riscstar.com, fustini@kernel.org, geert+renesas@glider.be, cyy@cyyself.name, heylenay@4d2.org, apatel@ventanamicro.com, joel@jms.id.au, linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v4 9/9] riscv: defconfig: enable SPI_FSL_QUADSPI as a module Date: Mon, 27 Oct 2025 08:30:07 -0500 Message-ID: <20251027133008.360237-10-elder@riscstar.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20251027133008.360237-1-elder@riscstar.com> References: <20251027133008.360237-1-elder@riscstar.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The SpacemiT K1 SoC QSPI IP uses the Freescale driver. Enable it as a module in the default kernel configuration for RISC-V. Acked-by: Paul Walmsley # for arch/riscv Signed-off-by: Alex Elder --- v4: - Added Paul Walmsley's Acked-by on patch 9 arch/riscv/configs/defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index fc2725cbca187..48afe30d42e88 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -158,6 +158,7 @@ CONFIG_I2C_DESIGNWARE_CORE=3Dy CONFIG_I2C_MV64XXX=3Dm CONFIG_SPI=3Dy CONFIG_SPI_CADENCE_QUADSPI=3Dm +CONFIG_SPI_FSL_QUADSPI=3Dm CONFIG_SPI_PL022=3Dm CONFIG_SPI_SIFIVE=3Dy CONFIG_SPI_SUN6I=3Dy --=20 2.48.1