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charset="utf-8" There is a ID pin present on HD3SS3220 controller that can be routed to SoC. As per the datasheet: "Upon detecting a UFP device, HD3SS3220 will keep ID pin high if VBUS is not at VSafe0V. Once VBUS is at VSafe0V, the HD3SS3220 will assert ID pin low. This is done to enforce Type-C requirement that VBUS must be at VSafe0V before re-enabling VBUS" Add support to read the ID pin state and enable VBUS accordingly. Signed-off-by: Krishna Kurapati --- drivers/usb/typec/hd3ss3220.c | 74 +++++++++++++++++++++++++++++++++++ 1 file changed, 74 insertions(+) diff --git a/drivers/usb/typec/hd3ss3220.c b/drivers/usb/typec/hd3ss3220.c index 3ecc688dda82..8614c71d7ae5 100644 --- a/drivers/usb/typec/hd3ss3220.c +++ b/drivers/usb/typec/hd3ss3220.c @@ -15,6 +15,9 @@ #include #include #include +#include +#include +#include =20 #define HD3SS3220_REG_CN_STAT 0x08 #define HD3SS3220_REG_CN_STAT_CTRL 0x09 @@ -54,6 +57,11 @@ struct hd3ss3220 { struct delayed_work output_poll_work; enum usb_role role_state; bool poll; + + struct gpio_desc *id_gpiod; + int id_irq; + + struct regulator *vbus; }; =20 static int hd3ss3220_set_power_opmode(struct hd3ss3220 *hd3ss3220, int pow= er_opmode) @@ -319,6 +327,48 @@ static const struct regmap_config config =3D { .max_register =3D 0x0A, }; =20 +static irqreturn_t hd3ss3220_id_isr(int irq, void *dev_id) +{ + struct hd3ss3220 *hd3ss3220 =3D dev_id; + int ret; + int id; + + if (!hd3ss3220->vbus) + return IRQ_HANDLED; + + id =3D hd3ss3220->id_gpiod ? gpiod_get_value_cansleep(hd3ss3220->id_gpiod= ) : 1; + + if (!id) { + ret =3D regulator_enable(hd3ss3220->vbus); + if (ret) + dev_err(hd3ss3220->dev, "enable vbus regulator failed\n"); + } else { + regulator_disable(hd3ss3220->vbus); + } + + return IRQ_HANDLED; +} + +static int hd3ss3220_get_vbus_supply(struct hd3ss3220 *hd3ss3220) +{ + struct device_node *hd3ss3220_node =3D hd3ss3220->dev->of_node; + struct device_node *np; + + np =3D of_graph_get_remote_node(hd3ss3220_node, 0, 0); + if (!np) { + dev_err(hd3ss3220->dev, "failed to get device node"); + return -ENODEV; + } + + hd3ss3220->vbus =3D of_regulator_get_optional(hd3ss3220->dev, np, "vbus"); + if (IS_ERR(hd3ss3220->vbus)) + hd3ss3220->vbus =3D NULL; + + of_node_put(np); + + return 0; +} + static int hd3ss3220_probe(struct i2c_client *client) { struct typec_capability typec_cap =3D { }; @@ -354,6 +404,30 @@ static int hd3ss3220_probe(struct i2c_client *client) hd3ss3220->role_sw =3D usb_role_switch_get(hd3ss3220->dev); } =20 + hd3ss3220->id_gpiod =3D devm_gpiod_get_optional(hd3ss3220->dev, "id", GPI= OD_IN); + if (IS_ERR(hd3ss3220->id_gpiod)) + return PTR_ERR(hd3ss3220->id_gpiod); + + if (hd3ss3220->id_gpiod) { + hd3ss3220->id_irq =3D gpiod_to_irq(hd3ss3220->id_gpiod); + if (hd3ss3220->id_irq < 0) + return dev_err_probe(hd3ss3220->dev, + hd3ss3220->id_irq, "failed to get ID gpio\n"); + + ret =3D devm_request_threaded_irq(hd3ss3220->dev, + hd3ss3220->id_irq, NULL, + hd3ss3220_id_isr, + IRQF_TRIGGER_RISING | + IRQF_TRIGGER_FALLING | IRQF_ONESHOT, + dev_name(hd3ss3220->dev), hd3ss3220); + if (ret < 0) + return dev_err_probe(hd3ss3220->dev, ret, "failed to get ID irq\n"); + } + + ret =3D hd3ss3220_get_vbus_supply(hd3ss3220); + if (ret) + return dev_err_probe(hd3ss3220->dev, ret, "failed to get vbus\n"); + if (IS_ERR(hd3ss3220->role_sw)) { ret =3D PTR_ERR(hd3ss3220->role_sw); goto err_put_fwnode; --=20 2.34.1