From nobody Sun Feb 8 15:53:27 2026 Received: from PA4PR04CU001.outbound.protection.outlook.com (mail-francecentralazon11013061.outbound.protection.outlook.com [40.107.162.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C9F3831B80E; Mon, 27 Oct 2025 20:08:54 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.162.61 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761595736; cv=fail; b=df5SqNqzYhYbcJGwZ5L9WstCtdIIyQo4hI+i/TUMT7t56Fos0Karl1K+buDvWUf7sowlPVZ4D9Y62gNq5FnsCbK5pW653qkVyPGL6D01GX16gF1LHQPwP/YlmRsMp7EBX9+FJH3gV5rhabJj/NouI0l2Hp6DMavW2wJIzYLrYyY= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761595736; c=relaxed/simple; bh=SkcDYbHPBR52IILcqjk/qMhtQz4iIc4teAhidTsTJFU=; h=From:Date:Subject:Content-Type:Message-Id:References:In-Reply-To: To:Cc:MIME-Version; b=Bp2gy5GKC3giODzNFgoeLiULaV+e56l0xEmBkROj9vV1BJDScE/r5a6pknaDlTo+ESkM0BXgZ8gfJfHhw1LnDpzrEKaTyuTqaEazDXxx77JK3YZ+Me/L1RekDprmuR+VZBUTFF5KxaVI09zq+k6thLYcJzFpIodJojwObJIKDXI= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; dkim=pass (2048-bit key) header.d=nxp.com header.i=@nxp.com header.b=UTbpmQS7; arc=fail smtp.client-ip=40.107.162.61 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=nxp.com header.i=@nxp.com header.b="UTbpmQS7" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=D0EZw9oozm8QcGmqoKRtimZ6QiKuvskWC5zE1LHUHHqN9W/3Zi77BPKZA242Ouos1L2wRcQneDUpEf7eHfvPh+jX0gvo+oCwZ/KqkMtBlVP3bsWA/3t+iV245430EoXhTJGvLjIM+cJuQhB+2p5rxVWI4SLxAAv0at+RbsXZiLlW8mqTwZmI66G53VW7hn+wBE1holJzarlX7xdu7AsPjzuoOzvUxDJbVQWeyBfCGcWIbgmcIiD8ajoXMfBzErbWVKa3cENpLLkAN3ItWSpKNE/7wZHdckujTb9cW0haAZiKpMImQaz9TYK/c0AY5k7LUxNfEMY/2zQ67GDlJK7IUQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=JqbOr0S5EoHn0LGYFZCSYeSed/ORcdkAIJZjvhyElDE=; b=btbVXWlOC99RAvlVsjsvyllrc2wPUv3x07Ddyko4ebyNMHnS9CTW4wC75uN3zYcVYvsAk3R5PG6XsXKbNPE1i8wZYM+K5XFwycytkamiGAfVppq4ugWU1Gn/+D55D0S+qcxfKiMqsF3YYSmMtdQgOqSqlwiTu8tc/zXOZcG9JaNnd787HGM9I5yiCeTf5RkSREbsU0z5iRTZ27B3aymqAahx9ZtkQuGndzjNEn8+dWiN9kjPZ+yxQSku2WPZDDCG6iCJMppzRGerYKPEXQX8G7Z2ooWZU5vLYlBzda2aC7prgGuv6z+OTa/0ycEFT8zPbbAdMqBs95JjfHZ9+qEEZg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=JqbOr0S5EoHn0LGYFZCSYeSed/ORcdkAIJZjvhyElDE=; b=UTbpmQS7+dgcBo7bM42KsDGV48CGPzjdBartImmz8FnhO0qm8Qxsrp5azDfCe0DbfK9g4q1qwoWmcDLK6AnyteL7/Z/2mZLN+Tb3eTSX9nUvgx5x+y2bp4q8woC9SeNLDcCpeVtsEUTBFe/Le3d3CgYj28wuU3owqZilV9xqe/p7DcTa6xuCrUXwEtjSEK9hDVZifSIVniTWhVWebKgtRpCbkPyyJEVy6l8O/kgCyln/gX8uNyz9IO5bVqsV+zMPYhat51aHg2303BfVx8+9OwHrNcA1mc2SvHb8Z/WnYXeejTkii2p7HYzKJgsYLEHozmV7Vb3Ju8OBFM4MIniuHA== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AS4PR04MB9621.eurprd04.prod.outlook.com (2603:10a6:20b:4ff::22) by VI0PR04MB11919.eurprd04.prod.outlook.com (2603:10a6:800:306::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Mon, 27 Oct 2025 20:08:50 +0000 Received: from AS4PR04MB9621.eurprd04.prod.outlook.com ([fe80::a84d:82bf:a9ff:171e]) by AS4PR04MB9621.eurprd04.prod.outlook.com ([fe80::a84d:82bf:a9ff:171e%4]) with mapi id 15.20.9253.017; Mon, 27 Oct 2025 20:08:50 +0000 From: Frank Li Date: Mon, 27 Oct 2025 16:08:29 -0400 Subject: [PATCH v7 1/5] i3c: Add HDR API support Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251027-i3c_ddr-v7-1-866a0ff7fc46@nxp.com> References: <20251027-i3c_ddr-v7-0-866a0ff7fc46@nxp.com> In-Reply-To: <20251027-i3c_ddr-v7-0-866a0ff7fc46@nxp.com> To: Alexandre Belloni , Miquel Raynal , Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-iio@vger.kernel.org, joshua.yeong@starfivetech.com, devicetree@vger.kernel.org, Frank Li X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1761595722; l=10504; i=Frank.Li@nxp.com; s=20240130; h=from:subject:message-id; bh=SkcDYbHPBR52IILcqjk/qMhtQz4iIc4teAhidTsTJFU=; b=1d0yjqClIvO9LeOMLcIrCcJv9XvleCKuA2npT7q7fKhXLR6v9X8X+Ogy6MGrH2gFMb12bRzdb SyMZ9oeba2kAUuNrMaA+iuMcTbzb05Rnl0Xe6jtxQOGPXPFPekWGksu X-Developer-Key: i=Frank.Li@nxp.com; a=ed25519; pk=I0L1sDUfPxpAkRvPKy7MdauTuSENRq+DnA+G4qcS94Q= X-ClientProxiedBy: PH1PEPF00013303.namprd07.prod.outlook.com (2603:10b6:518:1::12) To AS4PR04MB9621.eurprd04.prod.outlook.com (2603:10a6:20b:4ff::22) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS4PR04MB9621:EE_|VI0PR04MB11919:EE_ X-MS-Office365-Filtering-Correlation-Id: 91f6cf64-84d2-4796-2fa3-08de1594a4dc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|19092799006|376014|52116014|7416014|366016|1800799024|38350700014; X-Microsoft-Antispam-Message-Info: =?utf-8?B?UTJFTmRZNVV5ekNxZVZ1MmwxRTBNc2w3SU5Sakxha1JpVklRMUZiNjVxaVBv?= =?utf-8?B?QUNoTStQamM3U1dmS2laNlc2TENMa0Q5K01TVk9IRXpia0xVdHorODVPQjlF?= =?utf-8?B?MW5ta1A4RU9xMndHK2hvME5xbG56ZGJWc2VlRTBWUkR5cFZiUjZDQTZuTksv?= =?utf-8?B?VHZFMXlURVIvdjdzSm91RFBUdDl0QlZSVzNSRnpwZFg0aHBjVFJ3bnk5ZmVK?= =?utf-8?B?UStxaXI4ellBNjBBUjFYSXNNUDNWajhzcFJGQitZR3owZXkwWFBYZHhVelBG?= =?utf-8?B?aVBlbExhNmMycVRxTlR2aW91VTRLM21GRXdJd2U2YkxoQ1EvbG9ncVQrMFF2?= =?utf-8?B?aTZmWG5SWmNybVZNVFZpSWhYdkVqYWYvSHRLMWtaaUoxNDB6ZEpERld5R1Qz?= =?utf-8?B?OW5YL0tiYkNZQmxwelR4emFISDQrdmVCYzBSNCtmMU85N0dtcHZWS2FDNlhX?= =?utf-8?B?NGZtZ1N2WHhYR0dyYUw2RkV5TkM0UC9jNnpkTC9OOXRwS1pOTVl6RzB4OVl1?= =?utf-8?B?Y3ZCcS8vTnpZYWU4eWNJdWJsRDcwdXp6Q3Y5M2xKSnNhTGFjSmRuQ1gxeFU5?= =?utf-8?B?Q2gxamNHc1FiZVJQVUdtQ3hPaWNnZTRNWW40MnY1U1lIUTl6dGdyZWxUOVJp?= =?utf-8?B?ekRlNnFiclRtTXBLYUs0QkJ1SGRBR0xla0pyR0Q4b1pDTkg3aVpVZ016R3VK?= =?utf-8?B?TVN2andtZFpRV3B2NDFnL1JOZEFhb2xDMmlQc1VTaU9DcVMwUEwxNUgxVldX?= =?utf-8?B?ZCtMWjdvazV0aTNDcDFaSWJINVZWVUV3K1VneVd4cFkyZnBURTFvdy8xdmlC?= =?utf-8?B?ZVMzWGJTRzBOZU42OGN6Ri80ZnJPVGVJeGRMZHdZTk15RzdpZVVucmFCS1Rr?= =?utf-8?B?MHhTdVd4RDVXMzBwYkVLY0dienVhRWo3RHU0cjF0dXYzUW1Tai9hRWttMzJO?= =?utf-8?B?eWFRSFRMVDl1ZmFhYTFLUVlnZTFFcmkwejllNlBjSXJDeUpVVHVYalRPcHlG?= =?utf-8?B?UzFUS05mNkZGTVNEek5YOGtuZVRGdEJKK0NCY0dYSFRtUFVWNUs3MklNdG9q?= =?utf-8?B?TXhCaldYcHA4YTVvWnF5dG5MV2tuYW1wRk1DUjZFbHQ4VUYwTktTWHl3a3Z2?= =?utf-8?B?eGZyeXYzdkJZYUFWTlpDeWhFNW41L3pISnQzejlYY0hvaDhoVDVicUFKSnkz?= =?utf-8?B?NEl0Y1Vuam45NElQVzIwc0FUaTZ3ZkQvdVRTRkFPbVVqWnB3aHdVbHVITWh4?= =?utf-8?B?cmw1N1JxVW1jbURidTJHL1prMGFjZ2R2T1JybDh2eEVrMkdzRWI2TUVYR1VP?= =?utf-8?B?eUM0RVJxc3dkMmt0YldwZ2lndkF0OVhEUWZqVnJOaFROTWMwU2IrWlRvVWkx?= =?utf-8?B?QXRRUUY2bko1TEhyaVcwMUdIK1VXbnlkZGNmRVZ0aytiVXhLZ3FJeWk3YzVO?= =?utf-8?B?VEIxMDE5WERKZ1M1VndaUWtMQ3Zwa1orbmRXeTFQb003SnEya2gvZ01KTmJh?= =?utf-8?B?QTljMXFudDQxKzlXb2tLVHZkQW5NQnVSWmloWWEwNk41R0FxVDMzYkNsNmJq?= =?utf-8?B?VVdrcFJRUUZsVWhTSTA3VW5rYXF2TlJ0WmJDT3dKUEs2dGVwa2QzaFFuT2d2?= =?utf-8?B?NkhFamV0Q0NtekQwWVg4RHVnZFVrTWE5UDJLVnFRb3RldVNndExzK21xazFn?= =?utf-8?B?T0dRYmJDSWpaaHFoSnhJcUpPcG42NVNRNlMrbXZYeDlwQUVQeHgxMU1YcGNt?= =?utf-8?B?cWQvNEgrbFM2cmhPcUdGZGJzQzRKZWlTekE2TjRFTU8wRzlEczdzaGltYmYy?= =?utf-8?B?THU2empBZk9EUE9Td0dJSGRUa1JzSjdQQlY0R01OZEpYRWR1dHJhNHFUQ3ZH?= =?utf-8?B?N2hmWHMwbzY3d3c5TEt4cXNYQWhieUJhR0JYMDhiQWNaUjZCZUdSUnZ4ZW5x?= =?utf-8?B?S2d1S2gzNlJZT2IxajYzdTR5QjErdkpjcHJ3WlNxMmZzajVXd2ptblNMZlBz?= =?utf-8?B?bHZyNDlhTlpiMU42STU2V2c2STg0SW1BTVhDU29NR0Z3bk44Wk5TeXh2S0FS?= =?utf-8?Q?LejS/6?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AS4PR04MB9621.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(19092799006)(376014)(52116014)(7416014)(366016)(1800799024)(38350700014);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?NjNwOXdSMmRDY2RZYnZZampMZWdHOUlaeWY5cmt3SWJVMk9qbnBVYWN4SmtW?= =?utf-8?B?Sk9TNHFWNlZ5bzBSeENYMXJXdGZRbEZ5NnNBaE92Vk9TdzNzZGpOcGtCVHhP?= =?utf-8?B?bDhxZ1pUbXlTZVllWXRvSzUwZ3J5NkZ4Sk5QYkcwRWV6S3RrTDRsM2xHWERr?= =?utf-8?B?d0h5aHhlMTBLeTRQQlFVa1VJT2NJdHJ6L3JXc3RZd3UrbklwaWptUzlqWHBZ?= =?utf-8?B?UlVZazY3amw4bjd1SGtwNE5zTVJxOVFQWGhVTEJOTU8zRzJqMnJaWG5CaDho?= =?utf-8?B?NllKWSsxcTZDR04rbm9WQllyU3U3MW9jaVdzUThrTStYYndBb3RzaEx2c0hq?= =?utf-8?B?Y0hwTlc1ZnhyS25FdU5HcHpSYjlEVFV2SjVEVGpVSGJ4K0pIZXFnMGUrQnNZ?= =?utf-8?B?VkRNZnBJU0ZvVHZQN0xNcUtvRUVFS0V2a3l2UHZTd2tnbTMvQVJNWmpXdUFm?= =?utf-8?B?RWNpY0pyT1NTeEhkUUxCZGJUbUlsZGc4MmZqSTh1OFBJZXdFVGtkSzBaWjVa?= =?utf-8?B?enpEQ015dnFiMG9oUWJpcFdGMG9BamRCNlU3WEY0RFlwMm1jdjlGRFJ2Zks2?= =?utf-8?B?WXJkWm5HK3F4NkU4c1pnWitBWkZtZXoxaXRJcEljYU9JS1BrS003QzMrNFdr?= =?utf-8?B?MlFaUjA4eml5UVIxMVkxakJBbnVuaTE4S3g1MjdmRytCUWorOXdCenliRVdm?= =?utf-8?B?Zng3dmJyNE93VnY4NVY2MTVqQldSTERwdkxhdWZMQW55OVlVMUtudXV5Um02?= =?utf-8?B?dGhwUTFQd1lnSjUzcEhGSXl6enZTV2JjbnFZcTNVMERMWU9WbTdxWitTLy82?= =?utf-8?B?WENWYnRlRUViY1M3ZCsveS9oQWhxcDR5Q3k3Tkc1UnRnTWNSbENVbTNIMCsx?= =?utf-8?B?cjM2RStUeit4d1VzUTBrWmJqVXRFNEtJYnNOVk5Ib1dFU2VTWHI2dlp1WDJi?= =?utf-8?B?NlU1MkJpS29lSHgvU0tEMEdLQXMwZnBFWjkrV1B3QmUrY2VWU3NiY005K3pY?= =?utf-8?B?U3JCeklOMG9KNzd1Wm54Vk5pYnJQM3JYaVZraUxCaUlxQ2pBaUNtTkpCeDZ5?= =?utf-8?B?OVcyZDlpTW94cFg3dytYZWRVZy90aFZoN1I2VklnZThVcURaUC9LdGIyQlc4?= =?utf-8?B?RmFScW4rK2QvR1BZRklZYi9IRUlGSW8yd3hsb1hwUGIzWFQ0TWRpRmxLL2tX?= =?utf-8?B?Y3VFQUNacTl1VGREazVpZzJLbGFKWjZEaW5Ydk03b2ZySjNRTEQ0dnZyeC9L?= =?utf-8?B?cm82cEtiUmoyNlI2ZWVMbUtnVGN3RlhydlVlZDlzOVJGL3NaYWVKMkV2b2tu?= =?utf-8?B?TnJtZ2ROSllsSFg4Q2ZnN1VrUWhHQ0dnQzhSaUYyVnBvaU96RmdrUHBKNVUy?= =?utf-8?B?OG1rZkNubGdLeTdCSmpRVkNlMGZDRUFkR0hKaGFRVGJjMzBlNTNDcnJkaFg4?= =?utf-8?B?V1BFNXJyTkFRRUliRFBUQUlnZVpXR0NONVRCY2lLMGZqaUh2QkJvME5iYkE3?= =?utf-8?B?TitqQ2tUVUg5aWRDVThxV2lSS1Jzc05XY2xGV1NjVGV6RkpUSjBVRG8vc3lS?= =?utf-8?B?SWVKOXBjTXhkRHNLV3N2dGxMK0VUSEtTcjVIcGt0bUhETkkyaCswNG8vYy9u?= =?utf-8?B?blNCNWRHN0s4S09FbWZHRDgrY1BnL1ZNd29seEkyOWtYRDAyb1FkbnhhNFVu?= =?utf-8?B?NWJOeVJZLzhjdEhvS2tXSFhpeklsNHdCaU5YZXN2MVo2TDJINDFYbnM2aUdK?= =?utf-8?B?a1ZPai9xdkxMc3FPRlphcm4zelNuRTAzQUJJOG53cVpDNW0vdkJoT0NiRnY3?= =?utf-8?B?S291S1VOUmZ6U0huQ25oYWhqTHhubU05OXNCUldoL3kzSXJrNW8xQ1RHWTdx?= =?utf-8?B?S0g0Y3BmVi9ZZkExOEIyN3piTXhqTStFMkx5bTdpLzRaaWJMZjJFdHVsUi82?= =?utf-8?B?cFlDL0xuMGFkMnZTMEkyYXplZExOM084N1p3Rlg1Z3VvN285cGE2ZTg2eVZP?= =?utf-8?B?TkJNSTkraHpxVk85dzFPTXRsM3ZTb05LVWt1TVJmZW9KbHU2TXJSSXZyUE5E?= =?utf-8?B?cThZZy85NFdLai90emFveW5IdlJlaklaNXlEV0t0TVhBOGhDWi9PM1hzMC92?= =?utf-8?Q?72cQ=3D?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: 91f6cf64-84d2-4796-2fa3-08de1594a4dc X-MS-Exchange-CrossTenant-AuthSource: AS4PR04MB9621.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Oct 2025 20:08:50.0003 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 0mxNkw8MyCVixrPZLM+6IbaXMikb7j/8g7Cqy/O0eWrHkDelaSPvWcWX6w+FUZOEm2PAcOxVd9JuqJ4TqYKqFw== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI0PR04MB11919 Rename struct i3c_priv_xfer to struct i3c_xfer, since private xfer in the I3C spec refers only to SDR transfers. Ref: i3c spec ver1.2, section 3, Technical Overview. i3c_xfer will be used for both SDR and HDR. Rename enum i3c_hdr_mode to i3c_xfer_mode. Previous definition need match CCC GET_CAP1 bit position. Use 31 as SDR transfer mode. Add i3c_device_do_xfers() with an xfer mode argument, while keeping i3c_device_do_priv_xfers() as a wrapper that calls i3c_device_do_xfers() with I3C_SDR for backward compatibility. Introduce a 'cmd' field in struct i3c_xfer as an anonymous union with 'rnw', since HDR mode uses read/write commands instead of the SDR address bit. Add .i3c_xfers() callback for master controllers. If not implemented, fall back to SDR with .priv_xfers(). The .priv_xfers() API can be removed once all controllers switch to .i3c_xfers(). Add 'mode_mask' bitmask to advertise controller capability. Signed-off-by: Frank Li --- Why not add hdr mode in struct i3c_priv_xfer because mode can't be mixed in one i3c transfer. for example, can't send a HDR follow one SDR between START and STOP. i3c_priv_xfer should be treat as whole i3c transactions. If user want send HDR follow SDR, should be call i3c_device_do_priv_xfers_mode() twice, instead put into a big i3c_priv_xfer[n]. change in v7 - explicit set enum I3C_HDR_* to value, which spec required. - add comments about check priv_xfers and i3c_xfers change in v5-v6 - none change in v4 - Rename enum i3c_hdr_mode to i3c_xfer_mode. change in v3 - Add Depreciated comment for priv_xfers. change in v2 - don't use 'priv_' since it is refer to sdr mode transfer in spec. - add 'mode_mask' indicate controller's capibility. - add helper function to check master's supported transfer mode. --- drivers/i3c/device.c | 27 ++++++++++++++++++++------- drivers/i3c/internals.h | 6 +++--- drivers/i3c/master.c | 20 ++++++++++++++++---- include/linux/i3c/device.h | 40 +++++++++++++++++++++++++++++----------- include/linux/i3c/master.h | 4 ++++ 5 files changed, 72 insertions(+), 25 deletions(-) diff --git a/drivers/i3c/device.c b/drivers/i3c/device.c index 2396545763ff853097d9f0173787e087f7a6e688..e6add862645196ad41d0c91d3d7= 103c877a1ef5a 100644 --- a/drivers/i3c/device.c +++ b/drivers/i3c/device.c @@ -15,12 +15,12 @@ #include "internals.h" =20 /** - * i3c_device_do_priv_xfers() - do I3C SDR private transfers directed to a - * specific device + * i3c_device_do_xfers() - do I3C transfers directed to a specific device * * @dev: device with which the transfers should be done * @xfers: array of transfers * @nxfers: number of transfers + * @mode: transfer mode * * Initiate one or several private SDR transfers with @dev. * @@ -33,9 +33,8 @@ * 'xfers' some time later. See I3C spec ver 1.1.1 09-Jun-2021. Section: * 5.1.2.2.3. */ -int i3c_device_do_priv_xfers(struct i3c_device *dev, - struct i3c_priv_xfer *xfers, - int nxfers) +int i3c_device_do_xfers(struct i3c_device *dev, struct i3c_priv_xfer *xfer= s, + int nxfers, enum i3c_xfer_mode mode) { int ret, i; =20 @@ -48,12 +47,12 @@ int i3c_device_do_priv_xfers(struct i3c_device *dev, } =20 i3c_bus_normaluse_lock(dev->bus); - ret =3D i3c_dev_do_priv_xfers_locked(dev->desc, xfers, nxfers); + ret =3D i3c_dev_do_xfers_locked(dev->desc, xfers, nxfers, mode); i3c_bus_normaluse_unlock(dev->bus); =20 return ret; } -EXPORT_SYMBOL_GPL(i3c_device_do_priv_xfers); +EXPORT_SYMBOL_GPL(i3c_device_do_xfers); =20 /** * i3c_device_do_setdasa() - do I3C dynamic address assignement with @@ -260,6 +259,20 @@ i3c_device_match_id(struct i3c_device *i3cdev, } EXPORT_SYMBOL_GPL(i3c_device_match_id); =20 +/** + * i3c_device_get_supported_xfer_mode - Returns the supported transfer mod= e by + * connected master controller. + * @dev: I3C device + * + * Return: a bit mask, which supported transfer mode, bit position is defi= ned at + * enum i3c_hdr_mode + */ +u32 i3c_device_get_supported_xfer_mode(struct i3c_device *dev) +{ + return i3c_dev_get_master(dev->desc)->this->info.hdr_cap | BIT(I3C_SDR); +} +EXPORT_SYMBOL_GPL(i3c_device_get_supported_xfer_mode); + /** * i3c_driver_register_with_owner() - register an I3C device driver * diff --git a/drivers/i3c/internals.h b/drivers/i3c/internals.h index 79ceaa5f5afd6f8772db114472cfad99d4dd4341..f609e5098137c1b00db1830a176= bb44c2802eb6f 100644 --- a/drivers/i3c/internals.h +++ b/drivers/i3c/internals.h @@ -15,9 +15,9 @@ void i3c_bus_normaluse_lock(struct i3c_bus *bus); void i3c_bus_normaluse_unlock(struct i3c_bus *bus); =20 int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev); -int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev, - struct i3c_priv_xfer *xfers, - int nxfers); +int i3c_dev_do_xfers_locked(struct i3c_dev_desc *dev, + struct i3c_xfer *xfers, + int nxfers, enum i3c_xfer_mode mode); int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev); int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev); int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev, diff --git a/drivers/i3c/master.c b/drivers/i3c/master.c index 66513a27e6e776d251203b286bcaecb9d8fc67b9..16a480865ff4a28857f1ea6df33= dbe4a66d1468c 100644 --- a/drivers/i3c/master.c +++ b/drivers/i3c/master.c @@ -2821,10 +2821,14 @@ EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot); =20 static int i3c_master_check_ops(const struct i3c_master_controller_ops *op= s) { - if (!ops || !ops->bus_init || !ops->priv_xfers || + if (!ops || !ops->bus_init || !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers) return -EINVAL; =20 + /* Must provide one of priv_xfers (SDR only) or i3c_xfers (all modes) */ + if (!ops->priv_xfers && !ops->i3c_xfers) + return -EINVAL; + if (ops->request_ibi && (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi || !ops->recycle_ibi_slot)) @@ -3014,9 +3018,8 @@ int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev) dev->boardinfo->init_dyn_addr); } =20 -int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev, - struct i3c_priv_xfer *xfers, - int nxfers) +int i3c_dev_do_xfers_locked(struct i3c_dev_desc *dev, struct i3c_xfer *xfe= rs, + int nxfers, enum i3c_xfer_mode mode) { struct i3c_master_controller *master; =20 @@ -3027,9 +3030,18 @@ int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc= *dev, if (!master || !xfers) return -EINVAL; =20 + if (mode !=3D I3C_SDR && !(master->this->info.hdr_cap & BIT(mode))) + return -EOPNOTSUPP; + + if (master->ops->i3c_xfers) + return master->ops->i3c_xfers(dev, xfers, nxfers, mode); + if (!master->ops->priv_xfers) return -EOPNOTSUPP; =20 + if (mode !=3D I3C_SDR) + return -EINVAL; + return master->ops->priv_xfers(dev, xfers, nxfers); } =20 diff --git a/include/linux/i3c/device.h b/include/linux/i3c/device.h index 7f136de4b73ef839fb4a1837a87b1aebbddbfe93..7f7738041f3809e538816e94f90= b99e58eb806f9 100644 --- a/include/linux/i3c/device.h +++ b/include/linux/i3c/device.h @@ -39,20 +39,25 @@ enum i3c_error_code { }; =20 /** - * enum i3c_hdr_mode - HDR mode ids + * enum i3c_xfer_mode - I3C xfer mode ids * @I3C_HDR_DDR: DDR mode * @I3C_HDR_TSP: TSP mode * @I3C_HDR_TSL: TSL mode + * @I3C_SDR: SDR mode (NOT HDR mode) */ -enum i3c_hdr_mode { - I3C_HDR_DDR, - I3C_HDR_TSP, - I3C_HDR_TSL, +enum i3c_xfer_mode { + /* The below 3 value (I3C_HDR*) must match GETCAP1 Byte bit position */ + I3C_HDR_DDR =3D 0, + I3C_HDR_TSP =3D 1, + I3C_HDR_TSL =3D 2, + /* Use for default SDR transfer mode */ + I3C_SDR =3D 0x31, }; =20 /** - * struct i3c_priv_xfer - I3C SDR private transfer + * struct i3c_xfer - I3C data transfer * @rnw: encodes the transfer direction. true for a read, false for a write + * @cmd: Read/Write command in HDR mode, read: 0x80 - 0xff, write: 0x00 - = 0x7f * @len: transfer length in bytes of the transfer * @actual_len: actual length in bytes are transferred by the controller * @data: input/output buffer @@ -60,8 +65,11 @@ enum i3c_hdr_mode { * @data.out: output buffer. Must point to a DMA-able buffer * @err: I3C error code */ -struct i3c_priv_xfer { - u8 rnw; +struct i3c_xfer { + union { + u8 rnw; + u8 cmd; + }; u16 len; u16 actual_len; union { @@ -71,6 +79,9 @@ struct i3c_priv_xfer { enum i3c_error_code err; }; =20 +/* keep back compatible */ +#define i3c_priv_xfer i3c_xfer + /** * enum i3c_dcr - I3C DCR values * @I3C_DCR_GENERIC_DEVICE: generic I3C device @@ -297,9 +308,15 @@ static __always_inline void i3c_i2c_driver_unregister(= struct i3c_driver *i3cdrv, i3c_i2c_driver_unregister, \ __i2cdrv) =20 -int i3c_device_do_priv_xfers(struct i3c_device *dev, - struct i3c_priv_xfer *xfers, - int nxfers); +int i3c_device_do_xfers(struct i3c_device *dev, struct i3c_xfer *xfers, + int nxfers, enum i3c_xfer_mode mode); + +static inline int i3c_device_do_priv_xfers(struct i3c_device *dev, + struct i3c_priv_xfer *xfers, + int nxfers) +{ + return i3c_device_do_xfers(dev, xfers, nxfers, I3C_SDR); +} =20 int i3c_device_do_setdasa(struct i3c_device *dev); =20 @@ -341,5 +358,6 @@ int i3c_device_request_ibi(struct i3c_device *dev, void i3c_device_free_ibi(struct i3c_device *dev); int i3c_device_enable_ibi(struct i3c_device *dev); int i3c_device_disable_ibi(struct i3c_device *dev); +u32 i3c_device_get_supported_xfer_mode(struct i3c_device *dev); =20 #endif /* I3C_DEV_H */ diff --git a/include/linux/i3c/master.h b/include/linux/i3c/master.h index c52a82dd79a63436c1de6a01c11df9e295c1660e..7e22f9d2a2ca3f4ab808db50f80= 9efd192c795cd 100644 --- a/include/linux/i3c/master.h +++ b/include/linux/i3c/master.h @@ -474,9 +474,13 @@ struct i3c_master_controller_ops { const struct i3c_ccc_cmd *cmd); int (*send_ccc_cmd)(struct i3c_master_controller *master, struct i3c_ccc_cmd *cmd); + /* Depreciated, please use i3c_xfers() */ int (*priv_xfers)(struct i3c_dev_desc *dev, struct i3c_priv_xfer *xfers, int nxfers); + int (*i3c_xfers)(struct i3c_dev_desc *dev, + struct i3c_priv_xfer *xfers, + int nxfers, enum i3c_xfer_mode mode); int (*attach_i2c_dev)(struct i2c_dev_desc *dev); void (*detach_i2c_dev)(struct i2c_dev_desc *dev); int (*i2c_xfers)(struct i2c_dev_desc *dev, --=20 2.34.1 From nobody Sun Feb 8 15:53:27 2026 Received: from PA4PR04CU001.outbound.protection.outlook.com (mail-francecentralazon11013061.outbound.protection.outlook.com [40.107.162.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 35243320CBE; Mon, 27 Oct 2025 20:08:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.162.61 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761595739; cv=fail; b=brWtFXtEE41nzBgLoTa3gNC+8rgxDXY5eHW+CcuM7Mv8T8nYdD1MG4ySYgCVzvY/AjBHidXPbSv7SBkdyC3pj6hS7TmrBP6tyDCT+RmrytEthJgM/4RlE/r/CbQkvdeWbKo4X43mOBdZMreqRhQ7ImrvTYrp18iBL7wISNzZ//c= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761595739; c=relaxed/simple; bh=HH693NU8kzd+Iv3hWINyPBycptPq4xE1Q1XbUVwF0WQ=; h=From:Date:Subject:Content-Type:Message-Id:References:In-Reply-To: To:Cc:MIME-Version; b=BBVBv1dZjHz0mjEAGWQNLioCnB5iD/d4G7IwmQLRPbBWx7q3IqyM4R+bymH51jhNbxR6DYRngKgcz5dvsIgmuEzBdu5gnJ+4aG55QKNdMt71am2RRukyLKdNXZ11zN7vP8Fuonho1JkT3o1rIQjuKD6DUEEYitXcEDcmtSlj6Pc= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; dkim=pass (2048-bit key) header.d=nxp.com header.i=@nxp.com header.b=FyXZZ2Vl; arc=fail smtp.client-ip=40.107.162.61 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=nxp.com header.i=@nxp.com header.b="FyXZZ2Vl" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=dNQYRrZhSWGfejRULh2Iy49SV7Z3U0WNnId36qdhiLLU7rnFSySdNNBxdfjTYBL7GMlT2mC9DhQEV1hb8AN1TJF5YuQec2WIUo5CpodjgnTaNh097RHU641MDFr0qK1O4cOnikV39KuudGEx2UJsir1YnWjcyQDV/nyd0A+zk2n3/27rGSlV3PMCa5leffUVidKYVhdYz4wX99cTt8i813pUtw16vrq64iTY57tbPay/6ixOG2P7URgJa07y3f+VlF3XSdfa6nPQ160/4Ugh3lUTF7l452awBeaZuqcqarCrKFJ9YmK6FWN+g3I8UrNS/Hkf96qteTHi5uc8sd6OXg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=AUJtg6/074SxlRYEqw9eCoiPjPvZ4vpTSDaRi9s0Zxc=; b=ALS0WYEztrcz4BT3TpSO5usZDvDx9cO+8i3nmakQwzEvxyi7E8yaMp3cCVa+didLCjN2Ssxp6iei8x1KOeYwT2HuHQAy90y15Iw9r8LnXQCYTogmOFr/GHYir6kxCeMcm3wEAJ5ARTUwAJwkUQqSeFOY0DklB+2ML5rzYo35jTTnOMRsmds2QLeSYtOkgiN1fVPPblV6Jz/IOb/Y6f5Kx7bQsuS7FvlFeYOoeA6amycLH6Qufn+xxiLL3e8B8FLq61W64Ps6KJBSPiKRabG6F/UH4zSDy1F0ljywFFu/Le8zpiS8yq3PikuoFi1VU2KBwX9txLs719yhJCjGL9EDSQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=AUJtg6/074SxlRYEqw9eCoiPjPvZ4vpTSDaRi9s0Zxc=; b=FyXZZ2Vl9lbltxw7j9l+YZ8Ip7uG3NGzH/CIJP/dSaVLvF09TXOQ5DJ1pbAWjlmUNkyVBmRId+kmCn04NWck2SGneCWYxrDhWX72lZpWCzk/PgjZzEJj87ceFPpEF/lQUOwgkH3OqSvlcAS/WotUHhG+qpsSlCXdn+wsYuSpydNuA173g190GzZUbCE2EQbRsjjd0+wXdDEkWoUNz6dJ2YYrShaOKyP4masEJLkgqR29KQF9P/AKfKPEYsamwvZ3/X63ez6s/tdsb9RkmWrv1uocsiIV78s42WNNNI0JT/dLY80ouzo2BcExjkyLwzVfx2lFkwyPtk6uqAB1i3uAhQ== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AS4PR04MB9621.eurprd04.prod.outlook.com (2603:10a6:20b:4ff::22) by VI0PR04MB11919.eurprd04.prod.outlook.com (2603:10a6:800:306::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Mon, 27 Oct 2025 20:08:53 +0000 Received: from AS4PR04MB9621.eurprd04.prod.outlook.com ([fe80::a84d:82bf:a9ff:171e]) by AS4PR04MB9621.eurprd04.prod.outlook.com ([fe80::a84d:82bf:a9ff:171e%4]) with mapi id 15.20.9253.017; Mon, 27 Oct 2025 20:08:53 +0000 From: Frank Li Date: Mon, 27 Oct 2025 16:08:30 -0400 Subject: [PATCH v7 2/5] i3c: master: svc: Replace bool rnw with union for HDR support Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251027-i3c_ddr-v7-2-866a0ff7fc46@nxp.com> References: <20251027-i3c_ddr-v7-0-866a0ff7fc46@nxp.com> In-Reply-To: <20251027-i3c_ddr-v7-0-866a0ff7fc46@nxp.com> To: Alexandre Belloni , Miquel Raynal , Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-iio@vger.kernel.org, joshua.yeong@starfivetech.com, devicetree@vger.kernel.org, Frank Li X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1761595722; l=3017; i=Frank.Li@nxp.com; s=20240130; h=from:subject:message-id; bh=HH693NU8kzd+Iv3hWINyPBycptPq4xE1Q1XbUVwF0WQ=; b=AJdhucHA2aQcop/xqbhWKKbEitBxo+mmK4c/kTjQpIXXER+z22qHpz5l7DMixJedoHm3LBMjE 3FzfkxCXNUWCQnR7VHkMCij7SFKwW//7lzTCPfOwlS5be/T+vPYNWGe X-Developer-Key: i=Frank.Li@nxp.com; a=ed25519; pk=I0L1sDUfPxpAkRvPKy7MdauTuSENRq+DnA+G4qcS94Q= X-ClientProxiedBy: PH1PEPF00013303.namprd07.prod.outlook.com (2603:10b6:518:1::12) To AS4PR04MB9621.eurprd04.prod.outlook.com (2603:10a6:20b:4ff::22) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS4PR04MB9621:EE_|VI0PR04MB11919:EE_ X-MS-Office365-Filtering-Correlation-Id: a3184dce-637f-4cc7-4349-08de1594a6fc X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|19092799006|376014|52116014|7416014|366016|1800799024|38350700014; X-Microsoft-Antispam-Message-Info: =?utf-8?B?NVZkbGZ5bk90cDdUTUVXQVBQei9kL2M1SGZ1U0UvNlh6YUhWN1UvNkwwTmdG?= =?utf-8?B?MkZhT1ZrbjNLejZlL0s0MW41V2ZtQ3VibmpmNHYrSVRmZklEQmdmYXczQXlL?= =?utf-8?B?SnBWVC95bHNTVHp4Zk95R09TSm9QMGtNRHZBdW8yckRQSGNBSVFaQXhNZ0tZ?= =?utf-8?B?eGczNTE0Z2N1MUV6RC9DMU1IOGVuTURCbnFiUE9LZW9KWGJEc3Y3cTgwRGU5?= =?utf-8?B?K1VOS3RyenZ5MU1jSjdva2thcTc3NGhUVTVTTWx0M3lZOTRZekhsUm5TazZa?= =?utf-8?B?WkJ3US8yd0Nrc0xlRXZUL3pOcGx1SG50a2ZJZ3ZsU2QzMk5qTU0rRGhGUnp1?= =?utf-8?B?cDRTWDN3YkZNYnQwQnJEMndBL0UrY04zb045cVFHODlPcGpqQlBMeitOUGNp?= =?utf-8?B?dkhDMFNLQ2pGU2lwN0IweUhyVEdBQStEWkxjdXRhYzBHdlIxU1dXZ2pkNXJ2?= =?utf-8?B?cEd0ZFduSU4vNTJLQUNvSXJ4Q0tmMlVtMk9UamFsQ3lpdTJwdkVWYTJhTEpr?= =?utf-8?B?NklKS1hURkt3M01xVG44VHBpeCt3QWd0aW5BV1pmU2ZkcngvVWFyby8xZnNZ?= =?utf-8?B?cEo4Nlo4SzFraUJQUTVjNjY3OFdOOHA0TDFsdjIvL2VkUmUyTXYvcFU0dlE2?= =?utf-8?B?WEZnekZDeW5IT1k4OFlMVmVsUXJId2hZQUNDQ3BBYytUQnhZWUFyb3FDb1pJ?= =?utf-8?B?NWlPSmorTFVOb0ZQcFY5S3M2Vm0yc2RDMkZHOW1DVE1rMGZWSlBmUWJUVkVq?= =?utf-8?B?M1BBemN5eHhZUFpUcU9iemtoRW10cVlwUWlXeTlyZ1YxTlIvcjA3MkY0aHFL?= =?utf-8?B?L1ZYV0krOFF2NkRSWUJuTWkxdjN3NDZSOVlmVFhMRE5sNlJzM3YxSG1VVGxu?= =?utf-8?B?TFJTRjZQeXErem9ac3pkSjJMNWpyNHZKTVhYbkdHSVhyWFc3TFUwTU11U1g2?= =?utf-8?B?bTF4R0hMdUNTSkY1Zko3TG9ha2VSalUzTFRmWnQ2QUhPdkJzOFRTUWhYRTZw?= =?utf-8?B?anlNRlhBa3R4SVpkOWg4MThqcERTcm1UczcyYUd3YVRFbTFjTXh3L0o5SjRM?= =?utf-8?B?RjFnNGw4S2laZkxrZ09jTENjcmVOSlUrYmhKUENGVWdsdWVIdVp4UW5wMjUv?= =?utf-8?B?ZkZiOUFpazdEMXF5SUx3OWpubjdDcUxGdWVEci95eXRpdFJyaDNXMm9STmtL?= =?utf-8?B?UWFabDJQeE44aVpWWndSK3FHWnRqVTVLcUFjZ01CdnE0NFZ3ZGlnVXlnVDZn?= =?utf-8?B?TG1jdWprMENrVVI3ei91WUl4MTROUmdvL1FvTWErR29JOCtablB1b3dDbWx4?= =?utf-8?B?R2EzWGlyMUVPOE54S3AwRkx4bERjcllSVThSU1VoR2xXUmgyZFl2NFhvdXhx?= =?utf-8?B?UUZUblpBU3JkdlVmeFZoV1FHanRXNzNXUjRxZFdINm1DNmpDclR5TGlYdTJi?= =?utf-8?B?U0IyNnBSdlhPbzY5cGFxZk5EbDZlWHp0MU9DMjRTNmVYMVBtdmRZSXliSmZ1?= =?utf-8?B?SWR2VXFiWjJIU2ZwRkZwRlQ2cWRwZUM1d0drTVU3eUZzaUNKek9LZWtPb204?= =?utf-8?B?SFNMK0F3RkxVNmR6cWsrRFlZVElWdkZ3RGRuTStxMGIrbXFjS2lOSTd5eXhO?= =?utf-8?B?ZWpsb3F4a2FIanJ5L0pyQkgrS25aV1k5MkNTRUNndWNIcWdOQ0VWT2dnd2tv?= =?utf-8?B?aEpoZUgvZXNKYVpWNlFzOWNXa2J1cXdmUk80aTZtNzlYRHltQmFoWkxERGxJ?= =?utf-8?B?ZERvZmkvcE1NOEVYejlpNWNNRS9kMkNGY01vQko0M1BIcWk4SkZVM3pGaEZn?= =?utf-8?B?SVB3S241SmJyQmdVUWRZa21EZEdPTmZvSndETkYyOWhtWURHZWFzenFBMmJT?= =?utf-8?B?bHY4NkRVRzllbmZvUHd5eE4xdnlKRXk4L1UxRk1FNSttbmV5ZmgycktSWkVC?= =?utf-8?B?SWFLaDlqN2JLSXFtb216RkFxSGJUa25icm9JT3NjTGgzdXMwazFzdUZwaCs0?= =?utf-8?B?SjVab1hQdXg4cGlBR2o4OHhYbVFVY3RsZ1FDbSt5SmxPckZ2VVZ5OGJ0czhq?= =?utf-8?Q?KhTm6s?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AS4PR04MB9621.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(19092799006)(376014)(52116014)(7416014)(366016)(1800799024)(38350700014);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?R2FlNlMyT2dxRGVZK2l5c3dTeDRQY0Z0Q2xjUnkzWitrOVZzM3BvU2lWZUV1?= =?utf-8?B?aXZZcDhIdEpBKzJNOEZVc0Rxd1gxMnFvN1BoVUovend6aVp5c2p6QUh2SGw4?= =?utf-8?B?dXo4WEhkWThFb0prSmJML09vV24wNUlBY0RMOHltUW1FMGkyTG5xaG0wVTNM?= =?utf-8?B?OHdEL0NCeG5Id3NtSkpSVGdWUzNBUFI1MHpXTWR1UDlSUkZqQnJoU0RZTG9z?= =?utf-8?B?Ui81dXNEd0MzZTVCeGZVKzcvMEgyMXJwL0VjU25KdjVYbHRnSWcrVmU0cnBB?= =?utf-8?B?ZHJzSW1vbFVGRVJhTzFjSzh5WUgrTUkrSkNucHY2NGRzZzdvWlE4MlhrNEhO?= =?utf-8?B?UDcrMC9mQzVxTXFLS0lhZXRHSXVxV1lMbFNpUDUyalpUc3BoK3hQN1VWa3Jt?= =?utf-8?B?b2FWcDQ0V0ZXYU1NWTZmZjJXa2NsUXEvZmVxK3Q5OTdsTFNjMGthK1k1Ulk0?= =?utf-8?B?Uy93M1dkNjMwVzdtZEs3Rm1JWjhXYlJJKzlxZ0VYSjRIMjVjajV6Z0xQUWgz?= =?utf-8?B?Y3Jsbm5hK2NhcmFNcnRMTE90c1N2a1dFMUwvNHhOeXl2L1hSaGRpTGNIam5z?= =?utf-8?B?dy9jUGREUmIrZzlLRU9QcVBRdFVURHZGYVNyTEowd0ZpWHJyUWhHSWxqVzly?= =?utf-8?B?dXFmY2xaUGl2OVJrZUtDK2U5YW53dU5NYzJnbmk1M29DNlRvdDNFeG5RSHc4?= =?utf-8?B?anRickg3MnB4bjVpVXN1b0JtWXZCWVZqRnNjeE9LamV4SmhublNaUVNOd2d2?= =?utf-8?B?MW51VG1rd0dhL1E3aThMdEpGZEtHSUhCRFdBNGc5aUhId0s5S25wRDBJZHZN?= =?utf-8?B?SW9HTzhueEdrdmRFaFlEK0twNC9VWFBrUzVuTjdvUjcxWHlRcm5IR2VuUDY5?= =?utf-8?B?YndoUEcxNDVBRGZhcklQTmREVXVJMG9veVhyTU81SDFMZVZUTGJzUGJHUjhC?= =?utf-8?B?Y0htd2FQQmpkV0o0VkRWODl4NkhuWDYwSXZaOWVWa1JZd3VhSTFMT2RMaWVJ?= =?utf-8?B?azVUbjliM2hoOG95QWU3SlRXTFc1WjNuUjAvOE83VGpsa3VUYVdyTmFRZHRw?= =?utf-8?B?Tng4NWYyc0lsTlJ0MGg2ZWtZOGVLRm4zTkdMOWg4Nk9EUjhQcWVUZW5zaGMx?= =?utf-8?B?R295MHV2OU9GR1JuOTNua3pFZWdmWDMvUy9RNjNtcnhpYXdOTFJPeVJ0S0tN?= =?utf-8?B?YXNXWExkVXVLdFVQaFF4aXFyZ3l4Qlg3NjUxbjNoR2R1VEdiSTM5TW5yY2sy?= =?utf-8?B?OGNRekMrdVpubENjK0ppa21UYkZEdkVLK0M3dWNBZTBmQlJYajR4Qy9heGIv?= =?utf-8?B?NTVIaGVnbXQ4VGtHcnFVbFFBTjkxL0lXeHB0UGQ3am9tWW9UZnBuT2lkdTYr?= =?utf-8?B?S2tQbE41TDMyNjZQdlVjQ1E3U05hTFJoaTJJa2ZuY1FmblFhaVFvS2t1UTY2?= =?utf-8?B?SHJneUoxb0Z4TGEyd2VSRXJManNCdEFFMno2YkhHTWZxNEdoVEZ4SXRNQXp6?= =?utf-8?B?TDJrMzc4WXYwMldXSkZOWHJ4QUdRUXhSN05kWGE5QzBCdWtkdUQyNGVEeGpH?= =?utf-8?B?dVhhVTZ6ekR5TFV0T0tHNTJCYjdSUzgxdTN1d1FST2hGRXBXWGh2RFY2UXpn?= =?utf-8?B?b3FaMmdiSzhWdFhEVk40OHFkblZzSHg4MW1hVG5oQ1o4YTQ4MzJJUlVpTXdK?= =?utf-8?B?MkY0N0J3OTI5N1MrS3kvRmlGaDVIMHlkUFl5VEt5eDFKSFRlN042clBuSTJL?= =?utf-8?B?UmVDK2QwQlFHY1Y5NjFrRDBWOEhHMEUzajc0YXZxRkNsbE9BUjhhb3lzZ2FK?= =?utf-8?B?b3dZazVveklGQS9taHVOQk03SlUxSGNwcnFtVk5wWGdlZURRdnhxbGJBNWpW?= =?utf-8?B?UDhkaDRtb2F5QUcxUDB1ZTZ6SkFmdE0rOC9oK0ZTejk0RkxVbXhMS2dyNDg1?= =?utf-8?B?UnJ3bjZqVFFsUkZJekJqaFFaN1Z2QmhURURDbEpnVUYxYVdqVE5YMjlEbVpi?= =?utf-8?B?YXdIL05zRnN5dWl2NStub3ZLd1ViMWR0L2JwSjJqZ0NoQURpUURXa2FkcW9Y?= =?utf-8?B?clR6eWJwc1JzNWlvaU8zUnhrWUFMWUcvNWdGajVBU1pFTnIrTUFuU0QxY0dw?= =?utf-8?Q?u9BU=3D?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: a3184dce-637f-4cc7-4349-08de1594a6fc X-MS-Exchange-CrossTenant-AuthSource: AS4PR04MB9621.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Oct 2025 20:08:53.5565 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: xE5bJYANsdSz9HopPZ+QmVnXsL9O62oaPW1GyUNdkRl8tJcOdmmnJCDyCoA8VhqeQNXq8nhC7rJn6Z/a72MSAg== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI0PR04MB11919 Replace the bool rnw field with a union in preparation for adding HDR support. HDR uses a cmd field instead of the rnw bit to indicate read or write direction. Add helper function svc_cmd_is_read() to check transfer direction. Add a local variable 'rnw' in svc_i3c_master_priv_xfers() to avoid repeatedly accessing xfers[i].rnw. No functional change. Signed-off-by: Frank Li --- change in v7 none --- drivers/i3c/master/svc-i3c-master.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-) diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i= 3c-master.c index 9641e66a4e5f2da3bd84b30fa741e5e19d87465d..7c516e05d0a1a118479ee3d8ea8= ae37ae19fea57 100644 --- a/drivers/i3c/master/svc-i3c-master.c +++ b/drivers/i3c/master/svc-i3c-master.c @@ -165,7 +165,11 @@ =20 struct svc_i3c_cmd { u8 addr; - bool rnw; + union { + bool rnw; + u8 cmd; + u32 rnw_cmd; + }; u8 *in; const void *out; unsigned int len; @@ -383,6 +387,11 @@ svc_i3c_master_dev_from_addr(struct svc_i3c_master *ma= ster, return master->descs[i]; } =20 +static bool svc_cmd_is_read(u32 rnw_cmd, u32 type) +{ + return rnw_cmd; +} + static void svc_i3c_master_emit_stop(struct svc_i3c_master *master) { writel(SVC_I3C_MCTRL_REQUEST_STOP, master->regs + SVC_I3C_MCTRL); @@ -1293,10 +1302,11 @@ static int svc_i3c_master_write(struct svc_i3c_mast= er *master, } =20 static int svc_i3c_master_xfer(struct svc_i3c_master *master, - bool rnw, unsigned int xfer_type, u8 addr, + u32 rnw_cmd, unsigned int xfer_type, u8 addr, u8 *in, const u8 *out, unsigned int xfer_len, unsigned int *actual_len, bool continued, bool repeat_start) { + bool rnw =3D svc_cmd_is_read(rnw_cmd, xfer_type); int retry =3D repeat_start ? 1 : 2; u32 reg; int ret; @@ -1484,7 +1494,7 @@ static void svc_i3c_master_start_xfer_locked(struct s= vc_i3c_master *master) for (i =3D 0; i < xfer->ncmds; i++) { struct svc_i3c_cmd *cmd =3D &xfer->cmds[i]; =20 - ret =3D svc_i3c_master_xfer(master, cmd->rnw, xfer->type, + ret =3D svc_i3c_master_xfer(master, cmd->rnw_cmd, xfer->type, cmd->addr, cmd->in, cmd->out, cmd->len, &cmd->actual_len, cmd->continued, i > 0); @@ -1677,14 +1687,15 @@ static int svc_i3c_master_priv_xfers(struct i3c_dev= _desc *dev, =20 for (i =3D 0; i < nxfers; i++) { struct svc_i3c_cmd *cmd =3D &xfer->cmds[i]; + bool rnw =3D xfers[i].rnw; =20 cmd->xfer =3D &xfers[i]; cmd->addr =3D master->addrs[data->index]; - cmd->rnw =3D xfers[i].rnw; - cmd->in =3D xfers[i].rnw ? xfers[i].data.in : NULL; - cmd->out =3D xfers[i].rnw ? NULL : xfers[i].data.out; + cmd->rnw =3D rnw; + cmd->in =3D rnw ? xfers[i].data.in : NULL; + cmd->out =3D rnw ? NULL : xfers[i].data.out; cmd->len =3D xfers[i].len; - cmd->actual_len =3D xfers[i].rnw ? xfers[i].len : 0; + cmd->actual_len =3D rnw ? xfers[i].len : 0; cmd->continued =3D (i + 1) < nxfers; } =20 --=20 2.34.1 From nobody Sun Feb 8 15:53:27 2026 Received: from PA4PR04CU001.outbound.protection.outlook.com (mail-francecentralazon11013061.outbound.protection.outlook.com [40.107.162.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id DA35730DEA2; Mon, 27 Oct 2025 20:08:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.162.61 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761595742; cv=fail; b=N/UNj+6IkAgeu0KyX+smcejHLuLNZggrzVQBdi29D/ENf/pHupCr2+c6VkxgbGZrvJ9bKZhKkn+4qx9gt9pwyt3iatTAvNgY40KQwXXV92pzCCU3HwqbRt3CqZ+NTuAN2R8ez0nYI3bBOwF4hjMkfpeGDnZAsekIwogMn6p3vlI= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761595742; c=relaxed/simple; bh=qTffBCdu8Mi22zZGCzL0uFmkILG2U6LbqIh7+jK2h4k=; h=From:Date:Subject:Content-Type:Message-Id:References:In-Reply-To: To:Cc:MIME-Version; b=aWwMgWNvSw2xmhfV1jp2+7s3UuvSxj6mga3+78yZEqSRswtfNkOyjc8lMOM4qGE+nI3FLhrdx038aIooM9smqTKEtXFyycUbFaX6NRtfvrifNZGDkuubTkap7eWPauCxoNX8nPzqzgOS4swpw9uBeevjCYP/m2fG6x/yh8NX/cQ= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; dkim=pass (2048-bit key) header.d=nxp.com header.i=@nxp.com header.b=fERJWjCl; arc=fail smtp.client-ip=40.107.162.61 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=nxp.com header.i=@nxp.com header.b="fERJWjCl" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=Fx3omwlrmsVTeC/4ZoEbXYuq184+/nsXJwDD9dOwAoYIxis5/KSUn1Kq4TiwN0Vekd9wNRhBWznPKUaunDK33PP5Qg3U78KgLqKiYGaX5ZazftUGDTLEHDVfIPjXV81te8SLtAJL9K3yGc4Tm5bynS4oLEwnVz8x05jqyBG8NXD5dcP4CnUsQZKNoIeC+reM6kl5LeeUc+GHpVSU3W911iDlZ8dccsUjCZKgUEqDPRO5bZIxjd7jjgrLWKbpCYnZU3sX97kpjb1a3iwi9vmvh1EDHmiLl+cJBoNhuelDvvrxmC1SEqLGPxC1QV1r3nih3962UzTXO4fmL+v5DXz0sw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=mizs44l9kM6gfuXuMhguTCgPiOcdxwSSLKRegAmEMuw=; b=j/9CHwi4uC5y1Wy2fq88g0Kr5FM/L3qnZsdLSJGyCMyl0+ZpJrQbyPG6lyUZvd8CJN9V5n3wuzTlq/c43wcYuZeIpSSDB3xT2Bv7IbPKYX3RTVKTeIfs3vOVRpxdZ13q85tiEDnapew2isd4vY+X4Ro73Dm+sYzFXat/ICIloiUUxOI4hP90AOTBefVAU05ZWG4Xw3ccay2jPfVoQTXDMokHnMyy9RgEpslq6XcCTKyWj6MBbRrgj+sCEoeGSvcaIIguzq+nRZ6fM9v016PjcdpTuJJ7z1vXbItJraV0hCKENtAzcSWqRxgqbHcIZqOtL9s4rCHnFck8+fHGMPzztw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=mizs44l9kM6gfuXuMhguTCgPiOcdxwSSLKRegAmEMuw=; b=fERJWjClHTrVo5pnqxeEiMNm/g6/wbrotGpkObONQrOn5IghS5u0+sKgP/MXDfa/q3JWZdJdc9Bi/sieEr6hPp17KGfoOJ5EE4AhAiQsQRyRWQJDy7zYofzNkzEZXferDm0SVT1YgeI9i21D4oujUWuuoihOVJI2ysEeFlcaHjhkqJvCxZxs9mV5stji256RN2Jh/enEMn/8ri1wQiUSKXAFQ5KVBzEGOkPimhwfxNJeoJ7LpZmMwIuHiY1ajFzxZ4IpmSJIZIjLFJJzW5ntGgeC9mQ3sLccW3ggc1zl/5Rq0+wR9BV+Z8BPAsmoOXhNH4kpjx9Md23ZfEzD/TW7vg== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AS4PR04MB9621.eurprd04.prod.outlook.com (2603:10a6:20b:4ff::22) by VI0PR04MB11919.eurprd04.prod.outlook.com (2603:10a6:800:306::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Mon, 27 Oct 2025 20:08:57 +0000 Received: from AS4PR04MB9621.eurprd04.prod.outlook.com ([fe80::a84d:82bf:a9ff:171e]) by AS4PR04MB9621.eurprd04.prod.outlook.com ([fe80::a84d:82bf:a9ff:171e%4]) with mapi id 15.20.9253.017; Mon, 27 Oct 2025 20:08:57 +0000 From: Frank Li Date: Mon, 27 Oct 2025 16:08:31 -0400 Subject: [PATCH v7 3/5] i3c: master: svc: Add basic HDR mode support Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251027-i3c_ddr-v7-3-866a0ff7fc46@nxp.com> References: <20251027-i3c_ddr-v7-0-866a0ff7fc46@nxp.com> In-Reply-To: <20251027-i3c_ddr-v7-0-866a0ff7fc46@nxp.com> To: Alexandre Belloni , Miquel Raynal , Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-iio@vger.kernel.org, joshua.yeong@starfivetech.com, devicetree@vger.kernel.org, Frank Li , Carlos Song X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1761595722; l=9137; i=Frank.Li@nxp.com; s=20240130; h=from:subject:message-id; bh=qTffBCdu8Mi22zZGCzL0uFmkILG2U6LbqIh7+jK2h4k=; b=FVlZCFNkhGMvw1bDP7XujuuUGMc78nkT6wZaMtVMaahlc4MCaQROKnmtoIAKBwNG3BgMxV4zC 6afGdOYyx9XA8kAao00qD80JrMswNKBp8+VvoQ64JK16JlvVoFhQuev X-Developer-Key: i=Frank.Li@nxp.com; a=ed25519; pk=I0L1sDUfPxpAkRvPKy7MdauTuSENRq+DnA+G4qcS94Q= X-ClientProxiedBy: PH1PEPF00013303.namprd07.prod.outlook.com (2603:10b6:518:1::12) To AS4PR04MB9621.eurprd04.prod.outlook.com (2603:10a6:20b:4ff::22) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS4PR04MB9621:EE_|VI0PR04MB11919:EE_ X-MS-Office365-Filtering-Correlation-Id: b84ed79a-f9cc-4b3b-3c7b-08de1594a933 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|19092799006|376014|52116014|7416014|366016|1800799024|38350700014; X-Microsoft-Antispam-Message-Info: =?utf-8?B?ZVBXWU9DS01abnh6aElJWjBtN2JDNnNEMC9LWUJwZEJmS2JDNXZvYjVhbUdL?= =?utf-8?B?Ty9oMzdhZXFreW96Y1dzSXZ4T1dJVlpCbnIrQVZCVmltMktIaFN2eHdtekc4?= =?utf-8?B?NlVGTWpWai9CSm5WcWZ0RGVIbVNSYVNxMGtDRG5CN3hQNmVhbGM4d0tDMHZh?= =?utf-8?B?TndUTkZpUFU4Y2x4UkM0YUhaMGFVdkcvV1FKaXhjZ2diM0J4RDVndlU2ZmFK?= =?utf-8?B?T2Iyb1Vmd0gySFJ4bjF5Vk11TkJhOTI4UTltNGZ1MmF2c3dYRXYyVjRGMndp?= =?utf-8?B?QUUzTGF1NjdnNjhZVUdDU29CU0JpdHZhckZVUCtlbG9LWElyYzF2bTZIRndT?= =?utf-8?B?K0pFUldpYm9lS2lNTnVXc2dZdGNWaE8yMDU2NW41akxwUVFxVGhpR3pWMThs?= =?utf-8?B?OUxNaVhoTFpFc0xQcFNhaVEvWkxXNnJrR25oNzFXMHpCY1JndE9FNEczbDVZ?= =?utf-8?B?dVBmY1lJeUViY2RMWDdVbWZaM3orckhFc0lqbHkyMW5yVXBnZ0JwVWRUckpm?= =?utf-8?B?Vy9DUHIvcURqUHBvYWNHckFCWUhadkwranlzVnNCUzQvaDQ2NW03SWh3Q3hj?= =?utf-8?B?TnBJYlhqVkJKNEMwZHVPWEw1WThPRmpoY3A0bzlBOHZtZTIvWmJmUXFOTWpr?= =?utf-8?B?UEQwRUFkc0liQWh3eThZdkRBLzFuVXBuckZOUFNjZVErREpoQzNXTm9Wdkk3?= =?utf-8?B?WFlIeFhycXdNOFpoMnNMOERXdlFGeHZFSFZzQUxJR2lXVzRWWngwUVlKSHNV?= =?utf-8?B?VTJsSXQ5VkYrYURDYThQV3Zwa0Q5NjdGREhGQzZxOFIyRkFZVFBIRGJwOXFG?= =?utf-8?B?b3Z6YzJLQjlkcXBMVUY1V2dVa0hQUDM2YUpobU16V0M2SnJhZjhOQUNnUmt2?= =?utf-8?B?Ry85R2xRZElwazBXU1VMWUxJOVNtTDIvcGpQcGxycnkyVCs3YTNqb3k5UzEy?= =?utf-8?B?M2hmdEM5eksxOWdKakIrbW83QUxWVDIrRXNqUE9ZcXBKb0JudndIQnEzS3pq?= =?utf-8?B?dzd4VlZNNklEMUNqZjdncHMzUGJEdkI5NU45eHVaYStwNmJVSldROVZ6NVQx?= =?utf-8?B?THBwUVdROVRObVJlSmlISDNrcDJPNzFIQnRsYTFTQ1ZEWWxTWEwyZXJVc2pk?= =?utf-8?B?UmM0R0FRRnM0RTF4UktDcWZMd2t1UUlEZUhCaHhrd0dCdmRjekhEbVp2MVVX?= =?utf-8?B?djRMNWhPbnBNVWN3Z3ltRGFJUmNFdkJIOXdSNXZLcFJucFFnS3hCcDdoVkxE?= =?utf-8?B?TG9iMi80Qm5CSG5kSWcxS1VYYnlQK2pxT2FCN3FZbEZCMVVTK1hPU0ZWVUlq?= =?utf-8?B?WGRNcVRGN0FDOVpQNEM1N1NTVXE4cWw4Z2ZieS9GMWl3QkptYXJDR3FUM1Fr?= =?utf-8?B?cWsvczB0cUZXOU1PQVVnTkVsdzVKK3V3UlFHZHEraTg4emZwUHJYT1VicWhN?= =?utf-8?B?b0lKSnQyVEtEendvcFhGV3A2OWJlTjNndE1zNWpLZjZmTW8yWmloWDRsMUg4?= =?utf-8?B?YWFpMjd3QzdienBZbk1HTXI0YWFCeTl2czJLWnRvOE9ZdlhkeEhlY3h1bXRi?= =?utf-8?B?Q3F4S241RHM3VEZodFBHMjQwMXkyS0diZUJGWlNCcHVBZ2RNajV3OEFKdEw4?= =?utf-8?B?UnpVdGNVRDJOSjZZY3JzdzJCQk53YjM1WXYxZk5rVEZueEt2UCtleFI4VDZq?= =?utf-8?B?NU55VnlmRkg3cWl4UytFMUZtNkdQY0VGVXJFSjVGalBSTTdLUUlmVjRlYWZo?= =?utf-8?B?ckhxNnJJOFFsRkhSY0VEeWQvQ01HR3VsNzZXMDVicEJLYW1yRWJuM1Q5UTR4?= =?utf-8?B?a2puUENwWURRVUJoYlQ2dmUxaXFKRGdtOXkzVE1KMUZoMlYzVzR5RGpvS2dj?= =?utf-8?B?NjFnd0QvUGc1RGh6aGkvbERMUms2dHcrdlJ4ZU44MFkveERhZmlDaUFqWHJD?= =?utf-8?B?MVJxT2JET0RHeTExY2V1V1BDdENEdnFrdkoxOUl5S3crT2pldnprQVJBTW5n?= =?utf-8?B?R2Q1MDBVUE4zMDRhajNTTVpHMFFLcUR3Q05hbTc4ZDIwdjVxM0ovZ3lJeHhs?= =?utf-8?Q?kALGAL?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AS4PR04MB9621.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(19092799006)(376014)(52116014)(7416014)(366016)(1800799024)(38350700014);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?MjhURlp0dVlIZXlrN3pZaXpvcFJnKzYzY1dJeXpLSFpGTzM3YVFGYzFyazNG?= =?utf-8?B?KzhhYmt6KzVFYkpGWTkyYm1NbkRMN1lMeG9FNGU4bTQydlV5SU0xYXdsRnZB?= =?utf-8?B?WjgzOXRYQ2R3SVVneU43Nkw0Qkc3WG5tSG45LzJpaEtPZ3FIMXI4UFRONkJY?= =?utf-8?B?RWdkTDlSbk5ZWlFad3d2WFlnbVdSTHVZZTV3Z1ZlL3lsUGd1cG1GOVRjM2Rw?= =?utf-8?B?eWJMWGp1TkRjS2FKZk42TnBVMUErSmxJdXo4NkdNYllEaE5OVnNQcTQ5dTdn?= =?utf-8?B?YnVXWkllaFgzVlNzRmplWGhzYU1URDlUN2ozV09KQXpiQS9oZDNDbE9NcVdp?= =?utf-8?B?L0Z2S2YwRjFCZUMvYitXaGdBT1NnWVF6b2g2UElGUHZScEdBMytGRW1OemYv?= =?utf-8?B?V2NJbVlGcDBXenc3c3pMVTlaRVA5ZDZkeVMzR1RVdjdwMEt2dCtXbUFldEpL?= =?utf-8?B?MUdtYkxLS083K0h4MXhBbmh6NUJhTmNxTFV4RkhYNmJYenRrNmppK3RzbVg4?= =?utf-8?B?elZsYUNwWHJZOWVUZjNtV0d6eDNZM3B6SldmaWZyVDRVS3Q1WmNSOVROYzR0?= =?utf-8?B?RXBnSzhvWGNoMkVQbWNmRFJYMVlxVnlCTVdXcjdWamFpb3VjckcwT21QVWU3?= =?utf-8?B?ZC9PM28ybld6eUFYRDRibEFxOUVFT3dsckZJRndkRHMrUEdmYlUvOXpGcjJT?= =?utf-8?B?bjRyaHlrNWhqUWZaeHAwaklHY0VobWpQL25uS3FHanc3RmhaNTlLOWtvK0Nv?= =?utf-8?B?ZUNRY0RQRGlXbDJyQnpoQW5VNHZmQW42NENpc2xFNHdwZml5OUhGdVpnVGlF?= =?utf-8?B?NnFZc09PNHJsL1NGRWpqa1lTNko3cGs5VmV0VmU4SDhCZ0NJQ0FxWUNCN3Ju?= =?utf-8?B?WlQ3OTFwdGtYcTI2eEpVc2NEMmhHNUc1dUU3UHRuUDM2L25qNTVpU092bnVU?= =?utf-8?B?MFdxTW9hTEd5b0dIaVdHS3lOUWJ6YnZ5cjJ3bG15OUxidWwranBRVFVTd1NU?= =?utf-8?B?SXpSNFFKVytnOW5RMDhQUDZLanNRbUM3TWt5ZXFmdlc5bUVDRWpaT0ZqM1lX?= =?utf-8?B?VUxFVk1aUUl5czRCbHJIWUxYVHlwT0pYTTY2OXRPb2Y5NlNEQmVYMTc1QXpQ?= =?utf-8?B?YmFaTVlMTnZTNEp3RFJXamk3Y1NibDJnU1NqYUVuY3FHS2k4elFBUk5CNCto?= =?utf-8?B?RkVJSjUveC95V1VNY29JandSbEFuNVBHS1FEeTZqM2I5WGRFRUx3cU5TT2NQ?= =?utf-8?B?NWk2dDJCTlNNSlFMLzhNVSt0bDFQeDFVaTNuMS9rREMzOWMvVURkUkdJdDdO?= =?utf-8?B?ems2N0I3MHhZeFhRVGxQRUhvaGJkMm9IS2VoOXVaTGg1OTllOVRpL041NUda?= =?utf-8?B?a0hGMGw3U2FiOWRjVG1HVlVaeDZmeHZKV202d0NDakVaTGh0MkVTa1p6QTMv?= =?utf-8?B?OW5STjBQREVGQ214RGh0dC95VFN1eUNaZmtCVEgzdUpUbm43d01kcStib1JY?= =?utf-8?B?UWd4cGZDRkpJMGF2RGtmei9KUVJaKzZhV2dtQUl6aCtMM09yTytvV2VqUFFj?= =?utf-8?B?bElSeVNCQmFoWllsa3lEQUFiNjFhdnRDcFNvaTFJTXk1aDRJUFd0SVBlN3cr?= =?utf-8?B?TzdXM1h5RWlwWUpFNWYyK0RmSE5jZVE2VnQzYTRhVEVuRElsWlhHZGs3dDNQ?= =?utf-8?B?TGFnN01wamY2RGhmc0M0eEhPRDFSK0wyVFljdm9YOHZkUFRPVjVRREpkMHhu?= =?utf-8?B?UGpLb2FWZlpXQ0VGZEIrSmszeTVWbDFYanlZZkZzTGsrU1RQeWVSZi9zOUJJ?= =?utf-8?B?d0xxOXQyMFp1czNuOXZnaEdoWE01WTEwRDExcDZ0RkRuNHpLSy9nZHpDVXhT?= =?utf-8?B?TERYbERLeklzWk1FSytDZCt2RXpMdHdnS3V3OWZyem5Qb3Zyd3QzbkdEOXRx?= =?utf-8?B?blJKdkVTeW4zNUU2Z0pwQ3p2WEtybUxTb2JXaU0yS0I3U0UzU2k4R21lOEdj?= =?utf-8?B?NDRwQkNZaU9ERzBiVUlzTWh1eGNIQmoveGczRisvQ0p2eVI3Q2JyVEw2VEta?= =?utf-8?B?S2xjQXUzYkU2d3JlZENqeisxODQ4T2t0WWwxaTZoTWJmQTQybzlRUDg3aUo0?= =?utf-8?Q?vN4U=3D?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: b84ed79a-f9cc-4b3b-3c7b-08de1594a933 X-MS-Exchange-CrossTenant-AuthSource: AS4PR04MB9621.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Oct 2025 20:08:57.2837 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: OfbrscMnu9+k5TL82TlK3OEmqiif2QdWtJU9VRUW4IdB0vot52ojE16vAuXGBet/ONanxkGFUrVTsqDwuJDx4w== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI0PR04MB11919 Add basic HDR mode support for the svs I3C master driver. Only support for private transfers and does not support sending CCC commands in HDR mode. Key differences: - HDR uses commands (0x00-0x7F for write, 0x80-0xFF for read) to distinguish transfer direction. - HDR read/write commands must be written to FIFO before issuing the I3C address command. The hardware automatically sends the standard CCC command to enter HDR mode. - HDR exit pattern must be sent instead of send a stop after transfer completion. - Read/write data size must be an even number. Co-developed-by: Carlos Song Signed-off-by: Carlos Song Signed-off-by: Frank Li --- change in v7: - add comment about why need check return value readl_poll_timeout() in svc_i3c_master_emit_force_exit() - add comment about why need udelay(1) - remove reg =3D 0; - chagne to use readl_poll_timeout_atomic(); - replace all i3c_priv_xfer with new i3c_xfer. change in v4 - use hdr_cap. change in v3 - rename to svc_cmd_is_read() - rename to i3c_mode_to_svc_type() - use local varible bool rnw to reduce change change in v2 - support HDR DDR write - rdterm unit is byte, not words (RM is wrong). --- drivers/i3c/master/svc-i3c-master.c | 96 ++++++++++++++++++++++++++++++++-= ---- 1 file changed, 83 insertions(+), 13 deletions(-) diff --git a/drivers/i3c/master/svc-i3c-master.c b/drivers/i3c/master/svc-i= 3c-master.c index 7c516e05d0a1a118479ee3d8ea8ae37ae19fea57..a732443caaf15a2f6e54de46bba= fdeb3fc9a9296 100644 --- a/drivers/i3c/master/svc-i3c-master.c +++ b/drivers/i3c/master/svc-i3c-master.c @@ -40,11 +40,13 @@ #define SVC_I3C_MCTRL_REQUEST_NONE 0 #define SVC_I3C_MCTRL_REQUEST_START_ADDR 1 #define SVC_I3C_MCTRL_REQUEST_STOP 2 +#define SVC_I3C_MCTRL_REQUEST_FORCE_EXIT 6 #define SVC_I3C_MCTRL_REQUEST_IBI_ACKNACK 3 #define SVC_I3C_MCTRL_REQUEST_PROC_DAA 4 #define SVC_I3C_MCTRL_REQUEST_AUTO_IBI 7 #define SVC_I3C_MCTRL_TYPE_I3C 0 #define SVC_I3C_MCTRL_TYPE_I2C BIT(4) +#define SVC_I3C_MCTRL_TYPE_DDR BIT(5) #define SVC_I3C_MCTRL_IBIRESP_AUTO 0 #define SVC_I3C_MCTRL_IBIRESP_ACK_WITHOUT_BYTE 0 #define SVC_I3C_MCTRL_IBIRESP_ACK_WITH_BYTE BIT(7) @@ -95,6 +97,7 @@ #define SVC_I3C_MINTMASKED 0x098 #define SVC_I3C_MERRWARN 0x09C #define SVC_I3C_MERRWARN_NACK BIT(2) +#define SVC_I3C_MERRWARN_CRC BIT(10) #define SVC_I3C_MERRWARN_TIMEOUT BIT(20) #define SVC_I3C_MDMACTRL 0x0A0 #define SVC_I3C_MDATACTRL 0x0AC @@ -174,7 +177,7 @@ struct svc_i3c_cmd { const void *out; unsigned int len; unsigned int actual_len; - struct i3c_priv_xfer *xfer; + struct i3c_xfer *xfer; bool continued; }; =20 @@ -389,7 +392,32 @@ svc_i3c_master_dev_from_addr(struct svc_i3c_master *ma= ster, =20 static bool svc_cmd_is_read(u32 rnw_cmd, u32 type) { - return rnw_cmd; + return (type =3D=3D SVC_I3C_MCTRL_TYPE_DDR) ? !!(rnw_cmd & 0x80) : rnw_cm= d; +} + +static void svc_i3c_master_emit_force_exit(struct svc_i3c_master *master) +{ + u32 reg; + + writel(SVC_I3C_MCTRL_REQUEST_FORCE_EXIT, master->regs + SVC_I3C_MCTRL); + + /* + * Not need check error here because it is never happen at hardware. IP + * just wait for few fclk cycle to complete DDR exit pattern. Even + * though fclk stop, timeout happen here, the whole data actually + * already finish transfer. The next command will be timeout because + * wrong hardware state. + */ + readl_poll_timeout_atomic(master->regs + SVC_I3C_MSTATUS, reg, + SVC_I3C_MSTATUS_MCTRLDONE(reg), 0, 1000); + + /* + * This delay is necessary after the emission of a stop, otherwise eg. + * repeating IBIs do not get detected. There is a note in the manual + * about it, stating that the stop condition might not be settled + * correctly if a start condition follows too rapidly. + */ + udelay(1); } =20 static void svc_i3c_master_emit_stop(struct svc_i3c_master *master) @@ -521,7 +549,7 @@ static void svc_i3c_master_ibi_isr(struct svc_i3c_maste= r *master) * cycle, leading to missed client IBI handlers. * * A typical scenario is when IBIWON occurs and bus arbitration is lost - * at svc_i3c_master_priv_xfers(). + * at svc_i3c_master_i3c_xfers(). * * Clear SVC_I3C_MINT_IBIWON before sending SVC_I3C_MCTRL_REQUEST_AUTO_IB= I. */ @@ -801,6 +829,8 @@ static int svc_i3c_master_bus_init(struct i3c_master_co= ntroller *m) =20 info.dyn_addr =3D ret; =20 + info.hdr_cap =3D I3C_CCC_HDR_MODE(I3C_HDR_DDR); + writel(SVC_MDYNADDR_VALID | SVC_MDYNADDR_ADDR(info.dyn_addr), master->regs + SVC_I3C_MDYNADDR); =20 @@ -1314,6 +1344,16 @@ static int svc_i3c_master_xfer(struct svc_i3c_master= *master, /* clean SVC_I3C_MINT_IBIWON w1c bits */ writel(SVC_I3C_MINT_IBIWON, master->regs + SVC_I3C_MSTATUS); =20 + if (xfer_type =3D=3D SVC_I3C_MCTRL_TYPE_DDR) { + /* DDR command need prefill into FIFO */ + writel(rnw_cmd, master->regs + SVC_I3C_MWDATAB); + if (!rnw) { + /* write data also need prefill into FIFO */ + ret =3D svc_i3c_master_write(master, out, xfer_len); + if (ret) + goto emit_stop; + } + } =20 while (retry--) { writel(SVC_I3C_MCTRL_REQUEST_START_ADDR | @@ -1407,7 +1447,7 @@ static int svc_i3c_master_xfer(struct svc_i3c_master = *master, =20 if (rnw) ret =3D svc_i3c_master_read(master, in, xfer_len); - else + else if (xfer_type !=3D SVC_I3C_MCTRL_TYPE_DDR) ret =3D svc_i3c_master_write(master, out, xfer_len); if (ret < 0) goto emit_stop; @@ -1420,10 +1460,19 @@ static int svc_i3c_master_xfer(struct svc_i3c_maste= r *master, if (ret) goto emit_stop; =20 + if (xfer_type =3D=3D SVC_I3C_MCTRL_TYPE_DDR && + (readl(master->regs + SVC_I3C_MERRWARN) & SVC_I3C_MERRWARN_CRC)) { + ret =3D -ENXIO; + goto emit_stop; + } + writel(SVC_I3C_MINT_COMPLETE, master->regs + SVC_I3C_MSTATUS); =20 if (!continued) { - svc_i3c_master_emit_stop(master); + if (xfer_type !=3D SVC_I3C_MCTRL_TYPE_DDR) + svc_i3c_master_emit_stop(master); + else + svc_i3c_master_emit_force_exit(master); =20 /* Wait idle if stop is sent. */ readl_poll_timeout(master->regs + SVC_I3C_MSTATUS, reg, @@ -1433,7 +1482,11 @@ static int svc_i3c_master_xfer(struct svc_i3c_master= *master, return 0; =20 emit_stop: - svc_i3c_master_emit_stop(master); + if (xfer_type !=3D SVC_I3C_MCTRL_TYPE_DDR) + svc_i3c_master_emit_stop(master); + else + svc_i3c_master_emit_force_exit(master); + svc_i3c_master_clear_merrwarn(master); svc_i3c_master_flush_fifo(master); =20 @@ -1480,6 +1533,11 @@ static void svc_i3c_master_dequeue_xfer(struct svc_i= 3c_master *master, spin_unlock_irqrestore(&master->xferqueue.lock, flags); } =20 +static int i3c_mode_to_svc_type(enum i3c_xfer_mode mode) +{ + return (mode =3D=3D I3C_SDR) ? SVC_I3C_MCTRL_TYPE_I3C : SVC_I3C_MCTRL_TYP= E_DDR; +} + static void svc_i3c_master_start_xfer_locked(struct svc_i3c_master *master) { struct svc_i3c_xfer *xfer =3D master->xferqueue.cur; @@ -1669,9 +1727,8 @@ static int svc_i3c_master_send_ccc_cmd(struct i3c_mas= ter_controller *m, return ret; } =20 -static int svc_i3c_master_priv_xfers(struct i3c_dev_desc *dev, - struct i3c_priv_xfer *xfers, - int nxfers) +static int svc_i3c_master_i3c_xfers(struct i3c_dev_desc *dev, struct i3c_x= fer *xfers, + int nxfers, enum i3c_xfer_mode mode) { struct i3c_master_controller *m =3D i3c_dev_get_master(dev); struct svc_i3c_master *master =3D to_svc_i3c_master(m); @@ -1679,19 +1736,32 @@ static int svc_i3c_master_priv_xfers(struct i3c_dev= _desc *dev, struct svc_i3c_xfer *xfer; int ret, i; =20 + if (mode !=3D I3C_SDR) { + /* + * Only support data size less than FIFO SIZE when using DDR + * mode. First entry is cmd in FIFO, so actual available FIFO + * for data is SVC_I3C_FIFO_SIZE - 2 since DDR only supports + * even length. + */ + for (i =3D 0; i < nxfers; i++) + if (xfers[i].len > SVC_I3C_FIFO_SIZE - 2) + return -EINVAL; + } + xfer =3D svc_i3c_master_alloc_xfer(master, nxfers); if (!xfer) return -ENOMEM; =20 - xfer->type =3D SVC_I3C_MCTRL_TYPE_I3C; + xfer->type =3D i3c_mode_to_svc_type(mode); =20 for (i =3D 0; i < nxfers; i++) { + u32 rnw_cmd =3D (mode =3D=3D I3C_SDR) ? xfers[i].rnw : xfers[i].cmd; + bool rnw =3D svc_cmd_is_read(rnw_cmd, xfer->type); struct svc_i3c_cmd *cmd =3D &xfer->cmds[i]; - bool rnw =3D xfers[i].rnw; =20 cmd->xfer =3D &xfers[i]; cmd->addr =3D master->addrs[data->index]; - cmd->rnw =3D rnw; + cmd->rnw_cmd =3D rnw_cmd; cmd->in =3D rnw ? xfers[i].data.in : NULL; cmd->out =3D rnw ? NULL : xfers[i].data.out; cmd->len =3D xfers[i].len; @@ -1890,7 +1960,7 @@ static const struct i3c_master_controller_ops svc_i3c= _master_ops =3D { .do_daa =3D svc_i3c_master_do_daa, .supports_ccc_cmd =3D svc_i3c_master_supports_ccc_cmd, .send_ccc_cmd =3D svc_i3c_master_send_ccc_cmd, - .priv_xfers =3D svc_i3c_master_priv_xfers, + .i3c_xfers =3D svc_i3c_master_i3c_xfers, .i2c_xfers =3D svc_i3c_master_i2c_xfers, .request_ibi =3D svc_i3c_master_request_ibi, .free_ibi =3D svc_i3c_master_free_ibi, --=20 2.34.1 From nobody Sun Feb 8 15:53:27 2026 Received: from PA4PR04CU001.outbound.protection.outlook.com (mail-francecentralazon11013061.outbound.protection.outlook.com [40.107.162.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5FE2E32549B; Mon, 27 Oct 2025 20:09:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.162.61 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761595744; cv=fail; b=M3gM9ekgRq0/2ZXooIx/xGrOLERTyLsbFQ/b85xv5JtAHBr9sH3TWPcob4By6KRlVAWJbGjv90EfSjESZ397srG1HvbcZlYte1mpmgv9DQMhEojPlB8rMi5lSk3o3tEa9ncFzHnpLdyahuyP9UVZejWFgcMkXtH3XrBqI2CbmFo= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761595744; c=relaxed/simple; bh=IyO4gvDiMVkIrAv3wfTcayqnmwaqUsnJdgwnigkUdYg=; h=From:Date:Subject:Content-Type:Message-Id:References:In-Reply-To: To:Cc:MIME-Version; b=Oe23C1KRgvmP6JBPTh0hTB10cpiimwl1w2KCxkx8axiy0oirld67D9id5EsYD//dvhE+boxpGlkx7ZNW1623I8gJ+pzEUZbPyNyHWU/+/PsjZXPpCUKoUpIvlveYLqymCgZcvGgTe2tJ89Q+qyQDrqFUVR8JlBGII0r2n9CiidM= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; dkim=pass (2048-bit key) header.d=nxp.com header.i=@nxp.com header.b=aFVi4Zmi; arc=fail smtp.client-ip=40.107.162.61 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=nxp.com header.i=@nxp.com header.b="aFVi4Zmi" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=WbKbNqG0/hF6Po1XB9bbuZ/bUsMW8LXeNvF0R/9l9eaTW7kNivTDWSrqXA/tbpVY3V2sakkBWmY7vDKinMuVZi9GnE5m9kIazjCXxo1Hn3NDgexVbeBYuFqFaknlhwfFpsIxvxrT7W++Qv4dbU/EdWk+W1qMjUb7W2QFe09Gcb/WoreOYZeMewoKSODHWW1dWpC9EUdNxSJQY10ueHVplcIEGUC0jVA0rZHyt0cgglO4lkHUu5B8SDPNY+Nn8uVl07wUFslRdZElO30xP+Wik1v1scJyuLUPxtGWN+HF5PFD5Y2j8PwYa/SCVASFTEeAUogatzo1s9E6MlqYRG6Pig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=C/2t9xOxRR0k6wvZLNSCm6blXDZasSeQSURQqJNw5AE=; b=zRA3OFqT78I4pCmtllRolHqhooNtY2cTsg1I7m11kqaOGclunWocdzPN6FJnb4XxlCG0INqP7BmYXNCf81I4e1AdQEalFcxwIRZavyASacgjMuCX0tqKvbf7nrrE4gvWXzDwDEVtYJHBrff5r0vZ0uM3aTFDcjsVZVJwn9b5ppd8auLs1eSYdQoE0S68h1e2Q38Sk/8/R75Zf2s/gGLfU0qVdhhW3SK61vBfBkrrNJsI7QgTfRFFcYlvYxAWeUcquwZRIHAWu3vDfRaVLqoQBXqIVao50LaSx9EY0xmat2EbjnpDJUJYN2ewp/i80azpciGuAOfIY6JOn0hbVhVBIw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=C/2t9xOxRR0k6wvZLNSCm6blXDZasSeQSURQqJNw5AE=; b=aFVi4ZmiM8juHAxiqJ8A3+bD/HDbgYlXdgQeeDkj2s3/rsQuq55M9l6fazEb/JfMQgcevsl9Qk19fKN+s1kQygquZVFMk1y8W+0v0pO1wjSFglQB6yTNMSY+HGAQtneDMg+v7Dl7uOygFTrz8EVJcxeM6ViR5Z7hW4I646manslRwlKgHdS/ge2lOjHp0SMvJKrE68kCOwHLR6g3gh17SiruTuJMTzZBjapljgKMEf90lCDeKg4cg+HMQ+fQgBTDgZGPKAaTCsoJFt5il5Larq5I3vK4CF1c6lsxUalZPoScMCP4eId0LYT2hFLN+U6bfYidrohEGSGBFolkJNFHNw== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AS4PR04MB9621.eurprd04.prod.outlook.com (2603:10a6:20b:4ff::22) by VI0PR04MB11919.eurprd04.prod.outlook.com (2603:10a6:800:306::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Mon, 27 Oct 2025 20:09:01 +0000 Received: from AS4PR04MB9621.eurprd04.prod.outlook.com ([fe80::a84d:82bf:a9ff:171e]) by AS4PR04MB9621.eurprd04.prod.outlook.com ([fe80::a84d:82bf:a9ff:171e%4]) with mapi id 15.20.9253.017; Mon, 27 Oct 2025 20:09:01 +0000 From: Frank Li Date: Mon, 27 Oct 2025 16:08:32 -0400 Subject: [PATCH v7 4/5] dt-bindings: trivial-devices: add MEMSIC 3-axis magnetometer Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251027-i3c_ddr-v7-4-866a0ff7fc46@nxp.com> References: <20251027-i3c_ddr-v7-0-866a0ff7fc46@nxp.com> In-Reply-To: <20251027-i3c_ddr-v7-0-866a0ff7fc46@nxp.com> To: Alexandre Belloni , Miquel Raynal , Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-iio@vger.kernel.org, joshua.yeong@starfivetech.com, devicetree@vger.kernel.org, Frank Li , Conor Dooley X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1761595722; l=1253; i=Frank.Li@nxp.com; s=20240130; h=from:subject:message-id; bh=IyO4gvDiMVkIrAv3wfTcayqnmwaqUsnJdgwnigkUdYg=; b=Nn/swNVNqwPWEmaFeEPutx/o3tc1FFPWTJC+OZPmykJA/DfaRo138EQNXYdltdvo6zOmUGdQu UQZay5z0+Z9DfmQt3vohN/4QHYMdHWGbgcFZBFLjU5pwJ9KCi1G1EhZ X-Developer-Key: i=Frank.Li@nxp.com; a=ed25519; pk=I0L1sDUfPxpAkRvPKy7MdauTuSENRq+DnA+G4qcS94Q= X-ClientProxiedBy: PH1PEPF00013303.namprd07.prod.outlook.com (2603:10b6:518:1::12) To AS4PR04MB9621.eurprd04.prod.outlook.com (2603:10a6:20b:4ff::22) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS4PR04MB9621:EE_|VI0PR04MB11919:EE_ X-MS-Office365-Filtering-Correlation-Id: e5143b7b-bafa-45ff-1a07-08de1594ab69 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|19092799006|376014|52116014|7416014|366016|1800799024|38350700014|7053199007; X-Microsoft-Antispam-Message-Info: =?utf-8?B?YXlaT3M3cW9LZVhIRjJrd0hST1pQSG5mVkhPTEI1OXc3b1RZUlJncnpwMDh2?= =?utf-8?B?a01RMmNxeGRyRERXalVyREtkN1Y2NFROOHZtQWt1RzZHa2dBMWxNUEV5S2h6?= =?utf-8?B?OXd0R1V2WWlEdDNaNTNmR0c3M2dvam1FQjhZTzV1dmk0Q2tnTnlHS2lrTm9G?= =?utf-8?B?RElYbHRlc2dhTms5MEdNOC9ZSXpEYTg2RXE5UnNINXRVQWJJc0drY0dIS21o?= =?utf-8?B?RlJtTHI5bVVKbFEzZ1pvRzN3SFh3LytIRE5CTDBLWlpmM0cxd3FVeGJRM1B3?= =?utf-8?B?dnFTM3JyaXIyUkZnZVpjSDZuVk4zZkEyNmZRQmp1cUdhVk44WmV3VXV2Mmdl?= =?utf-8?B?MFFMeXpHNC9vYkVkcWVweDN2bWlpa1lENlZmMG5LdXFzMCtLSU1RZEVyTS9J?= =?utf-8?B?YWtpYVo0TEUrcVFuL2o5a3UvUzE3OXhib2t2aG4xMDdVWmFxaDhlWFNuM2dP?= =?utf-8?B?cFVsaGJSaDNtV1drZXVUWDNrTTE4S3NBaDJFSzFiTEhvVFdTNWcrNzdJM2U0?= =?utf-8?B?Z3Z2NUpOQXdjZWZONU5tOTYyV1BpOEdFVWpxMEYxZ2E4di8wNjBtSXI0V2xH?= =?utf-8?B?S1UxZTRCT25LUUxIK00yUWd1SENRMmc1RGZ4MFhKcnB6QmhTK2l0R01vYklN?= =?utf-8?B?bXBFaTFmeHBZWlRQUGRYc0NLdzJVdmZLdjArRHRnSzdxa05hVVVRbjVoQnN6?= =?utf-8?B?WmtwRFNJeUhGMmplWmQwVlhjcTRzQnBLc3UvMEgwenFmUlJJT2lJZlQ2eXQ2?= =?utf-8?B?QThWeGlXN1o2aXFsbzZxb0JGMWNWV0N1ditUTlZVdWRJcjFWT1YwWXo0c2Jw?= =?utf-8?B?Q2h1b1EvWGZwU1FUZ1U3SlBKUFdYS3Jnb2c0ams3VTBNSEk3MjlWT3U5Yk5i?= =?utf-8?B?U0N6UHAwSHZhZkdFM2NTNERCa3RNY1B2U0xyUmVlR3hmVUwxRlFycjRFOUZp?= =?utf-8?B?eTlLcUdXNjJRZWlzOU1JTjlkRFc3OUx0eHc0eThtOWt6UUlZeVl2cFZqc3lw?= =?utf-8?B?bGhZdGFpc21oYnBRYUYrald6ZDd2RmNrdkVCOWp3R2d1QUhnSHVjdVZRb2Er?= =?utf-8?B?TlFtYXFBaCt3L1VKUEh3Q2FVclUzVzFOZ2RHODhXR3oxTmo2U0FmWVc3amEv?= =?utf-8?B?TjUyYW5LZk9IejdVQk9hWnM4QVNKMTJ1THBCZmJYVk9JQzZvNGt0ZUtsOUtu?= =?utf-8?B?OHpHbzl2THBwazFSNXdLb1E2TDh4OVZDWElRckZDbEFhVXdxbnEvR05LTHRK?= =?utf-8?B?QXQ5aFl0NUhUWFR6a0JVQjkvdE1yaHllalljMkFQTW5xSnRWMmtJR0F5ajlj?= =?utf-8?B?QzlrUmZQVjFhSHdqZWoxOWRwR0ZDdDdzZkIvKzBIdytpa1ZncE1aT1BTM1dD?= =?utf-8?B?UUE3c1FNZTljazJLZ2xPR3hCM3R4d1BReGlTaGdQWHM3R2xySzkweStIZHYz?= =?utf-8?B?YUVYczVXUHMvUHA5MTk4TWZSRDlVSVArdlI5N1VZMWs5bFZTaittaTZ6MzUy?= =?utf-8?B?M245ZThWOTl3c2t1Q1g0ZzM3TThMQ3JZdks5TTNMd0VXUWxhUVBFd01lMzdJ?= =?utf-8?B?Z0U3c01WQmRHUy8rL3BoYmN2U29rS2E1U1Bqck4wMHdzOW01MkJTYXd2NVpP?= =?utf-8?B?YWFlQkViSUFuU0tKOGI1SHVNazVPUEdvY293NFlUZ1RJWGtiR3Z4YklocnA5?= =?utf-8?B?emxJUElHOS9tV3A3NHpnemVpT1licDM1d0ZUREdsTW53ZmE2aVJERE5mYmll?= =?utf-8?B?cUdMLzNiZkN3cXBsSWxidUpmQU5jcTJEdVFoSXJyUFJDbTNmdERiUENEMVM2?= =?utf-8?B?dWdLODN5cXNWLzNjSlRnbytlTGNLbVN2OUdzb3JGWDdCMW5sSkJXWkdmWi9Y?= =?utf-8?B?TUJZWThZd1VlTVF3cVZwL3NEZU01Vm1oUEZIWDJOSmlYaGl0N3dINVJVUWwv?= =?utf-8?B?VWNVenZhck1pYlR4VTJWdTFHNWgxbHNpdGJoNjZQeFlPck9pS0FPMHlUZGh0?= =?utf-8?B?aWhJdmM5eTA2NzlaSlhNQUlObEgwUktuVDA5MEJ0cFdYaWlBN1pzYW5EVGEz?= =?utf-8?Q?yIpt3/?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AS4PR04MB9621.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(19092799006)(376014)(52116014)(7416014)(366016)(1800799024)(38350700014)(7053199007);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?dGVTLzNGSXErbmg4VStXS1gzbitWdU4vSzJlWmpvall6ZWxhYmpVTUJHeUJG?= =?utf-8?B?TE4zMHMrMGdoZWgzS24yUnBRTjBLVWVuYWVtUWlna0NzYTZpTnM0aUdTbzNt?= =?utf-8?B?cm1IZGxPY1BNdERrdEtDVEllZWEyQldiMkZneUZYVXpNTVl3dnJPZVJtb0Fj?= =?utf-8?B?NFliMWU2cEUxOFB2N0FwcnM3L0xFaitHZThUY3QvYXcxY1F1d2JjRklxSHpn?= =?utf-8?B?YWcxVkFXR0Vzb053WnJjVHZNb1VHZnlEQ2s1b2p3N0EzVzF1ZlZ4eDJDZkxw?= =?utf-8?B?Ynppa1hTbk1SazB3Qkc5U1BxNHhNd091ZEdvbm0ya2N6ZzJxRDBxdk9Zc3R6?= =?utf-8?B?eTFaQ015MHJyY0N2RkhxeXVMMFYyOUF4Nmx1Z2ZGWkJEWGFzY0FqRG1PS3RB?= =?utf-8?B?Qko1RVd3QjVSNXJ5dFVIZ016NUM3bVFZOHhIL3JubVRqdjU3RmZMQTY2ZGRB?= =?utf-8?B?YU9aN2JxUjBrdnFJWXRjMFNsbWlONVNjN00yeEZrWTZScEw0RXZwUjQ3TUpV?= =?utf-8?B?OElwdWNCM1crdHJ6ckNUZ1ZpbkxJTmd3YXUvZVdGR0xnd1dLeUhzVWVna1dV?= =?utf-8?B?VGk0blpjQklaZDZQaGc4VWRTR2pHVmpZYVpKSG9xajJzUmova2IwVFZjVGti?= =?utf-8?B?NXJRdWJFd0oyeXVscHdFZ1hpT0J0RTV5Yk9HZDVUOXlrd0Nad2lWdUxxNW9W?= =?utf-8?B?bG8rNmxOT0RBZGNSRzVIMG04M2pUQXdRZFdOQXhQeEFGVG9TTHk1TEVnQUJv?= =?utf-8?B?WUhXTFhXSTBzcThQemxyb2ovN3dXRW95ZDF0aVczcUVsSDJoOTZSM3NjZ1Yz?= =?utf-8?B?cEtUSVNpMjJaRFlyRmJ5U1VmSEUrZlhyWVorZ3M2TEw2eC9TRm9ndEF3bEpk?= =?utf-8?B?MjdiQTlGTFVaWkpyb1BiZzg3am1CU0hqUVExRGJKd3JVZFJZWW9MWGw1akwr?= =?utf-8?B?NzBlWlZkTWRFYmVocXVqa0hsQ1M1SzVGNlp3Z1BNUWM4M283d0FxVzE3K0dn?= =?utf-8?B?b3FscHBianhPYzFPVGQ5MlNOcGFaR0thSCtHQ1lNSFdOUWhvNkJrcHE5QmhQ?= =?utf-8?B?UlBNVUNCYTA2WVJvc3orQzREZ3pCay9iVjh1ckhOOStBK1FjeEhPZU1xL1Zz?= =?utf-8?B?K2RpMzZDUENHV3FMRjVER1g5NGZjT2VIRHJqWkVTTFJPOWxVZmRiMmRYbjB4?= =?utf-8?B?S1BZYnBWSENKZk5jbVhCN2tVdHlML3lwUUgwT09Vb3d6SVFSU2VaWGlRRVlQ?= =?utf-8?B?WEZ1cHBWeHErSlhTTjZJdFdjSDBhem5oTk1CeWZmZm5HMzl4QWs1K1JVMWti?= =?utf-8?B?N3piZG9ZQUExb3Y4NWN1NFpLN3JuU2dBK0NtdTFOQXcvRncwN21KUVB2dXhm?= =?utf-8?B?WnVBQnVCRURnSHEyQlYzb3RScUJxajN6ekZDbGN4NlVUNVYyNUgrVFBkTkxr?= =?utf-8?B?djREK2tJM0l4MG1WNmZxUnJmTW1YL2hvNnNPTGswVUV5N1c1aGtnN2hHUEp5?= =?utf-8?B?eC9GQTRiandRaU93dEtHN0tld2FZN0RvM3RBZUJvcXh6WUdoKzVaeTExZits?= =?utf-8?B?R2doNklpMk41T3F0T3NWRUd0cm4xTVJCanVxVE93MmlhbDZ4TGVnRlJ6NTEz?= =?utf-8?B?RUg2ZnV3YnA0WU0wQnRNU21XZWVyaXBCdUlRTi9lL2pCeTNSWHVhL1VNazJk?= =?utf-8?B?UmNHTzZhdVJzdlJSNTVTVjJKcHZzbU93eEs4TnQ5QTY4SHp0cEZqVGVkT2p1?= =?utf-8?B?WVVRYjB6azcrRElTWjRJemlpRm9rMW1KczU4cnJJM1VSMkl5aERLZzNmTG04?= =?utf-8?B?Z1YzQ0RBT1BwMmFiZlZYK052MkE1Q0dIb0VKSWR3bjdmanlQMmZHS29xT3Ro?= =?utf-8?B?endYTGhEU3JGSVJEU0xnNldWR1FiR0psdUxvaklzZlNpS3lCMTA0blJBalhB?= =?utf-8?B?VGZTNk5sZlQvYkJOMFJGMXMvR1pTbUk3WGlsNEdNMmRFNXBOQy9pdlNpSHRF?= =?utf-8?B?WXZRektiMXhUTDNDTTVabHMwSWpYMTBHMy9scDVjbWdYeERrUjZUMENRMmVt?= =?utf-8?B?bVFXQjU4d0g0dE1CR2UxeGNxNmpxZk9nQy9ZaUx1N3pvWVM0V1Y4OU5KbmNn?= =?utf-8?Q?ux5I=3D?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: e5143b7b-bafa-45ff-1a07-08de1594ab69 X-MS-Exchange-CrossTenant-AuthSource: AS4PR04MB9621.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Oct 2025 20:09:00.9767 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: NPW61T5eHR9tvnSdBxLuYRmCw09DXaSrkeO+W5qmuETILQd1ctxjZ/UwFg0Ib3YkurCQQnDkniIlarYETIdA2A== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI0PR04MB11919 Add compatible string 'memsic,mmc5603' and 'memsic,mmc5633' for MEMSIC 3-axis magnetometer. Acked-by: Conor Dooley Signed-off-by: Frank Li --- Changes in v7 - none Changes in v6: - add Conor Dooley ack tag. Changes in v5 - none Changes in v4 - add memsic,mmc5603 Changes from v1 .. v3 - None --- Documentation/devicetree/bindings/trivial-devices.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Docum= entation/devicetree/bindings/trivial-devices.yaml index 2eff6f274302add1ef8f6ae9ec9672697bc812ea..94fc8ff4504b5dc2c0fd7b384f6= acaae3d5f80a4 100644 --- a/Documentation/devicetree/bindings/trivial-devices.yaml +++ b/Documentation/devicetree/bindings/trivial-devices.yaml @@ -227,6 +227,10 @@ properties: - meas,tsys01 # MEMSIC magnetometer - memsic,mmc35240 + # MEMSIC 3-axis magnetometer + - memsic,mmc5603 + # MEMSIC 3-axis magnetometer (Support I3C HDR) + - memsic,mmc5633 # MEMSIC 3-axis accelerometer - memsic,mxc4005 # MEMSIC 2-axis 8-bit digital accelerometer --=20 2.34.1 From nobody Sun Feb 8 15:53:27 2026 Received: from OSPPR02CU001.outbound.protection.outlook.com (mail-norwayeastazon11013065.outbound.protection.outlook.com [40.107.159.65]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CE34232779A; Mon, 27 Oct 2025 20:09:07 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.159.65 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761595752; cv=fail; b=TC1xtA35HWOaisERX9K/xDu4rHou9UoYmM/MOroo24G0+m4840xtQON6jq7p1e1dRtIy2glzXAFk6ARD7F4pnQq+8XHfFazcmESXfnzr+vCz6GJO94MynE/uoJIj2F/SJhAZ2L2/SvuqOMQQXWIjLKdaRhYdgKmwwpOU+rFDRY0= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761595752; c=relaxed/simple; bh=MXdfcOlomcKxNyAr9MXZ8gD5rAqp/+jFkqESujXramw=; h=From:Date:Subject:Content-Type:Message-Id:References:In-Reply-To: To:Cc:MIME-Version; b=igb3xpT0YS88QoFtv5deaF28ep4mw+JoeA/ggSwZMI9s8UMDFnuOJt3/w9eRkmRS4nJzHe5LHd8VV44nI/ptReYZzm4v13zWd9Cenmz/yb8ZwJpw/tU3meYMssHD6h/zIAXC2KokK1PtvnB4DijZonNu0abfhjta3Slaf1R6OiY= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com; spf=pass smtp.mailfrom=nxp.com; dkim=pass (2048-bit key) header.d=nxp.com header.i=@nxp.com header.b=UC33+IFI; arc=fail smtp.client-ip=40.107.159.65 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=nxp.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=nxp.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=nxp.com header.i=@nxp.com header.b="UC33+IFI" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=YkXZXI1tjQTU3W2TVcl4w7ar6IrzWyxmyNDJrL0wiz5x+u6PFeu9Y0X1cQjwh0cMo4Widi5F/GTm6TtvJ+lDxNMHvnhcJqZWEC/DEMHRyKMsNY4VkVUH57cOoRyMe90/vJssJ3BFDxGlOlgXV/yfiGgD1kKw02R/pVAGLYM+unDaTgLfYeJj2ki7wg0oFJEc7Gh1HYBQCfv2suGX83gydQlzNrO9+kYGIhJWcZRiEA0AvihXqFTTq5lcxOzEUZyDOMrQgwIilu16o/P85DueG0MCMXzTOE8tc4h7xn5CDdm5pzG05pbulC16DMEK97LOAiFaL0iulOVXlaALxyUMZg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=DcscuMED5rYImIkNErwswgsCNJqWvJZ4j6X0DuqFZw8=; b=xA4cVygdlM1ICJ4BI1W9PaAMI7qp62kdJ9chsvsLnaLP9DVtkYi2AQkMILwANRT305Z9Iv8F308cZSSQ/x9izW/WaKlgYvR8cFS7TdBYXWi898oYell9Z6vjkS4/3ju7tnfzX0PGpROq4QTXJ/ZjtVna5jJ23QQhfoOqmoAloNNOWdEonL0804NS/hHnE31SWqXIlhQ8HqaWEv3ZfihsE7Zr2pPr7vgngzkqxBkstE+XJma6x6Fpwrnwsx4Jc7NR/nCh7RaX2Set/MmDgXErkWYJyB/4LN3XujfOvC1Nj50nBlp/bL9Ai/E8B1S0JbpmIPdYTV+CsAz/sjP3B53DKA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=nxp.com; dmarc=pass action=none header.from=nxp.com; dkim=pass header.d=nxp.com; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=DcscuMED5rYImIkNErwswgsCNJqWvJZ4j6X0DuqFZw8=; b=UC33+IFIdqXMB/pyKuvcigsuuZfywcZze7dMyvQEaCwEAhfkTPtFK3EJehR+Q/SMQUteYsGJQP2ynheObOkOpqIu3djOqNd24AFH5+/fOujtYorN3d5gIMfs0SVSPuE2s/TUz8ZsZhbuQcJ5hJUDiLvUsv+8tSKTD4Mbu1fH1TVIy73VBkONTIKz+QaOQCzLlN4yAbtBgT38XATUtxf6oGTXGqZ80wD69UxuP+/bz6CwAobDxfwd+/LZjNsotDnlo1Y7/zHgzjIHxAC9mg8MLSl1knW5AjCKivbvrxMxnePF/5X5W/mgwR1IvMSpJDQur2PIVp6MP5cEjpPhfC+N0g== Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=nxp.com; Received: from AS4PR04MB9621.eurprd04.prod.outlook.com (2603:10a6:20b:4ff::22) by VI0PR04MB11919.eurprd04.prod.outlook.com (2603:10a6:800:306::12) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Mon, 27 Oct 2025 20:09:04 +0000 Received: from AS4PR04MB9621.eurprd04.prod.outlook.com ([fe80::a84d:82bf:a9ff:171e]) by AS4PR04MB9621.eurprd04.prod.outlook.com ([fe80::a84d:82bf:a9ff:171e%4]) with mapi id 15.20.9253.017; Mon, 27 Oct 2025 20:09:04 +0000 From: Frank Li Date: Mon, 27 Oct 2025 16:08:33 -0400 Subject: [PATCH v7 5/5] iio: magnetometer: Add mmc5633 sensor Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251027-i3c_ddr-v7-5-866a0ff7fc46@nxp.com> References: <20251027-i3c_ddr-v7-0-866a0ff7fc46@nxp.com> In-Reply-To: <20251027-i3c_ddr-v7-0-866a0ff7fc46@nxp.com> To: Alexandre Belloni , Miquel Raynal , Jonathan Cameron , David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: linux-i3c@lists.infradead.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-iio@vger.kernel.org, joshua.yeong@starfivetech.com, devicetree@vger.kernel.org, Frank Li , Carlos Song , Adrian Fluturel X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1761595722; l=18712; i=Frank.Li@nxp.com; s=20240130; h=from:subject:message-id; bh=MXdfcOlomcKxNyAr9MXZ8gD5rAqp/+jFkqESujXramw=; b=ggr2HQ/e6W2o68zR3YgiXlm7vkO/NfYIoAPnanW3mz7vbCBv5Yq24Q+SnMf61q9zjx22CgBRt vAj3Nm2R9uaCtkllyawABvayVqh77uGfUpRBGVoTnSLzBKpt8ZebUmg X-Developer-Key: i=Frank.Li@nxp.com; a=ed25519; pk=I0L1sDUfPxpAkRvPKy7MdauTuSENRq+DnA+G4qcS94Q= X-ClientProxiedBy: PH1PEPF00013303.namprd07.prod.outlook.com (2603:10b6:518:1::12) To AS4PR04MB9621.eurprd04.prod.outlook.com (2603:10a6:20b:4ff::22) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: AS4PR04MB9621:EE_|VI0PR04MB11919:EE_ X-MS-Office365-Filtering-Correlation-Id: a98af173-2c6c-4cfd-8345-08de1594adb9 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|19092799006|376014|52116014|7416014|366016|1800799024|38350700014; X-Microsoft-Antispam-Message-Info: =?utf-8?B?YU1ZMW5mRWNqNWE1NlZlRFNGSnhmam9UbDYzMVhQSTBOeFZzVWhOeEIzQURH?= =?utf-8?B?RHB1WllpMG1uczRMemJFeFN5QXVLbTN4cVVDbnZmL3JJSVZwcG0ycy9EdjQ1?= =?utf-8?B?RWxockp0aDh5M2RCL1Bmb1RZMUtjMTdPa2Q4aFl6SkV6c0w1a0p4ODROU2g5?= =?utf-8?B?L2MwTGtQUVpZWENMYkY5ajUzQnd1MjRuUzVyNVBzc29XeWRlWDV1cm9kVjJF?= =?utf-8?B?alN1cEdXY3BCVGpMa0wwS2xEYVBwYitJV1duWmxQUSthbzZoMFhwVHhmOGsr?= =?utf-8?B?WmRzalc5Qmt6SGNrcXRLcWwzdWFpYllleG1WSzNtTjdKdUpPYVNMRElJY3ZX?= =?utf-8?B?Z0tpdEJkelFzdzVqU3QwUFc3ZVJOZXU1RVM0KzZUMFJSRkR3Q2lTN2gvSUwr?= =?utf-8?B?dDBONnpyUnkyVXV0ZHlZOUdQU2RtaE1vNHBjaldhWCtuQ1R0dDJIS1hxNnBa?= =?utf-8?B?bjVoUTJzT2czeG03cS9CdkxHOVNVVDUwUk4vWW1jVHBuVzV2TEVyQjBpQU84?= =?utf-8?B?SEVUM2wyeG4zd1IyNnJJOTVwWTlXZmlLYkJ0RzF4aXVmd1BDbXdCcklpb1pz?= =?utf-8?B?STNMQkp3THhiSE5udG1kODMyUnBybUdYakJTWlVRMDVkMHlkRWRENjR4VkFp?= =?utf-8?B?eWdoVjRPT1N4TE5OTUE5ejMyNWVQNFQySURJK3NpWWJneWhSQXE0RFEyZmNC?= =?utf-8?B?S0Z2cU14Ymx6a1BTbjhKWEZWSW1BZnlJSVBOcWN4Nk40VXdqOU1CL0NJVUdi?= =?utf-8?B?Ui9ndlBVWE5pbTRXRlhZZjJENDdGaEt4UXVVMXlHK3VOMFhtR0g3MlJYVWdK?= =?utf-8?B?YVlWeGJNNHJLUWUwNm1sejhISFhPalNXNTZkUlVNVzlxTzNhSTZMbWprVG1w?= =?utf-8?B?Y0piRGpST1AwMVM3Yldjano4Z0NldkVOcHZGdmdxRWd4MWRCcXFVMjhNKzcy?= =?utf-8?B?M1hmMG4yNmFWenVjWjQwSU0vaExxSlJma2xNMjBvdGdPQnhnZ2I1dkpCNWs5?= =?utf-8?B?c1RSRGU4dEhSM05XOUgrMThMNmxGVlhEUUkxQkUrQ00wcnpCMGNJQzBBNDNW?= =?utf-8?B?ZVBBRlZ3cGNpeVNlUHprNnRUaHhKWXZnTmsxeHpBZmFGY0tpNWoyQVQ0aUVv?= =?utf-8?B?dnpadVlzbXJHM3BuNkhoYTJjWTJoa0RRYmhZaUFQVW5wTUdacXczN3Y1cTZs?= =?utf-8?B?SzFROXpDT2wyM2w4czJKRzZMUk5EZThreFk4ZFl6Q2xCT0lTNkgrUWJ1Z0RY?= =?utf-8?B?N05VUmhYb0JnUWtrQjdCVDBqa2ZZZ2R5ZFJHbUtNcFNsLzVEbFBacFg5dHRs?= =?utf-8?B?UWFqVUdaVEJOY21lWHcybVc1ZmhpM1UxSHdseStwMFBIdUkrNGNYUGVnS0JS?= =?utf-8?B?VGtPYW9RVDc1S1dOdDRXaCtLQlcvMFNPNjR3SCs3RHJETkgzM2hmcDVwTGtJ?= =?utf-8?B?N0I4TCtpd0RRWWZCZUVwNzRwUWZiVWluQkFoZHIxa0JFYXUrcHF3Vkt6WnFU?= =?utf-8?B?TDBUb3JLRWtxblczMHpvcS9uREdwV21vR2NBUnJwOTljbFBMWkl2UWs4bUR0?= =?utf-8?B?bmVCY1dId1BxcVMrUDR1VC92MU9qWFovN1QycEpZbFJicnZyNjlub2JLL3Va?= =?utf-8?B?WCt3VmVyZzBEZ0oxM1ZFeDV5ZFFxZE1FTnY1cG5XOVV1eDJhUXJlcG44V0pl?= =?utf-8?B?d0JTQmYvdllEMnkwY1htR2pPd3lLNXk0d1c5M3lvYkRudzUrVVdVVW1KSURm?= =?utf-8?B?alZGUlVDU1RyRlZVODQ1aFhYWE9rWlhmYWFNdGNrSGtJamZjTnFlbVdBTEV3?= =?utf-8?B?RHoxbHByUW94UW5VQ01NM2hKWkppaGxnK3NVN2NnRHJuajFzRnRFZE5lU3c0?= =?utf-8?B?Unc2dnQ0MFZsNFM2dzB4elRvU01hMHYreGdWT2M0VTB2U0tNWlhmQm05Wmpm?= =?utf-8?B?NjE3THR1cXNZNG05SW9kNTBlWTJBMjZMNjRzU01XMHhIRFQ2KytQcUsrb3dp?= =?utf-8?B?RWQzTFlka2hCQ2dMRVdUbERVdHBTdWlld1UvYm1Zcm5BWkNjSkp0WnhiajJO?= =?utf-8?Q?Yvs4HN?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:AS4PR04MB9621.eurprd04.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(19092799006)(376014)(52116014)(7416014)(366016)(1800799024)(38350700014);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?bTlwcndMNXpINzBYUlJGOXg2S3A3UHBEdG8ySnhzbjMreHFibHJldlhoMjJJ?= =?utf-8?B?NkZFUmRMbm16TTZyQXNhVWJGUFptSnFKeGtMMjJ2U1NkUFNvTVZ5VTg4anVG?= =?utf-8?B?SlFrcEt0OGcxT3Urb2Z4eDJYa3ZYUWVuOUc4bTQxU0FtRVREbzRqSFE2dzF0?= =?utf-8?B?a29qRjc0VCtoUGZjbUYyMCtsM29lVEVwbXJBREVleFJyRHZrVjh1UzhmU3dH?= =?utf-8?B?bnJjMEFwbEV4Y3RtR1lPaE1Jclo1T0ZQbkQ3VCtFeWFnY0tIRHBUMFUrWjJR?= =?utf-8?B?VkhtbnBrdTB6S0IxSVI3QXdRY1ZnWFVVazZxb050TlIvM3pONUl4cFV2TU5T?= =?utf-8?B?dzQ1K1d3TlBOUXA5RzdLbEljUmVpbmNSbmtNMjVPcUdoMEx0ODFzelkzdW9Q?= =?utf-8?B?OGM5aDFWVWVqNlpOTXhPRytobzAwRWFvTklacE80WENta3ZhcVJDWmFtNWdJ?= =?utf-8?B?WS8rUVFXU0UrSUE3R2VNaE5CUGY2aTdTM2diaFBuSjJtS05OdndXaGwzelFF?= =?utf-8?B?aFNkeVFBVVlOc1JYdmJLejNnQkZMZXY0aDlxREtnUWRuQjNOdXM0bzdJR3FB?= =?utf-8?B?bEgyQXE3Y3VWV1NzTUFzTjArYzJmdG1pNjJBcHpEZ2pmdXd1UVVKLzMwamcv?= =?utf-8?B?dFpka3RrdkMrc3VnQ0pwOGlMZzZUMVZuQk5HdkxTQUNGd2tHd3NPeFBjOG84?= =?utf-8?B?ZXErK2hIMkVPNDN3UGF3Qy9KTlJjODd6L1diWGQ5UTdxb1RMZElQOHN0T1B3?= =?utf-8?B?YzlpbC9LUHpQOG5OUDFFeVdKR0pTL2dxVjMwc2xrZ0czeVdTSEdDSWdVcnVa?= =?utf-8?B?Yzc4T3NPRmMyT3o3RmZxL016KzVwME1zeVNidWRKdjNsdEo4d1lmWG1vR0NQ?= =?utf-8?B?SU9qbXN2dTROb2U1T1lWeGtkOXlLQm15RlZsMmZVbkdxbVQxOXdnVjZ2VG1U?= =?utf-8?B?YTMwWC9UYU9mL0RsRWc5VTlGS1AwaDhBY3p2OHFTa29ic3o0a3IwOW91am11?= =?utf-8?B?ZEJKQkhWelNyKzF1Mmc0Z2M5MjNhZFFHLzVjZXhPSzlyRVFXemJHWHd3bjdF?= =?utf-8?B?eXZKU253dTF6ZVorRFduQWFsNE4vQyttOGNNMUQzR0dzZ0pwNjVDUzNZNmxx?= =?utf-8?B?aUxrTGhvNWg0aXM3aUE1TVBQMXZvZnh6bmNONHVxUVRNeUcvc1Zva3hZcmFk?= =?utf-8?B?OFg3MmNGVHdZdW9BeFd3YjdVK3k0ZnhSSGpiVXFCZ01LcmhPU2ZsL1U5UmtF?= =?utf-8?B?OXNYTFFmTlJqdlNSNUhZekQ5eitWNWs4ZWdKWUo3ZTM1bWhuZ0VsNXBFZm9R?= =?utf-8?B?UnEreS8wYlZ3TzRrVjkrdDkva2NhSVd2UTFxWmhTRHBZc2ltYUdnc2tjUjRi?= =?utf-8?B?TzBJNERnZURWY1hHRjBKajFlRkRVZWRwRXRwd2lNSURSRjdNaEowd2l4TjAy?= =?utf-8?B?TXJERUxJV2lSV1BxZmRDNWFyWlZPSHpTdlBQdlMrcXkzRENtYkNVejJxV0Jw?= =?utf-8?B?SGoyMjkzUHpkSlBvR1VpUXc0OTVTQjl0am5LbGtFMGdzeXlCNnhKbGNxUm4r?= =?utf-8?B?RmRRQ3kwRUROTkloNDlTU2ZMWHliQkhUK1ZuUUd2eUpRRHcvOTJGN1NTd3RP?= =?utf-8?B?YkNuUFFSOENKNlhlWjRaQ3VrQWdPZUNYOWpxeTRMa0dsdG1BYXVCSlovUWFa?= =?utf-8?B?ZW0xazZldlJlK3JRTzdpZ2NxTUZoNEJhQllvUUMwWGdSdW9rNTZpY0VLSVZj?= =?utf-8?B?L0tVckM5cWJ6RTA4RGdwQ083QStvZkZucFR5MVZ3ZmRudWNoeHJhVitEZG5j?= =?utf-8?B?VkJ6UldCcnE3L0Q4emV1dUl2S3lWOXFRVVlTN0dXdVYyaEVVeUZnVS9sU0FE?= =?utf-8?B?ZEc5SzNHMndnMzg0d2pFQ3dCRlNoYk1oZHR1aUs4cGFLU1p4Tkl3RU8xTVJ5?= =?utf-8?B?Q0NRb0FvSTY0bWJzZ0JjT2g5eGpxMEdtNEdNVU1KTXdxREk5Q0RNRkNtZFVl?= =?utf-8?B?ZHpuWnhENTlNcFBwdkRBcTVKNkVnOGdiSTQyYXBvRHFDNTNzL3RnSUk3Z2NG?= =?utf-8?B?T2pHR1VoRmc2U3hTYUJpMjhvRHkvWTBqQ3lJK0RjV0Y2KzFnUkhHNHBuWFdz?= =?utf-8?Q?OzTc=3D?= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: a98af173-2c6c-4cfd-8345-08de1594adb9 X-MS-Exchange-CrossTenant-AuthSource: AS4PR04MB9621.eurprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 27 Oct 2025 20:09:04.8812 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: uKco7/gPCzIyB08zEOM4+0u4uToRPfExoC6EAkMjTonqKrzFnFFAGVLnK6fNT9q6ZhhYOGuB27LuQG/v5IrKCA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: VI0PR04MB11919 Add mmc5633 sensor basic support. - Support read 20 bits X/Y/Z magnetic. - Support I3C HDR mode to send start measurememt command. - Support I3C HDR mode to read all sensors data by one command. Co-developed-by: Carlos Song Signed-off-by: Carlos Song Co-developed-by: Adrian Fluturel Signed-off-by: Adrian Fluturel Signed-off-by: Frank Li --- Change in v7 - add missed *.h file - remove reduntant empty line - add comments about delay 1us after SET - use USEC_PER_MSEC for timeout value Change in v6: - remove acpi part - return 0 for success path at mmc5633_write_raw Change in V4 - use { 1, 2000 } - Add _US for timeout - Use GEN_MASK for MMC5633_CTRL1_BW_MASK - Use { } for terminator. - remove !! - fix mix tab and space - add mmc5603 (merge https://lore.kernel.org/all/20251003000731.22927-1-flu= turel.adrian@gmail.com/) - add tempature measure support Change in v3 - remove mmc5633_hw_set - make -> Make - change indention for mmc5633_samp_freq - use u8 arrary to handle dword data - get_unaligned_be16() to get raw data - add helper function to check if i3c support hdr - use read_avail() callback change in v2 - new patch --- drivers/iio/magnetometer/Kconfig | 12 + drivers/iio/magnetometer/Makefile | 1 + drivers/iio/magnetometer/mmc5633.c | 588 +++++++++++++++++++++++++++++++++= ++++ 3 files changed, 601 insertions(+) diff --git a/drivers/iio/magnetometer/Kconfig b/drivers/iio/magnetometer/Kc= onfig index 81b812a29044e2b0b9ff84889c21aa3ebc20be35..cfb74a4a083630678a1db1132a1= 4264de451a31a 100644 --- a/drivers/iio/magnetometer/Kconfig +++ b/drivers/iio/magnetometer/Kconfig @@ -139,6 +139,18 @@ config MMC35240 To compile this driver as a module, choose M here: the module will be called mmc35240. =20 +config MMC5633 + tristate "MEMSIC MMC5633 3-axis magnetic sensor" + select REGMAP_I2C + select REGMAP_I3C + depends on I2C || I3C + help + Say yes here to build support for the MEMSIC MMC5633 3-axis + magnetic sensor. + + To compile this driver as a module, choose M here: the module + will be called mmc5633 + config IIO_ST_MAGN_3AXIS tristate "STMicroelectronics magnetometers 3-Axis Driver" depends on (I2C || SPI_MASTER) && SYSFS diff --git a/drivers/iio/magnetometer/Makefile b/drivers/iio/magnetometer/M= akefile index dfe970fcacb8664b293af84893f7d3e3e8d7bf7e..5bd227f8c1204bdd8b8a43da180= 833eedca1457b 100644 --- a/drivers/iio/magnetometer/Makefile +++ b/drivers/iio/magnetometer/Makefile @@ -15,6 +15,7 @@ obj-$(CONFIG_BMC150_MAGN_SPI) +=3D bmc150_magn_spi.o obj-$(CONFIG_MAG3110) +=3D mag3110.o obj-$(CONFIG_HID_SENSOR_MAGNETOMETER_3D) +=3D hid-sensor-magn-3d.o obj-$(CONFIG_MMC35240) +=3D mmc35240.o +obj-$(CONFIG_MMC5633) +=3D mmc5633.o =20 obj-$(CONFIG_IIO_ST_MAGN_3AXIS) +=3D st_magn.o st_magn-y :=3D st_magn_core.o diff --git a/drivers/iio/magnetometer/mmc5633.c b/drivers/iio/magnetometer/= mmc5633.c new file mode 100644 index 0000000000000000000000000000000000000000..3e29324f0720a2b8268ccd63409= 483a60e48802b --- /dev/null +++ b/drivers/iio/magnetometer/mmc5633.c @@ -0,0 +1,588 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * MMC5633 - MEMSIC 3-axis Magnetic Sensor + * + * Copyright (c) 2015, Intel Corporation. + * Copyright (c) 2025, NXP + * + * IIO driver for MMC5633, base on mmc35240.c + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MMC5633_REG_XOUT_L 0x00 +#define MMC5633_REG_XOUT_H 0x01 +#define MMC5633_REG_YOUT_L 0x02 +#define MMC5633_REG_YOUT_H 0x03 +#define MMC5633_REG_ZOUT_L 0x04 +#define MMC5633_REG_ZOUT_H 0x05 +#define MMC5633_REG_XOUT_2 0x06 +#define MMC5633_REG_YOUT_2 0x07 +#define MMC5633_REG_ZOUT_2 0x08 +#define MMC5633_REG_TOUT 0x09 + +#define MMC5633_REG_STATUS1 0x18 +#define MMC5633_REG_STATUS0 0x19 +#define MMC5633_REG_CTRL0 0x1b +#define MMC5633_REG_CTRL1 0x1c +#define MMC5633_REG_CTRL2 0x1d + +#define MMC5633_REG_ID 0x39 + +#define MMC5633_STATUS1_MEAS_T_DONE_BIT BIT(7) +#define MMC5633_STATUS1_MEAS_M_DONE_BIT BIT(6) + +#define MMC5633_CTRL0_CMM_FREQ_EN BIT(7) +#define MMC5633_CTRL0_AUTO_ST_EN BIT(6) +#define MMC5633_CTRL0_AUTO_SR_EN BIT(5) +#define MMC5633_CTRL0_RESET BIT(4) +#define MMC5633_CTRL0_SET BIT(3) +#define MMC5633_CTRL0_MEAS_T BIT(1) +#define MMC5633_CTRL0_MEAS_M BIT(0) + +#define MMC5633_CTRL1_BW_MASK GENMASK(1, 0) + +#define MMC5633_WAIT_SET_RESET_US (1 * USEC_PER_MSEC) + +#define MMC5633_HDR_CTRL0_MEAS_M 0x01 +#define MMC5633_HDR_CTRL0_MEAS_T 0x03 +#define MMC5633_HDR_CTRL0_SET 0x05 +#define MMC5633_HDR_CTRL0_RESET 0x07 + +enum mmc5633_axis { + MMC5633_AXIS_X, + MMC5633_AXIS_Y, + MMC5633_AXIS_Z, + MMC5633_TEMPERATURE, +}; + +struct mmc5633_data { + struct device *dev; + struct i3c_device *i3cdev; + struct mutex mutex; /* protect to finish one whole measurement */ + struct regmap *regmap; +}; + +static const struct { + int val; + int val2; +} mmc5633_samp_freq[] =3D { + { 1, 200000 }, + { 2, 0 }, + { 3, 500000 }, + { 6, 600000 }, +}; + +#define MMC5633_CHANNEL(_axis) { \ + .type =3D IIO_MAGN, \ + .modified =3D 1, \ + .channel2 =3D IIO_MOD_ ## _axis, \ + .address =3D MMC5633_AXIS_ ## _axis, \ + .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW), \ + .info_mask_shared_by_type =3D BIT(IIO_CHAN_INFO_SAMP_FREQ) | \ + BIT(IIO_CHAN_INFO_SCALE), \ +} + +static const struct iio_chan_spec mmc5633_channels[] =3D { + MMC5633_CHANNEL(X), + MMC5633_CHANNEL(Y), + MMC5633_CHANNEL(Z), + { + .type =3D IIO_TEMP, + .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE) | + BIT(IIO_CHAN_INFO_OFFSET), + .address =3D MMC5633_TEMPERATURE, + }, +}; + +static int mmc5633_get_samp_freq_index(struct mmc5633_data *data, + int val, int val2) +{ + u32 i; + + for (i =3D 0; i < ARRAY_SIZE(mmc5633_samp_freq); i++) + if (mmc5633_samp_freq[i].val =3D=3D val && + mmc5633_samp_freq[i].val2 =3D=3D val2) + return i; + return -EINVAL; +} + +static int mmc5633_init(struct mmc5633_data *data) +{ + unsigned int reg_id; + int ret; + + ret =3D regmap_read(data->regmap, MMC5633_REG_ID, ®_id); + if (ret < 0) + return dev_err_probe(data->dev, ret, + "Error reading product id\n"); + + /* + * Make sure we restore sensor characteristics, by doing + * a SET/RESET sequence, the axis polarity being naturally + * aligned after RESET. + */ + ret =3D regmap_write(data->regmap, MMC5633_REG_CTRL0, MMC5633_CTRL0_SET); + if (ret < 0) + return ret; + + /* + * Minimum time interval between SET or RESET to other operations is + * 1ms according to Operating Timing Diagram in datasheet. + */ + fsleep(MMC5633_WAIT_SET_RESET_US); + + ret =3D regmap_write(data->regmap, MMC5633_REG_CTRL0, MMC5633_CTRL0_RESET= ); + if (ret < 0) + return ret; + + /* set default sampling frequency */ + return regmap_update_bits(data->regmap, MMC5633_REG_CTRL1, + MMC5633_CTRL1_BW_MASK, + FIELD_PREP(MMC5633_CTRL1_BW_MASK, 0)); +} + +static int mmc5633_take_measurement(struct mmc5633_data *data, int address) +{ + unsigned int reg_status; + int ret; + int val; + + val =3D (address =3D=3D MMC5633_TEMPERATURE) ? MMC5633_CTRL0_MEAS_T : MMC= 5633_CTRL0_MEAS_M; + ret =3D regmap_write(data->regmap, MMC5633_REG_CTRL0, val); + if (ret < 0) + return ret; + + val =3D (address =3D=3D MMC5633_TEMPERATURE) ? + MMC5633_STATUS1_MEAS_T_DONE_BIT : MMC5633_STATUS1_MEAS_M_DONE_BIT; + ret =3D regmap_read_poll_timeout(data->regmap, MMC5633_REG_STATUS1, reg_s= tatus, + reg_status & val, + 10 * USEC_PER_MSEC, + 100 * 10 * USEC_PER_MSEC); + if (ret) { + dev_err(data->dev, "data not ready\n"); + return ret; + } + + return 0; +} + +static bool mmc5633_is_support_hdr(struct mmc5633_data *data) +{ + if (!data->i3cdev) + return false; + + return i3c_device_get_supported_xfer_mode(data->i3cdev) & BIT(I3C_HDR_DDR= ); +} + +static int mmc5633_read_measurement(struct mmc5633_data *data, int address= , void *buf, size_t sz) +{ + u8 data_cmd[2], status[2]; + int ret, val, ready; + + if (mmc5633_is_support_hdr(data)) { + struct i3c_xfer xfers_wr_cmd[] =3D { + { + .cmd =3D 0x3b, + .len =3D 2, + .data.out =3D data_cmd, + } + }; + struct i3c_xfer xfers_rd_sta_cmd[] =3D { + { + .cmd =3D 0x23 | BIT(7), /* RDSTA CMD */ + .len =3D 2, + .data.in =3D status, + }, + }; + struct i3c_xfer xfers_rd_data_cmd[] =3D { + { + .cmd =3D 0x22 | BIT(7), /* RDLONG CMD */ + .len =3D sz, + .data.in =3D buf, + }, + }; + + data_cmd[0] =3D 0; + data_cmd[1] =3D (address =3D=3D MMC5633_TEMPERATURE) ? + MMC5633_HDR_CTRL0_MEAS_T : MMC5633_HDR_CTRL0_MEAS_M; + + ret =3D i3c_device_do_xfers(data->i3cdev, xfers_wr_cmd, 1, I3C_HDR_DDR); + if (ret < 0) + return ret; + + ready =3D (address =3D=3D MMC5633_TEMPERATURE) ? + MMC5633_STATUS1_MEAS_T_DONE_BIT : MMC5633_STATUS1_MEAS_M_DONE_BIT; + ret =3D read_poll_timeout(i3c_device_do_xfers, val, + val || + status[0] & ready, + 10 * USEC_PER_MSEC, + 100 * 10 * USEC_PER_MSEC, 0, + data->i3cdev, xfers_rd_sta_cmd, 1, I3C_HDR_DDR); + if (ret) { + dev_err(data->dev, "data not ready\n"); + return ret; + } + if (val) { + dev_err(data->dev, "i3c transfer error\n"); + return val; + } + return i3c_device_do_xfers(data->i3cdev, xfers_rd_data_cmd, 1, I3C_HDR_D= DR); + } + + /* Fallback to use SDR/I2C mode */ + ret =3D mmc5633_take_measurement(data, address); + if (ret < 0) + return ret; + + if (address =3D=3D MMC5633_TEMPERATURE) + /* + * Put tempeature to last byte of buff to align HDR case. + * I3C will early terminate data read if previous data is not + * available. + */ + return regmap_bulk_read(data->regmap, MMC5633_REG_TOUT, buf + sz - 1, 1); + + return regmap_bulk_read(data->regmap, MMC5633_REG_XOUT_L, buf, sz); +} + +/* X,Y,Z 3 channels, each channel has 3 byte and TEMP */ +#define MMC5633_ALL_SIZE (3 * 3 + 1) + +static int mmc5633_get_raw(struct mmc5633_data *data, int index, unsigned = char *buf, int *val) +{ + if (index =3D=3D MMC5633_TEMPERATURE) { + *val =3D buf[MMC5633_ALL_SIZE - 1]; + return 0; + } + /* + * X[19..12] X[11..4] Y[19..12] Y[11..4] Z[19..12] Z[11..4] X[3..0] Y[3..= 0] Z[3..0] + */ + *val =3D get_unaligned_be16(buf + 2 * index) << 4; + *val |=3D buf[index + 6] >> 4; + + return 0; +} + +static int mmc5633_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int *val, + int *val2, long mask) +{ + struct mmc5633_data *data =3D iio_priv(indio_dev); + char buf[MMC5633_ALL_SIZE]; + unsigned int reg, i; + int ret; + + switch (mask) { + case IIO_CHAN_INFO_RAW: + scoped_guard(mutex, &data->mutex) { + ret =3D mmc5633_read_measurement(data, chan->address, buf, MMC5633_ALL_= SIZE); + if (ret < 0) + return ret; + } + + ret =3D mmc5633_get_raw(data, chan->address, buf, val); + if (ret < 0) + return ret; + return IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: + if (chan->type =3D=3D IIO_MAGN) { + *val =3D 0; + *val2 =3D 62500; + } else { + *val =3D 0; + *val2 =3D 800000000; /* 0.8C */ + } + return IIO_VAL_INT_PLUS_NANO; + case IIO_CHAN_INFO_OFFSET: + if (chan->type =3D=3D IIO_TEMP) { + *val =3D -75; + return IIO_VAL_INT; + } + return -EINVAL; + case IIO_CHAN_INFO_SAMP_FREQ: + scoped_guard(mutex, &data->mutex) { + ret =3D regmap_read(data->regmap, MMC5633_REG_CTRL1, ®); + if (ret < 0) + return ret; + } + + i =3D FIELD_GET(MMC5633_CTRL1_BW_MASK, reg); + if (i >=3D ARRAY_SIZE(mmc5633_samp_freq)) + return -EINVAL; + + *val =3D mmc5633_samp_freq[i].val; + *val2 =3D mmc5633_samp_freq[i].val2; + return IIO_VAL_INT_PLUS_MICRO; + default: + return -EINVAL; + } +} + +static int mmc5633_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, int val, + int val2, long mask) +{ + struct mmc5633_data *data =3D iio_priv(indio_dev); + int i, ret; + + switch (mask) { + case IIO_CHAN_INFO_SAMP_FREQ: + i =3D mmc5633_get_samp_freq_index(data, val, val2); + if (i < 0) + return -EINVAL; + + scoped_guard(mutex, &data->mutex) { + ret =3D regmap_update_bits(data->regmap, MMC5633_REG_CTRL1, + MMC5633_CTRL1_BW_MASK, + FIELD_PREP(MMC5633_CTRL1_BW_MASK, i)); + if (ret) + return ret; + }; + return 0; + default: + return -EINVAL; + } +} + +static int mmc5633_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, + int *type, + int *length, + long mask) +{ + switch (mask) { + case IIO_CHAN_INFO_SAMP_FREQ: + *vals =3D (const int *)mmc5633_samp_freq; + *length =3D ARRAY_SIZE(mmc5633_samp_freq) * 2; + *type =3D IIO_VAL_INT_PLUS_MICRO; + return IIO_AVAIL_LIST; + default: + return -EINVAL; + } +} + +static const struct iio_info mmc5633_info =3D { + .read_raw =3D mmc5633_read_raw, + .write_raw =3D mmc5633_write_raw, + .read_avail =3D mmc5633_read_avail, +}; + +static bool mmc5633_is_writeable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MMC5633_REG_CTRL0: + case MMC5633_REG_CTRL1: + return true; + default: + return false; + } +} + +static bool mmc5633_is_readable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MMC5633_REG_XOUT_L: + case MMC5633_REG_XOUT_H: + case MMC5633_REG_YOUT_L: + case MMC5633_REG_YOUT_H: + case MMC5633_REG_ZOUT_L: + case MMC5633_REG_ZOUT_H: + case MMC5633_REG_XOUT_2: + case MMC5633_REG_YOUT_2: + case MMC5633_REG_ZOUT_2: + case MMC5633_REG_TOUT: + case MMC5633_REG_STATUS1: + case MMC5633_REG_ID: + return true; + default: + return false; + } +} + +static bool mmc5633_is_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case MMC5633_REG_CTRL0: + case MMC5633_REG_CTRL1: + return false; + default: + return true; + } +} + +static const struct reg_default mmc5633_reg_defaults[] =3D { + { MMC5633_REG_CTRL0, 0x00 }, + { MMC5633_REG_CTRL1, 0x00 }, +}; + +static const struct regmap_config mmc5633_regmap_config =3D { + .name =3D "mmc5633_regmap", + + .reg_bits =3D 8, + .val_bits =3D 8, + + .max_register =3D MMC5633_REG_ID, + .cache_type =3D REGCACHE_MAPLE, + + .writeable_reg =3D mmc5633_is_writeable_reg, + .readable_reg =3D mmc5633_is_readable_reg, + .volatile_reg =3D mmc5633_is_volatile_reg, + + .reg_defaults =3D mmc5633_reg_defaults, + .num_reg_defaults =3D ARRAY_SIZE(mmc5633_reg_defaults), +}; + +static int mmc5633_common_probe(struct device *dev, struct regmap *regmap, + char *name, struct i3c_device *i3cdev) +{ + struct mmc5633_data *data; + struct iio_dev *indio_dev; + int ret; + + indio_dev =3D devm_iio_device_alloc(dev, sizeof(*data)); + if (!indio_dev) + return -ENOMEM; + + dev_set_drvdata(dev, indio_dev); + + data =3D iio_priv(indio_dev); + + data->regmap =3D regmap; + data->i3cdev =3D i3cdev; + data->dev =3D dev; + + ret =3D devm_mutex_init(dev, &data->mutex); + if (ret) + return ret; + + indio_dev->info =3D &mmc5633_info; + indio_dev->name =3D name; + indio_dev->channels =3D mmc5633_channels; + indio_dev->num_channels =3D ARRAY_SIZE(mmc5633_channels); + indio_dev->modes =3D INDIO_DIRECT_MODE; + + ret =3D mmc5633_init(data); + if (ret < 0) + return dev_err_probe(dev, ret, "mmc5633 chip init failed\n"); + + return devm_iio_device_register(dev, indio_dev); +} + +static int mmc5633_suspend(struct device *dev) +{ + struct mmc5633_data *data =3D iio_priv(dev_get_drvdata(dev)); + + regcache_cache_only(data->regmap, true); + + return 0; +} + +static int mmc5633_resume(struct device *dev) +{ + struct mmc5633_data *data =3D iio_priv(dev_get_drvdata(dev)); + int ret; + + regcache_mark_dirty(data->regmap); + ret =3D regcache_sync_region(data->regmap, MMC5633_REG_CTRL0, + MMC5633_REG_CTRL1); + if (ret < 0) + dev_err(dev, "Failed to restore control registers\n"); + + regcache_cache_only(data->regmap, false); + + return 0; +} + +static int mmc5633_i2c_probe(struct i2c_client *client) +{ + struct device *dev =3D &client->dev; + struct regmap *regmap; + + regmap =3D devm_regmap_init_i2c(client, &mmc5633_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "regmap init failed"); + + return mmc5633_common_probe(dev, regmap, client->name, NULL); +} + +static DEFINE_SIMPLE_DEV_PM_OPS(mmc5633_pm_ops, mmc5633_suspend, mmc5633_r= esume); + +static const struct of_device_id mmc5633_of_match[] =3D { + { .compatible =3D "memsic,mmc5603" }, + { .compatible =3D "memsic,mmc5633" }, + { } +}; +MODULE_DEVICE_TABLE(of, mmc5633_of_match); + +static const struct i2c_device_id mmc5633_i2c_id[] =3D { + { "mmc5603" }, + { "mmc5633" }, + { } +}; +MODULE_DEVICE_TABLE(i2c, mmc5633_i2c_id); + +static struct i2c_driver mmc5633_i2c_driver =3D { + .driver =3D { + .name =3D "mmc5633_i2c", + .of_match_table =3D mmc5633_of_match, + .pm =3D pm_sleep_ptr(&mmc5633_pm_ops), + }, + .probe =3D mmc5633_i2c_probe, + .id_table =3D mmc5633_i2c_id, +}; + +static const struct i3c_device_id mmc5633_i3c_ids[] =3D { + I3C_DEVICE(0x0251, 0x0000, NULL), + { } +}; +MODULE_DEVICE_TABLE(i3c, mmc5633_i3c_ids); + +static int mmc5633_i3c_probe(struct i3c_device *i3cdev) +{ + struct device *dev =3D i3cdev_to_dev(i3cdev); + struct regmap *regmap; + + regmap =3D devm_regmap_init_i3c(i3cdev, &mmc5633_regmap_config); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), + "Failed to register i3c regmap\n"); + + return mmc5633_common_probe(dev, regmap, "mmc5633_i3c", i3cdev); +} + +static struct i3c_driver mmc5633_i3c_driver =3D { + .driver =3D { + .name =3D "mmc5633_i3c", + }, + .probe =3D mmc5633_i3c_probe, + .id_table =3D mmc5633_i3c_ids, +}; +module_i3c_i2c_driver(mmc5633_i3c_driver, &mmc5633_i2c_driver) + +MODULE_AUTHOR("Frank Li "); +MODULE_DESCRIPTION("MEMSIC MMC5633 magnetic sensor driver"); +MODULE_LICENSE("GPL"); --=20 2.34.1