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Mon, 27 Oct 2025 06:48:11 -0700 (PDT) From: Bartosz Golaszewski Date: Mon, 27 Oct 2025 14:48:02 +0100 Subject: [PATCH 1/2] gpio: mmio: use lock guards Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251027-gpio-mmio-refactor-v1-1-b0de7cd5a4b9@linaro.org> References: <20251027-gpio-mmio-refactor-v1-0-b0de7cd5a4b9@linaro.org> In-Reply-To: <20251027-gpio-mmio-refactor-v1-0-b0de7cd5a4b9@linaro.org> To: Linus Walleij , Bartosz Golaszewski Cc: linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, Bartosz Golaszewski X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4407; i=bartosz.golaszewski@linaro.org; h=from:subject:message-id; bh=8HvOkKg486JjYqNH7zy1hHaXeCKfJW0HwXQyvvQTz04=; b=owEBbQKS/ZANAwAKARGnLqAUcddyAcsmYgBo/3gZPtUI9fLGwuqo1eVVXayxmtz+2KmxmCj5+ VtVxqRQvQGJAjMEAAEKAB0WIQQWnetsC8PEYBPSx58Rpy6gFHHXcgUCaP94GQAKCRARpy6gFHHX cv5ID/9r+2dXkU8/bFMPiabT1dgl49MYpjPNjaPPqxBN+7YcWvg0HfAU38cT04AVMQvHhFMlFMh x3jbIKpPF/2c+L9+VKtgovu5IOttwvfLqVzZkZxLuualjYuwD5TX3zlMduQeVfCvBsnxMt4t5bY hl2YNkZbmf5aIheBqzdLsjqlnLfyDxiPangblZxfHh7G3fFIpw9deDiXaD3lJSIwKWGR/8b4wIX 5MJ0Tz5da5iQfXpuS8yj6c66kAh73Vo6ZWeozEGrzFOYb4y404FWN/KncJM+XJ4KAypW+B4epI2 aitVluCYJv3aR7833aTg58LPnxK+VmzcS8fk3BPHsSi1RbcYxxUG5PV8TBtKt6Zl6UrtxhrGgDR GMZbTHX7B3VtuWCtgIRrFqXq6CGE7HZm227rS9tmeS0CbKjvP/5hr3rzCQwowqUjVH/OC0CBFjN mVKnlJ7vn4nIn/CsILBbZUFJnLbpIhXrPi/OfpcoZ/KCn37s43xvK7ot3WdPkBJjUmQ53NCLGuV vjPnSULyZo2HFWruKYYgDNLdn+ewf0Z9eZpTm0pOoxD9X1wU+ivVsd4XYPcmMqlBexQim3RC17M 1nIJysvY9HG0G1CobOpv/DWjoKX+cmkOF30QvCyE8IesCdqiwUokSK3vTnZwPHSl2TXg0VJrqIL /5RTx9HMV+xw/dg== X-Developer-Key: i=bartosz.golaszewski@linaro.org; a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski Shrink the code by a couple lines and improve lock management by using lock guards from cleanup.h. Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- drivers/gpio/gpio-mmio.c | 40 ++++++++++++++-------------------------- 1 file changed, 14 insertions(+), 26 deletions(-) diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c index 7d6dd36cf1aeffeab96704821e0b280727346f6f..95ebbdf04343b81b1b8d836542c= 324bffb9c40e8 100644 --- a/drivers/gpio/gpio-mmio.c +++ b/drivers/gpio/gpio-mmio.c @@ -41,6 +41,7 @@ o ` ~~~~\___/~~~~ ` control= ler in FPGA is ,.` */ =20 #include +#include #include #include #include @@ -229,9 +230,8 @@ static int bgpio_set(struct gpio_chip *gc, unsigned int= gpio, int val) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); unsigned long mask =3D bgpio_line2mask(gc, gpio); - unsigned long flags; =20 - raw_spin_lock_irqsave(&chip->lock, flags); + guard(raw_spinlock)(&chip->lock); =20 if (val) chip->sdata |=3D mask; @@ -240,8 +240,6 @@ static int bgpio_set(struct gpio_chip *gc, unsigned int= gpio, int val) =20 chip->write_reg(chip->reg_dat, chip->sdata); =20 - raw_spin_unlock_irqrestore(&chip->lock, flags); - return 0; } =20 @@ -262,9 +260,9 @@ static int bgpio_set_with_clear(struct gpio_chip *gc, u= nsigned int gpio, static int bgpio_set_set(struct gpio_chip *gc, unsigned int gpio, int val) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); - unsigned long mask =3D bgpio_line2mask(gc, gpio), flags; + unsigned long mask =3D bgpio_line2mask(gc, gpio); =20 - raw_spin_lock_irqsave(&chip->lock, flags); + guard(raw_spinlock)(&chip->lock); =20 if (val) chip->sdata |=3D mask; @@ -273,8 +271,6 @@ static int bgpio_set_set(struct gpio_chip *gc, unsigned= int gpio, int val) =20 chip->write_reg(chip->reg_set, chip->sdata); =20 - raw_spin_unlock_irqrestore(&chip->lock, flags); - return 0; } =20 @@ -303,9 +299,9 @@ static void bgpio_set_multiple_single_reg(struct gpio_c= hip *gc, void __iomem *reg) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); - unsigned long flags, set_mask, clear_mask; + unsigned long set_mask, clear_mask; =20 - raw_spin_lock_irqsave(&chip->lock, flags); + guard(raw_spinlock)(&chip->lock); =20 bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask); =20 @@ -313,8 +309,6 @@ static void bgpio_set_multiple_single_reg(struct gpio_c= hip *gc, chip->sdata &=3D ~clear_mask; =20 chip->write_reg(reg, chip->sdata); - - raw_spin_unlock_irqrestore(&chip->lock, flags); } =20 static int bgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, @@ -394,18 +388,15 @@ static int bgpio_simple_dir_out(struct gpio_chip *gc,= unsigned int gpio, static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); - unsigned long flags; =20 - raw_spin_lock_irqsave(&chip->lock, flags); + scoped_guard(raw_spinlock, &chip->lock) { + chip->sdir &=3D ~bgpio_line2mask(gc, gpio); =20 - chip->sdir &=3D ~bgpio_line2mask(gc, gpio); - - if (chip->reg_dir_in) - chip->write_reg(chip->reg_dir_in, ~chip->sdir); - if (chip->reg_dir_out) - chip->write_reg(chip->reg_dir_out, chip->sdir); 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a=openpgp; fpr=169DEB6C0BC3C46013D2C79F11A72EA01471D772 From: Bartosz Golaszewski The "bgpio" prefix is a historical left-over. We no longer use it in any user-facing symbol. Let's drop it from the module's internals as well and replace it with "gpio_mmio_". Signed-off-by: Bartosz Golaszewski Reviewed-by: Linus Walleij --- drivers/gpio/gpio-mmio.c | 299 ++++++++++++++++++++++++-------------------= ---- 1 file changed, 150 insertions(+), 149 deletions(-) diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c index 95ebbdf04343b81b1b8d836542c324bffb9c40e8..b3a26a06260bbb6f1a5b1ecace1= e58610d3cc99c 100644 --- a/drivers/gpio/gpio-mmio.c +++ b/drivers/gpio/gpio-mmio.c @@ -62,69 +62,69 @@ o ` ~~~~\___/~~~~ ` contr= oller in FPGA is ,.` =20 #include "gpiolib.h" =20 -static void bgpio_write8(void __iomem *reg, unsigned long data) +static void gpio_mmio_write8(void __iomem *reg, unsigned long data) { writeb(data, reg); } =20 -static unsigned long bgpio_read8(void __iomem *reg) +static unsigned long gpio_mmio_read8(void __iomem *reg) { return readb(reg); } =20 -static void bgpio_write16(void __iomem *reg, unsigned long data) +static void gpio_mmio_write16(void __iomem *reg, unsigned long data) { writew(data, reg); } =20 -static unsigned long bgpio_read16(void __iomem *reg) +static unsigned long gpio_mmio_read16(void __iomem *reg) { return readw(reg); } =20 -static void bgpio_write32(void __iomem *reg, unsigned long data) +static void gpio_mmio_write32(void __iomem *reg, unsigned long data) { writel(data, reg); } =20 -static unsigned long bgpio_read32(void __iomem *reg) +static unsigned long gpio_mmio_read32(void __iomem *reg) { return readl(reg); } =20 #if BITS_PER_LONG >=3D 64 -static void bgpio_write64(void __iomem *reg, unsigned long data) +static void gpio_mmio_write64(void __iomem *reg, unsigned long data) { writeq(data, reg); } =20 -static unsigned long bgpio_read64(void __iomem *reg) +static unsigned long gpio_mmio_read64(void __iomem *reg) { return readq(reg); } #endif /* BITS_PER_LONG >=3D 64 */ =20 -static void bgpio_write16be(void __iomem *reg, unsigned long data) +static void gpio_mmio_write16be(void __iomem *reg, unsigned long data) { iowrite16be(data, reg); } =20 -static unsigned long bgpio_read16be(void __iomem *reg) +static unsigned long gpio_mmio_read16be(void __iomem *reg) { return ioread16be(reg); } =20 -static void bgpio_write32be(void __iomem *reg, unsigned long data) +static void gpio_mmio_write32be(void __iomem *reg, unsigned long data) { iowrite32be(data, reg); } =20 -static unsigned long bgpio_read32be(void __iomem *reg) +static unsigned long gpio_mmio_read32be(void __iomem *reg) { return ioread32be(reg); } =20 -static unsigned long bgpio_line2mask(struct gpio_chip *gc, unsigned int li= ne) +static unsigned long gpio_mmio_line2mask(struct gpio_chip *gc, unsigned in= t line) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); =20 @@ -133,10 +133,10 @@ static unsigned long bgpio_line2mask(struct gpio_chip= *gc, unsigned int line) return BIT(line); } =20 -static int bgpio_get_set(struct gpio_chip *gc, unsigned int gpio) +static int gpio_mmio_get_set(struct gpio_chip *gc, unsigned int gpio) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); - unsigned long pinmask =3D bgpio_line2mask(gc, gpio); + unsigned long pinmask =3D gpio_mmio_line2mask(gc, gpio); bool dir =3D !!(chip->sdir & pinmask); =20 if (dir) @@ -149,8 +149,8 @@ static int bgpio_get_set(struct gpio_chip *gc, unsigned= int gpio) * This assumes that the bits in the GPIO register are in native endiannes= s. * We only assign the function pointer if we have that. */ -static int bgpio_get_set_multiple(struct gpio_chip *gc, unsigned long *mas= k, - unsigned long *bits) +static int gpio_mmio_get_set_multiple(struct gpio_chip *gc, unsigned long = *mask, + unsigned long *bits) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); unsigned long get_mask =3D 0, set_mask =3D 0; @@ -169,18 +169,18 @@ static int bgpio_get_set_multiple(struct gpio_chip *g= c, unsigned long *mask, return 0; } =20 -static int bgpio_get(struct gpio_chip *gc, unsigned int gpio) +static int gpio_mmio_get(struct gpio_chip *gc, unsigned int gpio) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); =20 - return !!(chip->read_reg(chip->reg_dat) & bgpio_line2mask(gc, gpio)); + return !!(chip->read_reg(chip->reg_dat) & gpio_mmio_line2mask(gc, gpio)); } =20 /* * This only works if the bits in the GPIO register are in native endianne= ss. */ -static int bgpio_get_multiple(struct gpio_chip *gc, unsigned long *mask, - unsigned long *bits) +static int gpio_mmio_get_multiple(struct gpio_chip *gc, unsigned long *mas= k, + unsigned long *bits) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); =20 @@ -193,8 +193,8 @@ static int bgpio_get_multiple(struct gpio_chip *gc, uns= igned long *mask, /* * With big endian mirrored bit order it becomes more tedious. */ -static int bgpio_get_multiple_be(struct gpio_chip *gc, unsigned long *mask, - unsigned long *bits) +static int gpio_mmio_get_multiple_be(struct gpio_chip *gc, unsigned long *= mask, + unsigned long *bits) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); unsigned long readmask =3D 0; @@ -206,7 +206,7 @@ static int bgpio_get_multiple_be(struct gpio_chip *gc, = unsigned long *mask, =20 /* Create a mirrored mask */ for_each_set_bit(bit, mask, gc->ngpio) - readmask |=3D bgpio_line2mask(gc, bit); + readmask |=3D gpio_mmio_line2mask(gc, bit); =20 /* Read the register */ val =3D chip->read_reg(chip->reg_dat) & readmask; @@ -216,20 +216,20 @@ static int bgpio_get_multiple_be(struct gpio_chip *gc= , unsigned long *mask, * in bit 0 ... line 31 in bit 31 for a 32bit register. */ for_each_set_bit(bit, &val, gc->ngpio) - *bits |=3D bgpio_line2mask(gc, bit); + *bits |=3D gpio_mmio_line2mask(gc, bit); =20 return 0; } =20 -static int bgpio_set_none(struct gpio_chip *gc, unsigned int gpio, int val) +static int gpio_mmio_set_none(struct gpio_chip *gc, unsigned int gpio, int= val) { return 0; } =20 -static int bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) +static int gpio_mmio_set(struct gpio_chip *gc, unsigned int gpio, int val) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); - unsigned long mask =3D bgpio_line2mask(gc, gpio); + unsigned long mask =3D gpio_mmio_line2mask(gc, gpio); =20 guard(raw_spinlock)(&chip->lock); =20 @@ -243,11 +243,11 @@ static int bgpio_set(struct gpio_chip *gc, unsigned i= nt gpio, int val) return 0; } =20 -static int bgpio_set_with_clear(struct gpio_chip *gc, unsigned int gpio, - int val) +static int gpio_mmio_set_with_clear(struct gpio_chip *gc, unsigned int gpi= o, + int val) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); - unsigned long mask =3D bgpio_line2mask(gc, gpio); + unsigned long mask =3D gpio_mmio_line2mask(gc, gpio); =20 if (val) chip->write_reg(chip->reg_set, mask); @@ -257,10 +257,10 @@ static int bgpio_set_with_clear(struct gpio_chip *gc,= unsigned int gpio, return 0; } =20 -static int bgpio_set_set(struct gpio_chip *gc, unsigned int gpio, int val) +static int gpio_mmio_set_set(struct gpio_chip *gc, unsigned int gpio, int = val) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); - unsigned long mask =3D bgpio_line2mask(gc, gpio); + unsigned long mask =3D gpio_mmio_line2mask(gc, gpio); =20 guard(raw_spinlock)(&chip->lock); =20 @@ -274,10 +274,11 @@ static int bgpio_set_set(struct gpio_chip *gc, unsign= ed int gpio, int val) return 0; } =20 -static void bgpio_multiple_get_masks(struct gpio_chip *gc, - unsigned long *mask, unsigned long *bits, - unsigned long *set_mask, - unsigned long *clear_mask) +static void gpio_mmio_multiple_get_masks(struct gpio_chip *gc, + unsigned long *mask, + unsigned long *bits, + unsigned long *set_mask, + unsigned long *clear_mask) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); int i; @@ -287,23 +288,23 @@ static void bgpio_multiple_get_masks(struct gpio_chip= *gc, =20 for_each_set_bit(i, mask, chip->bits) { if (test_bit(i, bits)) - *set_mask |=3D bgpio_line2mask(gc, i); + *set_mask |=3D gpio_mmio_line2mask(gc, i); else - *clear_mask |=3D bgpio_line2mask(gc, i); + *clear_mask |=3D gpio_mmio_line2mask(gc, i); } } =20 -static void bgpio_set_multiple_single_reg(struct gpio_chip *gc, - unsigned long *mask, - unsigned long *bits, - void __iomem *reg) +static void gpio_mmio_set_multiple_single_reg(struct gpio_chip *gc, + unsigned long *mask, + unsigned long *bits, + void __iomem *reg) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); unsigned long set_mask, clear_mask; =20 guard(raw_spinlock)(&chip->lock); =20 - bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask); + gpio_mmio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask); =20 chip->sdata |=3D set_mask; chip->sdata &=3D ~clear_mask; @@ -311,34 +312,34 @@ static void bgpio_set_multiple_single_reg(struct gpio= _chip *gc, chip->write_reg(reg, chip->sdata); } =20 -static int bgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, - unsigned long *bits) -{ - struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); - - bgpio_set_multiple_single_reg(gc, mask, bits, chip->reg_dat); - - return 0; -} - -static int bgpio_set_multiple_set(struct gpio_chip *gc, unsigned long *mas= k, +static int gpio_mmio_set_multiple(struct gpio_chip *gc, unsigned long *mas= k, unsigned long *bits) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); =20 - bgpio_set_multiple_single_reg(gc, mask, bits, chip->reg_set); + gpio_mmio_set_multiple_single_reg(gc, mask, bits, chip->reg_dat); =20 return 0; } =20 -static int bgpio_set_multiple_with_clear(struct gpio_chip *gc, - unsigned long *mask, - unsigned long *bits) +static int gpio_mmio_set_multiple_set(struct gpio_chip *gc, unsigned long = *mask, + unsigned long *bits) +{ + struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); + + gpio_mmio_set_multiple_single_reg(gc, mask, bits, chip->reg_set); + + return 0; +} + +static int gpio_mmio_set_multiple_with_clear(struct gpio_chip *gc, + unsigned long *mask, + unsigned long *bits) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); unsigned long set_mask, clear_mask; =20 - bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask); + gpio_mmio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask); =20 if (set_mask) chip->write_reg(chip->reg_set, set_mask); @@ -348,7 +349,8 @@ static int bgpio_set_multiple_with_clear(struct gpio_ch= ip *gc, return 0; } =20 -static int bgpio_dir_return(struct gpio_chip *gc, unsigned int gpio, bool = dir_out) +static int gpio_mmio_dir_return(struct gpio_chip *gc, unsigned int gpio, + bool dir_out) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); =20 @@ -361,36 +363,36 @@ static int bgpio_dir_return(struct gpio_chip *gc, uns= igned int gpio, bool dir_ou return pinctrl_gpio_direction_input(gc, gpio); } =20 -static int bgpio_dir_in_err(struct gpio_chip *gc, unsigned int gpio) +static int gpio_mmio_dir_in_err(struct gpio_chip *gc, unsigned int gpio) { return -EINVAL; } =20 -static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio) +static int gpio_mmio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio) { - return bgpio_dir_return(gc, gpio, false); + return gpio_mmio_dir_return(gc, gpio, false); } =20 -static int bgpio_dir_out_err(struct gpio_chip *gc, unsigned int gpio, - int val) +static int gpio_mmio_dir_out_err(struct gpio_chip *gc, unsigned int gpio, + int val) { return -EINVAL; } =20 -static int bgpio_simple_dir_out(struct gpio_chip *gc, unsigned int gpio, - int val) +static int gpio_mmio_simple_dir_out(struct gpio_chip *gc, unsigned int gpi= o, + int val) { gc->set(gc, gpio, val); =20 - return bgpio_dir_return(gc, gpio, true); + return gpio_mmio_dir_return(gc, gpio, true); } =20 -static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio) +static int gpio_mmio_dir_in(struct gpio_chip *gc, unsigned int gpio) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); =20 scoped_guard(raw_spinlock, &chip->lock) { - chip->sdir &=3D ~bgpio_line2mask(gc, gpio); + chip->sdir &=3D ~gpio_mmio_line2mask(gc, gpio); =20 if (chip->reg_dir_in) chip->write_reg(chip->reg_dir_in, ~chip->sdir); @@ -398,40 +400,40 @@ static int bgpio_dir_in(struct gpio_chip *gc, unsigne= d int gpio) chip->write_reg(chip->reg_dir_out, chip->sdir); } =20 - return bgpio_dir_return(gc, gpio, false); + return gpio_mmio_dir_return(gc, gpio, false); } =20 -static int bgpio_get_dir(struct gpio_chip *gc, unsigned int gpio) +static int gpio_mmio_get_dir(struct gpio_chip *gc, unsigned int gpio) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); =20 /* Return 0 if output, 1 if input */ if (chip->dir_unreadable) { - if (chip->sdir & bgpio_line2mask(gc, gpio)) + if (chip->sdir & gpio_mmio_line2mask(gc, gpio)) return GPIO_LINE_DIRECTION_OUT; return GPIO_LINE_DIRECTION_IN; } =20 if (chip->reg_dir_out) { - if (chip->read_reg(chip->reg_dir_out) & bgpio_line2mask(gc, gpio)) + if (chip->read_reg(chip->reg_dir_out) & gpio_mmio_line2mask(gc, gpio)) return GPIO_LINE_DIRECTION_OUT; return GPIO_LINE_DIRECTION_IN; } =20 if (chip->reg_dir_in) - if (!(chip->read_reg(chip->reg_dir_in) & bgpio_line2mask(gc, gpio))) + if (!(chip->read_reg(chip->reg_dir_in) & gpio_mmio_line2mask(gc, gpio))) return GPIO_LINE_DIRECTION_OUT; =20 return GPIO_LINE_DIRECTION_IN; } =20 -static void bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) +static void gpio_mmio_dir_out(struct gpio_chip *gc, unsigned int gpio, int= val) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); =20 guard(raw_spinlock)(&chip->lock); =20 - chip->sdir |=3D bgpio_line2mask(gc, gpio); + chip->sdir |=3D gpio_mmio_line2mask(gc, gpio); =20 if (chip->reg_dir_in) chip->write_reg(chip->reg_dir_in, ~chip->sdir); @@ -439,47 +441,47 @@ static void bgpio_dir_out(struct gpio_chip *gc, unsig= ned int gpio, int val) chip->write_reg(chip->reg_dir_out, chip->sdir); } =20 -static int bgpio_dir_out_dir_first(struct gpio_chip *gc, unsigned int gpio, - int val) +static int gpio_mmio_dir_out_dir_first(struct gpio_chip *gc, unsigned int = gpio, + int val) { - bgpio_dir_out(gc, gpio, val); + gpio_mmio_dir_out(gc, gpio, val); gc->set(gc, gpio, val); - return bgpio_dir_return(gc, gpio, true); + return gpio_mmio_dir_return(gc, gpio, true); } =20 -static int bgpio_dir_out_val_first(struct gpio_chip *gc, unsigned int gpio, - int val) +static int gpio_mmio_dir_out_val_first(struct gpio_chip *gc, unsigned int = gpio, + int val) { gc->set(gc, gpio, val); - bgpio_dir_out(gc, gpio, val); - return bgpio_dir_return(gc, gpio, true); + gpio_mmio_dir_out(gc, gpio, val); + return gpio_mmio_dir_return(gc, gpio, true); } =20 -static int bgpio_setup_accessors(struct device *dev, - struct gpio_generic_chip *chip, - bool byte_be) +static int gpio_mmio_setup_accessors(struct device *dev, + struct gpio_generic_chip *chip, + bool byte_be) { switch (chip->bits) { case 8: - chip->read_reg =3D bgpio_read8; - chip->write_reg =3D bgpio_write8; + chip->read_reg =3D gpio_mmio_read8; + chip->write_reg =3D gpio_mmio_write8; break; case 16: if (byte_be) { - chip->read_reg =3D bgpio_read16be; - chip->write_reg =3D bgpio_write16be; + chip->read_reg =3D gpio_mmio_read16be; + chip->write_reg =3D gpio_mmio_write16be; } else { - chip->read_reg =3D bgpio_read16; - chip->write_reg =3D bgpio_write16; + chip->read_reg =3D gpio_mmio_read16; + chip->write_reg =3D gpio_mmio_write16; } break; case 32: if (byte_be) { - chip->read_reg =3D bgpio_read32be; - chip->write_reg =3D bgpio_write32be; + chip->read_reg =3D gpio_mmio_read32be; + chip->write_reg =3D gpio_mmio_write32be; } else { - chip->read_reg =3D bgpio_read32; - chip->write_reg =3D bgpio_write32; + chip->read_reg =3D gpio_mmio_read32; + chip->write_reg =3D gpio_mmio_write32; } break; #if BITS_PER_LONG >=3D 64 @@ -489,8 +491,8 @@ static int bgpio_setup_accessors(struct device *dev, "64 bit big endian byte order unsupported\n"); return -EINVAL; } else { - chip->read_reg =3D bgpio_read64; - chip->write_reg =3D bgpio_write64; + chip->read_reg =3D gpio_mmio_read64; + chip->write_reg =3D gpio_mmio_write64; } break; #endif /* BITS_PER_LONG >=3D 64 */ @@ -524,8 +526,8 @@ static int bgpio_setup_accessors(struct device *dev, * - an input direction register (named "dirin") where a 1 bit indicates * the GPIO is an input. */ -static int bgpio_setup_io(struct gpio_generic_chip *chip, - const struct gpio_generic_chip_config *cfg) +static int gpio_mmio_setup_io(struct gpio_generic_chip *chip, + const struct gpio_generic_chip_config *cfg) { struct gpio_chip *gc =3D &chip->gc; =20 @@ -536,25 +538,25 @@ static int bgpio_setup_io(struct gpio_generic_chip *c= hip, if (cfg->set && cfg->clr) { chip->reg_set =3D cfg->set; chip->reg_clr =3D cfg->clr; - gc->set =3D bgpio_set_with_clear; - gc->set_multiple =3D bgpio_set_multiple_with_clear; + gc->set =3D gpio_mmio_set_with_clear; + gc->set_multiple =3D gpio_mmio_set_multiple_with_clear; } else if (cfg->set && !cfg->clr) { chip->reg_set =3D cfg->set; - gc->set =3D bgpio_set_set; - gc->set_multiple =3D bgpio_set_multiple_set; + gc->set =3D gpio_mmio_set_set; + gc->set_multiple =3D gpio_mmio_set_multiple_set; } else if (cfg->flags & GPIO_GENERIC_NO_OUTPUT) { - gc->set =3D bgpio_set_none; + gc->set =3D gpio_mmio_set_none; gc->set_multiple =3D NULL; } else { - gc->set =3D bgpio_set; - gc->set_multiple =3D bgpio_set_multiple; + gc->set =3D gpio_mmio_set; + gc->set_multiple =3D gpio_mmio_set_multiple; } =20 if (!(cfg->flags & GPIO_GENERIC_UNREADABLE_REG_SET) && (cfg->flags & GPIO_GENERIC_READ_OUTPUT_REG_SET)) { - gc->get =3D bgpio_get_set; + gc->get =3D gpio_mmio_get_set; if (!chip->be_bits) - gc->get_multiple =3D bgpio_get_set_multiple; + gc->get_multiple =3D gpio_mmio_get_set_multiple; /* * We deliberately avoid assigning the ->get_multiple() call * for big endian mirrored registers which are ALSO reflecting @@ -563,18 +565,18 @@ static int bgpio_setup_io(struct gpio_generic_chip *c= hip, * reading each line individually in that fringe case. */ } else { - gc->get =3D bgpio_get; + gc->get =3D gpio_mmio_get; if (chip->be_bits) - gc->get_multiple =3D bgpio_get_multiple_be; + gc->get_multiple =3D gpio_mmio_get_multiple_be; else - gc->get_multiple =3D bgpio_get_multiple; + gc->get_multiple =3D gpio_mmio_get_multiple; } =20 return 0; } =20 -static int bgpio_setup_direction(struct gpio_generic_chip *chip, - const struct gpio_generic_chip_config *cfg) +static int gpio_mmio_setup_direction(struct gpio_generic_chip *chip, + const struct gpio_generic_chip_config *cfg) { struct gpio_chip *gc =3D &chip->gc; =20 @@ -582,27 +584,27 @@ static int bgpio_setup_direction(struct gpio_generic_= chip *chip, chip->reg_dir_out =3D cfg->dirout; chip->reg_dir_in =3D cfg->dirin; if (cfg->flags & GPIO_GENERIC_NO_SET_ON_INPUT) - gc->direction_output =3D bgpio_dir_out_dir_first; + gc->direction_output =3D gpio_mmio_dir_out_dir_first; else - gc->direction_output =3D bgpio_dir_out_val_first; - gc->direction_input =3D bgpio_dir_in; - gc->get_direction =3D bgpio_get_dir; + gc->direction_output =3D gpio_mmio_dir_out_val_first; + gc->direction_input =3D gpio_mmio_dir_in; + gc->get_direction =3D gpio_mmio_get_dir; } else { if (cfg->flags & GPIO_GENERIC_NO_OUTPUT) - gc->direction_output =3D bgpio_dir_out_err; + gc->direction_output =3D gpio_mmio_dir_out_err; else - gc->direction_output =3D bgpio_simple_dir_out; + gc->direction_output =3D gpio_mmio_simple_dir_out; =20 if (cfg->flags & GPIO_GENERIC_NO_INPUT) - gc->direction_input =3D bgpio_dir_in_err; + gc->direction_input =3D gpio_mmio_dir_in_err; else - gc->direction_input =3D bgpio_simple_dir_in; + gc->direction_input =3D gpio_mmio_simple_dir_in; } =20 return 0; } =20 -static int bgpio_request(struct gpio_chip *gc, unsigned int gpio_pin) +static int gpio_mmio_request(struct gpio_chip *gc, unsigned int gpio_pin) { struct gpio_generic_chip *chip =3D to_gpio_generic_chip(gc); =20 @@ -641,23 +643,23 @@ int gpio_generic_chip_init(struct gpio_generic_chip *= chip, gc->parent =3D dev; gc->label =3D dev_name(dev); gc->base =3D -1; - gc->request =3D bgpio_request; + gc->request =3D gpio_mmio_request; chip->be_bits =3D !!(flags & GPIO_GENERIC_BIG_ENDIAN); =20 ret =3D gpiochip_get_ngpios(gc, dev); if (ret) gc->ngpio =3D chip->bits; =20 - ret =3D bgpio_setup_io(chip, cfg); + ret =3D gpio_mmio_setup_io(chip, cfg); if (ret) return ret; =20 - ret =3D bgpio_setup_accessors(dev, chip, + ret =3D gpio_mmio_setup_accessors(dev, chip, flags & GPIO_GENERIC_BIG_ENDIAN_BYTE_ORDER); if (ret) return ret; =20 - ret =3D bgpio_setup_direction(chip, cfg); + ret =3D gpio_mmio_setup_direction(chip, cfg); if (ret) return ret; =20 @@ -668,7 +670,7 @@ int gpio_generic_chip_init(struct gpio_generic_chip *ch= ip, } =20 chip->sdata =3D chip->read_reg(chip->reg_dat); - if (gc->set =3D=3D bgpio_set_set && + if (gc->set =3D=3D gpio_mmio_set_set && !(flags & GPIO_GENERIC_UNREADABLE_REG_SET)) chip->sdata =3D chip->read_reg(chip->reg_set); =20 @@ -700,9 +702,8 @@ EXPORT_SYMBOL_GPL(gpio_generic_chip_init); =20 #if IS_ENABLED(CONFIG_GPIO_GENERIC_PLATFORM) =20 -static void __iomem *bgpio_map(struct platform_device *pdev, - const char *name, - resource_size_t sane_sz) +static void __iomem *gpio_mmio_map(struct platform_device *pdev, + const char *name, resource_size_t sane_sz) { struct resource *r; resource_size_t sz; @@ -718,16 +719,16 @@ static void __iomem *bgpio_map(struct platform_device= *pdev, return devm_ioremap_resource(&pdev->dev, r); } =20 -static const struct of_device_id bgpio_of_match[] =3D { +static const struct of_device_id gpio_mmio_of_match[] =3D { { .compatible =3D "brcm,bcm6345-gpio" }, { .compatible =3D "wd,mbl-gpio" }, { .compatible =3D "ni,169445-nand-gpio" }, { .compatible =3D "intel,ixp4xx-expansion-bus-mmio-gpio" }, { } }; -MODULE_DEVICE_TABLE(of, bgpio_of_match); +MODULE_DEVICE_TABLE(of, gpio_mmio_of_match); =20 -static int bgpio_pdev_probe(struct platform_device *pdev) +static int gpio_mmio_pdev_probe(struct platform_device *pdev) { struct gpio_generic_chip_config config; struct gpio_generic_chip *gen_gc; @@ -750,23 +751,23 @@ static int bgpio_pdev_probe(struct platform_device *p= dev) =20 sz =3D resource_size(r); =20 - dat =3D bgpio_map(pdev, "dat", sz); + dat =3D gpio_mmio_map(pdev, "dat", sz); if (IS_ERR(dat)) return PTR_ERR(dat); =20 - set =3D bgpio_map(pdev, "set", sz); + set =3D gpio_mmio_map(pdev, "set", sz); if (IS_ERR(set)) return PTR_ERR(set); =20 - clr =3D bgpio_map(pdev, "clr", sz); + clr =3D gpio_mmio_map(pdev, "clr", sz); if (IS_ERR(clr)) return PTR_ERR(clr); =20 - dirout =3D bgpio_map(pdev, "dirout", sz); + dirout =3D gpio_mmio_map(pdev, "dirout", sz); if (IS_ERR(dirout)) return PTR_ERR(dirout); =20 - dirin =3D bgpio_map(pdev, "dirin", sz); + dirin =3D gpio_mmio_map(pdev, "dirin", sz); if (IS_ERR(dirin)) return PTR_ERR(dirin); =20 @@ -812,25 +813,25 @@ static int bgpio_pdev_probe(struct platform_device *p= dev) return devm_gpiochip_add_data(&pdev->dev, &gen_gc->gc, NULL); } =20 -static const struct platform_device_id bgpio_id_table[] =3D { +static const struct platform_device_id gpio_mmio_id_table[] =3D { { .name =3D "basic-mmio-gpio", .driver_data =3D 0, }, { } }; -MODULE_DEVICE_TABLE(platform, bgpio_id_table); +MODULE_DEVICE_TABLE(platform, gpio_mmio_id_table); =20 -static struct platform_driver bgpio_driver =3D { +static struct platform_driver gpio_mmio_driver =3D { .driver =3D { .name =3D "basic-mmio-gpio", - .of_match_table =3D bgpio_of_match, + .of_match_table =3D gpio_mmio_of_match, }, - .id_table =3D bgpio_id_table, - .probe =3D bgpio_pdev_probe, + .id_table =3D gpio_mmio_id_table, + .probe =3D gpio_mmio_pdev_probe, }; =20 -module_platform_driver(bgpio_driver); +module_platform_driver(gpio_mmio_driver); =20 #endif /* CONFIG_GPIO_GENERIC_PLATFORM */ =20 --=20 2.48.1