From nobody Sat Feb 7 08:27:42 2026 Received: from mail-ed1-f47.google.com (mail-ed1-f47.google.com [209.85.208.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 68DA23002B3 for ; Sun, 26 Oct 2025 23:18:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.208.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761520704; cv=none; b=f9f4XtXVG7u4IxhyFYsyygGmZHU5sMhCB6pyP3N/AmiGb9hJiSe6ICn0Zs43tF8CaFojE1IxrZbnsUUQrxnlYCF4Jeqgr9Z07OyTCWfvzUSdD41v6s47y1LCV2zrXLW2ridaKHG7i5Jpw4FmyJkWxAc3E5fV4pW7EIdItLc/RxY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761520704; c=relaxed/simple; bh=E4LUSFJuH8xqIHw6adJ7z9S5S1JC/5ZujNe34lPd0xI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=d47+T3R6gUsM+nwYHoYOkarVXquQSpaHyEPJirYdjIV5dSqIek1lrX0t61g3o5zd1PHoPMTFC6hw8G/GyQFzBmpxwxQJr8qVudHAljBmKOwPMD9KVWo52mzOu0Z35RjGPjMj/u2NDhMRRr71uV/KrqkxdawTseyw4MN6ZiJw0yQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Rxpo9G//; arc=none smtp.client-ip=209.85.208.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Rxpo9G//" Received: by mail-ed1-f47.google.com with SMTP id 4fb4d7f45d1cf-637e9f9f9fbso7255666a12.0 for ; Sun, 26 Oct 2025 16:18:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1761520700; x=1762125500; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=o9ZOz8cXSTa3B6pHuY7KFejgV/aD4XEibzOR0qxVt50=; b=Rxpo9G//i4CpkZQ9+ij64r5wim8tQuUyD45g6L9YhqyWt9hpF4d9IOI/r7QhP5SOkq jBV9wfHOTSXI/4wRVKMeRmHEwKIRRrZ33KApYI7e991h7RV9uWLiuHkSz4MOyrUyKe/6 2EwnNHfqC1/mP5gCTk8IKrmzNep1qy+0hAVxoxRMLgmdUs7pnRPjKU90I1YGhwEnXkHU GqTgUlYOjsSK8jsL4RaqhtwrbbgcHDEnEMDO7+tj7PTFlD5fnYkD5G1ADxY59ZNIXKUq 1mZX6U4f9LAwchQl0K9+cO+v9bymGCim0Q4ZZhpYou8cbzPbNwyIsQr/0fAmOv5u/Vy8 B90w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1761520700; x=1762125500; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=o9ZOz8cXSTa3B6pHuY7KFejgV/aD4XEibzOR0qxVt50=; b=i9vx8eGFfIl3GpVrwSJcWNtbPPUGR6tMAavlqMX6UswPO8WbMQybq8M3FEBUOaXJv7 93WSJcz1sCNdLAQNzGwHh3HhDBhb2oMIpujI9quJla3LS/1DxDx2egjsRB7AwRWFQGm/ m0b+yX/KptPkEkfKqdM+lKL3BLqYehqK2j4VeHgGEBfPDF+K/2NZYKGX7nuzbtPngsRk 2gfe0AYpaKZKL+dD+Vx4c59puxCX2yUacULd+oIcysX4QviJReq9TMmvS8UsjEezH9sD sypPeZwpTN2QPLk9/kCj/a9nyebslc19knDJaLDM/HGSur5Ys52dE5DaoOb/aUMqceLb 0m+A== X-Forwarded-Encrypted: i=1; AJvYcCXUUT5CWDVM24Ue1fAzxCUetk6NPZApV9f0pdcGS3Lc6GZoT5yMVkQPzGlNcEa7IFay2daB1bi2WFoPqVM=@vger.kernel.org X-Gm-Message-State: AOJu0YwTOMGWqBnPK3RLKD/BP30KqQi8eylbLDH7/onjDHqR5HUE9tPI Db9t3X+WyECjJpKTcuFrtqwtIU8A546xjzFJhcj/xkhbUrpql5wM/bwcQGSFJA== X-Gm-Gg: ASbGncuZj6AISUCTQy6jNSbcnlbbb+yWcFIUPqLy4OUW7duPjkO38wsfofrUWMBL2RD 4u+VgczvDqZswLyG3y+H4Wo8jDTd04vJ3n3QgsJUQtZk+QEkqF6gEl7vQHtAdvXj/UyOil05cnd Hxm968W7IU/56VAFVHc24MPqs4c2BYsuhrzFyBfcz3tuoa3rf8Q46no4JgKhx9oNKlkwFdUqXac CC20va+7gd9ul2sIqPiCLiLrkmUxG2lD5Owdyum+5IdATiv1z5I2LnbO4ZxiV4YTN5u94TicX4l KG5ZaNLK3gy+RGCp6PxqUXBWlRdjE0WF9bhcmhrg/pT0tG5QOQ4tLva1r+3TnfCpizLYjIaWFyQ N6+g7PJqZtrbz/kmE5LYqbyrcnRHkLG4JlM9hKdWu/lZH1zhNkaUFhx1LeftwlwWfHF6ne2Tv0e vXrfU= X-Google-Smtp-Source: AGHT+IEfEWMBpuXB6esQrBxKFWN/QBT+PeLNQP1j9P5NPPvwz0/rY/HNSQBn0WwC4+Hiu2oqxC+6fg== X-Received: by 2002:a05:6402:90b:b0:63e:f2d:b179 with SMTP id 4fb4d7f45d1cf-63e3e585ce9mr11470847a12.29.1761520699454; Sun, 26 Oct 2025 16:18:19 -0700 (PDT) Received: from builder.. ([2001:9e8:f109:5716:be24:11ff:fe30:5d85]) by smtp.gmail.com with ESMTPSA id 4fb4d7f45d1cf-63e7ef82865sm4847379a12.9.2025.10.26.16.18.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Oct 2025 16:18:19 -0700 (PDT) From: Jonas Jelonek To: Linus Walleij , Bartosz Golaszewski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Peter Rosin , Geert Uytterhoeven Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jonas Jelonek Subject: [PATCH v2 1/2] dt-bindings: gpio: add gpio-line-mux controller Date: Sun, 26 Oct 2025 23:17:53 +0000 Message-ID: <20251026231754.2368904-2-jelonek.jonas@gmail.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20251026231754.2368904-1-jelonek.jonas@gmail.com> References: <20251026231754.2368904-1-jelonek.jonas@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add dt-schema for a gpio-line-mux controller which exposes virtual GPIOs for a shared GPIO controlled by a multiplexer, e.g. a gpio-mux. The gpio-line-mux controller is a gpio-controller, thus has mostly the same semantics. However, it requires a mux-control to be specified upon which it will operate. Signed-off-by: Jonas Jelonek --- .../bindings/gpio/gpio-line-mux.yaml | 108 ++++++++++++++++++ .../devicetree/bindings/mux/gpio-mux.yaml | 30 +++++ 2 files changed, 138 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/gpio-line-mux.ya= ml diff --git a/Documentation/devicetree/bindings/gpio/gpio-line-mux.yaml b/Do= cumentation/devicetree/bindings/gpio/gpio-line-mux.yaml new file mode 100644 index 000000000000..4c907a35eb4d --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-line-mux.yaml @@ -0,0 +1,108 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/gpio-line-mux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: GPIO line mux + +maintainers: + - Jonas Jelonek + +description: + A GPIO controller to provide virtual GPIOs for a 1-to-many mapping backe= d by + a single shared GPIO and a multiplexer. A simple illustrated example is + + +----- A + IN/OUT / + <-----o------- B + / |\ + | | +----- C + | | \ + | | +--- D + | | + M1 M0 + + MUX CONTROL + + M1 M0 IN/OUT + 0 0 A + 0 1 B + 1 0 C + 1 1 D + + This can be used in case a real GPIO is connected to multiple inputs/out= puts + and controlled by a multiplexer, and another subsystem/driver does not w= ork + directly with the multiplexer subsystem. + +properties: + compatible: + const: gpio-line-mux + + gpio-controller: true + + "#gpio-cells": + const: 2 + + gpio-line-mux-states: + description: Mux states corresponding to the virtual GPIOs. + minItems: 1 + items: + type: string + + gpio-line-names: true + + mux-controls: + maxItems: 1 + $ref: /schemas/mux/mux-controller.yaml# + description: + Phandle to the multiplexer to control access to the GPIOs. + + ngpios: false + + shared-gpio: + description: + GPIO which is the '1' in 1-to-many and is shared by the virtual GPIOs + and controlled via the mux. + +required: + - compatible + - gpio-controller + - gpio-line-mux-states + - mux-controls + - shared-gpio + +additionalProperties: false + +examples: + - | + #include + #include + + sfp_gpio_mux: gpio-mux { + compatible =3D "gpio-mux"; + mux-gpios =3D <&gpio0 0 GPIO_ACTIVE_HIGH>, + <&gpio0 1 GPIO_ACTIVE_HIGH>; + #mux-control-cells =3D <0>; + idle-state =3D ; + }; + + sfp1_gpio: sfp-gpio-1 { + compatible =3D "gpio-line-mux"; + gpio-controller; + #gpio-cells =3D <2>; + + mux-controls =3D <&sfp_gpio_mux>; + shared-gpio =3D <&gpio0 2 GPIO_ACTIVE_HIGH>; + + gpio-line-names =3D "SFP1_LOS", "SFP1_MOD_ABS", "SFP1_TX_FAULT"; + gpio-line-mux-states =3D <0>, <1>, <3>; + }; + + sfp1: sfp-p1 { + compatible =3D "sff,sfp"; + + los-gpios =3D <&sfp1_gpio 0 GPIO_ACTIVE_HIGH>; + mod-def0-gpios =3D <&sfp1_gpio 1 GPIO_ACTIVE_LOW>; + tx-fault-gpios =3D <&sfp1_gpio 2 GPIO_ACTIVE_HIGH>; + }; diff --git a/Documentation/devicetree/bindings/mux/gpio-mux.yaml b/Document= ation/devicetree/bindings/mux/gpio-mux.yaml index ef7e33ec85d4..57eb1e9ef4cf 100644 --- a/Documentation/devicetree/bindings/mux/gpio-mux.yaml +++ b/Documentation/devicetree/bindings/mux/gpio-mux.yaml @@ -100,4 +100,34 @@ examples: }; }; }; + - | + #include + + sfp_mux: mux-controller { + compatible =3D "gpio-mux"; + #mux-control-cells =3D <0>; + + mux-gpios =3D <&gpio0 0 GPIO_ACTIVE_HIGH>, + <&gpio0 1 GPIO_ACTIVE_HIGH>; + }; + + sfp_gpio: sfp-gpio-1 { + compatible =3D "gpio-line-mux"; + gpio-controller; + #gpio-cells =3D <2>; + + mux-controls =3D <&sfp_mux>; + shared-gpio =3D <&gpio0 2 GPIO_ACTIVE_HIGH>; + + gpio-line-names =3D "SFP_LOS", "SFP_MOD_ABS", "SFP_TX_F"; + gpio-line-mux-states =3D <0>, <1>, <2>; + }; + + sfp0: sfp-p0 { + compatible =3D "sff,sfp"; + + los-gpios =3D <&sfp_gpio 0 GPIO_ACTIVE_HIGH>; + mod-def0-gpios =3D <&sfp_gpio 1 GPIO_ACTIVE_LOW>; + tx-fault-gpios =3D <&sfp_gpio 2 GPIO_ACTIVE_HIGH>; + }; ... --=20 2.48.1