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charset="utf-8" Add SD Card host controller for sm8750 soc. Signed-off-by: Sarthak Garg Reviewed-by: Abel Vesa --- arch/arm64/boot/dts/qcom/sm8750.dtsi | 54 ++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8750.dtsi b/arch/arm64/boot/dts/qco= m/sm8750.dtsi index a82d9867c7cb..50e1fa67c093 100644 --- a/arch/arm64/boot/dts/qcom/sm8750.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8750.dtsi @@ -2060,6 +2060,60 @@ ice: crypto@1d88000 { clocks =3D <&gcc GCC_UFS_PHY_ICE_CORE_CLK>; }; =20 + sdhc_2: mmc@8804000 { + compatible =3D "qcom,sm8750-sdhci", "qcom,sdhci-msm-v5"; + reg =3D <0 0x08804000 0 0x1000>; + + interrupts =3D , + ; + interrupt-names =3D "hc_irq", + "pwr_irq"; + + clocks =3D <&gcc GCC_SDCC2_AHB_CLK>, + <&gcc GCC_SDCC2_APPS_CLK>, + <&rpmhcc RPMH_CXO_CLK>; + clock-names =3D "iface", + "core", + "xo"; + + interconnects =3D <&aggre2_noc MASTER_SDCC_2 QCOM_ICC_TAG_ALWAYS + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>, + <&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ACTIVE_ONLY + &config_noc SLAVE_SDCC_2 QCOM_ICC_TAG_ACTIVE_ONLY>; + interconnect-names =3D "sdhc-ddr", + "cpu-sdhc"; + + power-domains =3D <&rpmhpd RPMHPD_CX>; + operating-points-v2 =3D <&sdhc2_opp_table>; + + qcom,dll-config =3D <0x0007442c>; + qcom,ddr-config =3D <0x80040868>; + + iommus =3D <&apps_smmu 0x540 0x0>; + dma-coherent; + + bus-width =3D <4>; + max-sd-hs-hz =3D <37500000>; + + resets =3D <&gcc GCC_SDCC2_BCR>; + + status =3D "disabled"; + + sdhc2_opp_table: opp-table { + compatible =3D "operating-points-v2"; + + opp-100000000 { + opp-hz =3D /bits/ 64 <100000000>; + required-opps =3D <&rpmhpd_opp_low_svs>; + }; + + opp-202000000 { + opp-hz =3D /bits/ 64 <202000000>; + required-opps =3D <&rpmhpd_opp_svs_l1>; + }; + }; + }; + cryptobam: dma-controller@1dc4000 { compatible =3D "qcom,bam-v1.7.4", "qcom,bam-v1.7.0"; reg =3D <0x0 0x01dc4000 0x0 0x28000>; --=20 2.34.1