From nobody Sat Feb 7 18:20:05 2026 Received: from mail-lf1-f52.google.com (mail-lf1-f52.google.com [209.85.167.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 12EEC285C85 for ; Sat, 25 Oct 2025 21:07:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761426432; cv=none; b=KHwXWBooO5ah48Djc5/JM+A7V3pS8WT3aRaynZV2KGpyi2Kg/71pBXC0BcYs53SyKj2lY37yNEG6U25kiwrJv2iLAZEVWjnj0xIoJ2QLlvYXs5QZdiAtpJT4WeeTfM2oz/5WNze6DzIR9OwG8jhOzRPXzAZATd+LPktGNPOqLEY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761426432; c=relaxed/simple; bh=wqvT45qGYMuDuQ2nycCKDD1dsJd4Ss57Ns77t1WjGKs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=nGU+YYWAyjE1E9Hx+Pt2Q7pOfJ8QOdhQT80pLA/VpsJgDad4RYjD6CY9wAtCqUoPkW0SpkJWccLYwyd4c0d6GtcktgM8Crc1lQTv5jOBkgo9G0ajlsbvHVuGFw4hiZ1lc5TnWzKV7nHLEN6EaL7s3zKfnc5H5Khg7EGa2MgqKoA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=VVFJPAUg; arc=none smtp.client-ip=209.85.167.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="VVFJPAUg" Received: by mail-lf1-f52.google.com with SMTP id 2adb3069b0e04-592f7e50da2so3548889e87.0 for ; Sat, 25 Oct 2025 14:07:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1761426428; x=1762031228; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=LHbmnK8ZAa3ArCtkCS3Paq/G1lnDqjyPBKtwjuhO/MQ=; b=VVFJPAUgHIYA3eLziEu29EshQcGP5tvr/67LUGUx5/Q17aBJIaCKBDYj7EkVXVyUdu 8pd3KZs66BfsImgZIpaU7b83fdv+bq5+gHBAP5UtkKb2SI8inHCWPMIQL2qFTriTpXeV mNCvJGOYdfCqv9HW5TTANhBH7AXw5C9QHji8C73R9VhimyTNOIoaKnUcSu1BaqteSKne H+myX7YlChHcFW/lQIEYM2lJtC1a6++e7qeDbNOoVI5g5PJZwdJe5ekqoly1taeFq5FH FQvHt+ziiU4IjZ70EaMsqEfJ3yornb39PbnpbmRiCM9YvMnRyaGC1r7fU0vUmOgfCQQu ExHg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1761426428; x=1762031228; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=LHbmnK8ZAa3ArCtkCS3Paq/G1lnDqjyPBKtwjuhO/MQ=; b=X4eqAKqrvzTOtR5oPhXAsxJWtmyfjbpGKJfa2HuZhfxtk+TSfhNbZls4l8b2RhJ4Df hEgQ1dY49iaISFMRSuTNfpywJMCRKNLiSzuii+8/FQCgGbD4Zepj3GT65AkXJlQnL+EG 3HQc7csQ5WcWE8bsETYZCSxO9w3QME+469d0+sYXmOm4Uj+xthnfLbH4LMfCB+F3K/W+ hYIjSZ0wsY447jal9nlhMlmfcl8kGngeSIMYcPCSdFzpLZRZITJgG8sNL/Xwpt/7TcEC N0lo1dY0OE/RKYU+eZdOYGqxOKc5YNXlVGq/jCTNMTZQbs3HLXAvpDSFxGdshK5RbDhY 3jww== X-Forwarded-Encrypted: i=1; AJvYcCXtGiMxDbVAQW9wf3HZt7/PWSCLBqtPwzRqy8YQXPsdcIaMTv/rxbl4Ybl7rlknfkINGsfxIp+YBaqb4Go=@vger.kernel.org X-Gm-Message-State: AOJu0YzX1RZEoRgu74WF5MK4VQgph2/XvdMhcyOW1+LL1LhrKuggCCj4 827iiDUUHGXg44Na+w3lxTaENgQK0bLxmbUOZM0TiSOpLEdqDfQgUVTf X-Gm-Gg: ASbGncsaR6+4NBgOFihD5LxJo1cX+yvOONqusOcryi1DunKBQLAF+Q55D6cDJ6rb/Gn lTT65AUdRq/t+fA4bLI3UAFakBAtf3VeAi45j3vlyphTaHXZXxqdx7ISzxDTVd6F3HrcLrMy0tX kc00MuOd322n9jC67tQuJ3nFLgh/6ekWmGwvygaprmKSXYmD9bbpWvXv6lmxowLPxGEzwheeQOh OBq0CKbPRSAXnK1pToNwXjU3Uqg3CZ7wDnC/ZGYBdzVXPVLFmGXOaUUdKR0fEOqdWqK+csrLV2l GcUcXb7zBrkmPkdSpQxMIc0lccbFZ38rV/EoylRtZ8l4ZyAL85yKNuUHLeBOM298C5rmrBT+4BF l+wOXku93JneYNuQwT5KvL+47PRoq5O/1f3Tk9RHoGUxWXA/YHxr7PXWkYifN+mJvOKE9ePr2tE uoyQ== X-Google-Smtp-Source: AGHT+IEDTnYlHsHbxYTMbvTclp6aBf8KAfq0acQrqiIvksnO+SXu5n9y6cipJAxh49NWH/q/DLQsKw== X-Received: by 2002:a05:6512:ad0:b0:592:fab3:9b1a with SMTP id 2adb3069b0e04-592fc11e15dmr2357987e87.14.1761426427877; Sat, 25 Oct 2025 14:07:07 -0700 (PDT) Received: from curiosity ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-59301f840dfsm953644e87.104.2025.10.25.14.07.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Oct 2025 14:07:07 -0700 (PDT) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Oleg Nesterov , Shuah Khan , Thomas Huth , Charlie Jenkins , Andy Chiu , Samuel Holland , Joel Granados , Conor Dooley , Yong-Xuan Wang , Heiko Stuebner , Sergey Matyukevich Subject: [PATCH v3 1/9] selftests: riscv: test ptrace vector interface Date: Sun, 26 Oct 2025 00:06:34 +0300 Message-ID: <20251025210655.43099-2-geomatsi@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251025210655.43099-1-geomatsi@gmail.com> References: <20251025210655.43099-1-geomatsi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a test case to check ptrace behavior in the case when vector extension is supported by the system, but vector context is not yet enabled for the traced process. Signed-off-by: Sergey Matyukevich --- .../testing/selftests/riscv/vector/.gitignore | 1 + tools/testing/selftests/riscv/vector/Makefile | 5 +- .../testing/selftests/riscv/vector/v_ptrace.c | 85 +++++++++++++++++++ 3 files changed, 90 insertions(+), 1 deletion(-) create mode 100644 tools/testing/selftests/riscv/vector/v_ptrace.c diff --git a/tools/testing/selftests/riscv/vector/.gitignore b/tools/testin= g/selftests/riscv/vector/.gitignore index 7d9c87cd0649..d21c03c3ee0e 100644 --- a/tools/testing/selftests/riscv/vector/.gitignore +++ b/tools/testing/selftests/riscv/vector/.gitignore @@ -2,3 +2,4 @@ vstate_exec_nolibc vstate_prctl v_initval v_exec_initval_nolibc +v_ptrace diff --git a/tools/testing/selftests/riscv/vector/Makefile b/tools/testing/= selftests/riscv/vector/Makefile index 6f7497f4e7b3..c14ad127e7fb 100644 --- a/tools/testing/selftests/riscv/vector/Makefile +++ b/tools/testing/selftests/riscv/vector/Makefile @@ -2,7 +2,7 @@ # Copyright (C) 2021 ARM Limited # Originally tools/testing/arm64/abi/Makefile =20 -TEST_GEN_PROGS :=3D v_initval vstate_prctl +TEST_GEN_PROGS :=3D v_initval vstate_prctl v_ptrace TEST_GEN_PROGS_EXTENDED :=3D vstate_exec_nolibc v_exec_initval_nolibc =20 include ../../lib.mk @@ -26,3 +26,6 @@ $(OUTPUT)/v_initval: v_initval.c $(OUTPUT)/sys_hwprobe.o = $(OUTPUT)/v_helpers.o $(OUTPUT)/v_exec_initval_nolibc: v_exec_initval_nolibc.c $(CC) -nostdlib -static -include ../../../../include/nolibc/nolibc.h \ -Wall $(CFLAGS) $(LDFLAGS) $^ -o $@ -lgcc + +$(OUTPUT)/v_ptrace: v_ptrace.c $(OUTPUT)/sys_hwprobe.o $(OUTPUT)/v_helpers= .o + $(CC) -static -o$@ $(CFLAGS) $(LDFLAGS) $^ diff --git a/tools/testing/selftests/riscv/vector/v_ptrace.c b/tools/testin= g/selftests/riscv/vector/v_ptrace.c new file mode 100644 index 000000000000..6a4b5a2ab4a2 --- /dev/null +++ b/tools/testing/selftests/riscv/vector/v_ptrace.c @@ -0,0 +1,85 @@ +// SPDX-License-Identifier: GPL-2.0-only +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include "../../kselftest_harness.h" +#include "v_helpers.h" + +volatile unsigned long chld_lock; + +TEST(ptrace_v_not_enabled) +{ + pid_t pid; + + if (!is_vector_supported()) + SKIP(return, "Vector not supported"); + + chld_lock =3D 1; + pid =3D fork(); + ASSERT_LE(0, pid) + TH_LOG("fork: %m"); + + if (pid =3D=3D 0) { + while (chld_lock =3D=3D 1) + asm volatile("" : : "g"(chld_lock) : "memory"); + + asm volatile ("ebreak" : : : ); + } else { + struct __riscv_v_regset_state *regset_data; + unsigned long vlenb; + size_t regset_size; + struct iovec iov; + int status; + int ret; + + asm volatile("csrr %[vlenb], vlenb" : [vlenb] "=3Dr"(vlenb)); + + ASSERT_GT(vlenb, 0) + TH_LOG("vlenb is not valid: %lu\n", vlenb); + + /* attach */ + + ASSERT_EQ(0, ptrace(PTRACE_ATTACH, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* unlock */ + + ASSERT_EQ(0, ptrace(PTRACE_POKEDATA, pid, &chld_lock, 0)); + + /* resume and wait for ebreak */ + + ASSERT_EQ(0, ptrace(PTRACE_CONT, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* try to read vector registers from the tracee */ + + regset_size =3D sizeof(*regset_data) + vlenb * 32; + regset_data =3D calloc(1, regset_size); + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + /* V extension is available, but not yet enabled for the tracee */ + + errno =3D 0; + ret =3D ptrace(PTRACE_GETREGSET, pid, NT_RISCV_VECTOR, &iov); + ASSERT_EQ(ENODATA, errno); + ASSERT_EQ(-1, ret); + + /* cleanup */ + + ASSERT_EQ(0, kill(pid, SIGKILL)); + } +} + +TEST_HARNESS_MAIN --=20 2.51.0 From nobody Sat Feb 7 18:20:05 2026 Received: from mail-lf1-f47.google.com (mail-lf1-f47.google.com [209.85.167.47]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9A3142D8DB9 for ; Sat, 25 Oct 2025 21:07:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.47 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761426434; cv=none; b=u6S6F7g80MhlJy8tcrUoktPguCHkvkUZUtZqm9fy+Rphz7oDsaQla/Rlhnm0TYMlRd64klFJ+HssfeyAcv2e5xyEmrY2bBqtc1wDtSclqeRiKUe31nIpcoQ6aRg50CQ6x5+c5AwEqQpCu7oBxMXpWbRUakHj2rsBwmeVcFg9O3Q= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761426434; c=relaxed/simple; bh=vKbmQPnxwBg289DjWSmS0b59pBATdSkR5Ho4WAMAT9U=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Y29wDTpW+wvzYnaZleJCGBgPm+DaXZlXj5j0cAxeLASrruCx4Cocdc2wdeQplV04JzfXhlm15VmZ+23KjTNwDGAXnpP8M6gzCR3aiDcRTFc8X/Z2j2gceC91NCPw8Ro8BKjz/vHu7O+qRxji6kY8AshI0u6ZuG20uW9MX6ZgTYc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=jvdy4u8K; arc=none smtp.client-ip=209.85.167.47 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="jvdy4u8K" Received: by mail-lf1-f47.google.com with SMTP id 2adb3069b0e04-57bd482dfd2so3635733e87.2 for ; Sat, 25 Oct 2025 14:07:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1761426431; x=1762031231; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=KOKLEyEqhroRvoLq2wOrgCP0+QeKumxXjJG7yF7kNYg=; b=jvdy4u8KNy0jWtN6XzskatheWMC1wnAf11lb0V4AjfZAfGD5jNHjl+3RYDapacVt8l qV3r5ENo5abtfyHaov/2tyz95MJIbthX1a7rNT41GkuYoXMcZrhAOamSRyuXkVTUvEc/ 0K41iBv6b9Conc4UBlDdLfs/i2hqf37MPMK+kvu4eP0y1ahxrqKqJs+4vnpokmOALGJ1 L4C2s1QmkAoNWndF8WawP1oYNeiygoPUSAoHagg0yDQMuds6M1wcgtu3hXBd2PWSmtmJ WqGSeItSy8WBJpbgBQn5E9TRigbby94wagDHCB6Q/WmnRlOcDwW2hFmkuDICMwGu4Og2 wUFg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1761426431; x=1762031231; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=KOKLEyEqhroRvoLq2wOrgCP0+QeKumxXjJG7yF7kNYg=; b=D+fpL9QVexvUYpTvK06TDsF/0ceGoCTA/vy7uXZnFgz0n9PJYV0qfd2Tx9/HFTgnkr hhdjH7oR945VgFEZXis3JjQYQvSd+rVvqFFWwxEeVB7AdCgJ3GYavrNldE8YMKwfgTrq sfcUFGyEs6aDBw2dNJKFUjogsxMTgE5Cltjtz4kFq+g0RtJls4lR/dT1zbh//63Pf0Ak OJIjlaHjDHbQQGxdS+qa6beVW40Se7o4M7/XYr+sEGSudkFTwH+mfMqtv+l5JOGM2keR XeFRRTJVNtLWtM/4s/4uN0WCvloXcEcOKlyXmd65e900YIllcTLXivoIOkm5SSTLVSrj TSfQ== X-Forwarded-Encrypted: i=1; AJvYcCX+59FtFp5gA11d/0RMGdPMPUsXv8KCpdpN+TqVetDzixShbt9rWwab7aAfX4xcdAXRbrNaDMjUBvDxrsg=@vger.kernel.org X-Gm-Message-State: AOJu0YwIC6o0qvmDbj+NPhVp4qDWgDdKxFk1t8JU3Y8gllQZTgjDEjRa 25kzbPZaf8j4sPXoUCNxwae01ccCGUIRjlJXf3NkL1KYZVSuKCwMsWGU X-Gm-Gg: ASbGncsX5cQ5NlMGFnAqPwHg6JrW7bpm0lvpNSCc9zn2HuP7zR1sfYfqv+rAQj5wJqH ZU2VuIphPWn8Vjhdp7PjzB3bmwTj04bpHHGZ3qHvw187vJkndbF1ai/I5nccXn9Eu7LFRug1lHV 0klsXDaBGqGQb623SDKM340bhOQ1eKORUWlh2fd+JfTIZqR9EgjiPcMdJBHDN5k41ci89Wv/Vnq vSW+nAVwLSk4ONtYyhu1AemS/6RELAt7Im2cwfGB9fEEnuTIy9EXwU84T/5ygpIu7X+bdaTyJmM uVKpZHmOAAzpnmWtepwoZ3OJj8uOwg+HFRB29f359wnXCc0hDFMBPRktvczxL97bzkSC0w2lm7K IX/5vWV67iEtE9gQZNtpxdoClQ7Ka052zWNk66rFMl+A+f2TchAXQAsQacHSKPE6AXbQ= X-Google-Smtp-Source: AGHT+IF1PY8CjKZBltkRiaMjAPbsy0y2I5sExlfobv+KioSsAE6i9yPd2n/v6imAUn4q9skXUbuNAQ== X-Received: by 2002:a05:6512:1581:b0:591:c93c:cf6a with SMTP id 2adb3069b0e04-591d84cf7a9mr11591651e87.4.1761426430511; Sat, 25 Oct 2025 14:07:10 -0700 (PDT) Received: from curiosity ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-59301f840dfsm953644e87.104.2025.10.25.14.07.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Oct 2025 14:07:08 -0700 (PDT) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Oleg Nesterov , Shuah Khan , Thomas Huth , Charlie Jenkins , Andy Chiu , Samuel Holland , Joel Granados , Conor Dooley , Yong-Xuan Wang , Heiko Stuebner , Sergey Matyukevich , Ilya Mamay Subject: [PATCH v3 2/9] riscv: ptrace: return ENODATA for inactive vector extension Date: Sun, 26 Oct 2025 00:06:35 +0300 Message-ID: <20251025210655.43099-3-geomatsi@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251025210655.43099-1-geomatsi@gmail.com> References: <20251025210655.43099-1-geomatsi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Ilya Mamay Currently, ptrace returns EINVAL when the vector extension is supported but not yet activated for the traced process. This error code is not always appropriate since the ptrace arguments may be valid. Debug tools like gdbserver expect ENODATA when the requested register set is not active, e.g. see [1]. This expectation seems to be more appropriate, so modify the vector ptrace implementation to return: - EINVAL when V extension is not supported - ENODATA when V extension is supported but not active [1] https://github.com/bminor/binutils-gdb/blob/637f25e88675fa47e47f9cc5e2c= f37384836b8a2/gdbserver/linux-low.cc#L5020 Signed-off-by: Ilya Mamay --- arch/riscv/kernel/ptrace.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c index 8e86305831ea..906cf1197edc 100644 --- a/arch/riscv/kernel/ptrace.c +++ b/arch/riscv/kernel/ptrace.c @@ -95,9 +95,12 @@ static int riscv_vr_get(struct task_struct *target, struct __riscv_v_ext_state *vstate =3D &target->thread.vstate; struct __riscv_v_regset_state ptrace_vstate; =20 - if (!riscv_v_vstate_query(task_pt_regs(target))) + if (!has_vector()) return -EINVAL; =20 + if (!riscv_v_vstate_query(task_pt_regs(target))) + return -ENODATA; + /* * Ensure the vector registers have been saved to the memory before * copying them to membuf. @@ -130,9 +133,12 @@ static int riscv_vr_set(struct task_struct *target, struct __riscv_v_ext_state *vstate =3D &target->thread.vstate; struct __riscv_v_regset_state ptrace_vstate; =20 - if (!riscv_v_vstate_query(task_pt_regs(target))) + if (!has_vector()) return -EINVAL; =20 + if (!riscv_v_vstate_query(task_pt_regs(target))) + return -ENODATA; + /* Copy rest of the vstate except datap */ ret =3D user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ptrace_vstate, 0, sizeof(struct __riscv_v_regset_state)); --=20 2.51.0 From nobody Sat Feb 7 18:20:05 2026 Received: from mail-lf1-f54.google.com (mail-lf1-f54.google.com [209.85.167.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 941593009F0 for ; Sat, 25 Oct 2025 21:07:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761426437; cv=none; b=aU+udvG1P1zi9jcblLaYqBYoDa3oNO7g6hDwo8AZK6ZVai8YiRjeopjMWEx0wWvyjm1J4fIiQhMUFxYkL2uMsHuRd4g1znWx6QlCgXVcIkRENpUrLJzINabn08wCcxameBHx3AD30zG8MXxCjGz7CZtmSwwslzbApd4uUO+2EGM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761426437; c=relaxed/simple; bh=I+Jx6xBgH2zAab9TpH14gkeCgnP49zZ44qWiAaJu1NQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PwT3VdxQ35I35x/MsdhCTtoO6wBvDzmyS+Un9bUsVNCRNVIEFElnZM7Hz9JBlAceCzTxtUG6SOPuRAGtKxBAQbFvNNRKxUSOJTT4AiVQDRzWbEyJn9obKm3ealIvVxcxgdbwEXAAsmOgUAO+t/VIVUyocAulBQqiutiAOwZD1FI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=OhAxPh9C; arc=none smtp.client-ip=209.85.167.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="OhAxPh9C" Received: by mail-lf1-f54.google.com with SMTP id 2adb3069b0e04-591c9934e0cso4823767e87.0 for ; Sat, 25 Oct 2025 14:07:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1761426434; x=1762031234; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=1z9oJMGhMkRuSJL42xb+stRjYj/XQC2rSAWX+erznoA=; b=OhAxPh9CeQiheGaYloZ6IRUb+catFwutGsmHdNHmoTgvVvS5AtYq8oPBuy5nctpWGD 92BmI84RAXZT9wEdDUR+iQZfD2RWS8bwxW+x4sDN4bWgKjy6DCW1UJm3luGo+2pGWbft 7alW7MqeOMrv7OVEOqM8gbHL0WMshkqlsGenvb/ouf9Mn1ya75zL7DlZJpLTAXiyjqOu Cxqe6AxmINwXTucB6+dVhMtNjnciD72+zOmrr+u78K4wjiFPEWrMXf/urQlhI4VI959a ATksxX4u4NnTKdI+S4aIxzkaUyTMZyDbOKroKZ+T7S53Z4woYlXIbkT9naKZyeVb40ww vUsA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1761426434; x=1762031234; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=1z9oJMGhMkRuSJL42xb+stRjYj/XQC2rSAWX+erznoA=; b=jQ5g2kTFUV9O+BEEgoUqPXUHlvgSNpr1xLDZHky8DRjsp92nRGu9qf45Cpz2a7nke1 ioF4V+GV+WLve7oy4J8BtN/R6LqMzTqEFANnKUuwJ1YrcjjtezojhWPKraSOdY1GeW/O B3IehqZoo3K5bTHUPCVXW7MD37WB7SzBt65ZqbdQ1ne6K7rvy2sQ8GtqZMMNb6clxP3h XrMZmXkuN2NQfkVOQLTEM3io2VVjEq3SNdomMK6SjoLgYi9y/146Gzd3CAKtt+Icn+Jm CDLlTaHhSq9DTXvWbSS4H9XZZFx+kMBQRkoESgIjCuUbyhNBbQAaSPTMw+M/oOT1G3eG algA== X-Forwarded-Encrypted: i=1; AJvYcCWpgU/dJ7eJb3ldMemPBrgN4UL5E4CaQEqzBrFFf9onTz0gLI5Soygf/HR5UWaH/5ZxrUC4BAWe63xk7wo=@vger.kernel.org X-Gm-Message-State: AOJu0YxWJlO6X1Df/ns/auEzCPr4dkv1MtXgye8T4qTzee2OyVOqFSP0 wm0ZEeZW6Zc9a/w3+SQ7rufZPx7tyTUSsOPzhLCM6Ceed7CpneCDTXOQ X-Gm-Gg: ASbGncsIusrrCqqjciGrUNEmlGaaYdTJetqK3KFfphNU9yN5hk476YPxK5ts6GF8wLS NHCDsu+zcaUitBwjkImU4wMJ7lDIDisxNI1743IZAzVacDXMKsHoB0E3REI8fQMLgwzzldyXGqV 8EL1PZ25cftKEgGeWdJVV7AYTa11HFP1SoWkkm8M29+bgsM0YQbCC3V/pDlfcOOx54e8u6YOVUY IDOqhsN/OVNaTGyNUj4uVs5WBe92lQ9eV3bzck1g24YY7fCyQFdMBPOCt58Ng8mlmfRaledv9kp fCd+cgZ2u5TC0LKT0AAsL8LhnqP/bU/fPGg79bZMm/jcv1tzy09QlxzsbI7G/RoWmE0DOViKX8A tgOJaT6HGu/r9Z4Zdn1ACHzyzSyTJgvD6pDsgeuMGuj0O99yA+AfGWnHTWu4JKgKKHgQ= X-Google-Smtp-Source: AGHT+IFUdDmSd26EpJsO+EiP5G0k+Ebq3VVdqt8KbLEbTXtWf6GeHir1tww1xGP4PmC4wQzC5b6wjw== X-Received: by 2002:a05:6512:32c5:b0:57e:ad46:b0a0 with SMTP id 2adb3069b0e04-591d84cf5ecmr11675494e87.6.1761426433528; Sat, 25 Oct 2025 14:07:13 -0700 (PDT) Received: from curiosity ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-59301f840dfsm953644e87.104.2025.10.25.14.07.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Oct 2025 14:07:12 -0700 (PDT) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Oleg Nesterov , Shuah Khan , Thomas Huth , Charlie Jenkins , Andy Chiu , Samuel Holland , Joel Granados , Conor Dooley , Yong-Xuan Wang , Heiko Stuebner , Sergey Matyukevich Subject: [PATCH v3 3/9] selftests: riscv: verify initial vector state with ptrace Date: Sun, 26 Oct 2025 00:06:36 +0300 Message-ID: <20251025210655.43099-4-geomatsi@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251025210655.43099-1-geomatsi@gmail.com> References: <20251025210655.43099-1-geomatsi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a test case that attaches to a traced process immediately after its first executed vector instructions to verify the initial vector context. Signed-off-by: Sergey Matyukevich --- .../testing/selftests/riscv/vector/v_ptrace.c | 101 ++++++++++++++++++ 1 file changed, 101 insertions(+) diff --git a/tools/testing/selftests/riscv/vector/v_ptrace.c b/tools/testin= g/selftests/riscv/vector/v_ptrace.c index 6a4b5a2ab4a2..9fea29f7b686 100644 --- a/tools/testing/selftests/riscv/vector/v_ptrace.c +++ b/tools/testing/selftests/riscv/vector/v_ptrace.c @@ -82,4 +82,105 @@ TEST(ptrace_v_not_enabled) } } =20 +TEST(ptrace_v_early_debug) +{ + static volatile unsigned long vstart; + static volatile unsigned long vtype; + static volatile unsigned long vlenb; + static volatile unsigned long vcsr; + static volatile unsigned long vl; + pid_t pid; + + if (!is_vector_supported()) + SKIP(return, "Vector not supported"); + + chld_lock =3D 1; + pid =3D fork(); + ASSERT_LE(0, pid) + TH_LOG("fork: %m"); + + if (pid =3D=3D 0) { + while (chld_lock =3D=3D 1) + asm volatile("" : : "g"(chld_lock) : "memory"); + + asm volatile("csrr %[vstart], vstart" : [vstart] "=3Dr"(vstart)); + asm volatile("csrr %[vl], vl" : [vl] "=3Dr"(vl)); + asm volatile("csrr %[vtype], vtype" : [vtype] "=3Dr"(vtype)); + asm volatile("csrr %[vcsr], vcsr" : [vcsr] "=3Dr"(vcsr)); + asm volatile("csrr %[vlenb], vlenb" : [vlenb] "=3Dr"(vlenb)); + + asm volatile ("ebreak" : : : ); + } else { + struct __riscv_v_regset_state *regset_data; + unsigned long vstart_csr; + unsigned long vlenb_csr; + unsigned long vtype_csr; + unsigned long vcsr_csr; + unsigned long vl_csr; + size_t regset_size; + struct iovec iov; + int status; + + /* attach */ + + ASSERT_EQ(0, ptrace(PTRACE_ATTACH, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* unlock */ + + ASSERT_EQ(0, ptrace(PTRACE_POKEDATA, pid, &chld_lock, 0)); + + /* resume and wait for ebreak */ + + ASSERT_EQ(0, ptrace(PTRACE_CONT, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* read tracee vector csr regs using ptrace PEEKDATA */ + + errno =3D 0; + vstart_csr =3D ptrace(PTRACE_PEEKDATA, pid, &vstart, NULL); + ASSERT_FALSE((errno !=3D 0) && (vstart_csr =3D=3D -1)); + + errno =3D 0; + vl_csr =3D ptrace(PTRACE_PEEKDATA, pid, &vl, NULL); + ASSERT_FALSE((errno !=3D 0) && (vl_csr =3D=3D -1)); + + errno =3D 0; + vtype_csr =3D ptrace(PTRACE_PEEKDATA, pid, &vtype, NULL); + ASSERT_FALSE((errno !=3D 0) && (vtype_csr =3D=3D -1)); + + errno =3D 0; + vcsr_csr =3D ptrace(PTRACE_PEEKDATA, pid, &vcsr, NULL); + ASSERT_FALSE((errno !=3D 0) && (vcsr_csr =3D=3D -1)); + + errno =3D 0; + vlenb_csr =3D ptrace(PTRACE_PEEKDATA, pid, &vlenb, NULL); + ASSERT_FALSE((errno !=3D 0) && (vlenb_csr =3D=3D -1)); + + /* read tracee csr regs using ptrace GETREGSET */ + + regset_size =3D sizeof(*regset_data) + vlenb_csr * 32; + regset_data =3D calloc(1, regset_size); + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_RISCV_VECTOR, &iov)); + + /* compare */ + + EXPECT_EQ(vstart_csr, regset_data->vstart); + EXPECT_EQ(vtype_csr, regset_data->vtype); + EXPECT_EQ(vlenb_csr, regset_data->vlenb); + EXPECT_EQ(vcsr_csr, regset_data->vcsr); + EXPECT_EQ(vl_csr, regset_data->vl); + + /* cleanup */ + + ASSERT_EQ(0, kill(pid, SIGKILL)); + } +} + TEST_HARNESS_MAIN --=20 2.51.0 From nobody Sat Feb 7 18:20:05 2026 Received: from mail-lf1-f45.google.com (mail-lf1-f45.google.com [209.85.167.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6332E307AFA for ; Sat, 25 Oct 2025 21:07:19 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761426441; cv=none; b=iZ4T26oqnUX1T/5Yit6iSY5HuRRmljFeKeR9YjVOi6ejZEgOLcUHHj8FIYshEcllHqcSIVgPlUzgBKXJP5w7Pg9eBzPFH/E9AMZto+gxB5yYDVeGf63eETm0KI2noEudaPIVKVoVkPV5p/CP2BDJnIzsjbW0ve97j/+8WOnJGRM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761426441; c=relaxed/simple; bh=6M9dbLxONjUxBoLDP2RqBwNW90OBNkAA0tpnRglr6DQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=is30RWT6U74s98g4adgKAlWK5CrUtr1WM/XFcIQnyR3f97vaWnrmXZTg8jMVubs/2Ap0in7XboBDEhMLMXClIjLL/3DKSZVCgHEzH5Fnih7YYbN95/OPHQLPFSvLCc0lKFhwyfptMGXreczQowbCBTsgfIiGUnHU+LJ9V0t9Kto= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=nBdp9wUJ; arc=none smtp.client-ip=209.85.167.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="nBdp9wUJ" Received: by mail-lf1-f45.google.com with SMTP id 2adb3069b0e04-592fd97c03eso2176836e87.1 for ; Sat, 25 Oct 2025 14:07:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1761426437; x=1762031237; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=J2IQTBuXBoLRQZMsUEB0GbuKpDZXigWMmDpUz8gyE1g=; b=nBdp9wUJ9Q8oK/e8UYOrop9xAt+pjHTMUvFHgozodHb3OBq+z+z8JPyTjuOTX3749c qt7G79OWgMYfQKZzmqQQdlyabD1Y2QdUXf/dzWjSFwtdWSRLkhRmwzExESmsYzeCvbci 608fUIcbh/YYJ/+a/TTYeu1WSwLbF3oaiWpJ3QKqD2Y6yX4QfPFnaTxwj7Pc8TTaac8W gzV6PscDn/NDkMcnSOyZ52U42iGGk4fQECmTrisNDoyEXexypSZgX6pt/h7+5AlEmSLr wFLFYIA7wtrXRYTggcFDrLsJzayo3xVQ6ZofBPvMCK/pMm5hGszyj8vAdy279NcFHR7y vb/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1761426437; x=1762031237; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=J2IQTBuXBoLRQZMsUEB0GbuKpDZXigWMmDpUz8gyE1g=; b=PWMMJC9vj6EfIXHPgqLJLeMRouSwkBu7T0aYoAiuO2WVEck2KCYwrw0dU8h2X5Hv7v VLoOdBy2Q6j2fSJCl0FM4QegYZXm7kyUo0dj5lKT4wWpPl975SqdhFifKeA/I+A5uRzj mgBC0qaRzWIBJ+3sXu055BUPRjQ+b6/lLQQjdNVfEI215n4Ie1f+Pr4GfAGkl3LTqKC/ +tJwVdJfRclcPeCtVftbV2AOeswDnfrPYosyH7vOu/uEhVc2SXi79mwDh0Zi/9cvI8Tg b62sm9OsGDen+Tj8LXUsS6PnazL41XZm1udzzcNsk9U50ejgPWInXgsrYPXDUix+X39l OUNQ== X-Forwarded-Encrypted: i=1; AJvYcCVRN5hwNFlzi6hLFpAbKpNZQ49pBVU4XKAqBiClKLmgn7SR/MsOb6ZMvkjAMXiaNN8vID+Ta/95T5zcN08=@vger.kernel.org X-Gm-Message-State: AOJu0Ywf5q3b5an7uYz+akAAUN/xnPPe8u+NrpcJHwRAInfmIszZ7Ayn rtFYNyEKytYYijqj7Tue3IHqwpaTUT+RyQswUB9zgv91THlg0NuQFnXD X-Gm-Gg: ASbGncstTKmTkxOMwI9fCZSxCtAeeZD33auTHbXMGiJxD9H6wwPfWQJLra9litaL0PE /Cf2z0Ua+xaYqPN6Gre1RhPDFEj6zOMAbVIhJOAIAnBo8vJl9aus6gz5Be8JHbu4nLgFAl2x+jy uLw6CooRQJwPksPRycEEgxmp3A/DzpcDkD0M1+DymG4XZdiHhHQMa0d09OZ3BZe+aG73irt2awO +XcdAZ+u3kQim2nHhp/YsUAK21Pcc7JfSGZawYXzBWRaLhq736d2kKv+MihH38p9IbFdNwzU1RP iomNkoqlp3U758mmzH9oFRICIA4Y6cDULxDhietiYj3zrJJ5NydzOHjMy2HVU5F+ko1zaYuNRA1 TrQwiRYO6CUIoy2A9vSmYmRqCgJ7pSL6uqvkj4MkxvUc9cGgw/5qZPlPazR4uSIzWPf4GwtgEx7 ilBw== X-Google-Smtp-Source: AGHT+IEUMnm6G8NC9y9eteA74dxGa6AyRrosugAI0qpbfbFsUo0z/KPL8oVjRjeuVyceOpVmnGq0AA== X-Received: by 2002:a05:6512:318b:b0:57d:6fca:f208 with SMTP id 2adb3069b0e04-591d856642dmr11260648e87.45.1761426437336; Sat, 25 Oct 2025 14:07:17 -0700 (PDT) Received: from curiosity ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-59301f840dfsm953644e87.104.2025.10.25.14.07.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Oct 2025 14:07:15 -0700 (PDT) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Oleg Nesterov , Shuah Khan , Thomas Huth , Charlie Jenkins , Andy Chiu , Samuel Holland , Joel Granados , Conor Dooley , Yong-Xuan Wang , Heiko Stuebner , Sergey Matyukevich Subject: [PATCH v3 4/9] riscv: vector: init vector context with proper vlenb Date: Sun, 26 Oct 2025 00:06:37 +0300 Message-ID: <20251025210655.43099-5-geomatsi@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251025210655.43099-1-geomatsi@gmail.com> References: <20251025210655.43099-1-geomatsi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The vstate in thread_struct is zeroed when the vector context is initialized. That includes read-only register vlenb, which holds the vector register length in bytes. This zeroed state persists until mstatus.VS becomes 'dirty' and a context switch saves the actual hardware values. This can expose the zero vlenb value to the user-space in early debug scenarios, e.g. when ptrace attaches to a traced process early, before any vector instruction except the first one was executed. Fix this by specifying proper vlenb on vector context init. Signed-off-by: Sergey Matyukevich --- arch/riscv/kernel/vector.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/riscv/kernel/vector.c b/arch/riscv/kernel/vector.c index 901e67adf576..34048c4c26dc 100644 --- a/arch/riscv/kernel/vector.c +++ b/arch/riscv/kernel/vector.c @@ -109,8 +109,8 @@ bool insn_is_vector(u32 insn_buf) return false; } =20 -static int riscv_v_thread_zalloc(struct kmem_cache *cache, - struct __riscv_v_ext_state *ctx) +static int riscv_v_thread_ctx_alloc(struct kmem_cache *cache, + struct __riscv_v_ext_state *ctx) { void *datap; =20 @@ -120,13 +120,15 @@ static int riscv_v_thread_zalloc(struct kmem_cache *c= ache, =20 ctx->datap =3D datap; memset(ctx, 0, offsetof(struct __riscv_v_ext_state, datap)); + ctx->vlenb =3D riscv_v_vsize / 32; + return 0; } =20 void riscv_v_thread_alloc(struct task_struct *tsk) { #ifdef CONFIG_RISCV_ISA_V_PREEMPTIVE - riscv_v_thread_zalloc(riscv_v_kernel_cachep, &tsk->thread.kernel_vstate); + riscv_v_thread_ctx_alloc(riscv_v_kernel_cachep, &tsk->thread.kernel_vstat= e); #endif } =20 @@ -212,12 +214,14 @@ bool riscv_v_first_use_handler(struct pt_regs *regs) * context where VS has been off. So, try to allocate the user's V * context and resume execution. */ - if (riscv_v_thread_zalloc(riscv_v_user_cachep, ¤t->thread.vstate)) { + if (riscv_v_thread_ctx_alloc(riscv_v_user_cachep, ¤t->thread.vstate= )) { force_sig(SIGBUS); return true; } + riscv_v_vstate_on(regs); riscv_v_vstate_set_restore(current, regs); + return true; } =20 --=20 2.51.0 From nobody Sat Feb 7 18:20:05 2026 Received: from mail-lf1-f54.google.com (mail-lf1-f54.google.com [209.85.167.54]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F2F332DEA7E for ; Sat, 25 Oct 2025 21:07:21 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.54 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761426443; cv=none; b=dFyU7JtlQeVaZoTQqwALkzrkPbAX8v8m64vJjQ+KvKWslykvp3sYevlXYztrY3/VPR0rK8Un7M2V27a72X8WA8YquZssKM2MGOcXITg9ZwLPB2vvKk+Xl+qBEEtIkQ7sd+OKQoXDtq19PQXkHpkVv0mUJVBK3WNeKfnvdDKaxrQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761426443; c=relaxed/simple; bh=Pe1PrzSHPHaE+mLJAWnnsnfkBcy0LdZurJIR6tCO3CM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=q6d7TSPLnG2TvycNQwiaH3ivoSbbWbnAYJ8vTENzpwz62A9uEfkqu67Vd/E5KkbjCdPDSmyzoP/N1Sjr/KxNhWlmClUaiZlLEKQx76nOINAXCe0Hi6KC5cLNEVq9cJ3n8UG0RDRA0u1MUBjK6hrj8+iUpYHl6vPDX9DnEzDplUw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=W+lU7eff; arc=none smtp.client-ip=209.85.167.54 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="W+lU7eff" Received: by mail-lf1-f54.google.com with SMTP id 2adb3069b0e04-592f22b1e49so3028635e87.0 for ; Sat, 25 Oct 2025 14:07:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1761426440; x=1762031240; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=Kr/0QMDYvE37cYblYgLUhzeK18fGuMqZbjJmBm3dTtg=; b=W+lU7effMFIsJJruJaLSy38csvEEmtmgfg/h6mMLrJnSkK4fxmPk2IplAkb7NPQWBl UVFa2Ji5niaweATGqZ1TcUZGoOZSYfAtZHbLg5atJhP4vr4wTyZ6YRiuquiYSx8yKAbn i75bNqp9ODNYixAkXNV3HzI405NPE66a8IDdpNIwaxGwyL/tDJC3ky1H4wMEqId0Ji/T MyxcOLvBDliT2GjjAe5K3e5+lyTg3nLI2+IZKz3mFFj64XjhrD6iKbEHslVSVHMUc9ZC 3ZuTGSf+fUYwUANxWKM/QUMNqEIv83VtBV/P2dA+k+enwEuHLP0yyxFj4hqd00QIFDdn pn6w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1761426440; x=1762031240; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=Kr/0QMDYvE37cYblYgLUhzeK18fGuMqZbjJmBm3dTtg=; b=tvDd5iLecPlq2fC5CYhO6UlHxzBVRDNcBo6dbsRgGdUqWXqitL3bAJdaFMPD2DNEFP s0uZttDfLjpHrF8xn+85SODiV6F2Sm+2kUsMerSb1+Ip9K9poNKgsgK6e4NA/JHKBtd+ hTux4gb5IkY8+AiLeVnaQvh1OBTwkWA7rzjQYvYU2WeU9Rn6FlnRkLzbVDbn71LomJBh wJO10A5CsrOB8Z6hnOVW24vIykMT/rQcq8usAB8nzGuH6rmprBeiA+LFkQ0lBiiAySiU RLMXAlEpnHTz/z7YE5IlK+xWnnj6wFffYzCOUO+vFyB6On/XhMkTCwutIVp2fQqRuE1F +p/w== X-Forwarded-Encrypted: i=1; AJvYcCUo7R022DAaIt/IFO5TTCk+NEqfKW4zMf+gdL2+VpMgs9cVTd6mZEW9yWWt9NvT+14rKJhhe/W13y2hzdk=@vger.kernel.org X-Gm-Message-State: AOJu0YwDxh7fpv7mR7js4kcQtSpgwD1oMyYsC/p0Ry8BlQOnleRJw9Tg rhTqtUGVz801lqY8QDBOWjc3u1+cc0JzN9GtordMIKnuCMKiphdsJQZc X-Gm-Gg: ASbGnct0OtMeX1Wu9cz3zTyFnfG4UE9LKol1t8konvMRDIp8A6RCgbnMLfJD9AGYxmC ncXkwIUGREqe/FllWySHK+YiCGdehbe87KAFNuLT8xJ6awEKvGqiohnf0Od/CvsN+bD9AUeANRS fVJMsGMAnrvVLA4vBeyzltl+HNBXUaUWREUhmM8+w92PKvYuzjmZB+YmJnbrvNPOIGgPpLlwpFV WJYziomK7SONhpBzwKxV+kkCqAQOG9dVBc/rAMvs4r7N7o+qCBh+l9omYewrVIieG7GNvMd1fm/ Dzx8VTzNdCPLvd0N8dhcJTxgw7CM/AXztFv83Doq2gSeZbpqlWuDY1EwMWtB/lTaB5oqClIItiZ UVKx/BTcC6Hfsul5WQkl0WXvDBoChWyX0cn5vihdCAUItjH3KiffJaw0vtkUgr28LPsVFZJn04K AVoWhLDwEIHnih X-Google-Smtp-Source: AGHT+IFkPXpISal+SMJSZTatfdL2HnDeo/R8Opajfidd3Uztyq4QO9Zc4xlbr5bSdzNAFjn8IbTUKw== X-Received: by 2002:a05:6512:3405:b0:591:c898:e82b with SMTP id 2adb3069b0e04-591d84cf8d6mr11261129e87.8.1761426439955; Sat, 25 Oct 2025 14:07:19 -0700 (PDT) Received: from curiosity ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-59301f840dfsm953644e87.104.2025.10.25.14.07.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Oct 2025 14:07:19 -0700 (PDT) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Oleg Nesterov , Shuah Khan , Thomas Huth , Charlie Jenkins , Andy Chiu , Samuel Holland , Joel Granados , Conor Dooley , Yong-Xuan Wang , Heiko Stuebner , Sergey Matyukevich Subject: [PATCH v3 5/9] riscv: csr: define vector registers elements Date: Sun, 26 Oct 2025 00:06:38 +0300 Message-ID: <20251025210655.43099-6-geomatsi@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251025210655.43099-1-geomatsi@gmail.com> References: <20251025210655.43099-1-geomatsi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Define masks and shifts for vector csr registers according to the RVV spec 1.0. Signed-off-by: Sergey Matyukevich --- arch/riscv/include/asm/csr.h | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index 4a37a98398ad..4f55dcf86627 100644 --- a/arch/riscv/include/asm/csr.h +++ b/arch/riscv/include/asm/csr.h @@ -444,6 +444,17 @@ #define CSR_VTYPE 0xc21 #define CSR_VLENB 0xc22 =20 +#define VTYPE_VLMUL _AC(7, UL) +#define VTYPE_VLMUL_FRAC _AC(4, UL) +#define VTYPE_VSEW_SHIFT 3 +#define VTYPE_VSEW (_AC(7, UL) << VTYPE_VSEW_SHIFT) +#define VTYPE_VTA_SHIFT 6 +#define VTYPE_VTA (_AC(1, UL) << VTYPE_VTA_SHIFT) +#define VTYPE_VMA_SHIFT 7 +#define VTYPE_VMA (_AC(1, UL) << VTYPE_VMA_SHIFT) +#define VTYPE_VILL_SHIFT (__riscv_xlen - 1) +#define VTYPE_VILL (_AC(1, UL) << VTYPE_VILL_SHIFT) + /* Scalar Crypto Extension - Entropy */ #define CSR_SEED 0x015 #define SEED_OPST_MASK _AC(0xC0000000, UL) --=20 2.51.0 From nobody Sat Feb 7 18:20:05 2026 Received: from mail-lf1-f52.google.com (mail-lf1-f52.google.com [209.85.167.52]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6944F3090CB for ; Sat, 25 Oct 2025 21:07:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.52 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761426445; cv=none; b=E3Z+brzUD0WzYbkybNewyiEeNxElhyaw9ArhYkowtd4KcOiPz7wj3odNeaYBufGb51DEy47FU7EVMfokXHwXIZpEEkhCOUmcINEy+nliPo97KIfFpOzeKWILMXSNVwwFhhVhyITZjYFu7PWmYwH7AVn4LxNutEDW1kSCfpgKybc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761426445; c=relaxed/simple; bh=jnr4/IicmhQWUarmW2dk3Y2ffc/gcKbJW3iMq4WfPl4=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=Gw6hUxquKObxBIYIPg81ysXJxKdKmvwEV1ErjOC7UNXC9M10Y/NbOUNFCn9ssBod4b8PvbkpF5NFev6dn5sUfxZSG+Z7xk0i3PUU69zyJ7gbpSMFupp+KkOM3hch1voTCp/IjfzwcKgTolnecBn1GNXuiaeELn8HGbQLIvqgVMQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=nnVj9OPP; arc=none smtp.client-ip=209.85.167.52 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="nnVj9OPP" Received: by mail-lf1-f52.google.com with SMTP id 2adb3069b0e04-592f5736693so3392651e87.1 for ; Sat, 25 Oct 2025 14:07:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1761426442; x=1762031242; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hYGbqwLXExmna8eBWQ52VSI73UhSuti8d9ZiNWksIVc=; b=nnVj9OPPGDMIOG7EwFJkrZ6+wtb0SvqVUcp+e6BIMrapD2u/J627g8KAKKPFxTa1hp CDUp7vn2feCTTzqr/o1ZBO4UiHAQPmHa+c5WsesM0geVfOVrU1DTpH/J1NLSyOKqLxb4 +MH3BofX6gUS4Vtc+lxEnU9m6l46bl7+YiZrpKscxHqw5LPeB/rBlaXGu+oLXgd9eMlk UgN5y9QpXDiUQQWftO+xTwnxrrXwPNjdXRG4i0bez1Tm52ZYENXzwpVTyhI7jAombOiy hOOKXWeuMwjAV5tdbpT4NWQXCbxR40cpiEq0/vmWFxDXGN8VEJsMra64bzJoUA4b56O4 uQFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1761426442; x=1762031242; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hYGbqwLXExmna8eBWQ52VSI73UhSuti8d9ZiNWksIVc=; b=T7wFR3imF0P8EOjkcN3BYRj6JHT+enEteMcruBMDDtxOT8ApiL8ZSkulhchYCvGaWI gzx38lKp5/B2i7ERYIbqetDAYzMDnlSSWErAsbvv94rqZQDRMNnqqmyO8oMQjj53dOYq 8n97kQB8U/zM8863dUV1h6bZ9CaPRgVnBdxv7PGPQCEA+v5e8RwQCy3MjRQEY3Tv9Y62 41XrUAwgPD6SBtkMdED2pTtyj1ILUYQSlex0EEjPMtV5oALr9xQ/MjCG0DlVK27hx9cb c13vzgLIAqxCVndCHMFyKbpNILPQFLXoOJWpR5NvFsK9c9AwMKyxQzIbkUlRZm+vfcCd ug5Q== X-Forwarded-Encrypted: i=1; AJvYcCXtTOr/AF7v7vNd/aopyo10ket9g0HYlPyYP99EVDwJiZM2Kepbx4YhrGbXhWlIHHP6e/rru42zhqearSQ=@vger.kernel.org X-Gm-Message-State: AOJu0Yw9d2OzpFlVSz2s0VSM6fyf5C5j1pMSobtLmkVzEh6tbcdJ0Feb 7Hx288AMZBEmTyvf6LyB73bMx17V8dixs6FPDsePtCYsiJInVBH9TtuG X-Gm-Gg: ASbGncvc+AFYC5J5FfZ/fVgCey07C66WJoymkoROia2XNpbdfwwtF5qrNwW12lsoVXU Fnm1aIJiLg3I0F0v27g8cUNnrJAvIG3XglO+bvT5tvJcBVYiAlHO5/RvYKIFBS/fAfAhi5HsSLV l6LPOXNsZGhrjELLsm27e3MT5JpGUwerSbbfpg4d9rzsYg3InbXGf7HyUyXAe5DmiB7vPMNCldt NQfwbnZSk4bJcvDngwamFbusO9aTPmdVQCbMoLb8ucR8GCFoJth0VhkVLBHCd6BgIw0QqaVJCQU WpVcYdekd4+Lod+QLBmpmsmkYl35kewmM7SzMEdNp6AprM8j/f4tyM1Uk1oDNGZZ4jtbQ1Bn7rd 95jub/gS1Z9rZzKIw4S57STjBlgf8F3JgtQjzITD42WQ1D1FQl6qiDy2mI77ktZ8/U7g= X-Google-Smtp-Source: AGHT+IFE4AmOR394Md1/lG1S5vAU0ggYSm1xV3a69YcH+wAy86ZduiNSo403ld9BIeKBsd0fBst2dQ== X-Received: by 2002:a05:6512:234c:b0:57a:f38a:397b with SMTP id 2adb3069b0e04-592fc9d6ee3mr2113775e87.3.1761426441425; Sat, 25 Oct 2025 14:07:21 -0700 (PDT) Received: from curiosity ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-59301f840dfsm953644e87.104.2025.10.25.14.07.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Oct 2025 14:07:20 -0700 (PDT) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Oleg Nesterov , Shuah Khan , Thomas Huth , Charlie Jenkins , Andy Chiu , Samuel Holland , Joel Granados , Conor Dooley , Yong-Xuan Wang , Heiko Stuebner , Sergey Matyukevich Subject: [PATCH v3 6/9] riscv: ptrace: validate input vector csr registers Date: Sun, 26 Oct 2025 00:06:39 +0300 Message-ID: <20251025210655.43099-7-geomatsi@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251025210655.43099-1-geomatsi@gmail.com> References: <20251025210655.43099-1-geomatsi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add strict validation for vector csr registers when setting them via ptrace: - reject attempts to set reserved bits or invalid field combinations - enforce strict VL checks against calculated VLMAX values Vector spec 1.0 allows normal applications to set candidate VL values and read back the hardware-adjusted results, see section 6 for details. Disallow such flexibility in vector ptrace operations and strictly enforce valid VL input. The traced process may not update its saved vector context if no vector instructions execute between breakpoints. So the purpose of the strict ptrace approach is to make sure that debuggers maintain an accurate view of the tracee's vector context across multiple halt/resume debug cycles. Signed-off-by: Sergey Matyukevich --- arch/riscv/kernel/ptrace.c | 62 +++++++++++++++++++++++++++++++++++++- 1 file changed, 61 insertions(+), 1 deletion(-) diff --git a/arch/riscv/kernel/ptrace.c b/arch/riscv/kernel/ptrace.c index 906cf1197edc..a567e558e746 100644 --- a/arch/riscv/kernel/ptrace.c +++ b/arch/riscv/kernel/ptrace.c @@ -124,6 +124,66 @@ static int riscv_vr_get(struct task_struct *target, return membuf_write(&to, vstate->datap, riscv_v_vsize); } =20 +static int invalid_ptrace_v_csr(struct __riscv_v_ext_state *vstate, + struct __riscv_v_regset_state *ptrace) +{ + unsigned long vsew, vlmul, vfrac, vl; + unsigned long elen, vlen; + unsigned long sew, lmul; + unsigned long reserved; + + if (!has_vector()) + return 1; + + vlen =3D vstate->vlenb * 8; + if (vstate->vlenb !=3D ptrace->vlenb) + return 1; + + reserved =3D ~(CSR_VXSAT_MASK | (CSR_VXRM_MASK << CSR_VXRM_SHIFT)); + if (ptrace->vcsr & reserved) + return 1; + + /* do not allow to set vill */ + reserved =3D ~(VTYPE_VSEW | VTYPE_VLMUL | VTYPE_VMA | VTYPE_VTA); + if (ptrace->vtype & reserved) + return 1; + + elen =3D riscv_has_extension_unlikely(RISCV_ISA_EXT_ZVE64X) ? 64 : 32; + vsew =3D (ptrace->vtype & VTYPE_VSEW) >> VTYPE_VSEW_SHIFT; + sew =3D 8 << vsew; + + if (sew > elen) + return 1; + + vfrac =3D (ptrace->vtype & VTYPE_VLMUL_FRAC); + vlmul =3D (ptrace->vtype & VTYPE_VLMUL); + + /* RVV 1.0 spec 3.4.2: VLMUL(0x4) reserved */ + if (vlmul =3D=3D 4) + return 1; + + /* RVV 1.0 spec 3.4.2: (LMUL < SEW_min / ELEN) reserved */ + if (vlmul =3D=3D 5 && elen =3D=3D 32) + return 1; + + /* for zero vl verify that at least one element is possible */ + vl =3D ptrace->vl ? ptrace->vl : 1; + + if (vfrac) { + /* integer 1/LMUL: VL =3D< VLMAX =3D VLEN / SEW / LMUL */ + lmul =3D 2 << (3 - (vlmul - vfrac)); + if (vlen < vl * sew * lmul) + return 1; + } else { + /* integer LMUL: VL =3D< VLMAX =3D LMUL * VLEN / SEW */ + lmul =3D 1 << vlmul; + if (vl * sew > lmul * vlen) + return 1; + } + + return 0; +} + static int riscv_vr_set(struct task_struct *target, const struct user_regset *regset, unsigned int pos, unsigned int count, @@ -145,7 +205,7 @@ static int riscv_vr_set(struct task_struct *target, if (unlikely(ret)) return ret; =20 - if (vstate->vlenb !=3D ptrace_vstate.vlenb) + if (invalid_ptrace_v_csr(vstate, &ptrace_vstate)) return -EINVAL; =20 vstate->vstart =3D ptrace_vstate.vstart; --=20 2.51.0 From nobody Sat Feb 7 18:20:05 2026 Received: from mail-lf1-f45.google.com (mail-lf1-f45.google.com [209.85.167.45]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 95A9C30AAA9 for ; Sat, 25 Oct 2025 21:07:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.45 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761426449; cv=none; b=qsTht4PDp9ZhwinngiVtAwrFteOX8qjKPk3QEcAMQTp0L0iDhjQZ80DZCi3nq7GJOXi/SvlLjlD/4SRU8ZPX28p69G+af/BqMXrPwXf3Itnhx+M7umoaTcLwJLzkigrXSYYiOW3371OgoPh77QEwlh+Y63A1k4VefQjkVyJ+PEE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761426449; c=relaxed/simple; bh=EG976noWRyaF5AnY4dxXKMW1yqN619Bl7jLGvIFElw8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=FkEqLq5JHVMBP0JIamoHZRPh0Guz4onBpFqHzyvuAVCdXLXZzLRxwMcuGjlLpbdF3fcxfwVDZ+dGIS2b5hLQYBmNu2g+zQCBvEgudfYESIEegL5EIo++3UVM+M0U1v3uu407VxQywwNV0jTpo5fbOTy2uxH1HtD7W8bGeYxHJOg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=S5VhW8A/; arc=none smtp.client-ip=209.85.167.45 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="S5VhW8A/" Received: by mail-lf1-f45.google.com with SMTP id 2adb3069b0e04-592ff1d80feso1926001e87.2 for ; Sat, 25 Oct 2025 14:07:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1761426446; x=1762031246; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=b+3PCUAZa0DUv6sTvtwuDqroHsEJ3FLzwb4INWCxjQ4=; b=S5VhW8A/8qqHPZ0HIpV3wtx3mUcshIFbXhgK9/trHI3huyD3syolTBrpRXau+ARCXI 1nzKmwyrk9ThUz+A8vK4U5mCKwRPP35qzGoLaajFkUQ1tggfzL1uMCOqNv4Q7vKRJdg5 N6Pi4tqKXn3F+TveIavGCVkbn92AMCNNmW3JjQ1wp830qeHsSPfvalb88k58Y4PlxoDO tRE8RaviAGVFLY6jnKud06sF1HEsc7pjD5jPhwufkGis2ivhbqlY6cE2xLyLi0Ebf1Zp EnoZm8Z1c7tno6QhkvGSUkNuPdc6uM1yIDd1YBW01HderjkGnOKxCLjKp9XnsGBeML9h gCAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1761426446; x=1762031246; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=b+3PCUAZa0DUv6sTvtwuDqroHsEJ3FLzwb4INWCxjQ4=; b=m1Tsm+xU+B5ao3yMx5GQhfNpm0PAO51G7szQK6hpxGD9Bw7ii8Hb8xGBjrAAV2h3o6 1P1UQ/gYDZ4LcKEMeHR+wDXveqD6KP1Zskh7brbVABDXKH5H9OA4euuV4XOAmeu6ZfQ5 G61s420HcNlB3QDxuuL8naNSCudG//BPZD5J9C4Y7xlCZUp5NLJnAraF4+5m0C4bPWKJ SzH5H5UeJ8bfEbbYqClS8C4Tt78+A8JFsVCq8MW4Np4Kb8GZcFT+dJwBl7VaBKgFVqPt SaFiEyY+g8fH76HEixeORnNyz06xeG+mfK50brYBSiTwFpkhhe5xwqMOn+giE2drus1D xJWA== X-Forwarded-Encrypted: i=1; AJvYcCWnKNpwCtKg2nS7+YB2klyS6ceV515CjhoM2Qb8xVug6lkSpNbvcRHv5n/Fu6FZgJkFVsRKRL3IIzcJPno=@vger.kernel.org X-Gm-Message-State: AOJu0YzlBa9U0INYRKJZrG5yYaYF/Ue4VAym6W5azqPvVGX4baQRJgtv 0p5nkcJ8mGCswadoHF9eSMedBfbjDfRpckP/rOlbDeA8Zmzi2O87mpB5 X-Gm-Gg: ASbGncsVWk0kHlKjc/vKB6+GxFfLAI+tBnHYDgOFSY4tKQEYUsjyogXdfloXXSN7GTQ bLiv6eIx11TR84JErf1IQ8Uj3SRu6/bZqD9lnnOqZ+k7c+IbArwqUzZd7NOgxltkLMNSW4zwcHl 8IOaxbMqQ30Zh/VE0nX/8nO6d84aHf+DEql4V9bEQYtYTgBx2nhaEFJF4bDgavFDsyyMgWjc2pk Zn1cZdG8IUSqJRh9ix73o776hrpf41pibb+4fyoHwZib5+kYRwthPsoyss+yKNx3H3XhNpxvX0v ThoH/zsapnkeW/mLkJ6HBFT7sSdxZfxeW59ztrPUKBN2gX+NU9aO6vXxrW6h5QBvOclWyEuEs4G +uYCnnQ6XFXZj46xNqjM3VqHaieY1RrJ5OV9zbaOLS1Q1yFR7uLr5FcNouRy7SOE37iU= X-Google-Smtp-Source: AGHT+IFygmVOPWIUoykhoH5YWn53+/c15PZMNyiAiwvSLDcSRlng5caecNche3FLSu9Mte7G8CF3eA== X-Received: by 2002:a05:6512:b84:b0:592:fae7:52de with SMTP id 2adb3069b0e04-592fc9d6dbdmr2248268e87.8.1761426445635; Sat, 25 Oct 2025 14:07:25 -0700 (PDT) Received: from curiosity ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-59301f840dfsm953644e87.104.2025.10.25.14.07.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Oct 2025 14:07:23 -0700 (PDT) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Oleg Nesterov , Shuah Khan , Thomas Huth , Charlie Jenkins , Andy Chiu , Samuel Holland , Joel Granados , Conor Dooley , Yong-Xuan Wang , Heiko Stuebner , Sergey Matyukevich Subject: [PATCH v3 7/9] selftests: riscv: verify ptrace rejects invalid vector csr inputs Date: Sun, 26 Oct 2025 00:06:40 +0300 Message-ID: <20251025210655.43099-8-geomatsi@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251025210655.43099-1-geomatsi@gmail.com> References: <20251025210655.43099-1-geomatsi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a test to v_ptrace test suite to verify that ptrace rejects the invalid input combinations of vector csr registers. Use kselftest fixture variants to create multiple invalid inputs for the test. Signed-off-by: Sergey Matyukevich --- .../testing/selftests/riscv/vector/v_ptrace.c | 232 ++++++++++++++++++ 1 file changed, 232 insertions(+) diff --git a/tools/testing/selftests/riscv/vector/v_ptrace.c b/tools/testin= g/selftests/riscv/vector/v_ptrace.c index 9fea29f7b686..6f3f228c0954 100644 --- a/tools/testing/selftests/riscv/vector/v_ptrace.c +++ b/tools/testing/selftests/riscv/vector/v_ptrace.c @@ -183,4 +183,236 @@ TEST(ptrace_v_early_debug) } } =20 +FIXTURE(v_csr_invalid) +{ +}; + +FIXTURE_SETUP(v_csr_invalid) +{ +} + +FIXTURE_TEARDOWN(v_csr_invalid) +{ +} + +/* modifications of the initial 'vsetvli x0, x0, e8, m8, tu, mu' settings = */ +FIXTURE_VARIANT(v_csr_invalid) +{ + unsigned long vstart; + unsigned long vl; + unsigned long vtype; + unsigned long vcsr; + unsigned long vlenb_mul; + unsigned long vlenb_min; + unsigned long vlenb_max; +}; + +/* unexpected vlenb value */ +FIXTURE_VARIANT_ADD(v_csr_invalid, new_vlenb) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0x3, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x2, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x0, +}; + +/* invalid reserved bits in vcsr */ +FIXTURE_VARIANT_ADD(v_csr_invalid, vcsr_invalid_reserved_bits) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0x3, + .vcsr =3D 0x1UL << 8, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x0, +}; + +/* invalid reserved bits in vtype */ +FIXTURE_VARIANT_ADD(v_csr_invalid, vtype_invalid_reserved_bits) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D (0x1UL << 8) | 0x3, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x0, +}; + +/* set vill bit */ +FIXTURE_VARIANT_ADD(v_csr_invalid, invalid_vill_bit) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D (0x1UL << (__riscv_xlen - 1)) | 0x3, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x0, +}; + +/* reserved vsew value: vsew > 3 */ +FIXTURE_VARIANT_ADD(v_csr_invalid, reserved_vsew) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0x4UL << 3, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x0, +}; + +/* reserved vlmul value: vlmul =3D=3D 4 */ +FIXTURE_VARIANT_ADD(v_csr_invalid, reserved_vlmul) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0x4, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x0, +}; + +/* invalid fractional LMUL for VLEN <=3D 256: LMUL=3D 1/8, SEW =3D 64 */ +FIXTURE_VARIANT_ADD(v_csr_invalid, frac_lmul1) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0x1d, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x20, +}; + +/* invalid integral LMUL for VLEN <=3D 16: LMUL=3D 2, SEW =3D 64 */ +FIXTURE_VARIANT_ADD(v_csr_invalid, int_lmul1) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0x19, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x2, +}; + +/* invalid VL for VLEN <=3D 128: LMUL=3D 2, SEW =3D 64, VL =3D 8 */ +FIXTURE_VARIANT_ADD(v_csr_invalid, vl1) +{ + .vstart =3D 0x0, + .vl =3D 0x8, + .vtype =3D 0x19, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x0, + .vlenb_max =3D 0x10, +}; + +TEST_F(v_csr_invalid, ptrace_v_invalid_values) +{ + unsigned long vlenb; + pid_t pid; + + if (!is_vector_supported()) + SKIP(return, "Vector not supported"); + + asm volatile("csrr %[vlenb], vlenb" : [vlenb] "=3Dr"(vlenb)); + if (variant->vlenb_min) { + if (vlenb < variant->vlenb_min) + SKIP(return, "This test does not support VLEN < %lu\n", + variant->vlenb_min * 8); + } + if (variant->vlenb_max) { + if (vlenb > variant->vlenb_max) + SKIP(return, "This test does not support VLEN > %lu\n", + variant->vlenb_max * 8); + } + + chld_lock =3D 1; + pid =3D fork(); + ASSERT_LE(0, pid) + TH_LOG("fork: %m"); + + if (pid =3D=3D 0) { + while (chld_lock =3D=3D 1) + asm volatile("" : : "g"(chld_lock) : "memory"); + + asm(".option arch, +zve32x\n"); + asm(".option arch, +c\n"); + asm volatile("vsetvli x0, x0, e8, m8, tu, mu\n"); + + while (1) { + asm volatile("c.ebreak"); + asm volatile("c.nop"); + } + } else { + struct __riscv_v_regset_state *regset_data; + size_t regset_size; + struct iovec iov; + int status; + int ret; + + /* attach */ + + ASSERT_EQ(0, ptrace(PTRACE_ATTACH, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* unlock */ + + ASSERT_EQ(0, ptrace(PTRACE_POKEDATA, pid, &chld_lock, 0)); + + /* resume and wait for the 1st c.ebreak */ + + ASSERT_EQ(0, ptrace(PTRACE_CONT, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* read tracee vector csr regs using ptrace GETREGSET */ + + regset_size =3D sizeof(*regset_data) + vlenb * 32; + regset_data =3D calloc(1, regset_size); + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_RISCV_VECTOR, &iov)); + + /* verify initial vsetvli x0, x0, e8, m8, tu, mu settings */ + + EXPECT_EQ(vlenb, regset_data->vlenb); + EXPECT_EQ(0UL, regset_data->vstart); + EXPECT_EQ(3UL, regset_data->vtype); + EXPECT_EQ(0UL, regset_data->vcsr); + EXPECT_EQ(0UL, regset_data->vl); + + /* apply invalid settings from fixture variants */ + + regset_data->vlenb *=3D variant->vlenb_mul; + regset_data->vstart =3D variant->vstart; + regset_data->vtype =3D variant->vtype; + regset_data->vcsr =3D variant->vcsr; + regset_data->vl =3D variant->vl; + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + errno =3D 0; + ret =3D ptrace(PTRACE_SETREGSET, pid, NT_RISCV_VECTOR, &iov); + ASSERT_EQ(errno, EINVAL); + ASSERT_EQ(ret, -1); + + /* cleanup */ + + ASSERT_EQ(0, kill(pid, SIGKILL)); + } +} + TEST_HARNESS_MAIN --=20 2.51.0 From nobody Sat Feb 7 18:20:05 2026 Received: from mail-lf1-f43.google.com (mail-lf1-f43.google.com [209.85.167.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 361D830ACE1 for ; Sat, 25 Oct 2025 21:07:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761426451; cv=none; b=HrsFmWTNJEjKm3NbRKJgJDHyMtTymCQ6SPyG4oGZzzFnRsRURE7CcPchse4HBzvydAtpfhkSoZKNA9qSr94MDbO2WSV5tHRRi4l6Cp12uzNJcN7Cl4MRVNSKyXk+1c1MB2OohAq5cJXqWz4dcydEFk3HH9nXHUeww76uoRaVqpg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761426451; c=relaxed/simple; bh=bz4AVTDuToeNKL+LjIYRiFpz7c4y7G6iLzEWh8yM5O0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=uaD1p5jVB1qgk3LkI4GA3PCGeVNY9sZ76dlGROaQ69Mv8aDpxWCHETD3HI6qd/bv5d7h3BbF+md+E+v6WM2/zeecyT96E7nA+8vR3q4pcpXeqo1mR7New43G8eAkODqS16iAc7l+O4f9v4T1SAdo6yLxH+587/GfoW+2ZrUJC6Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=YkIWzGlK; arc=none smtp.client-ip=209.85.167.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="YkIWzGlK" Received: by mail-lf1-f43.google.com with SMTP id 2adb3069b0e04-592f098f7adso3998242e87.0 for ; Sat, 25 Oct 2025 14:07:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1761426447; x=1762031247; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=U/WytJDhcml/wh8CfWvtXKArp//bBeFRbcjbh31QcQ0=; b=YkIWzGlKADxCL92Rd4eJ/PtvovvbTeC0KC4+GX/W1iEAQHJG5JnjEGzSI91ezg0aDg 3Ftd0+KnVyC8Z90kKclSoqH2Ghc/sFLBuELt4XlH9iD0hSOSczGKD44WoPhYDffWHoyg hmLwtOQe7Z13ac9Ozspb7NgyYr3KaQTDzru/erevfYkEMvJ3rSKVsdw+Q4oTHtdFMuU9 7HUQTvAwjfu53g5Mq1VhS3AqS/30rOfFZKUYxICM9XAZIMMMpoyObMrU9/hBvFHxP0q3 gm6Wx4i/ILGC2B28Vh8A4equkXXtJ6e7zBGXtLJ1Wc7FGbAbiv7OX1G/IB6ZTDhFXvTb tsRw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1761426447; x=1762031247; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=U/WytJDhcml/wh8CfWvtXKArp//bBeFRbcjbh31QcQ0=; b=U9UCM2SnRHzm5TshR/79ziEjtipVEb1h8sJGJgYgy+3HSgsgHYqgapIxIU673Z0hTx Xre/pNv8hh/ITelN6OJ39gcqYE17paZ/856LhGG1c1DiLcnXoeuq+zN1ShnA46KwTFkB PApfzRO2Rv9N7hxSg3xXzD2N2aHgVA2oVnn5WNKHMlck4Zp+ik2j71wOiqjrDz7rGZ9O eslLLk6/kuq69BdfhnT0lQRYW4AMwCclRbS40So1rGF+ewqSE2vuYss6RS4Pwmcq0qSV Uxp8PKRnZnNOy2wW+mUtYLtf6Hc+v88fPTRqJbicxxCwpuEbYfWyUskniSJLhePu4ody QFLw== X-Forwarded-Encrypted: i=1; AJvYcCVMwhOL6NRik0XGIZXnZp0lcUiGxJvDRMJZQp89aA3bSnEY5ZIiW+OzWppYaXXUaqJgD2Y2t0xdXNVeMmU=@vger.kernel.org X-Gm-Message-State: AOJu0YwFHWJOw9Lw8u1TLV/3YkI6/6Dnw14wCKlc2TGOMVxIrf5ithnw nSgQUiQAvh9Gknk1pi+QXCQUtHSP0v8+8y20bcbugfEkBOlDcmlD1N8z X-Gm-Gg: ASbGnctJMi6Zbdpi53HTPYA1is8M70eZPakfwvw+N64pmiuCdRRYyTyeIxilJZcRvJz 96esJEvFa+qfpuj/pCc1Iloe/hzi2iRMiJ1Y9Ia5YKheAGMiOsorN/2b+2O4sA2qeZaaaFp4a4D ujm+cqNSUm6AzoJzmfrEKtwcQXQbYIFFlF00A4IOmZ64vBSxmivNbsR5gkamyMZeBfD65EXxl0c njYYs1ZSOfl96oErgOxhNVwpSQAd766PbVVuorGIJSsOQnZKU30sCM5I9IRyYYzKBq8zjo3LLU5 XQSOp2wnn/PhR9HUnDR/C5KPh77nAgnCmd5z/vOAS6Fc1PHXzX6VqlnsTicvYtBloBPUma1sCtK xKhc7YWr+ehvchxcCr4p7r2NX+7FCNndSQS50JxaHgaZSoP/diToz/B4KfQs1BU8XpTs= X-Google-Smtp-Source: AGHT+IE1sREq3fH/oWR2aWw32GwHAGJvm4v2GsuZh2SMIXAA5/VrvNypw0BdSZVh8ZDIWto+ctm6iw== X-Received: by 2002:a05:6512:3a8e:b0:590:656c:d116 with SMTP id 2adb3069b0e04-592fc9f7f21mr2234095e87.17.1761426447221; Sat, 25 Oct 2025 14:07:27 -0700 (PDT) Received: from curiosity ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-59301f840dfsm953644e87.104.2025.10.25.14.07.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Oct 2025 14:07:26 -0700 (PDT) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Oleg Nesterov , Shuah Khan , Thomas Huth , Charlie Jenkins , Andy Chiu , Samuel Holland , Joel Granados , Conor Dooley , Yong-Xuan Wang , Heiko Stuebner , Sergey Matyukevich Subject: [PATCH v3 8/9] selftests: riscv: verify ptrace accepts valid vector csr values Date: Sun, 26 Oct 2025 00:06:41 +0300 Message-ID: <20251025210655.43099-9-geomatsi@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251025210655.43099-1-geomatsi@gmail.com> References: <20251025210655.43099-1-geomatsi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a test to v_ptrace test suite to verify that ptrace accepts the valid input combinations of vector csr registers. Use kselftest fixture variants to create multiple inputs for the test. The test simulates a debug scenario with three breakpoints: 1. init: let the tracee set up its initial vector configuration 2. 1st bp: modify the tracee's vector csr registers from the debugger - resume the tracee to execute a block without vector instructions 3. 2nd bp: read back the tracees's vector csr registers from the debugger - compare with values set by the debugger - resume the tracee to execute a block with vector instructions 4. 3rd bp: read back the tracess's vector csr registers again - compare with values set by the debugger The last check helps to confirm that ptrace validation check for vector csr registers input values works properly and maintains an accurate view of the tracee's vector context in debugger. Signed-off-by: Sergey Matyukevich --- .../testing/selftests/riscv/vector/v_ptrace.c | 217 ++++++++++++++++++ 1 file changed, 217 insertions(+) diff --git a/tools/testing/selftests/riscv/vector/v_ptrace.c b/tools/testin= g/selftests/riscv/vector/v_ptrace.c index 6f3f228c0954..7e8fdebded07 100644 --- a/tools/testing/selftests/riscv/vector/v_ptrace.c +++ b/tools/testing/selftests/riscv/vector/v_ptrace.c @@ -415,4 +415,221 @@ TEST_F(v_csr_invalid, ptrace_v_invalid_values) } } =20 +FIXTURE(v_csr_valid) +{ +}; + +FIXTURE_SETUP(v_csr_valid) +{ +} + +FIXTURE_TEARDOWN(v_csr_valid) +{ +} + +/* modifications of the initial 'vsetvli x0, x0, e8, m8, tu, mu' settings = */ +FIXTURE_VARIANT(v_csr_valid) +{ + unsigned long vstart; + unsigned long vl; + unsigned long vtype; + unsigned long vcsr; + unsigned long vlenb_mul; + unsigned long vlenb_min; + unsigned long vlenb_max; +}; + +/* valid for VLEN >=3D 128: LMUL=3D 1/4, SEW =3D 32 */ +FIXTURE_VARIANT_ADD(v_csr_valid, frac_lmul1) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0x16, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x10, + .vlenb_max =3D 0x0, +}; + +/* valid for VLEN >=3D 16: LMUL=3D 2, SEW =3D 32 */ +FIXTURE_VARIANT_ADD(v_csr_valid, int_lmul1) +{ + .vstart =3D 0x0, + .vl =3D 0x0, + .vtype =3D 0x11, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x2, + .vlenb_max =3D 0x0, +}; + +/* valid for VLEN >=3D 32: LMUL=3D 2, SEW =3D 32, VL =3D 2 */ +FIXTURE_VARIANT_ADD(v_csr_valid, int_lmul2) +{ + .vstart =3D 0x0, + .vl =3D 0x2, + .vtype =3D 0x11, + .vcsr =3D 0x0, + .vlenb_mul =3D 0x1, + .vlenb_min =3D 0x4, + .vlenb_max =3D 0x0, +}; + +TEST_F(v_csr_valid, ptrace_v_valid_values) +{ + unsigned long vlenb; + pid_t pid; + + if (!is_vector_supported()) + SKIP(return, "Vector not supported"); + + asm volatile("csrr %[vlenb], vlenb" : [vlenb] "=3Dr"(vlenb)); + if (variant->vlenb_min) { + if (vlenb < variant->vlenb_min) + SKIP(return, "This test does not support VLEN < %lu\n", + variant->vlenb_min * 8); + } + if (variant->vlenb_max) { + if (vlenb > variant->vlenb_max) + SKIP(return, "This test does not support VLEN > %lu\n", + variant->vlenb_max * 8); + } + + chld_lock =3D 1; + pid =3D fork(); + ASSERT_LE(0, pid) + TH_LOG("fork: %m"); + + if (pid =3D=3D 0) { + while (chld_lock =3D=3D 1) + asm volatile("" : : "g"(chld_lock) : "memory"); + + asm(".option arch, +zve32x\n"); + asm(".option arch, +c\n"); + asm volatile("vsetvli x0, x0, e8, m8, tu, mu\n"); + + while (1) { + asm volatile ("c.ebreak"); + asm volatile ("c.nop"); + /* V state clean: context will not be saved */ + asm volatile ("c.ebreak"); + asm volatile("vmv.v.i v0, -1"); + /* V state dirty: context will be saved */ + } + } else { + struct __riscv_v_regset_state *regset_data; + struct user_regs_struct regs; + size_t regset_size; + struct iovec iov; + int status; + + /* attach */ + + ASSERT_EQ(0, ptrace(PTRACE_ATTACH, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* unlock */ + + ASSERT_EQ(0, ptrace(PTRACE_POKEDATA, pid, &chld_lock, 0)); + + /* resume and wait for the 1st c.ebreak */ + + ASSERT_EQ(0, ptrace(PTRACE_CONT, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* read tracee vector csr regs using ptrace GETREGSET */ + + regset_size =3D sizeof(*regset_data) + vlenb * 32; + regset_data =3D calloc(1, regset_size); + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_RISCV_VECTOR, &iov)); + + /* verify initial vsetvli x0, x0, e8, m8, tu, mu settings */ + + EXPECT_EQ(vlenb, regset_data->vlenb); + EXPECT_EQ(3UL, regset_data->vtype); + EXPECT_EQ(0UL, regset_data->vstart); + EXPECT_EQ(0UL, regset_data->vcsr); + EXPECT_EQ(0UL, regset_data->vl); + + /* apply valid settings from fixture variants */ + + regset_data->vlenb *=3D variant->vlenb_mul; + regset_data->vstart =3D variant->vstart; + regset_data->vtype =3D variant->vtype; + regset_data->vcsr =3D variant->vcsr; + regset_data->vl =3D variant->vl; + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + ASSERT_EQ(0, ptrace(PTRACE_SETREGSET, pid, NT_RISCV_VECTOR, &iov)); + + /* skip 1st c.ebreak, then resume and wait for the 2nd c.ebreak */ + + iov.iov_base =3D ®s; + iov.iov_len =3D sizeof(regs); + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_PRSTATUS, &iov)); + regs.pc +=3D 2; + ASSERT_EQ(0, ptrace(PTRACE_SETREGSET, pid, NT_PRSTATUS, &iov)); + + ASSERT_EQ(0, ptrace(PTRACE_CONT, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* read tracee vector csr regs using ptrace GETREGSET */ + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_RISCV_VECTOR, &iov)); + + /* verify vector csr regs from tracee context */ + + EXPECT_EQ(regset_data->vstart, variant->vstart); + EXPECT_EQ(regset_data->vtype, variant->vtype); + EXPECT_EQ(regset_data->vcsr, variant->vcsr); + EXPECT_EQ(regset_data->vl, variant->vl); + EXPECT_EQ(regset_data->vlenb, vlenb); + + /* skip 2nd c.ebreak, then resume and wait for the 3rd c.ebreak */ + + iov.iov_base =3D ®s; + iov.iov_len =3D sizeof(regs); + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_PRSTATUS, &iov)); + regs.pc +=3D 2; + ASSERT_EQ(0, ptrace(PTRACE_SETREGSET, pid, NT_PRSTATUS, &iov)); + + ASSERT_EQ(0, ptrace(PTRACE_CONT, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* read tracee vector csr regs using ptrace GETREGSET */ + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_RISCV_VECTOR, &iov)); + + /* verify vector csr regs from tracee context */ + + EXPECT_EQ(regset_data->vstart, variant->vstart); + EXPECT_EQ(regset_data->vtype, variant->vtype); + EXPECT_EQ(regset_data->vcsr, variant->vcsr); + EXPECT_EQ(regset_data->vl, variant->vl); + EXPECT_EQ(regset_data->vlenb, vlenb); + + /* cleanup */ + + ASSERT_EQ(0, kill(pid, SIGKILL)); + } +} + TEST_HARNESS_MAIN --=20 2.51.0 From nobody Sat Feb 7 18:20:05 2026 Received: from mail-lf1-f43.google.com (mail-lf1-f43.google.com [209.85.167.43]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0910D30B511 for ; Sat, 25 Oct 2025 21:07:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.43 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761426453; cv=none; b=Mokka5Y91jjF0yN0uF/BOrVMlbu0sCeNCb01mV6CeIQvfX4bZIsjvKCews7nnC/6NnM+HZ3dcJITCn6p9HP4lAsRnxaniopHrIL6BogiUoZ2O2pHH0hCluO28EPMiH26046P+ZtfSOpelQgiMRmCyPboAxoMU3YhpW+pqUoLOM0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761426453; c=relaxed/simple; bh=2E3Fo1znPlzaabZKXzSWEg4Z8coek9HOIOj+q4wvYWU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=pOJ5PsvPZj6UqJpuoBXk0h2yFVPB/rZL/avbnhmJNs6u9uBerf2+WmgEMRKrjlC4kGSfyKRKG1vY4HGSmwClcdpywIOBFe1qTtlHk9zvTuDXQAYs7NWAkVAFqAUiOmUHCi+4d16MkbOGg+WoyddKWyHYAz09Xnee2nPX4lganAE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com; spf=pass smtp.mailfrom=gmail.com; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b=Do8VN5io; arc=none smtp.client-ip=209.85.167.43 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=gmail.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com header.b="Do8VN5io" Received: by mail-lf1-f43.google.com with SMTP id 2adb3069b0e04-57bb7ee3142so3949333e87.0 for ; Sat, 25 Oct 2025 14:07:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20230601; t=1761426450; x=1762031250; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=JFxB+FMNooBfOd2zLjcq46e2Dj/CD31Cyo7lUKy84vI=; b=Do8VN5ioaNOWS4a0lJKbTZXM4HBIM57HRFoUvovOoH/Kr9MdFeHLwjpzy1jnHzeq4m CyuRXe0oBJeitLMSSnUpu+SrhdYy85Qw0ld1gId3Qkd98xEd6GdiQ9Qy+xMZmaFIlyx2 Zer8QLG+lIhqX9wl+5YxnZcreHzTY8Qc1PaFUbdpk8cUpTEQphKEexumrfh8+ytujYnd rgFlIa+L9MxHzE7rQjp9w2aJV5u24DX+l8FIN+JlPhmCh9LiSTfj+oC5fARBCwDRUS7R 9XJrfTPVWKc/VzoB1tKn0HyfNcxy7iQNpoYA5/4wWn8/bp6HTd+6zaypV64ykXl01Zgw DWsA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1761426450; x=1762031250; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=JFxB+FMNooBfOd2zLjcq46e2Dj/CD31Cyo7lUKy84vI=; b=StqX0uEd+bfI1qrWHpdVq2NPvsjFWDU8v2yDraxRvXsVGKW7sNGKd07OcXnIlMTw9C JfX+RVlP8XIQ6Z+aUdpjfNL2iVz5MIunA5m4NIcs2vLOHNr6WH6Skzmo+t9BN2OwOxWL uXZ4I/NAcULYNnyJ4QyujeeALyHwD1cEqjxVzKb8xbwIDMh3QcTp3Z9mdy5so74/9G+O 8j1QWk9WghEwcNGE9RJcAhduJ6tD1icsgEDsnHbMWjcVH81S0BpVGLObMJ5k27YpL3Mz BDE2bTKdgoqREd9Zt14Baa45h6YH2mFgeWb7As79DdR5v29aXZUeEGujlYiRrludCx09 6IIg== X-Forwarded-Encrypted: i=1; AJvYcCXjv2QvaFEV4psqUtoqZFQvdbamBXrdTVtaIux3RDmb3JJn3+aS06OwBF0+JtY32Ha53eX60UAR2LiEg44=@vger.kernel.org X-Gm-Message-State: AOJu0YzHnHgtTcjpMnBcNfLewgitkFW/0pKZgYDZ5co4nQd22KWBNiJP WQOy/5E0lTaJg/9N4ro5GeK7x2b670wopW9q1PBvOI7Ct3aTdIFYieZv X-Gm-Gg: ASbGncsWfZOYT6h2vRPNytxkDgX/GUmfmbzYZ7MFjcWBJQnWv6VkAo9VpnFQYBV4Mol FAVf0L+BTmDqQLp8f0QwduA+q/etyTLEZ77LZeSr1n+mNLWpqggyZA1l9UudiHJS8HG8T7kvdEy WBahDlSa9uyrl4womDDBM4MnvvYAThi6Z0p5z/nawhFZE+RzkPYHn9WsLKTCPQeqgyko6YMpYwV iqqDCuBsF1fWW9sXiGzZZjgXm/KmzVo3cMQcg2UEIas8xgJ8pJPZIX9niQ1qQ72mkmvwePoS62K QJEPrgdPyG0aeNWO6IDgFuv9nxBwo7Va0fxVDLi4oP64TmosYBhMVakkczJT+elMM6flYuuEg33 sFiQX5BIWy7R2g8QPJhdoX/KFgpTcIrOiFMLEDqC8HPdffdmAezoN9ihr5d5rVTmeza/FNonsxh 1S8A== X-Google-Smtp-Source: AGHT+IGWWrc4WdF7FX7lRQrDMuhwqAOXh5C+jquwBNySEwQCE3G1DQMT0DRSQnyd9anBGi35RkN5AQ== X-Received: by 2002:a05:6512:308d:b0:571:8fad:ecee with SMTP id 2adb3069b0e04-591d850c0efmr10901687e87.21.1761426449935; Sat, 25 Oct 2025 14:07:29 -0700 (PDT) Received: from curiosity ([5.188.167.4]) by smtp.googlemail.com with ESMTPSA id 2adb3069b0e04-59301f840dfsm953644e87.104.2025.10.25.14.07.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Oct 2025 14:07:29 -0700 (PDT) From: Sergey Matyukevich To: linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-kselftest@vger.kernel.org Cc: Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Oleg Nesterov , Shuah Khan , Thomas Huth , Charlie Jenkins , Andy Chiu , Samuel Holland , Joel Granados , Conor Dooley , Yong-Xuan Wang , Heiko Stuebner , Sergey Matyukevich Subject: [PATCH v3 9/9] selftests: riscv: verify syscalls discard vector context Date: Sun, 26 Oct 2025 00:06:42 +0300 Message-ID: <20251025210655.43099-10-geomatsi@gmail.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251025210655.43099-1-geomatsi@gmail.com> References: <20251025210655.43099-1-geomatsi@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a test to v_ptrace test suite to verify that vector csr registers are clobbered on syscalls. Signed-off-by: Sergey Matyukevich --- .../testing/selftests/riscv/vector/v_ptrace.c | 102 ++++++++++++++++++ 1 file changed, 102 insertions(+) diff --git a/tools/testing/selftests/riscv/vector/v_ptrace.c b/tools/testin= g/selftests/riscv/vector/v_ptrace.c index 7e8fdebded07..51a7cc71b2be 100644 --- a/tools/testing/selftests/riscv/vector/v_ptrace.c +++ b/tools/testing/selftests/riscv/vector/v_ptrace.c @@ -183,6 +183,108 @@ TEST(ptrace_v_early_debug) } } =20 +TEST(ptrace_v_syscall_clobbering) +{ + unsigned long vlenb; + pid_t pid; + + if (!is_vector_supported()) + SKIP(return, "Vector not supported"); + + asm volatile("csrr %[vlenb], vlenb" : [vlenb] "=3Dr"(vlenb)); + + chld_lock =3D 1; + pid =3D fork(); + ASSERT_LE(0, pid) + TH_LOG("fork: %m"); + + if (pid =3D=3D 0) { + while (chld_lock =3D=3D 1) + asm volatile("" : : "g"(chld_lock) : "memory"); + + asm(".option arch, +zve32x\n"); + asm(".option arch, +c\n"); + asm volatile("vsetvli x0, x0, e8, m8, tu, mu\n"); + + while (1) { + asm volatile ("c.ebreak"); + sleep(0); + } + } else { + struct __riscv_v_regset_state *regset_data; + struct user_regs_struct regs; + size_t regset_size; + struct iovec iov; + int status; + + /* attach */ + + ASSERT_EQ(0, ptrace(PTRACE_ATTACH, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* unlock */ + + ASSERT_EQ(0, ptrace(PTRACE_POKEDATA, pid, &chld_lock, 0)); + + /* resume and wait for the 1st c.ebreak */ + + ASSERT_EQ(0, ptrace(PTRACE_CONT, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* read tracee vector csr regs using ptrace GETREGSET */ + + regset_size =3D sizeof(*regset_data) + vlenb * 32; + regset_data =3D calloc(1, regset_size); + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_RISCV_VECTOR, &iov)); + + /* verify initial vsetvli x0, x0, e8, m8, tu, mu settings */ + + EXPECT_EQ(3UL, regset_data->vtype); + EXPECT_EQ(0UL, regset_data->vstart); + EXPECT_EQ(16UL, regset_data->vlenb); + EXPECT_EQ(0UL, regset_data->vcsr); + EXPECT_EQ(0UL, regset_data->vl); + + /* skip 1st c.ebreak, then resume and wait for the 2nd c.ebreak */ + + iov.iov_base =3D ®s; + iov.iov_len =3D sizeof(regs); + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_PRSTATUS, &iov)); + regs.pc +=3D 2; + ASSERT_EQ(0, ptrace(PTRACE_SETREGSET, pid, NT_PRSTATUS, &iov)); + + ASSERT_EQ(0, ptrace(PTRACE_CONT, pid, NULL, NULL)); + ASSERT_EQ(pid, waitpid(pid, &status, 0)); + ASSERT_TRUE(WIFSTOPPED(status)); + + /* read tracee vtype using ptrace GETREGSET */ + + iov.iov_base =3D regset_data; + iov.iov_len =3D regset_size; + + ASSERT_EQ(0, ptrace(PTRACE_GETREGSET, pid, NT_RISCV_VECTOR, &iov)); + + /* verify that V state is illegal after syscall */ + + EXPECT_EQ((1UL << (__riscv_xlen - 1)), regset_data->vtype); + EXPECT_EQ(vlenb, regset_data->vlenb); + EXPECT_EQ(0UL, regset_data->vstart); + EXPECT_EQ(0UL, regset_data->vcsr); + EXPECT_EQ(0UL, regset_data->vl); + + /* cleanup */ + + ASSERT_EQ(0, kill(pid, SIGKILL)); + } +} + FIXTURE(v_csr_invalid) { }; --=20 2.51.0