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Sat, 25 Oct 2025 13:37:26 -0700 (PDT) Received: from server.lan ([150.230.217.250]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7a414069855sm3048296b3a.51.2025.10.25.13.37.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Oct 2025 13:37:26 -0700 (PDT) From: Coia Prant To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Heiko Stuebner , Dragan Simic , Jonas Karlman Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Coia Prant Subject: [PATCH] arm64: dts: rockchip: Add devicetree for the X3568 v4 Date: Sun, 26 Oct 2025 04:37:11 +0800 Message-ID: <20251025203711.3859240-1-coiaprant@gmail.com> X-Mailer: git-send-email 2.47.3 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Specification: - SoC: RockChip RK3568 ARM64 (4 cores) - eMMC: 16-128 GB - RAM: 2-8 GB - Power: DC 12V 2A - Ethernet: 2x YT8521SC RGMII (10/100/1000 Mbps) - Wireless radio: 802.11b/g/n/ac/ax dual-band - LED: Power: AlwaysOn User: GPIO - Button: VOL+: SARADC/0 <35k =C2=B5V> VOL-: SARADC/0 <450k =C2=B5V> Power/Reset: PMIC RK809 - CAN CAN/1: 4-pin (PH 2.0) - PWM PWM/4: Backlight DSI/0 DSI/1 PWM/7: IR Receiver [may not install] - UART: UART/2: Debug TTL - 1500000 8N1 (1.25mm) UART/3: TTL (PH 2.0) UART/4: TTL (PH 2.0) UART/8: AP6275S Bluetooth UART/9: TTL (PH 2.0) - I2C: I2C/0: PMIC RK809 I2C/1: Touchscreen DSI/0 DSI/1 I2C/4: Camera I2C/5: RTC@51 PCF8563 - I2S: I2S/0: miniHDMI Sound I2S/1: RK809 Audio Codec I2S/3: AP6275S Bluetooth Sound - SDMMC: SDMMC/0: microSD (TF) slot SDMMC/2: AP6275S SDIO WiFi card - Camera: 1x CSI - Video: miniHDMI / DSI0 (MIPI/LVDS) / DSI1 (MIPI/EDP) - Audio: miniHDMI / MIC on-board / Speaker / SPDIF / 3.5mm Headphones / AP6= 275S Bluetooth - USB: USB 2.0 HOST x2 USB 2.0 HOST x3 (4-pin) USB 2.0 OTG x1 (shared with USB 3.0 OTG/HOST) [slot may not install] USB 3.0 HOST x1 USB 3.0 OTG/HOST x1 - SATA: 1x SATA 3.0 with Power/4-pin [slot may not install] - PCIe: 1x PCIe 3.0 x2 (x4 connecter) [clock/slot may not install] Link: - https://appletsapi.52solution.com/media/X3568V4%E5%BC%80%E5%8F%91%E6%9D%B= F%E7%A1%AC%E4%BB%B6%E6%89%8B%E5%86%8C.pdf - https://blog.gov.cooking/archives/research-ninetripod-x3568-v4-and-flash.= html Signed-off-by: Coia Prant Tested-by: Coia Prant --- arch/arm64/boot/dts/rockchip/Makefile | 11 + .../rockchip/rk3568-x3568-camera-demo.dtso | 82 ++ .../boot/dts/rockchip/rk3568-x3568-v4.dts | 884 ++++++++++++++++++ .../dts/rockchip/rk3568-x3568-video-demo.dtso | 141 +++ 4 files changed, 1118 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-x3568-camera-demo.d= tso create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-x3568-v4.dts create mode 100644 arch/arm64/boot/dts/rockchip/rk3568-x3568-video-demo.dt= so diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index ad684e383..ea36334bb 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -150,6 +150,9 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-rock-3b.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-wolfvision-pf5.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-wolfvision-pf5-display-vz.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-wolfvision-pf5-io-expander.dtbo +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-x3568-v4.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-x3568-camera-demo.dtso +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-x3568-video-demo.dtso dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-armsom-sige5.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-armsom-sige5-v1.2-wifibt.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-evb1-v10.dtb @@ -252,6 +255,14 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3576-armsom-sige5-v= 1.2-wifibt.dtb rk3576-armsom-sige5-v1.2-wifibt-dtbs :=3D rk3576-armsom-sige5.dtb \ rk3576-armsom-sige5-v1.2-wifibt.dtbo =20 +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-x3568-v4-camera-demo.dtb +rk3568-x3568-v4-camera-demo-dtbs :=3D rk3568-x3568-v4.dtb \ + rk3568-x3568-camera-demo.dtso + +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3568-x3568-v4-video-demo.dtb +rk3568-x3568-v4-video-demo-dtbs :=3D rk3568-x3568-v4.dtb \ + rk3568-x3568-video-demo.dtso + dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-edgeble-neu6a-wifi.dtb rk3588-edgeble-neu6a-wifi-dtbs :=3D rk3588-edgeble-neu6a-io.dtb \ rk3588-edgeble-neu6a-wifi.dtbo diff --git a/arch/arm64/boot/dts/rockchip/rk3568-x3568-camera-demo.dtso b/a= rch/arm64/boot/dts/rockchip/rk3568-x3568-camera-demo.dtso new file mode 100644 index 000000000..b144d0010 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3568-x3568-camera-demo.dtso @@ -0,0 +1,82 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) + +// This is a sample reference, due to lack of hardware can not be tested, = at your own risk + +/dts-v1/; +/plugin/; + +#include +#include +#include + +&{/} { + vcc_cam: regulator-vcc-cam { + compatible =3D "regulator-fixed"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + enable-active-high; + gpio =3D <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; + regulator-name =3D "vcc_cam"; + vin-supply =3D <&vcc3v3_sys>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vcc_cam_en>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&pinctrl { + cam { + vcc_cam_en: vcc_cam_en { + rockchip,pins =3D <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&csi_dphy { + status =3D "okay"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + mipi_in_ucam: endpoint@2 { + reg =3D <2>; + remote-endpoint =3D <&ucam_out>; + data-lanes =3D <1 2 3 4>; + }; + }; + }; +}; + +&i2c4 { + status =3D "okay"; + + camera@37 { + compatible =3D "ovti,ov5695"; + reg =3D <0x37>; + clocks =3D <&cru CLK_CIF_OUT>; + clock-names =3D "xvclk"; + avdd-supply =3D <&vcc_cam>; + dvdd-supply =3D <&vcc_cam>; + dovdd-supply =3D <&vcc_cam>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&cif_clk>; + reset-gpios =3D <&gpio3 RK_PB6 GPIO_ACTIVE_LOW>; + pwdn-gpios =3D <&gpio4 RK_PB4 GPIO_ACTIVE_LOW>; + + port { + ucam_out: endpoint { + remote-endpoint =3D <&mipi_in_ucam>; + data-lanes =3D <1 2 3 4>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3568-x3568-v4.dts b/arch/arm64/= boot/dts/rockchip/rk3568-x3568-v4.dts new file mode 100644 index 000000000..901735c6f --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3568-x3568-v4.dts @@ -0,0 +1,884 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) + +/dts-v1/; +#include +#include +#include +#include +#include +#include "rk3568.dtsi" + +/ { + model =3D "NineTripod X3568 v4"; + compatible =3D "ninetripod,x3568-v4", "rockchip,rk3568"; + + aliases { + ethernet0 =3D &gmac0; + ethernet1 =3D &gmac1; + mmc0 =3D &sdhci; + mmc1 =3D &sdmmc0; + mmc2 =3D &sdmmc2; + }; + + chosen { + stdout-path =3D "serial2:1500000n8"; + }; + + adc-keys { + compatible =3D "adc-keys"; + io-channels =3D <&saradc 0>; + io-channel-names =3D "buttons"; + keyup-threshold-microvolt =3D <1800000>; + poll-interval =3D <100>; + + button-vol-up { + label =3D "volume up"; + linux,code =3D ; + press-threshold-microvolt =3D <50000>; + }; + + button-vol-down { + label =3D "volume down"; + linux,code =3D ; + press-threshold-microvolt =3D <500000>; + }; + }; + + hdmi-con { + compatible =3D "hdmi-connector"; + type =3D "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint =3D <&hdmi_out_con>; + }; + }; + }; + + leds { + compatible =3D "gpio-leds"; + + led_work: led-0 { + gpios =3D <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; + function =3D LED_FUNCTION_HEARTBEAT; + color =3D ; + linux,default-trigger =3D "heartbeat"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&led_work_en>; + }; + }; + + rk809-sound { + compatible =3D "simple-audio-card"; + simple-audio-card,format =3D "i2s"; + simple-audio-card,name =3D "Analog RK809"; + simple-audio-card,mclk-fs =3D <256>; + + simple-audio-card,cpu { + sound-dai =3D <&i2s1_8ch>; + }; + simple-audio-card,codec { + sound-dai =3D <&rk809>; + }; + }; + + pdm_codec: pdm-codec { + compatible =3D "dmic-codec"; + num-channels =3D <2>; + #sound-dai-cells =3D <0>; + }; + + pdm_sound: pdm-sound { + compatible =3D "simple-audio-card"; + simple-audio-card,name =3D "microphone"; + + simple-audio-card,cpu { + sound-dai =3D <&pdm>; + }; + + simple-audio-card,codec { + sound-dai =3D <&pdm_codec>; + }; + }; + + spdif_dit: spdif-dit { + compatible =3D "linux,spdif-dit"; + #sound-dai-cells =3D <0>; + }; + + spdif_sound: spdif-sound { + compatible =3D "simple-audio-card"; + simple-audio-card,name =3D "SPDIF"; + + simple-audio-card,cpu { + sound-dai =3D <&spdif>; + }; + simple-audio-card,codec { + sound-dai =3D <&spdif_dit>; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible =3D "mmc-pwrseq-simple"; + clocks =3D <&rk809 1>; + clock-names =3D "ext_clock"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&wifi_enable>; + post-power-on-delay-ms =3D <100>; + power-off-delay-us =3D <300>; + reset-gpios =3D <&gpio3 RK_PD5 GPIO_ACTIVE_LOW>; + }; + + dc_12v: regulator-dc-12v { + compatible =3D "regulator-fixed"; + regulator-name =3D "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <12000000>; + regulator-max-microvolt =3D <12000000>; + }; + + pcie30_avdd0v9: regulator-pcie30-avdd0v9 { + compatible =3D "regulator-fixed"; + regulator-name =3D "pcie30_avdd0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + vin-supply =3D <&vcc3v3_sys>; + }; + + pcie30_avdd1v8: regulator-pcie30-avdd1v8 { + compatible =3D "regulator-fixed"; + regulator-name =3D "pcie30_avdd1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + vin-supply =3D <&vcc3v3_sys>; + }; + + vcc3v3_sys: regulator-vcc3v3-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + vin-supply =3D <&dc_12v>; + }; + + vcc3v3_pcie: regulator-vcc3v3-pcie { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_pcie"; + enable-active-high; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vcc3v3_pcie_en_pin>; + gpio =3D <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; + startup-delay-us =3D <5000>; + vin-supply =3D <&vcc5v0_sys>; + }; + + vcc5v0_sys: regulator-vcc5v0-sys { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&dc_12v>; + }; + + vcc5v0_usb: regulator-vcc5v0-usb { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&dc_12v>; + }; + + vcc5v0_usb_host: regulator-vcc5v0-usb-host { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vcc5v0_usb_host_en>; + regulator-name =3D "vcc5v0_usb_host"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_usb>; + }; + + vcc5v0_usb_otg: regulator-vcc5v0-usb-otg { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vcc5v0_usb_otg_en>; + regulator-name =3D "vcc5v0_usb_otg"; + regulator-min-microvolt =3D <5000000>; + regulator-max-microvolt =3D <5000000>; + vin-supply =3D <&vcc5v0_usb>; + }; +}; + +&can1 { + assigned-clocks =3D <&cru CLK_CAN1>; + assigned-clock-rates =3D <150000000>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&can1m1_pins>; + status =3D "okay"; +}; + +/* used for usb_host0_xhci */ +&combphy0 { + status =3D "okay"; +}; + +/* used for usb_host1_xhci */ +&combphy1 { + status =3D "okay"; +}; + +/* connected to sata2 */ +&combphy2 { + status =3D "okay"; +}; + +&cpu0 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu1 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu2 { + cpu-supply =3D <&vdd_cpu>; +}; + +&cpu3 { + cpu-supply =3D <&vdd_cpu>; +}; + +&gmac0 { + assigned-clocks =3D <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; + assigned-clock-parents =3D <&cru SCLK_GMAC0_RGMII_SPEED>; + assigned-clock-rates =3D <0>, <125000000>; + clock_in_out =3D "output"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus + &gmac0_clkinout>; + phy-handle =3D <&rgmii_phy0>; + phy-mode =3D "rgmii-id"; + status =3D "okay"; +}; + +&gmac1 { + assigned-clocks =3D <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents =3D <&cru SCLK_GMAC1_RGMII_SPEED>; + assigned-clock-rates =3D <0>, <125000000>; + clock_in_out =3D "output"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&gmac1m1_miim + &gmac1m1_tx_bus2 + &gmac1m1_rx_bus2 + &gmac1m1_rgmii_clk + &gmac1m1_rgmii_bus + &gmac1m1_clkinout>; + phy-handle =3D <&rgmii_phy1>; + phy-mode =3D "rgmii-id"; + status =3D "okay"; +}; + +&gpu { + mali-supply =3D <&vdd_gpu>; + status =3D "okay"; +}; + +&hdmi { + avdd-0v9-supply =3D <&vdda0v9_image>; + avdd-1v8-supply =3D <&vcca1v8_image>; + status =3D "okay"; +}; + +&hdmi_in { + hdmi_in_vp0: endpoint { + remote-endpoint =3D <&vp0_out_hdmi>; + }; +}; + +&hdmi_out { + hdmi_out_con: endpoint { + remote-endpoint =3D <&hdmi_con_in>; + }; +}; + +&hdmi_sound { + status =3D "okay"; +}; + +&i2c0 { + status =3D "okay"; + + vdd_cpu: regulator@1c { + compatible =3D "tcs,tcs4525"; + reg =3D <0x1c>; + fcs,suspend-voltage-selector =3D <1>; + regulator-name =3D "vdd_cpu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <800000>; + regulator-max-microvolt =3D <1150000>; + regulator-ramp-delay =3D <2300>; + vin-supply =3D <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + rk809: pmic@20 { + compatible =3D "rockchip,rk809"; + reg =3D <0x20>; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + assigned-clocks =3D <&cru I2S1_MCLKOUT_TX>; + assigned-clock-parents =3D <&cru CLK_I2S1_8CH_TX>; + #clock-cells =3D <1>; + clock-names =3D "mclk"; + clocks =3D <&cru I2S1_MCLKOUT_TX>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pmic_int>, <&i2s1m0_mclk>; + system-power-controller; + #sound-dai-cells =3D <0>; + vcc1-supply =3D <&vcc3v3_sys>; + vcc2-supply =3D <&vcc3v3_sys>; + vcc3-supply =3D <&vcc3v3_sys>; + vcc4-supply =3D <&vcc3v3_sys>; + vcc5-supply =3D <&vcc3v3_sys>; + vcc6-supply =3D <&vcc3v3_sys>; + vcc7-supply =3D <&vcc3v3_sys>; + vcc8-supply =3D <&vcc3v3_sys>; + vcc9-supply =3D <&vcc3v3_sys>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name =3D "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name =3D "vdd_gpu"; + regulator-always-on; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name =3D "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode =3D <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name =3D "vdd_npu"; + regulator-initial-mode =3D <0x2>; + regulator-min-microvolt =3D <500000>; + regulator-max-microvolt =3D <1350000>; + regulator-ramp-delay =3D <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name =3D "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name =3D "vdda0v9_image"; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name =3D "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name =3D "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <900000>; + regulator-max-microvolt =3D <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name =3D "vccio_acodec"; + regulator-always-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name =3D "vccio_sd"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name =3D "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name =3D "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name =3D "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt =3D <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name =3D "vcca1v8_image"; + regulator-min-microvolt =3D <1800000>; + regulator-max-microvolt =3D <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name =3D "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name =3D "vcc3v3_sd"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + + codec { + rockchip,mic-in-differential; + }; + }; +}; + +&i2c5 { + status =3D "okay"; + + rtc@51 { + compatible =3D "nxp,pcf8563"; + reg =3D <0x51>; + #clock-cells =3D <0>; + }; +}; + +&i2s0_8ch { + status =3D "okay"; +}; + +&i2s1_8ch { + pinctrl-0 =3D <&i2s1m0_sclktx &i2s1m0_lrcktx &i2s1m0_sdi0 &i2s1m0_sdo0>; + rockchip,trcm-sync-tx-only; + status =3D "okay"; +}; + +/* used for AP6275S Bluetooth Sound */ +&i2s3_2ch { + status =3D "okay"; +}; + +&mdio0 { + rgmii_phy0: ethernet-phy@0 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x0>; + reset-assert-us =3D <20000>; + reset-deassert-us =3D <100000>; + reset-gpios =3D <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; + + leds { + #address-cells =3D <1>; + #size-cells =3D <0>; + + led@1 { + reg =3D <1>; + color =3D ; + function =3D LED_FUNCTION_LAN; + default-state =3D "keep"; + }; + + led@2 { + reg =3D <2>; + color =3D ; + function =3D LED_FUNCTION_LAN; + default-state =3D "keep"; + }; + }; + }; +}; + +&mdio1 { + rgmii_phy1: ethernet-phy@0 { + compatible =3D "ethernet-phy-ieee802.3-c22"; + reg =3D <0x0>; + reset-assert-us =3D <20000>; + reset-deassert-us =3D <100000>; + reset-gpios =3D <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>; + + leds { + #address-cells =3D <1>; + #size-cells =3D <0>; + + led@1 { + reg =3D <1>; + color =3D ; + function =3D LED_FUNCTION_LAN; + default-state =3D "keep"; + }; + + led@2 { + reg =3D <2>; + color =3D ; + function =3D LED_FUNCTION_LAN; + default-state =3D "keep"; + }; + }; + }; +}; + +&pcie30phy { + status =3D "okay"; +}; + +&pcie3x2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pcie_reset_pin>; + reset-gpios =3D <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply =3D <&vcc3v3_pcie>; + status =3D "okay"; +}; + +&pdm { + status =3D "okay"; +}; + +&pinctrl { + leds { + led_work_en: led_work_en { + rockchip,pins =3D <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int: pmic_int { + rockchip,pins =3D + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdio-pwrseq { + wifi_enable: wifi-enable { + rockchip,pins =3D <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + vcc5v0_usb_host_en: vcc5v0_usb_host_en { + rockchip,pins =3D <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { + rockchip,pins =3D <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pcie { + pcie_reset_pin: pcie-reset-pin { + rockchip,pins =3D <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin { + rockchip,pins =3D <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pmu_io_domains { + pmuio1-supply =3D <&vcc3v3_pmu>; + pmuio2-supply =3D <&vcc3v3_pmu>; + vccio1-supply =3D <&vccio_acodec>; + vccio2-supply =3D <&vcc_1v8>; + vccio3-supply =3D <&vccio_sd>; + vccio4-supply =3D <&vcc_1v8>; + vccio5-supply =3D <&vcc_3v3>; + vccio6-supply =3D <&vcc_1v8>; + vccio7-supply =3D <&vcc_3v3>; + status =3D "okay"; +}; + +&pwm4 { + status =3D "okay"; +}; + +/* Required remotectl for IR receiver */ +&pwm7 { + status =3D "disabled"; +}; + +&saradc { + vref-supply =3D <&vcca_1v8>; + status =3D "okay"; +}; + +&sata2 { + status =3D "okay"; +}; + +/* used for eMMC */ +&sdhci { + bus-width =3D <8>; + max-frequency =3D <200000000>; + mmc-hs200-1_8v; + non-removable; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + status =3D "okay"; +}; + +/* used for microSD (TF) Slot */ +&sdmmc0 { + bus-width =3D <4>; + cap-sd-highspeed; + cd-gpios =3D <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + sd-uhs-sdr104; + vmmc-supply =3D <&vcc3v3_sd>; + vqmmc-supply =3D <&vccio_sd>; + status =3D "okay"; +}; + +/* used for AP6275S WiFi */ +&sdmmc2 { + bus-width =3D <4>; + disable-wp; + cap-sd-highspeed; + cap-sdio-irq; + keep-power-in-suspend; + mmc-pwrseq =3D <&sdio_pwrseq>; + non-removable; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; + sd-uhs-sdr12; + sd-uhs-sdr25; + sd-uhs-sdr50; + sd-uhs-sdr104; + vmmc-supply =3D <&vcc3v3_sys>; + vqmmc-supply =3D <&vcc_1v8>; + status =3D "okay"; +}; + +&spdif { + status =3D "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode =3D <1>; + rockchip,hw-tshut-polarity =3D <0>; + status =3D "okay"; +}; + +/* used for Debug */ +&uart2 { + status =3D "okay"; +}; + +&uart3 { + pinctrl-0 =3D <&uart3m1_xfer>; + status =3D "okay"; +}; + +&uart4 { + pinctrl-0 =3D <&uart4m1_xfer>; + status =3D "okay"; +}; + +/* used for WiFi/BT AP6275S */ +&uart8 { + pinctrl-0 =3D <&uart8m0_xfer &uart8m0_ctsn>; + status =3D "okay"; +}; + +&uart9 { + pinctrl-0 =3D <&uart9m1_xfer>; + status =3D "okay"; +}; + +&usb_host0_ehci { + status =3D "okay"; +}; + +&usb_host0_ohci { + status =3D "okay"; +}; + +&usb_host0_xhci { + extcon =3D <&usb2phy0>; + status =3D "okay"; +}; + +&usb_host1_ehci { + status =3D "okay"; +}; + +&usb_host1_ohci { + status =3D "okay"; +}; + +&usb_host1_xhci { + status =3D "okay"; +}; + +&usb2phy0 { + status =3D "okay"; +}; + +&usb2phy0_host { + phy-supply =3D <&vcc5v0_usb_host>; + status =3D "okay"; +}; + +&usb2phy0_otg { + phy-supply =3D <&vcc5v0_usb_otg>; + status =3D "okay"; +}; + +&usb2phy1 { + status =3D "okay"; +}; + +&usb2phy1_host { + phy-supply =3D <&vcc5v0_usb_host>; + status =3D "okay"; +}; + +&usb2phy1_otg { + phy-supply =3D <&vcc5v0_usb_host>; + status =3D "okay"; +}; + +&vop { + assigned-clocks =3D <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; + assigned-clock-parents =3D <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; + status =3D "okay"; +}; + +&vop_mmu { + status =3D "okay"; +}; + +&vp0 { + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg =3D ; + remote-endpoint =3D <&hdmi_in_vp0>; + }; +}; diff --git a/arch/arm64/boot/dts/rockchip/rk3568-x3568-video-demo.dtso b/ar= ch/arm64/boot/dts/rockchip/rk3568-x3568-video-demo.dtso new file mode 100644 index 000000000..f819eff8f --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3568-x3568-video-demo.dtso @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) + +// This is a sample reference, due to lack of hardware can not be tested, = at your own risk + +/dts-v1/; +/plugin/; + +#include +#include +#include + +&{/} {=09 + backlight: backlight { + compatible =3D "pwm-backlight"; + brightness-levels =3D <20 220>; + default-brightness-level =3D <100>; + num-interpolated-steps =3D <200>; + power-supply =3D <&vcc3v3_sys>; + pwms =3D <&pwm4 0 25000 0>; + }; + + vcc3v3_lcd0_n: regulator-vcc3v3-lcd0-n { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_lcd0_n"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + enable-active-high; + gpio =3D <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; + vin-supply =3D <&vcc3v3_sys>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vcc3v3_lcd0_n_en>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_lcd1_n: regulator-vcc3v3-lcd1-n { + compatible =3D "regulator-fixed"; + regulator-name =3D "vcc3v3_lcd1_n"; + regulator-min-microvolt =3D <3300000>; + regulator-max-microvolt =3D <3300000>; + enable-active-high; + gpio =3D <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; + vin-supply =3D <&vcc3v3_sys>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&vcc3v3_lcd1_n_en>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; +}; + +&pinctrl { + display { + vcc3v3_lcd0_n_en: vcc3v3_lcd0_n_en { + rockchip,pins =3D <0 RK_PC7 0 &pcfg_pull_none>; + }; + vcc3v3_lcd1_n_en: vcc3v3_lcd1_n_en { + rockchip,pins =3D <0 RK_PC5 0 &pcfg_pull_none>; + }; + }; + + touchscreen { + touch_int: touch_int { + rockchip,pins =3D <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + touch_rst: touch_rst { + rockchip,pins =3D <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&dsi0 { + clock-master; + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + panel@0 { + compatible =3D "wanchanglong,w552793baa", "raydium,rm67200"; + reg =3D <0>; + backlight =3D <&backlight>; + iovcc-supply =3D <&vcc3v3_lcd0_n>; + reset-gpios =3D <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>; + vdd-supply =3D <&vcc3v3_lcd0_n>; + vsn-supply =3D <&vcc5v0_sys>; + vsp-supply =3D <&vcc5v0_sys>; + + port { + panel_in_dsi: endpoint { + remote-endpoint =3D <&dsi0_out_panel>; + }; + }; + }; +}; + +&dsi0_in { + dsi0_in_vp1: endpoint { + remote-endpoint =3D <&vp1_out_dsi0>; + }; +}; + +&dsi0_out { + dsi0_out_panel: endpoint { + remote-endpoint =3D <&panel_in_dsi>; + }; +}; + +&dsi_dphy0 { + status =3D "okay"; +}; + +&pwm4 { + status =3D "okay"; +}; + +&i2c1 { + status =3D "okay"; + + touchscreen0: goodix@14 { + compatible =3D "goodix,gt1151"; + reg =3D <0x14>; + interrupt-parent =3D <&gpio0>; + interrupts =3D ; + AVDD28-supply =3D <&vcc3v3_lcd0_n>; + irq-gpios =3D <&gpio0 RK_PB5 GPIO_ACTIVE_LOW>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&touch_int &touch_rst>; + reset-gpios =3D <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; + VDDIO-supply =3D <&vcc3v3_lcd0_n>; + }; +}; + +&vp1 { + vp1_out_dsi0: endpoint@ROCKCHIP_VOP2_EP_MIPI0 { + reg =3D ; + remote-endpoint =3D <&dsi0_in_vp1>; + }; +}; --=20 2.47.3