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Sat, 25 Oct 2025 00:43:51 -0700 (PDT) From: Anand Moon To: Vignesh Raghavendra , Siddharth Vadapalli , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , linux-omap@vger.kernel.org (open list:PCI DRIVER FOR TI DRA7XX/J721E), linux-pci@vger.kernel.org (open list:PCI DRIVER FOR TI DRA7XX/J721E), linux-arm-kernel@lists.infradead.org (moderated list:PCI DRIVER FOR TI DRA7XX/J721E), linux-kernel@vger.kernel.org (open list) Cc: Anand Moon , Markus Elfring , Dan Carpenter Subject: [PATCH v2 1/2] PCI: j721e: Use devm_clk_get_optional_enabled() to get the clock Date: Sat, 25 Oct 2025 13:13:31 +0530 Message-ID: <20251025074336.26743-2-linux.amoon@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251025074336.26743-1-linux.amoon@gmail.com> References: <20251025074336.26743-1-linux.amoon@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Use devm_clk_get_optional_enabled() helper instead of calling devm_clk_get_optional() and then clk_prepare_enable(). It simplifies the clk_prepare_enable() and clk_disable_unprepare() with proper error handling and makes the code more compact. The result of devm_clk_get_optional_enabled() is now assigned directly to pcie->refclk. This removes a superfluous local clk variable, improving code readability and compactness. The functionality remains unchanged, but the code is now more streamlined. Cc: Siddharth Vadapalli Signed-off-by: Anand Moon --- v2: Rephase the commit message and use proper error pointer PTR_ERR(pcie->refclk) to return error. v1: Drop explicit clk_disable_unprepare as it handled by devm_clk_get_optional_enabled, Since devm_clk_get_optional_enabled internally manages clk_prepare_enable and clk_disable_unprepare as part of its lifecycle, the explicit call to clk_disable_unprepare is redundant and can be safely removed. --- drivers/pci/controller/cadence/pci-j721e.c | 21 +++++---------------- 1 file changed, 5 insertions(+), 16 deletions(-) diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/contr= oller/cadence/pci-j721e.c index 5bc5ab20aa6d..b678f7d48206 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -479,7 +479,6 @@ static int j721e_pcie_probe(struct platform_device *pde= v) struct cdns_pcie_ep *ep =3D NULL; struct gpio_desc *gpiod; void __iomem *base; - struct clk *clk; u32 num_lanes; u32 mode; int ret; @@ -603,19 +602,13 @@ static int j721e_pcie_probe(struct platform_device *p= dev) goto err_get_sync; } =20 - clk =3D devm_clk_get_optional(dev, "pcie_refclk"); - if (IS_ERR(clk)) { - ret =3D dev_err_probe(dev, PTR_ERR(clk), "failed to get pcie_refclk\n"); + pcie->refclk =3D devm_clk_get_optional_enabled(dev, "pcie_refclk"); + if (IS_ERR(pcie->refclk)) { + ret =3D dev_err_probe(dev, PTR_ERR(pcie->refclk), + "failed to enable pcie_refclk\n"); goto err_pcie_setup; } =20 - ret =3D clk_prepare_enable(clk); - if (ret) { - dev_err_probe(dev, ret, "failed to enable pcie_refclk\n"); - goto err_pcie_setup; - } - pcie->refclk =3D clk; - /* * Section 2.2 of the PCI Express Card Electromechanical * Specification (Revision 5.1) mandates that the deassertion @@ -629,10 +622,8 @@ static int j721e_pcie_probe(struct platform_device *pd= ev) } =20 ret =3D cdns_pcie_host_setup(rc); - if (ret < 0) { - clk_disable_unprepare(pcie->refclk); + if (ret < 0) goto err_pcie_setup; - } =20 break; case PCI_MODE_EP: @@ -679,7 +670,6 @@ static void j721e_pcie_remove(struct platform_device *p= dev) =20 gpiod_set_value_cansleep(pcie->reset_gpio, 0); =20 - clk_disable_unprepare(pcie->refclk); cdns_pcie_disable_phy(cdns_pcie); j721e_pcie_disable_link_irq(pcie); pm_runtime_put(dev); @@ -692,7 +682,6 @@ static int j721e_pcie_suspend_noirq(struct device *dev) =20 if (pcie->mode =3D=3D PCI_MODE_RC) { gpiod_set_value_cansleep(pcie->reset_gpio, 0); - clk_disable_unprepare(pcie->refclk); } =20 cdns_pcie_disable_phy(pcie->cdns_pcie); --=20 2.50.1 From nobody Sat Feb 7 18:16:11 2026 Received: from mail-pf1-f176.google.com (mail-pf1-f176.google.com [209.85.210.176]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 979562E6CB9 for ; Sat, 25 Oct 2025 07:43:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.176 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; 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Sat, 25 Oct 2025 00:43:59 -0700 (PDT) Received: from rockpi-5b ([45.112.0.108]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7a41404d760sm1395083b3a.39.2025.10.25.00.43.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 25 Oct 2025 00:43:58 -0700 (PDT) From: Anand Moon To: Vignesh Raghavendra , Siddharth Vadapalli , Lorenzo Pieralisi , =?UTF-8?q?Krzysztof=20Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , linux-omap@vger.kernel.org (open list:PCI DRIVER FOR TI DRA7XX/J721E), linux-pci@vger.kernel.org (open list:PCI DRIVER FOR TI DRA7XX/J721E), linux-arm-kernel@lists.infradead.org (moderated list:PCI DRIVER FOR TI DRA7XX/J721E), linux-kernel@vger.kernel.org (open list) Cc: Anand Moon , Markus Elfring , Dan Carpenter Subject: [PATCH v2 2/2] PCI: j721e: Use inline reset GPIO assignment and drop local variable Date: Sat, 25 Oct 2025 13:13:32 +0530 Message-ID: <20251025074336.26743-3-linux.amoon@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251025074336.26743-1-linux.amoon@gmail.com> References: <20251025074336.26743-1-linux.amoon@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The result of devm_gpiod_get_optional() is now assigned directly assigned to pcie->reset_gpio. This removes a superfluous local gpiod variable, improving code readability and compactness. The functionality remains unchanged, but the code is now more streamlined Cc: Siddharth Vadapalli Reviewed-by: Siddharth Vadapalli Signed-off-by: Anand Moon --- v2: fix the commit message. v1: Add Rb - Siddharth --- drivers/pci/controller/cadence/pci-j721e.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/drivers/pci/controller/cadence/pci-j721e.c b/drivers/pci/contr= oller/cadence/pci-j721e.c index b678f7d48206..633fe8f93102 100644 --- a/drivers/pci/controller/cadence/pci-j721e.c +++ b/drivers/pci/controller/cadence/pci-j721e.c @@ -477,7 +477,6 @@ static int j721e_pcie_probe(struct platform_device *pde= v) struct j721e_pcie *pcie; struct cdns_pcie_rc *rc =3D NULL; struct cdns_pcie_ep *ep =3D NULL; - struct gpio_desc *gpiod; void __iomem *base; u32 num_lanes; u32 mode; @@ -589,12 +588,12 @@ static int j721e_pcie_probe(struct platform_device *p= dev) =20 switch (mode) { case PCI_MODE_RC: - gpiod =3D devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW); - if (IS_ERR(gpiod)) { - ret =3D dev_err_probe(dev, PTR_ERR(gpiod), "Failed to get reset GPIO\n"= ); + pcie->reset_gpio =3D devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW= ); + if (IS_ERR(pcie->reset_gpio)) { + ret =3D dev_err_probe(dev, PTR_ERR(pcie->reset_gpio), + "Failed to get reset GPIO\n"); goto err_get_sync; } - pcie->reset_gpio =3D gpiod; =20 ret =3D cdns_pcie_init_phy(dev, cdns_pcie); if (ret) { @@ -616,9 +615,9 @@ static int j721e_pcie_probe(struct platform_device *pde= v) * This shall ensure that the power and the reference clock * are stable. */ - if (gpiod) { + if (pcie->reset_gpio) { msleep(PCIE_T_PVPERL_MS); - gpiod_set_value_cansleep(gpiod, 1); + gpiod_set_value_cansleep(pcie->reset_gpio, 1); } =20 ret =3D cdns_pcie_host_setup(rc); --=20 2.50.1