From nobody Sun Feb 8 16:17:48 2026 Received: from mail11.truemail.it (mail11.truemail.it [217.194.8.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E4EA2225A3D; Fri, 24 Oct 2025 14:49:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.194.8.81 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761317381; cv=none; b=BWdERW57vJ7I+JtdMnkGbGaksmS/q9Bv9qLTCEXaBujh1Egyj3KdG7aLCCQpJhp5gg4OFCknElApTqgLuvRUvpsCxTpHjSvdkz+q51aJCpjVH1tIwDpCNWaqc30gQgXuzKiFzfFII26XCSbwXvgK1GNGliq5sF5YyGrmZZeuKNM= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761317381; c=relaxed/simple; bh=bMfoKxUrTymEyBHW5+QxmB25fckpK+sT/m9bXrOFMcw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=cq6kjk4+hw/lA0zHu+WjXvw3qAF4CZnjVqTnZY9HVVhuutto8TJEue4/BuLB7lUBDNzsKaAEVGSB4VTxr1k7E0SIk51Njz2otOCLlSiMrJ++N5KNjeedzuohRhLyDU2XgYeNqBTdIWMrdS+WZElspImQFwxPIPCW0M+mE/W1/YI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=dolcini.it; spf=pass smtp.mailfrom=dolcini.it; dkim=pass (2048-bit key) header.d=dolcini.it header.i=@dolcini.it header.b=BCZQjEja; arc=none smtp.client-ip=217.194.8.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=dolcini.it Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=dolcini.it Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=dolcini.it header.i=@dolcini.it header.b="BCZQjEja" Received: from francesco-nb.pivistrello.it (93-49-2-63.ip317.fastwebnet.it [93.49.2.63]) by mail11.truemail.it (Postfix) with ESMTPA id 37D6E25C78; Fri, 24 Oct 2025 16:49:30 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dolcini.it; s=default; t=1761317370; bh=zva3FPKeFabbu2LtkeKWUVIEJqvYScNBl/WxN2/Nsvw=; h=From:To:Subject; b=BCZQjEja8kaPiU4A7pSr6CRYlMDXu+OBpYwswer+zxn7mOJ35Hr8HVmZaFHqY63Bt XhXD0ao3G0BA7+kqXNcQuW9rLW//2blv2LF6nHjzjQNyihYALX5ZENi9teSfPLp0bK LVJqmTxHmLH5QRLZD64Shedkl6qla70G1T7gYw04zHpUA0T8Zs0RTgSsdYDAgVc7lz U+Elu4czZMmOIHqnNpE1ecb7Kl2qaUiohsoEcat3nS2sMQtDu9BJQjUbvimUyHU1Oq Rh34YWZ8LrVoFqwkEHc165lHcBuYRyjGNOqnysnphLFTjAvqDamepUjU7+rN7BBJrC iS/YAjnah2asw== From: Francesco Dolcini To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , "Kirill A. Shutemov" , Dave Hansen , Rick Edgecombe Cc: =?UTF-8?q?Jo=C3=A3o=20Paulo=20Gon=C3=A7alves?= , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Francesco Dolcini Subject: [PATCH v1 1/2] dt-bindings: arm: fsl: add Toradex SMARC iMX95 Date: Fri, 24 Oct 2025 16:49:20 +0200 Message-Id: <20251024144921.77714-2-francesco@dolcini.it> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251024144921.77714-1-francesco@dolcini.it> References: <20251024144921.77714-1-francesco@dolcini.it> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable From: Jo=C3=A3o Paulo Gon=C3=A7alves Add DT compatible strings for Toradex SMARC iMX95 SoM and Toradex SMARC Development carrier board. Link: https://www.toradex.com/computer-on-modules/smarc-arm-family/nxp-imx95 Link: https://www.toradex.com/products/carrier-board/smarc-development-boar= d-kit Signed-off-by: Jo=C3=A3o Paulo Gon=C3=A7alves Signed-off-by: Francesco Dolcini Acked-by: Conor Dooley --- Documentation/devicetree/bindings/arm/fsl.yaml | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation= /devicetree/bindings/arm/fsl.yaml index 00cdf490b062..44dd93f1c674 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1439,6 +1439,12 @@ properties: - const: phytec,imx95-phycore-fpsc # phyCORE-i.MX 95 FPSC - const: fsl,imx95 =20 + - description: Toradex Boards with SMARC iMX95 Modules + items: + - const: toradex,smarc-imx95-dev # Toradex SMARC iMX95 on Torade= x SMARC Development Board + - const: toradex,smarc-imx95 # Toradex SMARC iMX95 Module + - const: fsl,imx95 + - description: i.MXRT1050 based Boards items: - enum: --=20 2.39.5 From nobody Sun Feb 8 16:17:48 2026 Received: from mail11.truemail.it (mail11.truemail.it [217.194.8.81]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EF56C239E80; Fri, 24 Oct 2025 14:49:39 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.194.8.81 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761317383; cv=none; b=Vgd13ISd3dqZ2EcDNFbQPYoSQQAL3fJN794wZMFJ/dk23hdDPqEMUGuSGrrIuDUd7z6GaiPK8C2XHFgSPw/Vw6SP8DCGu3W90c511E7HStdCmK6+JmNZBYCmj/zhwoGIYfXyV05jO7wCy9cdrIulzwZZYFR7iAFa6FZ4zyYxWmY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761317383; c=relaxed/simple; bh=2sL7uTFC/tb/qDWfhblrg1CV0gedMnasJtGXnESteCw=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version:Content-Type; b=OeK3+31W3XuKNxbrjIUwH27tTlF246J7ctYGvTGfW0es9ws8J1NHF709P3Erk6noUzLEgRb3cbC4qMP79CZX8stKjEY0N6K/hTj8p2JKH+xp//jsO1YS81JMDS8qhW0xQSvE2S5fBB6u7BpDwAk8nNJPHdkv0wqQ5tojKl7MWoU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=dolcini.it; spf=pass smtp.mailfrom=dolcini.it; dkim=pass (2048-bit key) header.d=dolcini.it header.i=@dolcini.it header.b=o8Sk0x0M; arc=none smtp.client-ip=217.194.8.81 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=dolcini.it Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=dolcini.it Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=dolcini.it header.i=@dolcini.it header.b="o8Sk0x0M" Received: from francesco-nb.pivistrello.it (93-49-2-63.ip317.fastwebnet.it [93.49.2.63]) by mail11.truemail.it (Postfix) with ESMTPA id DA3E525C7A; Fri, 24 Oct 2025 16:49:30 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=dolcini.it; s=default; t=1761317371; bh=EfvyVNIwWLrffqUlxU6dL8rreAgi0eMRlkQSodkyAko=; h=From:To:Subject; b=o8Sk0x0MkfzOHaZMd1nBZkBnK0bDYJ1/8jLyui4sDXz4f2PDZUrxBu1J0OwLWy60i xTsh6ZF0Nc8WDVVbV56HlbSfG2uBJkHGEv0Zt5wmgDxE8vGcHMtw11dR+ahF0+3/Ed 6mb97LGlBvJl9FAhKOnCh8PjpB+R2F5EJWaOFqn1qoILg6RVdH8cUcZ03IZOGOt6v/ adJEqXVlROOgkLjIBma+GdiBzj2cpzWdPJ2bgc65ZDzm1rehmrr6IiEbZSnWQmaG9M cmbuoJL/HwJ7/GFr+8roxCQXPRNcClfuRqT5/TYOr/Q51LgONrmFHNZvHZtAs8iyO4 D/DdZvQVd958A== From: Francesco Dolcini To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , "Kirill A. Shutemov" , Dave Hansen , Rick Edgecombe Cc: Max Krummenacher , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, Ernest Van Hoecke , Emanuele Ghidoli , =?UTF-8?q?Jo=C3=A3o=20Paulo=20Gon=C3=A7alves?= , Vitor Soares , Francesco Dolcini Subject: [PATCH v1 2/2] arm64: dts: freescale: add Toradex SMARC iMX95 Date: Fri, 24 Oct 2025 16:49:21 +0200 Message-Id: <20251024144921.77714-3-francesco@dolcini.it> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20251024144921.77714-1-francesco@dolcini.it> References: <20251024144921.77714-1-francesco@dolcini.it> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable From: Max Krummenacher Add DT support for Toradex SMARC iMX95 SoM and Development carrier board. The module consists of an NXP i.MX95 family SoC, up to 16GB of LPDDR5 RAM and up to 128GB of storage, a USB 3.0 Host Hub and 2.0 OTG, two Gigabit Ethernet PHYs, a 10 Gigabit Ethernet interface, an I2C EEPROM and Temperature Sensor, an RX8130 RTC, a Quad/Dual lane CSI interface, and some optional addons: TPM 2.0, DSI, LVDS, DisplayPort (through a DSI-DP bridge), and Wi-Fi/BT module. Link: https://www.toradex.com/computer-on-modules/smarc-arm-family/nxp-imx95 Link: https://www.toradex.com/products/carrier-board/smarc-development-boar= d-kit Signed-off-by: Max Krummenacher Co-developed-by: Ernest Van Hoecke Signed-off-by: Ernest Van Hoecke Co-developed-by: Emanuele Ghidoli Signed-off-by: Emanuele Ghidoli Co-developed-by: Jo=C3=A3o Paulo Gon=C3=A7alves Signed-off-by: Jo=C3=A3o Paulo Gon=C3=A7alves Co-developed-by: Vitor Soares Signed-off-by: Vitor Soares Co-developed-by: Francesco Dolcini Signed-off-by: Francesco Dolcini --- arch/arm64/boot/dts/freescale/Makefile | 1 + .../dts/freescale/imx95-toradex-smarc-dev.dts | 277 ++++ .../dts/freescale/imx95-toradex-smarc.dtsi | 1153 +++++++++++++++++ 3 files changed, 1431 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx95-toradex-smarc-dev.d= ts create mode 100644 arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/f= reescale/Makefile index 525ef180481d..53f764d8c9a8 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -373,6 +373,7 @@ dtb-$(CONFIG_ARCH_MXC) +=3D imx943-evk.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx95-15x15-evk.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx95-19x19-evk.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx95-19x19-evk-sof.dtb +dtb-$(CONFIG_ARCH_MXC) +=3D imx95-toradex-smarc-dev.dtb dtb-$(CONFIG_ARCH_MXC) +=3D imx95-tqma9596sa-mb-smarc-2.dtb =20 imx95-15x15-evk-pcie0-ep-dtbs =3D imx95-15x15-evk.dtb imx-pcie0-ep.dtbo diff --git a/arch/arm64/boot/dts/freescale/imx95-toradex-smarc-dev.dts b/ar= ch/arm64/boot/dts/freescale/imx95-toradex-smarc-dev.dts new file mode 100644 index 000000000000..5b05f256fd52 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx95-toradex-smarc-dev.dts @@ -0,0 +1,277 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (C) 2025 Toradex + * + * https://www.toradex.com/computer-on-modules/smarc-arm-family/nxp-imx95 + * https://www.toradex.com/products/carrier-board/smarc-development-board-= kit + */ + +/dts-v1/; + +#include +#include "imx95-toradex-smarc.dtsi" + +/ { + model =3D "Toradex SMARC iMX95 on Toradex SMARC Development Board"; + compatible =3D "toradex,smarc-imx95-dev", + "toradex,smarc-imx95", + "fsl,imx95"; + + reg_carrier_1p8v: regulator-carrier-1p8v { + compatible =3D "regulator-fixed"; + regulator-max-microvolt =3D <1800000>; + regulator-min-microvolt =3D <1800000>; + regulator-name =3D "On-carrier 1V8"; + }; + + sound { + compatible =3D "simple-audio-card"; + simple-audio-card,bitclock-master =3D <&codec_dai>; + simple-audio-card,format =3D "i2s"; + simple-audio-card,frame-master =3D <&codec_dai>; + simple-audio-card,mclk-fs =3D <256>; + simple-audio-card,name =3D "tdx-smarc-wm8904"; + simple-audio-card,routing =3D + "Headphone Jack", "HPOUTL", + "Headphone Jack", "HPOUTR", + "IN2L", "Line In Jack", + "IN2R", "Line In Jack", + "Microphone Jack", "MICBIAS", + "IN1L", "Microphone Jack"; + simple-audio-card,widgets =3D + "Microphone", "Microphone Jack", + "Headphone", "Headphone Jack", + "Line", "Line In Jack"; + + codec_dai: simple-audio-card,codec { + clocks =3D <&scmi_clk IMX95_CLK_SAI3>; + sound-dai =3D <&wm8904_1a>; + }; + + simple-audio-card,cpu { + sound-dai =3D <&sai3>; + }; + }; +}; + +/* SMARC GBE0 */ +&enetc_port0 { + status =3D "okay"; +}; + +/* SMARC GBE1 */ +&enetc_port1 { + status =3D "okay"; +}; + +/* SMARC CAN0 */ +&flexcan1 { + status =3D "okay"; +}; + +/* SMARC CAN1 */ +&flexcan2 { + status =3D "okay"; +}; + +&gpio2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio12>, <&pinctrl_gpio13>; +}; + +&gpio4 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio10>, <&pinctrl_gpio11>; +}; + +&gpio5 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio2>, + <&pinctrl_gpio3>, + <&pinctrl_gpio4>, + <&pinctrl_gpio6>, + <&pinctrl_gpio8>, + <&pinctrl_gpio9>; +}; + +/* SMARC I2C_CAM0 */ +&i2c_cam0 { + status =3D "okay"; +}; + +/* SMARC I2C_CAM1 */ +&i2c_cam1 { + status =3D "okay"; +}; + +/* SMARC I2C_GP */ +&lpi2c2 { + status =3D "okay"; + + wm8904_1a: audio-codec@1a { + compatible =3D "wlf,wm8904"; + reg =3D <0x1a>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_sai3>, <&pinctrl_sai3_mclk>; + #sound-dai-cells =3D <0>; + clocks =3D <&scmi_clk IMX95_CLK_SAI3>; + clock-names =3D "mclk"; + AVDD-supply =3D <®_carrier_1p8v>; + CPVDD-supply =3D <®_carrier_1p8v>; + DBVDD-supply =3D <®_carrier_1p8v>; + DCVDD-supply =3D <®_carrier_1p8v>; + MICVDD-supply =3D <®_carrier_1p8v>; + }; + + temperature-sensor@4f { + compatible =3D "ti,tmp1075"; + reg =3D <0x4f>; + }; + + eeprom@57 { + compatible =3D "st,24c02", "atmel,24c02"; + reg =3D <0x57>; + pagesize =3D <16>; + }; + +}; + +/* SMARC I2C_PM */ +&lpi2c3 { + clock-frequency =3D <100000>; + status =3D "okay"; + + fan_controller: fan@18 { + compatible =3D "ti,amc6821"; + reg =3D <0x18>; + #pwm-cells =3D <2>; + + fan { + cooling-levels =3D <255>; + pwms =3D <&fan_controller 40000 PWM_POLARITY_INVERTED>; + }; + }; + + /* Current measurement into module VCC */ + hwmon@40 { + compatible =3D "ti,ina226"; + reg =3D <0x40>; + shunt-resistor =3D <5000>; + }; +}; + +/* SMARC I2C_LCD */ +&lpi2c5 { + status =3D "okay"; + + i2c-mux@70 { + compatible =3D "nxp,pca9543"; + reg =3D <0x70>; + i2c-mux-idle-disconnect; + #address-cells =3D <1>; + #size-cells =3D <0>; + + /* I2C on DSI Connector Pins 4/6 */ + i2c_dsi_0: i2c@0 { + reg =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + /* I2C on DSI Connector Pins 52/54 */ + i2c_dsi_1: i2c@1 { + reg =3D <1>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; +}; + +/* SMARC SPI0 */ +&lpspi6 { + status =3D "okay"; +}; + +/* SMARC SER1, used as the Linux Console */ +&lpuart1 { + status =3D "okay"; +}; + +/* SMARC SER0, RS485 */ +&lpuart2 { + linux,rs485-enabled-at-boot-time; + rs485-rts-active-low; + rs485-rx-during-tx; + status =3D "okay"; +}; + +/* SMARC SER3, RS232 */ +&lpuart3 { + status =3D "okay"; +}; + +/* SMARC MDIO, shared between all ethernet ports */ +&netc_emdio { + status =3D "okay"; + + ethphy3: ethernet-phy@4 { + reg =3D <4>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio7>; + interrupt-parent =3D <&gpio5>; + interrupts =3D <9 IRQ_TYPE_LEVEL_LOW>; + }; +}; + +/* SMARC PCIE_A / M2 Key B */ +&pcie0 { + status =3D "okay"; +}; + +/* SMARC PCIE_B / M2 Key E */ +&pcie1 { + status =3D "okay"; +}; + +/* SMARC I2S0 */ +&sai3 { + status =3D "okay"; +}; + +/* SMARC LCD0_BKLT_PWM */ +&tpm3 { + status =3D "okay"; +}; + +/* SMARC LCD1_BKLT_PWM */ +&tpm4 { + status =3D "okay"; +}; + +/* SMARC GPIO5 as PWM */ +&tpm5 { + status =3D "okay"; +}; + +/* SMARC USB0 */ +&usb2 { + status =3D "okay"; +}; + +/* SMARC USB1..4 */ +&usb3 { + status =3D "okay"; +}; + +&usb3_dwc3 { + status =3D "okay"; +}; + +&usb3_phy { + status =3D "okay"; +}; + +/* SMARC SDIO */ +&usdhc2 { + status =3D "okay"; +}; diff --git a/arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi b/arch/= arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi new file mode 100644 index 000000000000..e99f1a57af8c --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx95-toradex-smarc.dtsi @@ -0,0 +1,1153 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (C) 2025 Toradex + * + * https://www.toradex.com/computer-on-modules/smarc-arm-family/nxp-imx95 + */ + +#include +#include +#include "imx95.dtsi" + +/ { + aliases { + can0 =3D &flexcan1; + can1 =3D &flexcan2; + ethernet0 =3D &enetc_port0; + ethernet1 =3D &enetc_port1; + mmc0 =3D &usdhc1; + mmc1 =3D &usdhc2; + mmc2 =3D &usdhc3; + rtc0 =3D &rtc_i2c; + rtc1 =3D &scmi_bbm; + serial0 =3D &lpuart2; + serial1 =3D &lpuart1; + serial3 =3D &lpuart3; + }; + + chosen { + stdout-path =3D "serial1:115200n8"; + }; + + clk_dsi2dp_bridge: clock-dsi2dp-bridge { + compatible =3D "fixed-clock"; + #clock-cells =3D <0>; + clock-frequency =3D <27000000>; + }; + + clk_serdes_eth_ref: clock-eth-ref { + compatible =3D "gpio-gate-clock"; + #clock-cells =3D <0>; + /* CTRL_ETH_REF_CLK_STBY# */ + enable-gpios =3D <&som_gpio_expander_1 13 GPIO_ACTIVE_HIGH>; + }; + + connector { + compatible =3D "gpio-usb-b-connector", "usb-b-connector"; + /* SMARC P64 - USB0_OTG_ID */ + id-gpios =3D <&som_gpio_expander_0 3 GPIO_ACTIVE_HIGH>; + label =3D "USB0"; + self-powered; + type =3D "micro"; + vbus-supply =3D <®_usb0_vbus>; + + port { + usb_dr_connector: endpoint { + remote-endpoint =3D <&usb0_otg_id>; + }; + }; + }; + + gpio-keys { + compatible =3D "gpio-keys"; + + smarc_key_sleep: key-sleep { + gpios =3D <&som_ec_gpio_expander 4 GPIO_ACTIVE_LOW>; + label =3D "SMARC_SLEEP#"; + wakeup-source; + linux,code =3D ; + }; + + smarc_switch_lid: switch-lid { + gpios =3D <&som_ec_gpio_expander 2 GPIO_ACTIVE_LOW>; + label =3D "SMARC_LID#"; + linux,code =3D ; + linux,input-type =3D ; + }; + }; + + reg_module_1p8v: regulator-module-1p8v { + compatible =3D "regulator-fixed"; + regulator-max-microvolt =3D <1800000>; + regulator-min-microvolt =3D <1800000>; + regulator-name =3D "On-module +V1.8"; + }; + + /* Non PMIC On-module Supplies */ + reg_module_dp_1p2v: regulator-module-dp-1p2v { + compatible =3D "regulator-fixed"; + regulator-max-microvolt =3D <1200000>; + regulator-min-microvolt =3D <1200000>; + regulator-name =3D "On-module +V1.2_DP"; + vin-supply =3D <®_module_1p8v>; + }; + + reg_usb0_vbus: regulator-usb0-vbus { + compatible =3D "regulator-fixed"; + /* SMARC P62 - USB0_EN_OC# */ + gpios =3D <&som_gpio_expander_0 4 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name =3D "USB0_EN_OC#"; + }; + + reg_usb1_vbus: regulator-usb1-vbus { + compatible =3D "regulator-fixed"; + /* CTRL_V_BUS_USB_HUB or SMARC P71 - USB2_EN_OC# */ + gpios =3D <&som_gpio_expander_0 6 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-name =3D "CTRL_V_BUS_USB_HUB"; + }; + + reg_usdhc2_vmmc: regulator-vmmc-usdhc2 { + compatible =3D "regulator-fixed"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_usdhc2_pwr_en>; + enable-active-high; + gpio =3D <&gpio3 7 GPIO_ACTIVE_HIGH>; + off-on-delay-us =3D <100000>; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <3300000>; + regulator-name =3D "SDIO_PWR_EN"; + startup-delay-us =3D <20000>; + }; + + reg_usdhc2_vqmmc: regulator-usdhc2-vqmmc { + compatible =3D "regulator-gpio"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_usdhc2_vsel>; + gpios =3D <&gpio3 19 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <1800000>; + states =3D <1800000 0x1>, + <3300000 0x0>; + regulator-name =3D "PMIC_SD2_VSEL"; + }; + + reg_wifi_en: regulator-wifi-en { + compatible =3D "regulator-fixed"; + /* CTRL_EN_WIFI */ + gpios =3D <&som_gpio_expander_1 7 GPIO_ACTIVE_HIGH>; + enable-active-high; + regulator-max-microvolt =3D <3300000>; + regulator-min-microvolt =3D <3300000>; + regulator-name =3D "CTRL_EN_WIFI"; + startup-delay-us =3D <2000>; + }; + + reserved-memory { + #address-cells =3D <2>; + #size-cells =3D <2>; + ranges; + + linux_cma: linux,cma { + compatible =3D "shared-dma-pool"; + reusable; + size =3D <0 0x3c000000>; + alloc-ranges =3D <0 0x80000000 0 0x7F000000>; + linux,cma-default; + }; + }; +}; + +/* SMARC GBE0 */ +&enetc_port0 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_enetc0>, <&pinctrl_enetc0_1588_tmr>; + phy-handle =3D <ðphy1>; + phy-mode =3D "rgmii-id"; +}; + +/* SMARC GBE1 */ +&enetc_port1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_enetc1>, <&pinctrl_enetc1_1588_tmr>; + phy-handle =3D <ðphy2>; + phy-mode =3D "rgmii-id"; +}; + +/* SMARC CAN0 */ +&flexcan1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_flexcan1>; +}; + +/* SMARC CAN1 */ +&flexcan2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_flexcan2>; +}; + +&gpio1 { + gpio-line-names =3D "", /* 0 */ + "", + "SMARC_I2C_GP_CK", + "SMARC_I2C_GP_DAT", + "", + "", + "", + "", + "", + "", + "", /* 10 */ + "", + "", + "", + "CTRL_IO_EXP_INT_B"; + status =3D "okay"; +}; + +&gpio2 { + gpio-line-names =3D "SMARC_SPI0_CS0#", /* 0 */ + "", + "", + "", + "", + "", + "SMARC_GPIO5", + "", + "I2C_CAM_DAT", + "I2C_CAM_CK", + "SMARC_GPIO12", /* 10 */ + "SMARC_GPIO13", + "", + "", + "", + "", + "", + "", + "SMARC_SPI1_CS0#", + "", + "", /* 20 */ + "", + "SMARC_I2C_LCD_DAT", + "SMARC_I2C_LCD_CK", + "SMARC_SPI0_CS1#", + "", + "", + "", + "SMARC_I2C_PM_DAT", + "SMARC_I2C_PM_CK", + "I2C_SOM_DAT", /* 30 */ + "I2C_SOM_CK"; + status =3D "okay"; +}; + +&gpio3 { + gpio-line-names =3D "SMARC_SDIO_CD#", /* 0 */ + "", + "", + "", + "", + "", + "", + "SMARC_SDIO_PWR_EN", + "", + "", + "", /* 10 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "PMIC_SD2_VSEL"; + status =3D "okay"; +}; + +&gpio4 { + gpio-line-names =3D "", /* 0 */ + "", + "", + "", + "", + "", + "", + "", + "", + "", + "", /* 10 */ + "", + "", + "", + "SMARC_GPIO11", + "SMARC_GPIO10", + "", + "", + "", + "", + "", /* 20 */ + "", + "", + "", + "", + "", + "", + "", + "SMARC_SMB_ALERT#"; + status =3D "okay"; +}; + +&gpio5 { + gpio-line-names =3D "SMARC_GPIO2", /* 0 */ + "SMARC_GPIO3", + "SMARC_GPIO4", + "SMARC_GPIO6", + "", + "", + "", + "", + "SMARC_GPIO9", + "SMARC_GPIO7", + "SMARC_GPIO8", /* 10 */ + "SMARC_SPI1_CS1#", + "", + "SPI1_TPM_CS#"; + status =3D "okay"; +}; + +/* SMARC I2C_GP */ +&lpi2c2 { + pinctrl-names =3D "default", "gpio"; + pinctrl-0 =3D <&pinctrl_lpi2c2>; + pinctrl-1 =3D <&pinctrl_lpi2c2_gpio>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clock-frequency =3D <400000>; + scl-gpios =3D <&gpio1 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios =3D <&gpio1 3 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status =3D "okay"; + + eeprom@50 { + compatible =3D "st,24c32", "atmel,24c32"; + reg =3D <0x50>; + pagesize =3D <32>; + }; +}; + +/* SMARC I2C_PM */ +&lpi2c3 { + pinctrl-names =3D "default", "gpio"; + pinctrl-0 =3D <&pinctrl_lpi2c3>; + pinctrl-1 =3D <&pinctrl_lpi2c3_gpio>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clock-frequency =3D <400000>; + scl-gpios =3D <&gpio2 29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios =3D <&gpio2 28 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; +}; + +/* I2C_SOM */ +&lpi2c4 { + pinctrl-names =3D "default", "gpio"; + pinctrl-0 =3D <&pinctrl_lpi2c4>, <&pinctrl_ctrl_io_exp_int_b>; + pinctrl-1 =3D <&pinctrl_lpi2c4_gpio>, <&pinctrl_ctrl_io_exp_int_b>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clock-frequency =3D <400000>; + scl-gpios =3D <&gpio2 31 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios =3D <&gpio2 30 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status =3D "okay"; + + som_gpio_expander_0: gpio@20 { + compatible =3D "nxp,pcal6408"; + reg =3D <0x20>; + #interrupt-cells =3D <2>; + interrupt-controller; + interrupt-parent =3D <&gpio1>; + interrupts =3D <14 IRQ_TYPE_LEVEL_LOW>; + #gpio-cells =3D <2>; + gpio-controller; + gpio-line-names =3D + "SMARC_PCIE_WAKE#", /* 0 */ + "SMARC_PCIE_B_RST#", + "SMARC_PCIE_A_RST#", + "SMARC_USB0_OTG_ID", + "SMARC_USB0_EN", /* SMARC USB0_EN_OC# - Open Drain Output */ + "SMARC_USB0_OC#", /* SMARC USB0_EN_OC# - Over-Current Sense Input */ + "", + "SMARC_PCIE_C_RST#"; + }; + + som_gpio_expander_1: gpio@21 { + compatible =3D "nxp,pcal6416"; + reg =3D <0x21>; + #interrupt-cells =3D <2>; + interrupt-controller; + interrupt-parent =3D <&gpio1>; + interrupts =3D <14 IRQ_TYPE_LEVEL_LOW>; + #gpio-cells =3D <2>; + gpio-controller; + gpio-line-names =3D + "SMARC_GPIO0", /* 0 */ + "SMARC_GPIO1", + "SMARC_LCD0_VDD_EN", + "SMARC_LCD0_BKLT_EN", + "SMARC_LCD1_VDD_EN", + "SMARC_LCD1_BKLT_EN", + "", + "", + "", + "", + "", /* 10 */ + "", + "", + "", + "", + "", + "", + "SMARC_SDIO_WP"; + }; + + embedded-controller@28 { + compatible =3D "toradex,smarc-imx95-ec", "toradex,smarc-ec"; + reg =3D <0x28>; + }; + + som_ec_gpio_expander: gpio@29 { + compatible =3D "toradex,ecgpiol16", "nxp,pcal6416"; + reg =3D <0x29>; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_ec_int>; + #interrupt-cells =3D <2>; + interrupt-controller; + interrupt-parent =3D <&gpio1>; + interrupts =3D <11 IRQ_TYPE_LEVEL_LOW>; + #gpio-cells =3D <2>; + gpio-controller; + gpio-line-names =3D + "SMARC_CHARGER_PRSNT#", + "SMARC_CHARGING#", + "SMARC_LID#", + "SMARC_BATLOW#", + "SMARC_SLEEP#"; + }; + + /* SMARC DP0 */ + som_dsi2dp_bridge: bridge@2c { + compatible =3D "ti,sn65dsi86"; + reg =3D <0x2c>; + clocks =3D <&clk_dsi2dp_bridge>; + clock-names =3D "refclk"; + vcc-supply =3D <®_module_dp_1p2v>; + vcca-supply =3D <®_module_dp_1p2v>; + vccio-supply =3D <®_module_1p8v>; + vpll-supply =3D <®_module_1p8v>; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + port@0 { + reg =3D <0>; + sn65dsi86_in: endpoint { + }; + }; + + port@1 { + reg =3D <1>; + sn65dsi86_out: endpoint { + data-lanes =3D <3 2 1 0>; + }; + }; + }; + }; + + rtc_i2c: rtc@32 { + compatible =3D "epson,rx8130"; + reg =3D <0x32>; + }; + + temperature-sensor@48 { + compatible =3D "ti,tmp1075"; + reg =3D <0x48>; + }; + + eeprom@50 { + compatible =3D "st,24c02", "atmel,24c02"; + reg =3D <0x50>; + pagesize =3D <16>; + }; +}; + +/* SMARC I2C_LCD */ +&lpi2c5 { + pinctrl-names =3D "default", "gpio"; + pinctrl-0 =3D <&pinctrl_lpi2c5>; + pinctrl-1 =3D <&pinctrl_lpi2c5_gpio>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clock-frequency =3D <100000>; + scl-gpios =3D <&gpio2 23 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios =3D <&gpio2 22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; +}; + +/* I2C_CAM */ +&lpi2c7 { + pinctrl-names =3D "default", "gpio"; + pinctrl-0 =3D <&pinctrl_lpi2c7>; + pinctrl-1 =3D <&pinctrl_lpi2c7_gpio>; + #address-cells =3D <1>; + #size-cells =3D <0>; + clock-frequency =3D <400000>; + scl-gpios =3D <&gpio2 9 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios =3D <&gpio2 8 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + status =3D "okay"; + + i2c-mux@70 { + compatible =3D "nxp,pca9543"; + reg =3D <0x70>; + #address-cells =3D <1>; + #size-cells =3D <0>; + + /* SMARC I2C_CAM0 */ + i2c_cam0: i2c@0 { + reg =3D <0>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + + /* SMARC I2C_CAM1 */ + i2c_cam1: i2c@1 { + reg =3D <1>; + #address-cells =3D <1>; + #size-cells =3D <0>; + }; + }; +}; + +/* SMARC SPI1 */ +&lpspi4 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpspi4>; + cs-gpios =3D <&gpio2 18 GPIO_ACTIVE_LOW>, + <&gpio5 11 GPIO_ACTIVE_LOW>, + <&gpio5 13 GPIO_ACTIVE_LOW>; + status =3D "okay"; + + som_tpm: tpm@2 { + compatible =3D "infineon,slb9670", "tcg,tpm_tis-spi"; + reg =3D <0x2>; + spi-max-frequency =3D <18500000>; + }; +}; + +/* SMARC SPI0 */ +&lpspi6 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lpspi6>; + cs-gpios =3D <&gpio2 0 GPIO_ACTIVE_LOW>, + <&gpio2 24 GPIO_ACTIVE_LOW>; +}; + +/* SMARC SER1, used as the Linux Console */ +&lpuart1 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_uart1>; +}; + +/* SMARC SER0 */ +&lpuart2 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_uart2>; + uart-has-rtscts; +}; + +/* SMARC SER3 */ +&lpuart3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_uart3>; +}; + +/* SMARC MDIO, shared between all ethernet ports */ +&netc_emdio { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_emdio>; + + ethphy1: ethernet-phy@1 { + reg =3D <1>; + interrupt-parent =3D <&som_gpio_expander_1>; + interrupts =3D <6 IRQ_TYPE_LEVEL_LOW>; + ti,rx-internal-delay =3D ; + ti,tx-internal-delay =3D ; + }; + + ethphy2: ethernet-phy@2 { + reg =3D <2>; + ti,rx-internal-delay =3D ; + ti,tx-internal-delay =3D ; + }; +}; + +&netcmix_blk_ctrl { + status =3D "okay"; +}; + +&netc_blk_ctrl { + status =3D "okay"; +}; + +&netc_timer { + status =3D "okay"; +}; + +/* SMARC PCIE_A */ +&pcie0 { + pinctrl-0 =3D <&pinctrl_pcie0>; + pinctrl-names =3D "default"; + reset-gpios =3D <&som_gpio_expander_0 2 GPIO_ACTIVE_LOW>; +}; + +/* SMARC PCIE_B */ +&pcie1 { + pinctrl-0 =3D <&pinctrl_pcie1>; + pinctrl-names =3D "default"; + reset-gpios =3D <&som_gpio_expander_0 1 GPIO_ACTIVE_LOW>; +}; + +/* SMARC I2S0 */ +&sai3 { + #sound-dai-cells =3D <0>; + assigned-clocks =3D <&scmi_clk IMX95_CLK_AUDIOPLL1_VCO>, + <&scmi_clk IMX95_CLK_AUDIOPLL2_VCO>, + <&scmi_clk IMX95_CLK_AUDIOPLL1>, + <&scmi_clk IMX95_CLK_AUDIOPLL2>, + <&scmi_clk IMX95_CLK_SAI3>; + assigned-clock-parents =3D <0>, <0>, <0>, <0>, + <&scmi_clk IMX95_CLK_AUDIOPLL1>; + assigned-clock-rates =3D <3932160000>, + <3612672000>, <393216000>, + <361267200>, <12288000>; + fsl,sai-mclk-direction-output; +}; + +&thermal_zones { + /* PF09 Main PMIC */ + pf09-thermal { + polling-delay =3D <2000>; + polling-delay-passive =3D <250>; + thermal-sensors =3D <&scmi_sensor 2>; + + trips { + trip0 { + hysteresis =3D <2000>; + temperature =3D <155000>; + type =3D "critical"; + }; + }; + }; + + /* PF53 VDD_ARM PMIC */ + pf53-arm-thermal { + polling-delay =3D <2000>; + polling-delay-passive =3D <250>; + thermal-sensors =3D <&scmi_sensor 4>; + + trips { + trip0 { + hysteresis =3D <2000>; + temperature =3D <155000>; + type =3D "critical"; + }; + }; + }; + + /* PF53 VDD_SOC PMIC */ + pf53-soc-thermal { + polling-delay =3D <2000>; + polling-delay-passive =3D <250>; + thermal-sensors =3D <&scmi_sensor 3>; + + trips { + trip0 { + hysteresis =3D <2000>; + temperature =3D <155000>; + type =3D "critical"; + }; + }; + }; +}; + +/* SMARC LCD0_BKLT_PWM */ +&tpm3 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lcd0_bklt_pwm>; +}; + +/* SMARC LCD1_BKLT_PWM */ +&tpm4 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_lcd1_bklt_pwm>; +}; + +/* SMARC GPIO5 as PWM */ +&tpm5 { + pinctrl-names =3D "default"; + pinctrl-0 =3D <&pinctrl_gpio5_pwm>; +}; + +/* SMARC USB0 */ +&usb2 { + adp-disable; + dr_mode =3D "otg"; + hnp-disable; + srp-disable; + usb-role-switch; + vbus-supply =3D <®_usb0_vbus>; + + port { + usb0_otg_id: endpoint { + remote-endpoint =3D <&usb_dr_connector>; + }; + }; +}; + +&usb3 { + fsl,disable-port-power-control; +}; + +/* SMARC USB1..4 */ +&usb3_dwc3 { + dr_mode =3D "host"; +}; + +&usb3_phy { + vbus-supply =3D <®_usb1_vbus>; +}; + +/* On-module eMMC */ +&usdhc1 { + pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; + pinctrl-0 =3D <&pinctrl_usdhc1>; + pinctrl-1 =3D <&pinctrl_usdhc1>; + pinctrl-2 =3D <&pinctrl_usdhc1_200mhz>; + bus-width =3D <8>; + non-removable; + no-sdio; + no-sd; + status =3D "okay"; +}; + +/* SMARC SDIO */ +&usdhc2 { + pinctrl-names =3D "default", "state_100mhz", "state_200mhz", "sleep"; + pinctrl-0 =3D <&pinctrl_usdhc2>, <&pinctrl_usdhc2_cd>; + pinctrl-1 =3D <&pinctrl_usdhc2>, <&pinctrl_usdhc2_cd>; + pinctrl-2 =3D <&pinctrl_usdhc2_200mhz>,<&pinctrl_usdhc2_cd>; + pinctrl-3 =3D <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_cd>; + cd-gpios =3D <&gpio3 0 GPIO_ACTIVE_LOW>; + vmmc-supply =3D <®_usdhc2_vmmc>; + vqmmc-supply =3D <®_usdhc2_vqmmc>; + wp-gpios =3D <&som_gpio_expander_1 15 GPIO_ACTIVE_HIGH>; +}; + +/* On-module Wi-Fi */ +&usdhc3 { + pinctrl-names =3D "default", "state_100mhz", "state_200mhz"; + pinctrl-0 =3D <&pinctrl_usdhc3>; + pinctrl-1 =3D <&pinctrl_usdhc3>; + pinctrl-2 =3D <&pinctrl_usdhc3_200mhz>; + keep-power-in-suspend; + non-removable; + vmmc-supply =3D <®_wifi_en>; +}; + +&scmi_bbm { + linux,code =3D ; +}; + +&wdog3 { + fsl,ext-reset-output; + status =3D "okay"; +}; + +&scmi_iomuxc { + /* SMARC CAM_MCK */ + pinctrl_cam_mck: cammckgrp { + fsl,pins =3D ; /* SM= ARC S6 - CAM_MCK */ + }; + + pinctrl_ec_int: ecintgrp { + fsl,pins =3D ; /* = SAI1_TXFS - EC_MCU_INT# */ + }; + + /* SMARC MDIO, shared between all ethernet ports */ + pinctrl_emdio: emdiogrp { + fsl,pins =3D , /* SMAR= C S45 - MDIO_CLK */ + ; /* SMARC S46 -= MDIO_DAT */ + }; + + /* SMARC GBE0 */ + pinctrl_enetc0: enetc0grp { + fsl,pins =3D , /* ENET1_TX_CTL */ + , /* ENET= 1_TXC */ + , /* ENET1_T= DO */ + , /* ENET1_T= D1 */ + , /* ENET1_T= D2 */ + , /* ENET1_T= D3 */ + , /* EN= ET1_RX_CTL */ + , /* ENET= 1_RXC */ + , /* ENET1_R= D0 */ + , /* ENET1_R= D1 */ + , /* ENET1_R= D2 */ + ; /* ENET1_R= D3 */ + }; + + /* SMARC GBE0_SDP */ + pinctrl_enetc0_1588_tmr: enetc01588tmrgrp { + fsl,pins =3D ;= /* SMARC P6 - GBE0_SDP */ + }; + + /* SMARC GBE1 */ + pinctrl_enetc1: enetc1grp { + fsl,pins =3D , /* ENET2_TX_CTL */ + , /* ENET= 2_TXC */ + , /* ENET2_T= D0 */ + , /* ENET2_T= D1 */ + , /* ENET2_T= D2 */ + , /* ENET2_T= D3 */ + , /* EN= ET2_RX_CTL */ + , /* ENET= 2_RXC */ + , /* ENET2_R= D0 */ + , /* ENET2_R= D1 */ + , /* ENET2_R= D2 */ + ; /* ENET2_R= D3 */ + }; + + /* SMARC GBE1_SDP */ + pinctrl_enetc1_1588_tmr: enetc11588tmrgrp { + fsl,pins =3D ;= /* SMARC P5 - GBE1_SDP */ + }; + + /* SMARC CAN0 */ + pinctrl_flexcan1: flexcan1grp { + fsl,pins =3D , /* SMARC P1= 43 - CAN0_TX */ + ; /* SMARC P144= - CAN0_RX */ + }; + + /* SMARC CAN1 */ + pinctrl_flexcan2: flexcan2grp { + fsl,pins =3D , /* SMARC P145 - CAN1_= TX */ + ; /* SMARC P146 - CAN1_RX */ + }; + + /* SMARC GPIO2 */ + pinctrl_gpio2: gpio2grp { + fsl,pins =3D ; /* SMARC P110= - GPIO2 */ + }; + + /* SMARC GPIO3 */ + pinctrl_gpio3: gpio3grp { + fsl,pins =3D ; /* SMARC P111= - GPIO3 */ + }; + + /* SMARC GPIO4 */ + pinctrl_gpio4: gpio4grp { + fsl,pins =3D ; /* SMARC P112= - GPIO4 */ + }; + + /* SMARC GPIO5 */ + pinctrl_gpio5: gpio5grp { + fsl,pins =3D ; /* SMARC P113 -= GPIO5 */ + }; + + /* SMARC GPIO5 as PWM */ + pinctrl_gpio5_pwm: gpio5pwmgrp { + fsl,pins =3D ; /* SMARC P113 - PWM_= OUT */ + }; + + /* SMARC GPIO6 */ + pinctrl_gpio6: gpio6grp { + fsl,pins =3D ; /* SMARC P114= - GPIO6 */ + }; + + /* SMARC GPIO7 */ + pinctrl_gpio7: gpio7grp { + fsl,pins =3D ; /* SMARC P115 = - GPIO7 */ + }; + + /* SMARC GPIO8 */ + pinctrl_gpio8: gpio8grp { + fsl,pins =3D ; /* SMARC P11= 6 - GPIO8 */ + }; + + /* SMARC GPIO9 */ + pinctrl_gpio9: gpio9grp { + fsl,pins =3D ; /* SMARC P117 -= GPIO9 */ + }; + + /* SMARC GPIO10 */ + pinctrl_gpio10: gpio10grp { + fsl,pins =3D ; /* SMARC P118= - GPIO10 */ + }; + + /* SMARC GPIO11 */ + pinctrl_gpio11: gpio11grp { + fsl,pins =3D ; /* SMARC P119 = - GPIO11 */ + }; + + /* SMARC GPIO12 */ + pinctrl_gpio12: gpio12grp { + fsl,pins =3D ; /* SMARC S142 = - GPIO12 */ + }; + + /* SMARC GPIO13 */ + pinctrl_gpio13: gpio13grp { + fsl,pins =3D ; /* SMARC S123 = - GPIO13 */ + }; + + pinctrl_ctrl_io_exp_int_b: ioexpintgrp { + fsl,pins =3D ; /* = CTRL_IO_EXP_INT_B */ + }; + + /* SMARC LCD0_BKLT_PWM */ + pinctrl_lcd0_bklt_pwm: lcd0bkltpwmgrp { + fsl,pins =3D ; /* SMARC S141 - LCD0= _BKLT_PWM */ + }; + + /* SMARC LCD1_BKLT_PWM */ + pinctrl_lcd1_bklt_pwm: lcd1bkltpwmgrp { + fsl,pins =3D ; /* SMARC S122 - LCD1= _BKLT_PWM */ + }; + + /* SMARC I2C_GP */ + pinctrl_lpi2c2: lpi2c2grp { + fsl,pins =3D , /* = SMARC S48 - I2C_GP_CK */ + ; /* SMARC S49= - I2C_GP_DAT */ + }; + + /* SMARC I2C_GP as GPIOs */ + pinctrl_lpi2c2_gpio: lpi2c2gpiogrp { + fsl,pins =3D , = /* SMARC S48 - I2C_GP_CK */ + ; /* SMARC = S49 - I2C_GP_DAT */ + }; + + /* SMARC I2C_PM */ + pinctrl_lpi2c3: lpi2c3grp { + fsl,pins =3D , /* SMARC P122= - I2C_PM_DAT */ + ; /* SMARC P121 - I2C_PM= _CK */ + }; + + /* SMARC I2C_PM as GPIOs */ + pinctrl_lpi2c3_gpio: lpi2c3gpiogrp { + fsl,pins =3D , /* SMARC = P122 - I2C_PM_DAT */ + ; /* SMARC P121 - I2= C_PM_CK */ + }; + + /* I2C_SOM */ + pinctrl_lpi2c4: lpi2c4grp { + fsl,pins =3D , /* I2C_SOM_CK= */ + ; /* I2C_SOM_DAT */ + }; + + /* I2C_SOM as GPIOs */ + pinctrl_lpi2c4_gpio: lpi2c4gpiogrp { + fsl,pins =3D , /* I2C_SO= M_CK */ + ; /* I2C_SOM_DAT */ + }; + + /* SMARC I2C_LCD */ + pinctrl_lpi2c5: lpi2c5grp { + fsl,pins =3D , /* SMARC S140= - I2C_LCD_DAT */ + ; /* SMARC S139 - I2C_LC= D_CK */ + }; + + /* SMARC I2C_LCD as GPIOs */ + pinctrl_lpi2c5_gpio: lpi2c5gpiogrp { + fsl,pins =3D , /* SMARC = S140 - I2C_LCD_DAT */ + ; /* SMARC S139 - I2= C_LCD_CK */ + }; + + /* I2C_CAM */ + pinctrl_lpi2c7: lpi2c7grp { + fsl,pins =3D , /* I2C_CAM_DA= T */ + ; /* I2C_CAM_CK */ + }; + + /* I2C_CAM as GPIOs */ + pinctrl_lpi2c7_gpio: lpi2c7gpiogrp { + fsl,pins =3D , /* I2C_CAM= _DAT */ + ; /* I2C_CAM_CK */ + }; + + /* SMARC SPI1 */ + pinctrl_lpspi4: lpspi4grp { + fsl,pins =3D , /* SMARC P56 - SP= I1_CK */ + , /* SMARC P58 - SPI1_DO = */ + , /* SMARC P57 - SPI1_DIN */ + , /* SPI1_TPM_CS# = */ + , /* SMARC P54 - SPI1_CS= 0# */ + ; /* SMARC P55 - SPI1_C= S1# */ + }; + + /* SMARC SPI0 */ + pinctrl_lpspi6: lpspi6grp { + fsl,pins =3D , /* SMARC P43 -= SPI0_CS0# */ + , /* SMARC P31 - SPI0_CS= 1# */ + , /* SMARC P45 - SPI0_DIN */ + , /* SMARC P46 - SPI0_DO = */ + ; /* SMARC P44 - SPI0_CK */ + }; + + /* SMARC PCIE_A */ + pinctrl_pcie0: pcie0grp { + fsl,pins =3D ; /* SMARC P78 - PCIE_A_CKREQ# */ + }; + + /* SMARC PCIE_B */ + pinctrl_pcie1: pcie1grp { + fsl,pins =3D ; /* SMARC P77 - PCIE_B_CKREQ# */ + }; + + /* SMARC I2S0 */ + pinctrl_sai3: sai3grp { + fsl,pins =3D , /* SMARC S38 - = I2S0_CK */ + , /* SMARC S41 - I2S0_= SDIN */ + , /* SMARC S40 - I2S0_= SDOUT */ + ; /* SMARC S39 - I2S0_LRCK= */ + }; + + /* SMARC AUDIO_MCK */ + pinctrl_sai3_mclk: sai3mclkgrp { + fsl,pins =3D ; /* SMARC S42 - AUDI= O_MCK */ + }; + + /* SMARC I2S2 */ + pinctrl_sai5: sai5grp { + fsl,pins =3D , /* SMARC S53 = - I2S2_CK */ + , /* SMARC S51 - I2S= 2_SDOUT */ + , /* SMARC S52 - I2S= 2_SDIN */ + ; /* SMARC S50 - I2S2_LR= CK */ + }; + + /* SMARC SMB_ALERT# */ + pinctrl_smb_alert_gpio: smbalertgrp { + fsl,pins =3D ; /* SMARC P1 - = SMB_ALERT# */ + }; + + /* SMARC SER1, used as the Linux Console */ + pinctrl_uart1: uart1grp { + fsl,pins =3D , /* SMAR= C P134 - SER1_TX */ + ; /* SMARC P135 - = SER1_RX */ + }; + + /* SMARC SER0 */ + pinctrl_uart2: uart2grp { + fsl,pins =3D , /* SM= ARC P132 - SER0_CTS# */ + , /* SMARC P131= - SER0_RTS# */ + , /* SMARC P130 -= SER0_RX */ + ; /* SMARC P129 -= SER0_TX */ + }; + + /* SMARC SER3 */ + pinctrl_uart3: uart3grp { + fsl,pins =3D , /* SMARC P140 - SE= R3_TX */ + ; /* SMARC P141 - SER3_RX */ + }; + + /* On-module eMMC */ + pinctrl_usdhc1: usdhc1grp { + fsl,pins =3D , /* SD1_CLK */ + , /* SD1_CMD */ + , /* SD1_DATA0 */ + , /* SD1_DATA1 */ + , /* SD1_DATA2 */ + , /* SD1_DATA3 */ + , /* SD1_DATA4 */ + , /* SD1_DATA5 */ + , /* SD1_DATA6 */ + , /* SD1_DATA7 */ + ; /* SD1_STROBE */ + }; + + pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { + fsl,pins =3D , /* SD1_CLK */ + , /* SD1_CMD */ + , /* SD1_DATA0 */ + , /* SD1_DATA1 */ + , /* SD1_DATA2 */ + , /* SD1_DATA3 */ + , /* SD1_DATA4 */ + , /* SD1_DATA5 */ + , /* SD1_DATA6 */ + , /* SD1_DATA7 */ + ; /* SD1_STROBE */ + }; + + /* SMARC SDIO */ + pinctrl_usdhc2: usdhc2grp { + fsl,pins =3D , /* SMARC P36 - SDI= O_CK */ + , /* SMARC P34 - SDIO_CMD */ + , /* SMARC P39 - SDIO_D0 = */ + , /* SMARC P40 - SDIO_D1 = */ + , /* SMARC P41 - SDIO_D2 = */ + ; /* SMARC P42 - SDIO_D3 = */ + }; + + /* SMARC SDIO */ + pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { + fsl,pins =3D , /* SMARC P36 - SDI= O_CK */ + , /* SMARC P34 - SDIO_CMD */ + , /* SMARC P39 - SDIO_D0 = */ + , /* SMARC P40 - SDIO_D1 = */ + , /* SMARC P41 - SDIO_D2 = */ + ; /* SMARC P42 - SDIO_D3 = */ + }; + + /* SMARC SDIO */ + pinctrl_usdhc2_sleep: usdhc2-sleepgrp { + fsl,pins =3D , /* SMARC P36 - SDIO= _CK */ + , /* SMARC P34 - SDIO_CMD */ + , /* SMARC P39 - SDIO_D0 = */ + , /* SMARC P40 - SDIO_D1 = */ + , /* SMARC P41 - SDIO_D2 = */ + ; /* SMARC P42 - SDIO_D3 = */ + }; + + /* SMARC SDIO_CD# */ + pinctrl_usdhc2_cd: usdhc2-cdgrp { + fsl,pins =3D ; /* SMARC P35 - = SDIO_CD# */ + }; + + /* SMARC SDIO_PWR_EN */ + pinctrl_usdhc2_pwr_en: usdhc2-pwrengrp { + fsl,pins =3D ; /* SMARC P37 = - SDIO_PWR_EN */ + }; + + pinctrl_usdhc2_vsel: usdhc2-vselgrp { + fsl,pins =3D ; /* PMIC_SD2_VS= EL */ + }; + + /* On-module Wi-Fi */ + pinctrl_usdhc3: usdhc3grp { + fsl,pins =3D , /* SD3_CLK */ + , /* SD3_CMD */ + , /* SD3_DATA0 */ + , /* SD3_DATA1 */ + , /* SD3_DATA2 */ + ; /* SD3_DATA3 */ + }; + + /* On-module Wi-Fi */ + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { + fsl,pins =3D , /* SD3_CLK */ + , /* SD3_CMD */ + , /* SD3_DATA1 */ + , /* SD3_DATA2 */ + , /* SD3_DATA3 */ + ; /* SD3_DATA4 */ + }; +}; --=20 2.39.5