From nobody Wed Feb 11 04:39:23 2026 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9233A340A62; Thu, 23 Oct 2025 16:51:10 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=10.30.226.201 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761238270; cv=none; b=o9imN/wGnGDnlAmn0Ov0lV134JG+xcAEqaNWJo1Bth2w0PC9tCOiPzdnYhQUlfCjqz1NzhBW79k3waYbnv4ZigZyV44TU097A7kPsbfD4pB+dlcrMeatln/80B2cQvlz8LOgnargCOG+1kdBfHTgmEzYIZ5h6Gljf/F7aTmQRPo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761238270; c=relaxed/simple; bh=JzYM+AFpLozg0DQ31UnaFL3ZRNHAmvEstbFF5dbOdbc=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=fBzmEQRbPAD7OEkrVzkbY5HDPtwG4QZzszFzOlji8vMVXf543RCzgeZWYCYiAQCKh8EsF5E0pAYO9Z1WZUe2G6AC18ga60YdTQavdzkxu5Ex2ClZ8mMa0wO6Y4HMBgKDf2ghYSnVrEW3fMw2QYUvub6aquCDyAlhOpMeZkiZO3Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=nxjJCcsu; arc=none smtp.client-ip=10.30.226.201 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="nxjJCcsu" Received: by smtp.kernel.org (Postfix) with ESMTPS id 48620C4CEFF; Thu, 23 Oct 2025 16:51:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1761238270; bh=JzYM+AFpLozg0DQ31UnaFL3ZRNHAmvEstbFF5dbOdbc=; h=From:Date:Subject:References:In-Reply-To:To:Cc:Reply-To:From; b=nxjJCcsu8BX1GIJj6qIu6m+yzf+lzh7zHVKhw5XSti3a8ylwRlPDjEp0jGrAjx2FR N8zDwpR5v+nVBi/Mu+ocU+GQMoBQr1OIHie57GAptX4LVwn+9wGmauFCxOWPG6Ukw2 b0hzCXovMMZH9orhwEYiWy+ucmjlexq3Eh+B1S/Ov2INZuHh5KmNHgHaRDK4wiyyus n0Ni7RaYm0u3kZ5Vzz4ndh9oYmxEzrksukC34PgdPcGx6l3qnI3F/S2Pg85rG6Kanq tI/KvLafeeTBSrdcbiCm4Nhq086B8Z5mUI+f/IDlEHJF9HABTTeWycUN8SdNynpr2Z lfI5xrvuROmag== Received: from aws-us-west-2-korg-lkml-1.web.codeaurora.org (localhost.localdomain [127.0.0.1]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3848ACCF9E3; Thu, 23 Oct 2025 16:51:10 +0000 (UTC) From: Deepak Gupta via B4 Relay Date: Thu, 23 Oct 2025 09:51:12 -0700 Subject: [PATCH v22 07/28] riscv/mm: manufacture shadow stack pte Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251023-v5_user_cfi_series-v22-7-1935270f7636@rivosinc.com> References: <20251023-v5_user_cfi_series-v22-0-1935270f7636@rivosinc.com> In-Reply-To: <20251023-v5_user_cfi_series-v22-0-1935270f7636@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley , Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , Andreas Hindborg , Alice Ryhl , Trevor Gross , Benno Lossin Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, rust-for-linux@vger.kernel.org, Zong Li , Deepak Gupta X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1761238267; l=1304; i=debug@rivosinc.com; s=20251023; h=from:subject:message-id; bh=9AtWvDKQ9q5op9YLRgkrDiWaHEAhrRbEgloHu05lQww=; b=+dm9mYjGoM5tguhKJhCeDS+GCYQNPbTcoO1hBHORKmhKyt329FWJFaW9QLB/N4dBqSR0uBKJ3 khcJ5aEfrGEDlHtAlbKqsJTvZ+omlQ+K5u89JygZ8WxJdGlTlyQsxAs X-Developer-Key: i=debug@rivosinc.com; a=ed25519; pk=O37GQv1thBhZToXyQKdecPDhtWVbEDRQ0RIndijvpjk= X-Endpoint-Received: by B4 Relay for debug@rivosinc.com/20251023 with auth_id=553 X-Original-From: Deepak Gupta Reply-To: debug@rivosinc.com From: Deepak Gupta This patch implements creating shadow stack pte (on riscv). Creating shadow stack PTE on riscv means that clearing RWX and then setting W=3D1. Reviewed-by: Alexandre Ghiti Reviewed-by: Zong Li Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/pgtable.h | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgta= ble.h index 4c4057a2550e..e4eb4657e1b6 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -425,6 +425,11 @@ static inline pte_t pte_mkwrite_novma(pte_t pte) return __pte(pte_val(pte) | _PAGE_WRITE); } =20 +static inline pte_t pte_mkwrite_shstk(pte_t pte) +{ + return __pte((pte_val(pte) & ~(_PAGE_LEAF)) | _PAGE_WRITE); +} + /* static inline pte_t pte_mkexec(pte_t pte) */ =20 static inline pte_t pte_mkdirty(pte_t pte) @@ -765,6 +770,11 @@ static inline pmd_t pmd_mkwrite_novma(pmd_t pmd) return pte_pmd(pte_mkwrite_novma(pmd_pte(pmd))); } =20 +static inline pmd_t pmd_mkwrite_shstk(pmd_t pte) +{ + return __pmd((pmd_val(pte) & ~(_PAGE_LEAF)) | _PAGE_WRITE); +} + static inline pmd_t pmd_wrprotect(pmd_t pmd) { return pte_pmd(pte_wrprotect(pmd_pte(pmd))); --=20 2.43.0