From nobody Tue Feb 10 19:49:07 2026 Received: from mail-pl1-f179.google.com (mail-pl1-f179.google.com [209.85.214.179]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 89C90338590 for ; Thu, 23 Oct 2025 13:26:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.179 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761225972; cv=none; b=D5SvcNe7wqtYfavOn5V1OULvcrrROP01Z2/TaRxU5xnfdvg9Yg86Ncov+XyDtjDKD7fdvMBtrI4FTLf47XhXGRGhy8qRskPeoIm/1mLyYKJTuvvHht74R4zkk5gcU38zl0/eoVJUK6MLDMdDNO4BnxSZFDxioZVPm/4QWgVzm2s= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761225972; c=relaxed/simple; bh=nTPZyNBNXm6/CcBEgex+4RYKED4Z+c7hR2hQbyF4T7Q=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=qWijYtpYIMEQTdTowk0dfnOxiRtsl1/leFJdv/l7zVtrBUJHgL2Mgu6IcGroiE/qC/0ywUVBKENMx9U7whXshZD2t28pMR+XGu6yiQAW7qfhv0tpZZksmB3ZSLWC8lMALqeM0uLoZMZOoI5v1X5VV0rpEvyLY4NLkvfM34WZE34= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc.com header.i=@rivosinc.com header.b=J8BWObZp; arc=none smtp.client-ip=209.85.214.179 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc.com header.i=@rivosinc.com header.b="J8BWObZp" Received: by mail-pl1-f179.google.com with SMTP id d9443c01a7336-28e7cd6dbc0so11146775ad.0 for ; Thu, 23 Oct 2025 06:26:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc.com; s=google; t=1761225969; x=1761830769; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=hPN39yC27jDQNku8S8KBbMUIjGDGL61HkDgx51sdOyA=; b=J8BWObZp3w50lpoXIadGKncJhdESMtk1eD/OiNlf2vheJ0FzNGkOnbP38dBCnyqXlK Up0Vdl49cCybxul/r9zPqe/L34VXQb6/0NB5pck9/hTX8tj+hZkJNDzbCH2w5I5KBY5T LXQ8r1SnISlAbHIWKrdU8h3RqA6zHIgKvIL+xaqymiXKh0EQ1YH+bSruKeonPaGQL4QA F9/LxZaJw+6urNas20bVo1c4Gx4vOba0W1kVaqArRlWS+P80Jhy/zeuZ7m2KbNVKtjj5 n8cqo9SHtFMnnH7NBjbuGxRW3U7/CapeZKAyBN+Qo9BW+v4Fd5bXqI8hhgQjMl+bIAM7 znVg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1761225969; x=1761830769; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hPN39yC27jDQNku8S8KBbMUIjGDGL61HkDgx51sdOyA=; b=Pd+NgWhwq2TJtD745nvd8k/4yO2Sztlfu+FjGFp3KsnGuc1iUW+8QgQIxMmX5h3DWG T0+6mdrDqn4cOC1TDsAl1fBgYqhxAQhk4W77Hx11W7Uyw8qZGFTnfPHrAqGFHsPmBuHI hcXmFap+oZKoYCC1CqJM6A3CBHzkETnLKEzr+pn1NkeYCu0biyjT+DBD8jMk4xD0ijjv IfOLBwdK1XyJhRucSi4rxhmE97CfaDKWsGxTpwH9JMk/oK5eYwBVTOszbwOSYMVsk1zp qMIUXUDdlsOkkwrKp8bOL6Ujjn08fgMsRcCpZiQfoiqeNspeBIfJo1MfGk5MngZsjFNV ablQ== X-Gm-Message-State: AOJu0YxVwD9yfgYxny+wZJgWrK23jtVvcpv9iI1ZVuSHKI+tih1AjLMr 12VmvpgLFDUjhHRumNM8PdkIRWGWcCOfLC18hSKOka/VOywK5Z3vxWV5xFZjqV+TuaA= X-Gm-Gg: ASbGncuAspU4xUPjwh/VS2Xxh2O6GaiGZRFge51obxbNBL7H4PnGFcXLpsdE5m/IbfM DRmV0Pv6Yvb73QyMrAyHgATiVPSic7E2MZTc3cb6azvuO+U0VxpkQhok+WY+VXGkp05ZYWEIkFM kiTklNwHCf8Fqa6wxVEtEQQLhB0d+rlNRwwSCFohB8UiK40FpJSTbPbw80kP7IZWZnyn0T0oBs8 5vuOktreo9lN0Lc2hIdhSmQ9dXX0AYWj3aRXOxsIybgKKeTUsPZ9N9KNC1nqJDJBuJZ/cAjWCad EjJbokwGMfDSwriyzc59jKp6tbdpiGyOOl2u+oX8yiFDKF6GqjFnnZp7ZsZ5LvufH7hrKJsAZlN XBGK9tM04Csz3nQ/+IFyQ3IBSCGdVadJZXGQKxBSNZFm6kSNKfGNYk81ax8aXyi7/XtuTrmVHfX BWmh7gWGRNl7VQUZb2hSh/ X-Google-Smtp-Source: AGHT+IHkhpOHWlBgDScLCO9cWcSbBp7U47616726QSwyOPf8K5or840bOUH3V2O7++QsjKHvru9lOA== X-Received: by 2002:a17:902:f691:b0:290:a32b:909b with SMTP id d9443c01a7336-290cbb49987mr324481725ad.44.1761225968653; Thu, 23 Oct 2025 06:26:08 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2946e23e4b3sm23432035ad.103.2025.10.23.06.26.06 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 23 Oct 2025 06:26:08 -0700 (PDT) From: Deepak Gupta Date: Thu, 23 Oct 2025 06:25:43 -0700 Subject: [PATCH v22 14/28] riscv: Implements arch agnostic indirect branch tracking prctls Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251023-v5_user_cfi_series-v22-14-1d53ce35d8fd@rivosinc.com> References: <20251023-v5_user_cfi_series-v22-0-1d53ce35d8fd@rivosinc.com> In-Reply-To: <20251023-v5_user_cfi_series-v22-0-1d53ce35d8fd@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley , Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , Andreas Hindborg , Alice Ryhl , Trevor Gross , Benno Lossin Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, rust-for-linux@vger.kernel.org, Zong Li , Deepak Gupta X-Mailer: b4 0.13.0 prctls implemented are: PR_SET_INDIR_BR_LP_STATUS, PR_GET_INDIR_BR_LP_STATUS and PR_LOCK_INDIR_BR_LP_STATUS Reviewed-by: Zong Li Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/usercfi.h | 14 +++++++ arch/riscv/kernel/entry.S | 4 ++ arch/riscv/kernel/process.c | 5 +++ arch/riscv/kernel/usercfi.c | 79 ++++++++++++++++++++++++++++++++++++= ++++ 4 files changed, 102 insertions(+) diff --git a/arch/riscv/include/asm/usercfi.h b/arch/riscv/include/asm/user= cfi.h index d71093f414df..4501d741a609 100644 --- a/arch/riscv/include/asm/usercfi.h +++ b/arch/riscv/include/asm/usercfi.h @@ -16,6 +16,8 @@ struct kernel_clone_args; struct cfi_state { unsigned long ubcfi_en : 1; /* Enable for backward cfi. */ unsigned long ubcfi_locked : 1; + unsigned long ufcfi_en : 1; /* Enable for forward cfi. Note that ELP goes= in sstatus */ + unsigned long ufcfi_locked : 1; unsigned long user_shdw_stk; /* Current user shadow stack pointer */ unsigned long shdw_stk_base; /* Base address of shadow stack */ unsigned long shdw_stk_size; /* size of shadow stack */ @@ -32,6 +34,10 @@ bool is_shstk_locked(struct task_struct *task); bool is_shstk_allocated(struct task_struct *task); void set_shstk_lock(struct task_struct *task); void set_shstk_status(struct task_struct *task, bool enable); +bool is_indir_lp_enabled(struct task_struct *task); +bool is_indir_lp_locked(struct task_struct *task); +void set_indir_lp_status(struct task_struct *task, bool enable); +void set_indir_lp_lock(struct task_struct *task); =20 #define PR_SHADOW_STACK_SUPPORTED_STATUS_MASK (PR_SHADOW_STACK_ENABLE) =20 @@ -57,6 +63,14 @@ void set_shstk_status(struct task_struct *task, bool ena= ble); =20 #define set_shstk_status(task, enable) do {} while (0) =20 +#define is_indir_lp_enabled(task) false + +#define is_indir_lp_locked(task) false + +#define set_indir_lp_status(task, enable) do {} while (0) + +#define set_indir_lp_lock(task) do {} while (0) + #endif /* CONFIG_RISCV_USER_CFI */ =20 #endif /* __ASSEMBLER__ */ diff --git a/arch/riscv/kernel/entry.S b/arch/riscv/kernel/entry.S index 8410850953d6..036a6ca7641f 100644 --- a/arch/riscv/kernel/entry.S +++ b/arch/riscv/kernel/entry.S @@ -174,6 +174,10 @@ SYM_CODE_START(handle_exception) * or vector in kernel space. */ li t0, SR_SUM | SR_FS_VS +#ifdef CONFIG_64BIT + li t1, SR_ELP + or t0, t0, t1 +#endif =20 REG_L s0, TASK_TI_USER_SP(tp) csrrc s1, CSR_STATUS, t0 diff --git a/arch/riscv/kernel/process.c b/arch/riscv/kernel/process.c index a137d3483646..49f527e3acfd 100644 --- a/arch/riscv/kernel/process.c +++ b/arch/riscv/kernel/process.c @@ -163,6 +163,11 @@ void start_thread(struct pt_regs *regs, unsigned long = pc, set_shstk_status(current, false); set_shstk_base(current, 0, 0); set_active_shstk(current, 0); + /* + * disable indirect branch tracking on exec. + * libc will enable it later via prctl. + */ + set_indir_lp_status(current, false); =20 #ifdef CONFIG_64BIT regs->status &=3D ~SR_UXL; diff --git a/arch/riscv/kernel/usercfi.c b/arch/riscv/kernel/usercfi.c index 08620bdae696..2ebe789caa6b 100644 --- a/arch/riscv/kernel/usercfi.c +++ b/arch/riscv/kernel/usercfi.c @@ -72,6 +72,35 @@ void set_shstk_lock(struct task_struct *task) task->thread_info.user_cfi_state.ubcfi_locked =3D 1; } =20 +bool is_indir_lp_enabled(struct task_struct *task) +{ + return task->thread_info.user_cfi_state.ufcfi_en; +} + +bool is_indir_lp_locked(struct task_struct *task) +{ + return task->thread_info.user_cfi_state.ufcfi_locked; +} + +void set_indir_lp_status(struct task_struct *task, bool enable) +{ + if (!cpu_supports_indirect_br_lp_instr()) + return; + + task->thread_info.user_cfi_state.ufcfi_en =3D enable ? 1 : 0; + + if (enable) + task->thread.envcfg |=3D ENVCFG_LPE; + else + task->thread.envcfg &=3D ~ENVCFG_LPE; + + csr_write(CSR_ENVCFG, task->thread.envcfg); +} + +void set_indir_lp_lock(struct task_struct *task) +{ + task->thread_info.user_cfi_state.ufcfi_locked =3D 1; +} /* * If size is 0, then to be compatible with regular stack we want it to be= as big as * regular stack. Else PAGE_ALIGN it and return back @@ -371,3 +400,53 @@ int arch_lock_shadow_stack_status(struct task_struct *= task, =20 return 0; } + +int arch_get_indir_br_lp_status(struct task_struct *t, unsigned long __use= r *status) +{ + unsigned long fcfi_status =3D 0; + + if (!cpu_supports_indirect_br_lp_instr()) + return -EINVAL; + + /* indirect branch tracking is enabled on the task or not */ + fcfi_status |=3D (is_indir_lp_enabled(t) ? PR_INDIR_BR_LP_ENABLE : 0); + + return copy_to_user(status, &fcfi_status, sizeof(fcfi_status)) ? -EFAULT = : 0; +} + +int arch_set_indir_br_lp_status(struct task_struct *t, unsigned long statu= s) +{ + bool enable_indir_lp =3D false; + + if (!cpu_supports_indirect_br_lp_instr()) + return -EINVAL; + + /* indirect branch tracking is locked and further can't be modified by us= er */ + if (is_indir_lp_locked(t)) + return -EINVAL; + + /* Reject unknown flags */ + if (status & ~PR_INDIR_BR_LP_ENABLE) + return -EINVAL; + + enable_indir_lp =3D (status & PR_INDIR_BR_LP_ENABLE); + set_indir_lp_status(t, enable_indir_lp); + + return 0; +} + +int arch_lock_indir_br_lp_status(struct task_struct *task, + unsigned long arg) +{ + /* + * If indirect branch tracking is not supported or not enabled on task, + * nothing to lock here + */ + if (!cpu_supports_indirect_br_lp_instr() || + !is_indir_lp_enabled(task) || arg !=3D 0) + return -EINVAL; + + set_indir_lp_lock(task); + + return 0; +} --=20 2.43.0