From nobody Sat Feb 7 07:25:41 2026 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1C4CB31B80D; Wed, 22 Oct 2025 09:57:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761127070; cv=none; b=mRNhNmlflxr/z9Whq8MG8qxZGu0PMFd/gawc8QKdbBb4vo7tSafq6OSJI5csJ55vEYeHHlUzy4L+vXmqQ9Z4grv/rEc2SYA8Tcmj7jglrAZupdIqvsR6SYhCLblU5wEoNURq1NQode+BzDPzRmsUTX/R+jMDk33r9dFdsUPMhSE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761127070; c=relaxed/simple; bh=PzyVA+4IaassXHiYDBcwro8Jeg1BfKKyI4XME+c4zbI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=KI88OpPmpGl6JtJu8hYJX6nqomU8WJ8oKaQxd9VV6Vt9coqmqxosPKBs8kr2Qem5LORYyFD78yjC2v92WUoSw2LUq3DLBcL9I1NnfvVaAkO1Dwr9FPRhVhYo1T0wI6EiRbyjsBKkCljw7KPTCtatbr11J7N685AiQ9WVvRjnEOM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=vaZQl3nd; arc=none smtp.client-ip=198.47.23.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="vaZQl3nd" Received: from lelvem-sh02.itg.ti.com ([10.180.78.226]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTP id 59M9vS711387143; Wed, 22 Oct 2025 04:57:28 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1761127048; bh=Da/XaA3WaCTSdzwdYk0sEhHYo+sgG9siIt2+rDb1DwU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=vaZQl3ndPjmI1KoNdjaFFQeoLrsbwDREm6DPRPz6DzvXTZAS78CUneWEung3wyKL+ 6X9pk/E0KmCzgPrf7fLWvcdYI8nX49yZgzl1PxMR+TPQ3Fmgpi5f2SPjOKDQzig5pc tQLAqFeK0pwOxuUF0J6OQ+i9MqPks2RxdUFfKK+0= Received: from DFLE205.ent.ti.com (dfle205.ent.ti.com [10.64.6.63]) by lelvem-sh02.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 59M9vSeY2266303 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 22 Oct 2025 04:57:28 -0500 Received: from DFLE210.ent.ti.com (10.64.6.68) by DFLE205.ent.ti.com (10.64.6.63) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Wed, 22 Oct 2025 04:57:28 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DFLE210.ent.ti.com (10.64.6.68) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Wed, 22 Oct 2025 04:57:28 -0500 Received: from toolbox.dhcp.ti.com (uda0492258.dhcp.ti.com [10.24.73.74]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 59M9vFcW1029418; Wed, 22 Oct 2025 04:57:22 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , <18255117159@163.com>, , CC: , , , , Subject: [PATCH v4 1/4] PCI: Export pci_get_host_bridge_device() for use by pci-keystone Date: Wed, 22 Oct 2025 15:27:09 +0530 Message-ID: <20251022095724.997218-2-s-vadapalli@ti.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251022095724.997218-1-s-vadapalli@ti.com> References: <20251022095724.997218-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The pci-keystone.c driver uses the 'pci_get_host_bridge_device()' helper. In preparation for enabling the pci-keystone.c driver to be built as a loadable module, export 'pci_get_host_bridge_device()'. Signed-off-by: Siddharth Vadapalli --- v3: https://lore.kernel.org/r/20250922071222.2814937-2-s-vadapalli@ti.com/ Changes since v3: - Rebased patch on 6.18-rc1 tag of Mainline Linux. Regards, Siddharth. drivers/pci/host-bridge.c | 1 + include/linux/pci.h | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/pci/host-bridge.c b/drivers/pci/host-bridge.c index afa50b446567..be5ef6516cff 100644 --- a/drivers/pci/host-bridge.c +++ b/drivers/pci/host-bridge.c @@ -33,6 +33,7 @@ struct device *pci_get_host_bridge_device(struct pci_dev = *dev) kobject_get(&bridge->kobj); return bridge; } +EXPORT_SYMBOL_GPL(pci_get_host_bridge_device); =20 void pci_put_host_bridge_device(struct device *dev) { diff --git a/include/linux/pci.h b/include/linux/pci.h index d1fdf81fbe1e..b253cbc27d36 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -646,6 +646,7 @@ struct pci_host_bridge *pci_alloc_host_bridge(size_t pr= iv); struct pci_host_bridge *devm_pci_alloc_host_bridge(struct device *dev, size_t priv); void pci_free_host_bridge(struct pci_host_bridge *bridge); +struct device *pci_get_host_bridge_device(struct pci_dev *dev); struct pci_host_bridge *pci_find_host_bridge(struct pci_bus *bus); =20 void pci_set_host_bridge_release(struct pci_host_bridge *bridge, --=20 2.51.0 From nobody Sat Feb 7 07:25:41 2026 Received: from fllvem-ot03.ext.ti.com (fllvem-ot03.ext.ti.com [198.47.19.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id EE6932FFF9C; Wed, 22 Oct 2025 09:58:06 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761127092; cv=none; b=qsgekAJ57rBHWFoZwVC/v1/6hK/Ggk18zWpVoojEhapivU6nMBcLONY9IeCBh6qo6xa/QtI4Z6sW8TgsdvsEQA+Zem27wL8w9oIFeZvDChkNnfkN8oqBJBFeplNkngVJZltuZSaSWJh4Qz2sfr4u1lTRipDnLHXNn6p34423TRs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761127092; c=relaxed/simple; bh=BRgu9hnNVZHsgVj0pzqJL+qbJN9qRwliDHyhzZUGgq8=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=ZplPURT1yVuvZ5u4SjT7dEwWAv0w8ojuI6lEhEdcYqfG6oxObvlmFT2okExuoPHSCGV/AP7ziws0wG3pZvyuOHcvLoUuB7SWYc5PdqO4iDf+6HFlaF+MBx5BzScPUJAvP6br3USCaqpspXmBZnP2evB3YCCqXVgnW1sGKlHPtaQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=jwtAsl8A; arc=none smtp.client-ip=198.47.19.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="jwtAsl8A" Received: from lelvem-sh01.itg.ti.com ([10.180.77.71]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTP id 59M9vYJA1376542; Wed, 22 Oct 2025 04:57:34 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1761127054; bh=11ikX1sFn7k/YSRdSbKKr00GnN/L9b+csqVGwtKcwdY=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=jwtAsl8ASyy6in/v9KTdZsJqK/VQHrQyzAN16br0IQq0Y7ZRif+cCd9My5wa5c5Gv pUHiEu8XEE4vgKn5ER3TAB+GLvY1Ts0rkSZrYHWjXgdPx80iO+9nz9RGE+8aPeWL14 +hPVebUkaN/9X2kf93Otipcq9cPVlg186ZpN4SQM= Received: from DLEE201.ent.ti.com (dlee201.ent.ti.com [157.170.170.76]) by lelvem-sh01.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 59M9vYU61842698 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 22 Oct 2025 04:57:34 -0500 Received: from DLEE211.ent.ti.com (157.170.170.113) by DLEE201.ent.ti.com (157.170.170.76) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Wed, 22 Oct 2025 04:57:34 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DLEE211.ent.ti.com (157.170.170.113) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Wed, 22 Oct 2025 04:57:34 -0500 Received: from toolbox.dhcp.ti.com (uda0492258.dhcp.ti.com [10.24.73.74]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 59M9vFcX1029418; Wed, 22 Oct 2025 04:57:28 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , <18255117159@163.com>, , CC: , , , , Subject: [PATCH v4 2/4] PCI: dwc: Export dw_pcie_allocate_domains() and dw_pcie_ep_raise_msix_irq() Date: Wed, 22 Oct 2025 15:27:10 +0530 Message-ID: <20251022095724.997218-3-s-vadapalli@ti.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251022095724.997218-1-s-vadapalli@ti.com> References: <20251022095724.997218-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The pci-keystone.c driver uses the functions 'dw_pcie_allocate_domains()' and 'dw_pcie_ep_raise_msix_irq()'. In preparation for enabling the pci-keystone.c driver to be built as a loadable module, export them. Signed-off-by: Siddharth Vadapalli --- v3: https://lore.kernel.org/r/20250922071222.2814937-3-s-vadapalli@ti.com/ Changes since v3: - Rebased patch on 6.18-rc1 tag of Mainline Linux. Regards, Siddharth. drivers/pci/controller/dwc/pcie-designware-ep.c | 1 + drivers/pci/controller/dwc/pcie-designware-host.c | 1 + 2 files changed, 2 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/= controller/dwc/pcie-designware-ep.c index 7f2112c2fb21..19571ac2b961 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -797,6 +797,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8= func_no, =20 return 0; } +EXPORT_SYMBOL_GPL(dw_pcie_ep_raise_msix_irq); =20 /** * dw_pcie_ep_cleanup - Cleanup DWC EP resources after fundamental reset diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pc= i/controller/dwc/pcie-designware-host.c index 20c9333bcb1c..d74bc571f65d 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -232,6 +232,7 @@ int dw_pcie_allocate_domains(struct dw_pcie_rp *pp) =20 return 0; } +EXPORT_SYMBOL_GPL(dw_pcie_allocate_domains); =20 void dw_pcie_free_msi(struct dw_pcie_rp *pp) { --=20 2.51.0 From nobody Sat Feb 7 07:25:41 2026 Received: from lelvem-ot01.ext.ti.com (lelvem-ot01.ext.ti.com [198.47.23.234]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 8A24A30F7FA; Wed, 22 Oct 2025 09:58:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.23.234 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761127082; cv=none; b=WQ4XkPrjvE9BkQmMyhnpcGj2LJDDkSqORxQ2Obw2G7OuqExsh/2OqovQu4QMemGwsLZI8zbzBsGPpTlGcQmZNuKKebIBJ3t5NOQ+jJHNJEWu+UopT+3q5tKHBT5vIVE6claJRtYEajvUj1a9m5Y9VFEDNwo0dhltIRO/oK6ErbE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761127082; c=relaxed/simple; bh=FogAesqd4Mt9NZ8wTSC3H2sOn2SaiE/yS5P0bR1bJAE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=Lk8WEz9wZYjynu6MxAlmLQBcQoV04DDgDhw2rvWdeSqOkhkLuzk6h9ijpmqvuOLRxpMh5dVji0xEuLbJBi6+d/Fr+jVdA7VW1Mu1jTkVXFa3H3QX76sUyDyAT2TVagIdXYfCwPElq+z84e8/BLO7u91lU6mhzVykroBOMCj2dyI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=vybDvVQO; arc=none smtp.client-ip=198.47.23.234 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="vybDvVQO" Received: from fllvem-sh04.itg.ti.com ([10.64.41.54]) by lelvem-ot01.ext.ti.com (8.15.2/8.15.2) with ESMTP id 59M9vePT1387171; Wed, 22 Oct 2025 04:57:40 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1761127060; bh=eDEFhReKOWDZEG0hPcEbmy3jugGDtcCK/G1R5eTHmUw=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=vybDvVQOA5GclChffIno+kpK+HI6inDgKmoQLvRdfmTckKCoU+Fh5JwwNYdVsKXWi QV7z3WuZvfywmKhqlzA7WS+zW4FeTPW86v6YkUfjfUOvu57uQ5hOaKHIgYwWnngCep 1krRW0KzRCZbOf6ivAUTNbVN2/5auQH7xgEdRLpc= Received: from DFLE206.ent.ti.com (dfle206.ent.ti.com [10.64.6.64]) by fllvem-sh04.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 59M9venf1511720 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 22 Oct 2025 04:57:40 -0500 Received: from DFLE203.ent.ti.com (10.64.6.61) by DFLE206.ent.ti.com (10.64.6.64) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Wed, 22 Oct 2025 04:57:40 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DFLE203.ent.ti.com (10.64.6.61) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Wed, 22 Oct 2025 04:57:40 -0500 Received: from toolbox.dhcp.ti.com (uda0492258.dhcp.ti.com [10.24.73.74]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 59M9vFcY1029418; Wed, 22 Oct 2025 04:57:34 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , <18255117159@163.com>, , CC: , , , , Subject: [PATCH v4 3/4] PCI: keystone: Exit ks_pcie_probe() for invalid mode Date: Wed, 22 Oct 2025 15:27:11 +0530 Message-ID: <20251022095724.997218-4-s-vadapalli@ti.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251022095724.997218-1-s-vadapalli@ti.com> References: <20251022095724.997218-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" Commit under Fixes introduced support for PCIe EP mode on AM654x platforms. When the mode happens to be either "DW_PCIE_RC_TYPE" or "DW_PCIE_EP_TYPE", the PCIe Controller is configured accordingly. However, when the mode is neither of them, an error message is displayed but the driver probe succeeds. Since this "invalid" mode is not associated with a functional PCIe Controller, the probe should fail. Fix the behavior by exiting "ks_pcie_probe()" with the return value of "-EINVAL" in addition to displaying the existing error message when the mode is invalid. Fixes: 23284ad677a9 ("PCI: keystone: Add support for PCIe EP in AM654x Plat= forms") Signed-off-by: Siddharth Vadapalli --- NOTE: As stated in the v3 patch, although a Fixes tag has been added, the patch doesn't have to be backported. Hence, 'stable' hasn't been CCed on purpose. v3: https://lore.kernel.org/r/20250922071222.2814937-4-s-vadapalli@ti.com/ Changes since v3: - Rebased patch on 6.18-rc1 tag of Mainline Linux. Regards, Siddharth. drivers/pci/controller/dwc/pci-keystone.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/contro= ller/dwc/pci-keystone.c index eb00aa380722..25b8193ffbcf 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -1337,6 +1337,8 @@ static int ks_pcie_probe(struct platform_device *pdev) break; default: dev_err(dev, "INVALID device type %d\n", mode); + ret =3D -EINVAL; + goto err_get_sync; } =20 ks_pcie_enable_error_irq(ks_pcie); --=20 2.51.0 From nobody Sat Feb 7 07:25:41 2026 Received: from fllvem-ot03.ext.ti.com (fllvem-ot03.ext.ti.com [198.47.19.245]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 70375321F20; Wed, 22 Oct 2025 09:58:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.47.19.245 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761127097; cv=none; b=MohGABuFmEV2Rvpu+NRjB7o3EzpHfCWFbGc1GGfoKQMu1YLU9hcgWsfdlGz1resPqSlOK0USMgC0khxq0f7Vc4Z/kQV9IIQpZQyplFUpsmJU+kCIS8aaMeLugofS3DE3aqwu0mGUEaJOwq/f8jzIzVF8oF2//MmmM/atkFpwlv4= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761127097; c=relaxed/simple; bh=gtYjiNFtVt8U5a7O4szHCSUSWECRKX71byGeiRWlB80=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=aqvk5jT7op0K8pl+jT7bIyefMlX9EVKQ5kcydMzIkAs/JWrQHOHfx6OuJTYrUdmyOF/1oVGcBe+Cl+Lxw7p1rKP66IsiG6ndKjw+qY3zI5WL/jXXmEy+zBY3i3LCxv63iVPeCU66ovrVJt/coD9PwlHQNN3sKr7e9vPorSF4NU8= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com; spf=pass smtp.mailfrom=ti.com; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b=UoPOWqdB; arc=none smtp.client-ip=198.47.19.245 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=ti.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="UoPOWqdB" Received: from fllvem-sh04.itg.ti.com ([10.64.41.54]) by fllvem-ot03.ext.ti.com (8.15.2/8.15.2) with ESMTP id 59M9vks71376573; Wed, 22 Oct 2025 04:57:46 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1761127066; bh=2nZIhLUJnaxN4ORe7PVQWsIjKw9srIsJK8ggW0ZR304=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=UoPOWqdB7sqfS6fnuIyWWlS5G7zRXF93fUQd5LWwGdTmTSOQZCg4aPyoQ3Le9DBy9 5jccxVyrm/pHxK6On6mWdSDYWVpBOjdDLSbl94Gf1pPoxC98QowAbJKPa0Trn8DzA6 sX87h/sPHTWtpMfeUbJzlsEB9IbIU0fx/ZtUpE1U= Received: from DLEE202.ent.ti.com (dlee202.ent.ti.com [157.170.170.77]) by fllvem-sh04.itg.ti.com (8.18.1/8.18.1) with ESMTPS id 59M9vkmK1511763 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Wed, 22 Oct 2025 04:57:46 -0500 Received: from DLEE210.ent.ti.com (157.170.170.112) by DLEE202.ent.ti.com (157.170.170.77) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Wed, 22 Oct 2025 04:57:45 -0500 Received: from lelvem-mr06.itg.ti.com (10.180.75.8) by DLEE210.ent.ti.com (157.170.170.112) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend Transport; Wed, 22 Oct 2025 04:57:45 -0500 Received: from toolbox.dhcp.ti.com (uda0492258.dhcp.ti.com [10.24.73.74]) by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 59M9vFcZ1029418; Wed, 22 Oct 2025 04:57:40 -0500 From: Siddharth Vadapalli To: , , , , , , , , , , , , , , <18255117159@163.com>, , CC: , , , , Subject: [PATCH v4 4/4] PCI: keystone: Add support to build as a loadable module Date: Wed, 22 Oct 2025 15:27:12 +0530 Message-ID: <20251022095724.997218-5-s-vadapalli@ti.com> X-Mailer: git-send-email 2.51.0 In-Reply-To: <20251022095724.997218-1-s-vadapalli@ti.com> References: <20251022095724.997218-1-s-vadapalli@ti.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-C2ProcessedOrg: 333ef613-75bf-4e12-a4b1-8e3623f5dcea Content-Type: text/plain; charset="utf-8" The 'pci-keystone.c' driver is the application/glue/wrapper driver for the Designware PCIe Controllers on TI SoCs. Now that all of the helper APIs that the 'pci-keystone.c' driver depends upon have been exported for use, enable support to build the driver as a loadable module. Additionally, the functions marked by the '__init' keyword may be invoked: a) After a probe deferral OR b) During a delayed probe - Delay attributed to driver being built as a loadable module In both of the cases mentioned above, the '__init' memory will be freed before the functions are invoked. This results in an exception of the form: Unable to handle kernel paging request at virtual address ... Mem abort info: ... pc : ks_pcie_host_init+0x0/0x540 lr : dw_pcie_host_init+0x170/0x498 ... ks_pcie_host_init+0x0/0x540 (P) ks_pcie_probe+0x728/0x84c platform_probe+0x5c/0x98 really_probe+0xbc/0x29c __driver_probe_device+0x78/0x12c driver_probe_device+0xd8/0x15c ... To address this, introduce a new function namely 'ks_pcie_init()' to register the 'fault handler' while removing the '__init' keyword from existing functions. Signed-off-by: Siddharth Vadapalli --- v3: https://lore.kernel.org/r/20250922071222.2814937-5-s-vadapalli@ti.com/ Changes since v3: - Rebased patch on 6.18-rc1 tag of Mainline Linux. - The '__init' keyword has been removed from functions to avoid triggering an exception due to '__init' memory being freed before functions are invo= ked. This is the equivalent of: https://lore.kernel.org/r/20250912100802.3136121-3-s-vadapalli@ti.com/ while addressing Bjorn's feedback at: https://lore.kernel.org/r/20251002143627.GA267439@bhelgaas/ by introducing 'ks_pcie_init()' function specifically for registering the fault handler while the rest of the driver remains the same. Regards, Siddharth. drivers/pci/controller/dwc/Kconfig | 6 ++-- drivers/pci/controller/dwc/pci-keystone.c | 36 +++++++++++++++-------- 2 files changed, 27 insertions(+), 15 deletions(-) diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dw= c/Kconfig index 349d4657393c..561a7266e21b 100644 --- a/drivers/pci/controller/dwc/Kconfig +++ b/drivers/pci/controller/dwc/Kconfig @@ -483,10 +483,10 @@ config PCI_DRA7XX_EP This uses the DesignWare core. =20 config PCI_KEYSTONE - bool + tristate =20 config PCI_KEYSTONE_HOST - bool "TI Keystone PCIe controller (host mode)" + tristate "TI Keystone PCIe controller (host mode)" depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST depends on PCI_MSI select PCIE_DW_HOST @@ -498,7 +498,7 @@ config PCI_KEYSTONE_HOST DesignWare core functions to implement the driver. =20 config PCI_KEYSTONE_EP - bool "TI Keystone PCIe controller (endpoint mode)" + tristate "TI Keystone PCIe controller (endpoint mode)" depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST depends on PCI_ENDPOINT select PCIE_DW_EP diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/contro= ller/dwc/pci-keystone.c index 25b8193ffbcf..8e53822a903f 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -799,7 +800,7 @@ static int ks_pcie_fault(unsigned long addr, unsigned i= nt fsr, } #endif =20 -static int __init ks_pcie_init_id(struct keystone_pcie *ks_pcie) +static int ks_pcie_init_id(struct keystone_pcie *ks_pcie) { int ret; unsigned int id; @@ -831,7 +832,7 @@ static int __init ks_pcie_init_id(struct keystone_pcie = *ks_pcie) return 0; } =20 -static int __init ks_pcie_host_init(struct dw_pcie_rp *pp) +static int ks_pcie_host_init(struct dw_pcie_rp *pp) { struct dw_pcie *pci =3D to_dw_pcie_from_pp(pp); struct keystone_pcie *ks_pcie =3D to_keystone_pcie(pci); @@ -861,15 +862,6 @@ static int __init ks_pcie_host_init(struct dw_pcie_rp = *pp) if (ret < 0) return ret; =20 -#ifdef CONFIG_ARM - /* - * PCIe access errors that result into OCP errors are caught by ARM as - * "External aborts" - */ - hook_fault_code(17, ks_pcie_fault, SIGBUS, 0, - "Asynchronous external abort"); -#endif - return 0; } =20 @@ -1134,6 +1126,7 @@ static const struct of_device_id ks_pcie_of_match[] = =3D { }, { }, }; +MODULE_DEVICE_TABLE(of, ks_pcie_of_match); =20 static int ks_pcie_probe(struct platform_device *pdev) { @@ -1381,4 +1374,23 @@ static struct platform_driver ks_pcie_driver =3D { .of_match_table =3D ks_pcie_of_match, }, }; -builtin_platform_driver(ks_pcie_driver); + +static int __init ks_pcie_init(void) +{ +#ifdef CONFIG_ARM + /* + * PCIe access errors that result into OCP errors are caught by ARM as + * "External aborts" + */ + if (of_find_matching_node(NULL, ks_pcie_of_match)) + hook_fault_code(17, ks_pcie_fault, SIGBUS, 0, + "Asynchronous external abort"); +#endif + + return platform_driver_register(&ks_pcie_driver); +} +device_initcall(ks_pcie_init); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("PCIe host controller driver for Texas Instruments Keys= tone SoCs"); +MODULE_AUTHOR("Murali Karicheri "); --=20 2.51.0