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([2601:1c0:4502:2d00:8004:e310:f3d:dd0]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-33e223dd9d6sm1257413a91.7.2025.10.21.21.47.10 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Oct 2025 21:47:10 -0700 (PDT) From: Igor Reznichenko To: linux@roeck-us.net, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, corbet@lwn.net, skhan@linuxfoundation.org, david.hunter.linux@gmail.com Cc: linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org Subject: [PATCH 1/5] drivers/hwmon: Add TSC1641 I2C power monitor driver Date: Tue, 21 Oct 2025 21:47:04 -0700 Message-ID: <20251022044708.314287-2-igor@reznichenko.net> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251022044708.314287-1-igor@reznichenko.net> References: <20251022044708.314287-1-igor@reznichenko.net> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a new I2C hwmon driver for the ST Microelectronics TSC1641 16-bit high-precision power monitor. The driver supports reading bus voltage, current, power, and temperature. Sysfs attributes are exposed for shunt resistor value, raw shunt voltage and update interval. The driver integrates with the hwmon subsystem and supports optional ALERT pin polarity configuration. Signed-off-by: Igor Reznichenko --- drivers/hwmon/tsc1641.c | 801 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 801 insertions(+) create mode 100644 drivers/hwmon/tsc1641.c diff --git a/drivers/hwmon/tsc1641.c b/drivers/hwmon/tsc1641.c new file mode 100644 index 000000000000..22b49a7918cf --- /dev/null +++ b/drivers/hwmon/tsc1641.c @@ -0,0 +1,801 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Driver for ST Microelectronics TSC1641 I2C power monitor + * + * 60 V, 16-bit high-precision power monitor with I2C and MIPI I3C interfa= ce + * Datasheet: https://www.st.com/resource/en/datasheet/tsc1641.pdf + * + * Copyright (C) 2025 Igor Reznichenko + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* I2C registers */ +#define TSC1641_CONFIG 0x00 +#define TSC1641_SHUNT_VOLTAGE 0x01 +#define TSC1641_LOAD_VOLTAGE 0x02 +#define TSC1641_POWER 0x03 +#define TSC1641_CURRENT 0x04 +#define TSC1641_TEMP 0x05 +#define TSC1641_MASK 0x06 +#define TSC1641_FLAG 0x07 +#define TSC1641_RSHUNT 0x08 /* Shunt resistance */ +#define TSC1641_SOL 0x09 +#define TSC1641_SUL 0x0A +#define TSC1641_LOL 0x0B +#define TSC1641_LUL 0x0C +#define TSC1641_POL 0x0D +#define TSC1641_TOL 0x0E +#define TSC1641_MANUF_ID 0xFE /* 0x0006 */ +#define TSC1641_DIE_ID 0xFF /* 0x1000 */ +#define TSC1641_MAX_REG 0xFF + +#define TSC1641_RSHUNT_DEFAULT 0x0000 +#define TSC1641_CONFIG_DEFAULT 0x003F /* Enable temperature sensor */ + +/* Bit mask for conversion time in the configuration register */ +#define TSC1641_CONV_TIME_MASK GENMASK(7, 4) + +#define TSC1641_CONV_TIME_DEFAULT 1024 +#define TSC1641_MIN_UPDATE_INTERVAL 1024 + +/* LSB value of different registers */ +#define TSC1641_VLOAD_LSB_MILLIVOLT 2 +#define TSC1641_POWER_LSB_MICROWATT 25000 +#define TSC1641_VSHUNT_LSB_NANOVOLT 2500 /* Use nanovolts to make it integ= er */ +#define TSC1641_RSHUNT_LSB_UOHM 10 +#define TSC1641_TEMP_LSB_MILLIDEGC 500 + +/* Bit masks for enabling limit alerts in TSC1641_MASK*/ +#define TSC1641_SHUNT_OV_MASK BIT(15) +#define TSC1641_SHUNT_UV_MASK BIT(14) +#define TSC1641_LOAD_OV_MASK BIT(13) +#define TSC1641_LOAD_UV_MASK BIT(12) +#define TSC1641_POWER_OVER_MASK BIT(11) +#define TSC1641_TEMP_OVER_MASK BIT(10) +#define TSC1641_ALERT_POL_MASK BIT(1) +#define TSC1641_ALERT_LATCH_EN_MASK BIT(0) + +/* Flags indicating alerts in TSC1641_FLAG register*/ +#define TSC1641_SHUNT_OV_FLAG BIT(6) +#define TSC1641_SHUNT_UV_FLAG BIT(5) +#define TSC1641_LOAD_OV_FLAG BIT(4) +#define TSC1641_LOAD_UV_FLAG BIT(3) +#define TSC1641_POWER_OVER_FLAG BIT(2) +#define TSC1641_TEMP_OVER_FLAG BIT(1) + +static bool tsc1641_writeable_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case TSC1641_CONFIG: + case TSC1641_MASK: + case TSC1641_RSHUNT: + case TSC1641_SOL: + case TSC1641_SUL: + case TSC1641_LOL: + case TSC1641_LUL: + case TSC1641_POL: + case TSC1641_TOL: + return true; + default: + return false; + } +} + +static bool tsc1641_volatile_reg(struct device *dev, unsigned int reg) +{ + switch (reg) { + case TSC1641_SHUNT_VOLTAGE: + case TSC1641_LOAD_VOLTAGE: + case TSC1641_POWER: + case TSC1641_CURRENT: + case TSC1641_TEMP: + case TSC1641_FLAG: + case TSC1641_MANUF_ID: + case TSC1641_DIE_ID: + return true; + default: + return false; + } +} + +static const struct regmap_config tsc1641_regmap_config =3D { + .reg_bits =3D 8, + .val_bits =3D 16, + .use_single_write =3D true, + .use_single_read =3D true, + .max_register =3D TSC1641_MAX_REG, + .cache_type =3D REGCACHE_MAPLE, + .volatile_reg =3D tsc1641_volatile_reg, + .writeable_reg =3D tsc1641_writeable_reg, +}; + +struct tsc1641_data { + long rshunt_uohm; + long current_lsb_uA; + /* protects register data during updates */ + struct mutex update_lock; + struct regmap *regmap; + struct i2c_client *client; +}; + +static int tsc1641_set_shunt(struct tsc1641_data *data, u32 val) +{ + struct regmap *regmap =3D data->regmap; + + if (!val) + return 0; + + data->rshunt_uohm =3D val; + long mohm =3D DIV_ROUND_CLOSEST(data->rshunt_uohm, 1000); + + data->current_lsb_uA =3D DIV_ROUND_CLOSEST(TSC1641_VSHUNT_LSB_NANOVOLT, m= ohm); + /* RSHUNT register LSB is 10uOhm so need to divide further*/ + long rshunt_reg =3D DIV_ROUND_CLOSEST(data->rshunt_uohm, TSC1641_RSHUNT_L= SB_UOHM); + int ret =3D regmap_write(regmap, TSC1641_RSHUNT, rshunt_reg); + + if (ret < 0) + return ret; + + return 0; +} + +/* + * Conversion times in uS, value in CONFIG[CT3:CT0] corresponds to index i= n this array + * See "Table 14. CT3 to CT0: conversion time" in: + * https://www.st.com/resource/en/datasheet/tsc1641.pdf + */ +static const int tsc1641_conv_times[] =3D { 128, 256, 512, 1024, 2048, 409= 6, 8192, 16384, 32768 }; + +static int tsc1641_reg_to_upd_interval(u16 config) +{ + int idx =3D FIELD_GET(TSC1641_CONV_TIME_MASK, config); + + idx =3D clamp_val(idx, 0, ARRAY_SIZE(tsc1641_conv_times) - 1); + int conv_time =3D tsc1641_conv_times[idx]; + + /* Don't support sub-millisecond update interval as it's not supported in= hwmon */ + conv_time =3D max(conv_time, TSC1641_MIN_UPDATE_INTERVAL); + /* Return nearest value in milliseconds */ + return DIV_ROUND_CLOSEST(conv_time, 1000); +} + +static u16 tsc1641_upd_interval_to_reg(long interval) +{ + /* Supported interval is 1ms - 33ms */ + interval =3D clamp_val(interval, 1, 33); + + int conv =3D interval * 1000; + int conv_bits =3D find_closest(conv, tsc1641_conv_times, + ARRAY_SIZE(tsc1641_conv_times)); + + return FIELD_PREP(TSC1641_CONV_TIME_MASK, conv_bits); +} + +static int tsc1641_chip_write(struct device *dev, u32 attr, long val) +{ + struct tsc1641_data *data =3D dev_get_drvdata(dev); + + switch (attr) { + case hwmon_chip_update_interval: + return regmap_update_bits(data->regmap, TSC1641_CONFIG, + TSC1641_CONV_TIME_MASK, + tsc1641_upd_interval_to_reg(val)); + default: + return -EOPNOTSUPP; + } +} + +static int tsc1641_chip_read(struct device *dev, u32 attr, long *val) +{ + struct tsc1641_data *data =3D dev_get_drvdata(dev); + u32 regval; + int ret; + + switch (attr) { + case hwmon_chip_update_interval: + ret =3D regmap_read(data->regmap, TSC1641_CONFIG, ®val); + if (ret) + return ret; + + *val =3D tsc1641_reg_to_upd_interval(regval); + break; + default: + return -EOPNOTSUPP; + } + return 0; +} + +static int tsc1641_reg_to_value(struct tsc1641_data *data, u8 reg, unsigne= d int regval) +{ + int val; + + switch (reg) { + case TSC1641_SHUNT_VOLTAGE: + val =3D (s16)regval * TSC1641_VSHUNT_LSB_NANOVOLT; + /* Return microvolts */ + return DIV_ROUND_CLOSEST(val, 1000); + case TSC1641_SOL: + fallthrough; + case TSC1641_SUL: + /* Used for current limits only, so return current in mA */ + val =3D (s16)regval * data->current_lsb_uA; + return DIV_ROUND_CLOSEST(val, 1000); + case TSC1641_LOL: + fallthrough; + case TSC1641_LUL: + fallthrough; + case TSC1641_LOAD_VOLTAGE: + return (regval * TSC1641_VLOAD_LSB_MILLIVOLT); + case TSC1641_POWER: + fallthrough; + case TSC1641_POL: + return (regval * TSC1641_POWER_LSB_MICROWATT); + case TSC1641_CURRENT: + val =3D regval * data->current_lsb_uA; + /* Current in milliamps */ + return DIV_ROUND_CLOSEST(val, 1000); + case TSC1641_TEMP: + fallthrough; + case TSC1641_TOL: + return (regval * TSC1641_TEMP_LSB_MILLIDEGC); + default: + WARN_ON_ONCE(1); + return 0; + } +} + +static int tsc1641_value_to_reg(struct tsc1641_data *data, u8 reg, unsigne= d int val) +{ + int regval; + + switch (reg) { + case TSC1641_SOL: + fallthrough; + case TSC1641_SUL: + /* value is in milliamps, so convert to voltage first */ + regval =3D (s16)val * data->rshunt_uohm; + regval =3D DIV_ROUND_CLOSEST(regval, TSC1641_VSHUNT_LSB_NANOVOLT); + return clamp_val(regval, SHRT_MIN, SHRT_MAX); + case TSC1641_LOL: + fallthrough; + case TSC1641_LUL: + regval =3D DIV_ROUND_CLOSEST(val, TSC1641_VLOAD_LSB_MILLIVOLT); + return clamp_val(regval, 0, USHRT_MAX); + case TSC1641_POL: + regval =3D DIV_ROUND_CLOSEST(val, TSC1641_POWER_LSB_MICROWATT); + return clamp_val(regval, 0, USHRT_MAX); + case TSC1641_TOL: + regval =3D DIV_ROUND_CLOSEST(val, TSC1641_TEMP_LSB_MILLIDEGC); + return clamp_val(regval, 0, USHRT_MAX); + default: + /* shouldn't be here */ + WARN_ON_ONCE(1); + return 0; + } +} + +static int tsc1641_alert_limit_read(struct tsc1641_data *data, u32 mask, i= nt reg, long *val) +{ + struct regmap *regmap =3D data->regmap; + int regval; + int ret; + + mutex_lock(&data->update_lock); + ret =3D regmap_read(regmap, TSC1641_MASK, ®val); + if (ret) + goto abort; + + if (regval & mask) { + ret =3D regmap_read(regmap, reg, ®val); + if (ret) + goto abort; + *val =3D tsc1641_reg_to_value(data, reg, regval); + } else { + *val =3D 0; + } +abort: + mutex_unlock(&data->update_lock); + return ret; +} + +static int tsc1641_alert_limit_write(struct tsc1641_data *data, u32 mask, = int limit_reg, + long val) +{ + struct regmap *regmap =3D data->regmap; + int ret; + + if (val < 0) + return -EINVAL; + + /* + * Disable alert mask first, then write the value and enable alert mask + */ + mutex_lock(&data->update_lock); + ret =3D regmap_update_bits(regmap, TSC1641_MASK, mask, 0); + if (ret < 0) + goto abort; + ret =3D regmap_write(regmap, limit_reg, tsc1641_value_to_reg(data, limit_= reg, val)); + if (ret < 0) + goto abort; + + if (val) + ret =3D regmap_update_bits(regmap, TSC1641_MASK, mask, mask); +abort: + mutex_unlock(&data->update_lock); + return ret; +} + +static int tsc1641_alert_read(struct regmap *regmap, u32 flag, long *val) +{ + unsigned int regval; + int ret; + + ret =3D regmap_read_bypassed(regmap, TSC1641_FLAG, ®val); + if (ret) + return ret; + + *val =3D !!(regval & flag); + return 0; +} + +static int tsc1641_in_read(struct device *dev, u32 attr, long *val) +{ + struct tsc1641_data *data =3D dev_get_drvdata(dev); + struct regmap *regmap =3D data->regmap; + unsigned int regval; + int ret; + + switch (attr) { + case hwmon_in_input: + ret =3D regmap_read(regmap, TSC1641_LOAD_VOLTAGE, ®val); + if (ret) + return ret; + *val =3D tsc1641_reg_to_value(data, TSC1641_LOAD_VOLTAGE, regval); + break; + case hwmon_in_lcrit: + return tsc1641_alert_limit_read(data, TSC1641_LOAD_UV_MASK, TSC1641_LUL,= val); + case hwmon_in_crit: + return tsc1641_alert_limit_read(data, TSC1641_LOAD_OV_MASK, TSC1641_LOL,= val); + case hwmon_in_lcrit_alarm: + return tsc1641_alert_read(regmap, TSC1641_LOAD_UV_FLAG, val); + case hwmon_in_crit_alarm: + return tsc1641_alert_read(regmap, TSC1641_LOAD_OV_FLAG, val); + default: + return -EOPNOTSUPP; + } + return 0; +} + +static int tsc1641_curr_read(struct device *dev, u32 attr, long *val) +{ + struct tsc1641_data *data =3D dev_get_drvdata(dev); + struct regmap *regmap =3D data->regmap; + unsigned int regval; + int ret; + + /* Current limits are the shunt under/over voltage limits */ + switch (attr) { + case hwmon_curr_input: + ret =3D regmap_read(regmap, TSC1641_CURRENT, ®val); + if (ret) + return ret; + *val =3D tsc1641_reg_to_value(data, TSC1641_CURRENT, regval); + break; + case hwmon_curr_lcrit: + return tsc1641_alert_limit_read(data, TSC1641_SHUNT_UV_MASK, + TSC1641_SUL, val); + case hwmon_curr_crit: + return tsc1641_alert_limit_read(data, TSC1641_SHUNT_OV_MASK, + TSC1641_SOL, val); + case hwmon_curr_lcrit_alarm: + return tsc1641_alert_read(regmap, TSC1641_SHUNT_UV_FLAG, val); + case hwmon_curr_crit_alarm: + return tsc1641_alert_read(regmap, TSC1641_SHUNT_OV_FLAG, val); + default: + return -EOPNOTSUPP; + } + return 0; +} + +static int tsc1641_power_read(struct device *dev, u32 attr, long *val) +{ + struct tsc1641_data *data =3D dev_get_drvdata(dev); + struct regmap *regmap =3D data->regmap; + unsigned int regval; + int ret; + + switch (attr) { + case hwmon_power_input: + ret =3D regmap_read(regmap, TSC1641_POWER, ®val); + if (ret) + return ret; + *val =3D tsc1641_reg_to_value(data, TSC1641_POWER, regval); + break; + case hwmon_power_crit: + return tsc1641_alert_limit_read(data, TSC1641_POWER_OVER_MASK, + TSC1641_POL, val); + case hwmon_power_crit_alarm: + return tsc1641_alert_read(regmap, TSC1641_POWER_OVER_FLAG, val); + default: + return -EOPNOTSUPP; + } + return 0; +} + +static int tsc1641_temp_read(struct device *dev, u32 attr, long *val) +{ + struct tsc1641_data *data =3D dev_get_drvdata(dev); + struct regmap *regmap =3D data->regmap; + unsigned int regval; + int ret; + + switch (attr) { + case hwmon_temp_input: + ret =3D regmap_read(regmap, TSC1641_TEMP, ®val); + if (ret) + return ret; + *val =3D tsc1641_reg_to_value(data, TSC1641_TEMP, regval); + break; + case hwmon_temp_crit: + return tsc1641_alert_limit_read(data, TSC1641_TEMP_OVER_MASK, + TSC1641_TOL, val); + case hwmon_temp_crit_alarm: + return tsc1641_alert_read(regmap, TSC1641_TEMP_OVER_FLAG, val); + default: + return -EOPNOTSUPP; + } + return 0; +} + +static int tsc1641_in_write(struct device *dev, u32 attr, long val) +{ + struct tsc1641_data *data =3D dev_get_drvdata(dev); + + switch (attr) { + case hwmon_in_lcrit: + return tsc1641_alert_limit_write(data, TSC1641_LOAD_UV_MASK, TSC1641_LUL= , val); + case hwmon_in_crit: + return tsc1641_alert_limit_write(data, TSC1641_LOAD_OV_MASK, TSC1641_LOL= , val); + default: + return -EOPNOTSUPP; + } + return 0; +} + +static int tsc1641_curr_write(struct device *dev, u32 attr, long val) +{ + struct tsc1641_data *data =3D dev_get_drvdata(dev); + + switch (attr) { + case hwmon_curr_lcrit: + return tsc1641_alert_limit_write(data, TSC1641_SHUNT_UV_MASK, + TSC1641_SUL, val); + case hwmon_curr_crit: + return tsc1641_alert_limit_write(data, TSC1641_SHUNT_OV_MASK, + TSC1641_SOL, val); + default: + return -EOPNOTSUPP; + } + return 0; +} + +static int tsc1641_power_write(struct device *dev, u32 attr, long val) +{ + struct tsc1641_data *data =3D dev_get_drvdata(dev); + + switch (attr) { + case hwmon_power_crit: + return tsc1641_alert_limit_write(data, TSC1641_POWER_OVER_MASK, + TSC1641_POL, val); + default: + return -EOPNOTSUPP; + } + return 0; +} + +static int tsc1641_temp_write(struct device *dev, u32 attr, long val) +{ + struct tsc1641_data *data =3D dev_get_drvdata(dev); + + switch (attr) { + case hwmon_temp_crit: + return tsc1641_alert_limit_write(data, TSC1641_TEMP_OVER_MASK, + TSC1641_TOL, val); + default: + return -EOPNOTSUPP; + } + return 0; +} + +static umode_t tsc1641_is_visible(const void *data, enum hwmon_sensor_type= s type, + u32 attr, int channel) +{ + switch (type) { + case hwmon_chip: + switch (attr) { + case hwmon_chip_update_interval: + return 0644; + default: + break; + } + break; + case hwmon_in: + switch (attr) { + case hwmon_in_input: + return 0444; + case hwmon_in_lcrit: + case hwmon_in_crit: + return 0644; + case hwmon_in_lcrit_alarm: + case hwmon_in_crit_alarm: + return 0444; + default: + break; + } + break; + case hwmon_curr: + switch (attr) { + case hwmon_curr_input: + return 0444; + case hwmon_curr_lcrit: + case hwmon_curr_crit: + return 0644; + case hwmon_curr_lcrit_alarm: + case hwmon_curr_crit_alarm: + return 0444; + default: + break; + } + break; + case hwmon_power: + switch (attr) { + case hwmon_power_input: + return 0444; + case hwmon_power_crit: + return 0644; + case hwmon_power_crit_alarm: + return 0444; + default: + break; + } + break; + case hwmon_temp: + switch (attr) { + case hwmon_temp_input: + return 0444; + case hwmon_temp_crit: + return 0644; + case hwmon_temp_crit_alarm: + return 0444; + default: + break; + } + break; + default: + break; + } + return 0; +} + +static int tsc1641_read(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long *val) +{ + switch (type) { + case hwmon_chip: + return tsc1641_chip_read(dev, attr, val); + case hwmon_in: + return tsc1641_in_read(dev, attr, val); + case hwmon_curr: + return tsc1641_curr_read(dev, attr, val); + case hwmon_power: + return tsc1641_power_read(dev, attr, val); + case hwmon_temp: + return tsc1641_temp_read(dev, attr, val); + default: + return -EOPNOTSUPP; + } +} + +static int tsc1641_write(struct device *dev, enum hwmon_sensor_types type, + u32 attr, int channel, long val) +{ + switch (type) { + case hwmon_chip: + return tsc1641_chip_write(dev, attr, val); + case hwmon_in: + return tsc1641_in_write(dev, attr, val); + case hwmon_curr: + return tsc1641_curr_write(dev, attr, val); + case hwmon_power: + return tsc1641_power_write(dev, attr, val); + case hwmon_temp: + return tsc1641_temp_write(dev, attr, val); + default: + return -EOPNOTSUPP; + } +} + +static const struct hwmon_channel_info * const tsc1641_info[] =3D { + HWMON_CHANNEL_INFO(chip, + HWMON_C_UPDATE_INTERVAL), + HWMON_CHANNEL_INFO(in, + HWMON_I_INPUT | HWMON_I_CRIT | HWMON_I_CRIT_ALARM | + HWMON_I_LCRIT | HWMON_I_LCRIT_ALARM), + HWMON_CHANNEL_INFO(curr, + HWMON_C_INPUT | HWMON_C_CRIT | HWMON_C_CRIT_ALARM | + HWMON_C_LCRIT | HWMON_C_LCRIT_ALARM), + HWMON_CHANNEL_INFO(power, + HWMON_P_INPUT | HWMON_P_CRIT | HWMON_P_CRIT_ALARM), + HWMON_CHANNEL_INFO(temp, + HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_CRIT_ALARM), + NULL +}; + +static ssize_t shunt_resistor_show(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct tsc1641_data *data =3D dev_get_drvdata(dev); + + return sysfs_emit(buf, "%li\n", data->rshunt_uohm); +} + +static ssize_t shunt_voltage_uvolts_show(struct device *dev, + struct device_attribute *da, char *buf) +{ + struct tsc1641_data *data =3D dev_get_drvdata(dev); + struct regmap *regmap =3D data->regmap; + unsigned int regval; + int ret; + + ret =3D regmap_read(regmap, TSC1641_SHUNT_VOLTAGE, ®val); + if (ret) + return ret; + int val =3D tsc1641_reg_to_value(data, TSC1641_SHUNT_VOLTAGE, regval); + + return sysfs_emit(buf, "%d\n", val); +} + +static ssize_t shunt_resistor_store(struct device *dev, + struct device_attribute *da, + const char *buf, size_t count) +{ + struct tsc1641_data *data =3D dev_get_drvdata(dev); + unsigned long val; + int ret; + + ret =3D kstrtoul(buf, 10, &val); + if (ret < 0) + return ret; + + mutex_lock(&data->update_lock); + ret =3D tsc1641_set_shunt(data, val); + mutex_unlock(&data->update_lock); + if (ret < 0) + return ret; + return count; +} + +static const struct hwmon_ops tsc1641_hwmon_ops =3D { + .is_visible =3D tsc1641_is_visible, + .read =3D tsc1641_read, + .write =3D tsc1641_write, +}; + +static const struct hwmon_chip_info tsc1641_chip_info =3D { + .ops =3D &tsc1641_hwmon_ops, + .info =3D tsc1641_info, +}; + +static DEVICE_ATTR_RW(shunt_resistor); +static DEVICE_ATTR_RO(shunt_voltage_uvolts); + +/* Rshunt and shunt voltage value is exposed via sysfs attributes */ +static struct attribute *tsc1641_attrs[] =3D { + &dev_attr_shunt_resistor.attr, + &dev_attr_shunt_voltage_uvolts.attr, + NULL, +}; +ATTRIBUTE_GROUPS(tsc1641); + +static int tsc1641_init(struct device *dev, struct tsc1641_data *data) +{ + struct regmap *regmap =3D data->regmap; + u32 shunt; + int ret; + + if (device_property_read_u32(dev, "shunt-resistor", &shunt) < 0) { + shunt =3D TSC1641_RSHUNT_DEFAULT; + dev_info(dev, "using default shunt-resistor value =3D%u uOhm\n", + shunt); + } + + ret =3D tsc1641_set_shunt(data, shunt); + if (ret < 0) + return ret; + + ret =3D regmap_write(regmap, TSC1641_CONFIG, TSC1641_CONFIG_DEFAULT); + if (ret < 0) + return ret; + + bool active_high =3D device_property_read_bool(dev, "st,alert-polarity-ac= tive-high"); + + regmap_update_bits(regmap, TSC1641_MASK, TSC1641_ALERT_POL_MASK, + FIELD_PREP(TSC1641_ALERT_POL_MASK, active_high)); + + return 0; +} + +static int tsc1641_probe(struct i2c_client *client) +{ + struct device *dev =3D &client->dev; + struct tsc1641_data *data; + struct device *hwmon_dev; + int ret; + + data =3D devm_kzalloc(dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->client =3D client; + mutex_init(&data->update_lock); + + data->regmap =3D devm_regmap_init_i2c(client, &tsc1641_regmap_config); + if (IS_ERR(data->regmap)) { + dev_err(dev, "failed to allocate register map\n"); + return PTR_ERR(data->regmap); + } + + ret =3D tsc1641_init(dev, data); + if (ret < 0) + return dev_err_probe(dev, ret, "failed to configure device\n"); + + hwmon_dev =3D devm_hwmon_device_register_with_info(dev, client->name, + data, &tsc1641_chip_info, tsc1641_groups); + if (IS_ERR(hwmon_dev)) + return PTR_ERR(hwmon_dev); + + dev_info(dev, "power monitor %s (Rshunt =3D %li uOhm)\n", + client->name, data->rshunt_uohm); + + return 0; +} + +static const struct i2c_device_id tsc1641_id[] =3D { + { "tsc1641", 0 }, + { } +}; +MODULE_DEVICE_TABLE(i2c, tsc1641_id); + +static const struct of_device_id __maybe_unused tsc1641_of_match[] =3D { + { .compatible =3D "st,tsc1641" }, + { }, +}; +MODULE_DEVICE_TABLE(of, tsc1641_of_match); + +static struct i2c_driver tsc1641_driver =3D { + .driver =3D { + .name =3D "tsc1641", + .of_match_table =3D of_match_ptr(tsc1641_of_match), + }, + .probe =3D tsc1641_probe, + .id_table =3D tsc1641_id, +}; + +module_i2c_driver(tsc1641_driver); + +MODULE_AUTHOR("Igor Reznichenko "); +MODULE_DESCRIPTION("tsc1641 driver"); +MODULE_LICENSE("GPL"); + --=20 2.43.0 From nobody Sat Feb 7 16:26:49 2026 Received: from mail-pj1-f48.google.com (mail-pj1-f48.google.com [209.85.216.48]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 82DB02D738A for ; Wed, 22 Oct 2025 04:47:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.48 ARC-Seal: i=1; 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([2601:1c0:4502:2d00:8004:e310:f3d:dd0]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-33e223dd9d6sm1257413a91.7.2025.10.21.21.47.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Oct 2025 21:47:11 -0700 (PDT) From: Igor Reznichenko To: linux@roeck-us.net, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, corbet@lwn.net, skhan@linuxfoundation.org, david.hunter.linux@gmail.com Cc: linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org Subject: [PATCH 2/5] drivers/hwmon: Add Kconfig entry for TSC1641 Date: Tue, 21 Oct 2025 21:47:05 -0700 Message-ID: <20251022044708.314287-3-igor@reznichenko.net> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251022044708.314287-1-igor@reznichenko.net> References: <20251022044708.314287-1-igor@reznichenko.net> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a Kconfig entry for the TSC1641 driver under the HWMON_I2C menu. The driver can be built as a module or built-in. Default is module. Signed-off-by: Igor Reznichenko --- drivers/hwmon/Kconfig | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 2760feb9f83b..b9d7b02932a6 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig @@ -2434,6 +2434,18 @@ config SENSORS_TMP513 This driver can also be built as a module. If so, the module will be called tmp513. =20 +config SENSORS_TSC1641 + tristate "ST Microelectronics TSC1641 Power Monitor" + depends on I2C + select REGMAP_I2C + help + If you say yes here you get support for TSC1641 power monitor chip. + The TSC1641 driver is configured for the default configuration of + the part except temperature is enabled by default. + + This driver can also be built as a module. If so, the module + will be called tsc1641. + config SENSORS_VEXPRESS tristate "Versatile Express" depends on VEXPRESS_CONFIG --=20 2.43.0 From nobody Sat Feb 7 16:26:49 2026 Received: from mail-pf1-f180.google.com (mail-pf1-f180.google.com [209.85.210.180]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9D3F22D6E78 for ; Wed, 22 Oct 2025 04:47:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.210.180 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761108435; cv=none; b=q18xFX/EysHEfWa/3yf4YN0gHyIPpBHBNeK2u7zQchWTNFlvs/BlBZ9lWndrzXGHYvpbxNt9DKZCjilgZsNq0fcV/6uhY5xtlI64RSmBSyxluE8Cxupaxfvl6xOlcILGN/ZiKtLRpkP9YdU3KtMuedo5e5kFVUKiSRnwQdCLunk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761108435; c=relaxed/simple; bh=CHAFGElaJJM6vqsKWvce129HGl6ku8z5jgSnDpe1PuU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PYM6usrnuDWDo48O7nFx54h5w2M7o3TMP82xUzoFGghj3dz9zJdmf3JWBydcqDy2fpXRqraP+FUpNqgejBjLnOVdlpoQT04Be81rY1dptxwFrjbQMRSldKgPhHVEsrjV0ywU2dVYYwsUifOB+b/oyGR/ZXtSmvbjhm4L3X3LoPA= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=reznichenko.net; spf=none smtp.mailfrom=dpplabs.com; dkim=pass (2048-bit key) header.d=reznichenko.net header.i=@reznichenko.net header.b=rF7nshgX; arc=none smtp.client-ip=209.85.210.180 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=reznichenko.net Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=dpplabs.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=reznichenko.net header.i=@reznichenko.net header.b="rF7nshgX" Received: by mail-pf1-f180.google.com with SMTP id d2e1a72fcca58-7a1603a098eso4009670b3a.1 for ; Tue, 21 Oct 2025 21:47:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=reznichenko.net; s=google; t=1761108433; x=1761713233; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=ARDIlFsexdBsHJ/mYs4iJ+oZYHRCoUuyGXAqhk97moc=; b=rF7nshgXo7uLWccNn8t3L3wsY52chgNtUSL9hqUWGGTd6XqbOaUCAewttCL4ri3VwA UGaATqZsZ9wBBpWsmMWU1vuFkndFhXHucZk43f2GrDRRnwhG1uCuE3FA4Qp+DXPx3LgR vjyyP79ojAdFZnC7nCNZuu2y69ee9g/uu2sn5lLZvVaEB77Ljs/4drlkfE/xQJf/pQC5 BrOJsKUykA2ZWgigl3C6zfYfqX0eCS/X8UoBahklqNQryMA7OvOlJguwieo6vdQTByHm mXsqd90SKiS2xGb1ihNWdOm8MphCX8DbYNFVzib6Ftl04OZKs74YCdvSZnZ2nwq9VNgD PnMQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1761108433; x=1761713233; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=ARDIlFsexdBsHJ/mYs4iJ+oZYHRCoUuyGXAqhk97moc=; b=rNYbvE49Yw7I5BNIdVpoOoL6YMxAQOmAM+KqkG+zvZkk5DPWQm9eUCNtqyco/5X7Ht t5t0rqsShDEBhV8AEim26GJUl88lSe1ju7a/wgB9md3DULFA8J49uINzVCFYaVIVwJDm GdatJNwhpKgL7aS+OPQTmTvZezDlnGnxrkPhX+GPrtVVgSGmwOQqsAwNgUy7vp0Ie3Wy G+wWCNdEDxZ62kc9KFhBmd4xvuS9ENj7Hj219M1LYgHxYf7EykFj3SJDYbwfe2waWW3O z++yvwwVpZAT5ZNMN9eijEwTZ2BmqZGgGjwzGcc/qe+Lk2Wxs8pCHo7LrT59zHBGroBh Cb1Q== X-Forwarded-Encrypted: i=1; AJvYcCWrCPg/sS4Bz46fnSfy2Ssk57uTgCfEQEsqU2yWysqzFU8TUug22Mc9LyV/QeaRxed8aE9CD3wQ/T3fIec=@vger.kernel.org X-Gm-Message-State: AOJu0Ywj1IFuctZVOTAV5IADfB4x0jM0AbP5Mtodza+HS0RG6XBjceRZ CJ/BMKqjiMw0BBh6DUSRXZapCuvggKIru/J8/D8nuvjhxteUcx83adcu7eP0fi+4b58= X-Gm-Gg: ASbGncucINmVm85yk++m6hQHyhlyOJQKRnKtKD0K7oWTS3JT9aQ6hMHU8eoXRZKeCD0 y/2hVTrcK6a/lshMHVbFl9WU0AXktYcEPMhDQQDQYtN0IdzHpLIBvwy17gXV1UxikZIZ7YqeMh3 fhg3MDwRsfltlbSph5mtNsY5j1LJ0gwqCGgp7hY8VKG7Ud87jQYbxQyJGlarDcqsscL1GhFd7Co r8EvFWRNtMhA+M9jp47VKR6xkszZ39WZZW9xeIJZ6fCXIgDnmSGGDmIX8+VeTFDh3+Tcub48Ne7 p7Eczndo/53XOcJ2TflX5unRwE9+wVJ8rKXl33HSH2pqfzJoWMSV6SAE3DevCfGU4+lZ5gC5JTb fhzbu6Assav2npqR+KNwc/kPrudhYm4BUtN/coR49ERxVl80Hpa2pytB/7PEuH0pl9hAD9YOWeb Z+WPbX46jXC1TWca17pAVuWyowJA== X-Google-Smtp-Source: AGHT+IG7v2tgI6or6tIkrpsvq7pRrpwD1oTrsV+QwYIgQi2vxNVriCFRUTuiKuUNQqyqsYpRcg54FA== X-Received: by 2002:a05:6a21:998f:b0:2c1:17d4:4139 with SMTP id adf61e73a8af0-334a86108e5mr23495747637.29.1761108432842; Tue, 21 Oct 2025 21:47:12 -0700 (PDT) Received: from z440.. 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Signed-off-by: Igor Reznichenko --- drivers/hwmon/Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index 73b2abdcc6dd..a8de5bc69f2a 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile @@ -233,6 +233,7 @@ obj-$(CONFIG_SENSORS_TMP401) +=3D tmp401.o obj-$(CONFIG_SENSORS_TMP421) +=3D tmp421.o obj-$(CONFIG_SENSORS_TMP464) +=3D tmp464.o obj-$(CONFIG_SENSORS_TMP513) +=3D tmp513.o +obj-$(CONFIG_SENSORS_TSC1641) +=3D tsc1641.o obj-$(CONFIG_SENSORS_VEXPRESS) +=3D vexpress-hwmon.o obj-$(CONFIG_SENSORS_VIA_CPUTEMP)+=3D via-cputemp.o obj-$(CONFIG_SENSORS_VIA686A) +=3D via686a.o --=20 2.43.0 From nobody Sat Feb 7 16:26:49 2026 Received: from mail-pl1-f173.google.com (mail-pl1-f173.google.com [209.85.214.173]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 56A842D838A for ; Wed, 22 Oct 2025 04:47:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.173 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761108437; cv=none; b=K9QH9ssbxp7nJbdRiP3cZ28zLVctV5nhsDfAYDk2EUWDmgfbNAKpRHHcfaGb1XMKgoGAYNIC6eiuUgxXwCZbxOcm+y0Qi06jKKhT3JXGcTQCzSD+e0FYbcTqlLgEovuVmDHec+/nIu1ClW2V37dqA4A4JJDko15c/mqMGz8zDRc= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761108437; c=relaxed/simple; bh=UeMi8wOq8P2oR2c8IuVTIvVV1TkHI2TplJ7c1V27Jf8=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=riV8ovD4Weps+obnL4IDBsxNCSvytmny6Hir1V0eB8xDIxaodFSkhhr8sfAix/hz+AXuEyuquaO6H45Xq/Ruhttl+y7DI/laDjT4vbG6Y/6JCo1YnE2GF1l6b/caF4YrIQlgt977Kdp2XaE5sWN6Nxng/08cVDYXDMn0sVOqlWc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=reznichenko.net; spf=none smtp.mailfrom=dpplabs.com; dkim=pass (2048-bit key) header.d=reznichenko.net header.i=@reznichenko.net header.b=EccNWSt6; arc=none smtp.client-ip=209.85.214.173 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=reznichenko.net Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=dpplabs.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=reznichenko.net header.i=@reznichenko.net header.b="EccNWSt6" Received: by mail-pl1-f173.google.com with SMTP id d9443c01a7336-27ee41e074dso75717985ad.1 for ; Tue, 21 Oct 2025 21:47:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=reznichenko.net; s=google; t=1761108434; x=1761713234; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=PmWpCjFNbINea3PWCqs9KAgYy8c0pAQxFWiD4F9OBQY=; b=EccNWSt6rR/AkhLRrRuYlWV4EgNbfzXGQiIvknZzTIxcZmDSuZcZRmsMPlpysFoZBk 41ST4640h514xJP+IPqcrCwZyhhrkqd8W7pTlMjjj4sMU2Yr0Yrjf4g8+Xs4rPD660cy P2cuNmQl5fYNrHuHtXiGjbx1iduZPJgh4Z8ZTJgk+jyyuFaQUf5l+Az6xhhGBqNdIqzk ttGO51NfXXAozuqnpDkm7OUUknh2u8EZ8TcaRjUg/XixQ/BPX5gX9tpNYAOU6Si97T2u IiAvsyQYSrZ3rT4maOoHVJMzrXwqsgI3lEq4su6kIYyb2BnvyHyjWGKicSd7d85I/6/7 rxsQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1761108434; x=1761713234; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=PmWpCjFNbINea3PWCqs9KAgYy8c0pAQxFWiD4F9OBQY=; b=KP7lolVC55/AEChXtQ3nH10L2Ag/hsQbEjI9egc0wD1CAiuo8FJXsYw04PvdiQ1Qm6 gbtlaszXTfLbLCEQjD5cV2e2TFZ5mh46R9zxNLjN24BLj5kPvBdX7I5DXutks9WuZ+qo 9CH1VdfzTL2a+N2OScqcBt5pq52bVGNQoxEOYpav/6lsqsPLZMfLD3xipHM4nBupaYLX uTGHkthFH4chpYGfgDsm5AggwMuI8G3yxUTdILjdXeCcYpPTpDZ1spqRbic96wl05EV4 q8CuJomcXgN3kuCTlqmB6tZe6Bd1UflO8qW/8nrDhtJQ7ehlx04KfPPmXZsmR9SKEirl CiLA== X-Forwarded-Encrypted: i=1; AJvYcCUcMHaAbwv1eZKyH0/EVXfHTHzUTHDHyW2dBrrDrl3B1oekwZRnKnPFoFMstwF77LTceN07Y6GUAAoIaL8=@vger.kernel.org X-Gm-Message-State: AOJu0Yz4QqpYJyscdNgwgA9H2qY2yfYLU2sfYc4cSel/wHtjhzR8m2mX KSXuKXqpqkYhs/OT9HiLBeK9bbCFiALZY2t+CQ1JLi8CD77M0pqr0Nm7GEpX7MLI1F0= X-Gm-Gg: ASbGncvra7L6I0zPnpRO29m4v95I1FbLJkiBfNwB/LIAaNWKAYtZMkpQQE4ATxVgepH Y1jV+CYU0rL9ffuEk+lhoLn5r5o+xj0sW3pipbEE1JU9F+hNY4jDN+sKCJjS9AblTh+OiokH1PX nBerU9r/IJ+dBEGNFDVRVTKjy9mFuVU3tjG+YRJOdFo8Q2YtSDrlo/KplPeqFrUHoQ8NT9aAHRm c567q3CjNMJy3Gkb4gOrYuobvsWTdBp3bBb1v44EfBkE/rysipyO3ehBusETPhhEB8LiHxPSsrU PnKnHFBQ+EtgIn27lMAKiFRD0BS06CfJwLNvUA9DotvUrk0H3AliwwLEzQx/tjIKgXloRuS2yzL MOr7MobfMlxCPXKc+kuNCjKmGKCBlLZ1jEMQx8bnc4W/gn2BJB2IWLsC1y5+++LtJXjLbdKO/WW KjI0n9kHQtnzU1cGw= X-Google-Smtp-Source: AGHT+IGQMINIDphenVyGBthc7D66TfZYg33GMQZDeFMiv4qZwcZZxv+fFMJb6PBNUzYeckgkRMS22A== X-Received: by 2002:a17:902:dad0:b0:24c:d0b3:3b20 with SMTP id d9443c01a7336-290ca12180emr248707485ad.37.1761108434628; Tue, 21 Oct 2025 21:47:14 -0700 (PDT) Received: from z440.. ([2601:1c0:4502:2d00:8004:e310:f3d:dd0]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-33e223dd9d6sm1257413a91.7.2025.10.21.21.47.13 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Oct 2025 21:47:14 -0700 (PDT) From: Igor Reznichenko To: linux@roeck-us.net, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, corbet@lwn.net, skhan@linuxfoundation.org, david.hunter.linux@gmail.com Cc: linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org Subject: [PATCH 4/5] Documentation/hwmon: Add TSC1641 driver documentation Date: Tue, 21 Oct 2025 21:47:07 -0700 Message-ID: <20251022044708.314287-5-igor@reznichenko.net> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251022044708.314287-1-igor@reznichenko.net> References: <20251022044708.314287-1-igor@reznichenko.net> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add hwmon documentation for the TSC1641 driver. This includes description and the sysfs attributes. Signed-off-by: Igor Reznichenko --- Documentation/hwmon/index.rst | 1 + Documentation/hwmon/tsc1641.rst | 73 +++++++++++++++++++++++++++++++++ 2 files changed, 74 insertions(+) create mode 100644 Documentation/hwmon/tsc1641.rst diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst index 51a5bdf75b08..4fb9f91f83b3 100644 --- a/Documentation/hwmon/index.rst +++ b/Documentation/hwmon/index.rst @@ -253,6 +253,7 @@ Hardware Monitoring Kernel Drivers tps40422 tps53679 tps546d24 + tsc1641 twl4030-madc-hwmon ucd9000 ucd9200 diff --git a/Documentation/hwmon/tsc1641.rst b/Documentation/hwmon/tsc1641.= rst new file mode 100644 index 000000000000..a93d1e72c70e --- /dev/null +++ b/Documentation/hwmon/tsc1641.rst @@ -0,0 +1,73 @@ +Kernel driver tsc1641 +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D + +Supported chips: + + * ST TSC1641 + + Prefix: 'tsc1641' + + Addresses scanned: - + + Datasheet: + https://www.st.com/resource/en/datasheet/tsc1641.pdf + +Author: + - Igor Reznichenko + + +Description +----------- + +The TSC1641 is a high-precision current, voltage, power, and temperature +monitoring analog front-end (AFE). It monitors current into a shunt resist= or and load +voltage up to 60 V in a synchronized way. Digital bus interface is I2C/SMb= us. +The TSC1641 allows the assertion of several alerts regarding the voltage, = current, +power and temperature. + +Sysfs entries +------------- + +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D +in0_input bus voltage (mV) +in0_crit bus voltage crit alarm limit (mV) +in0_crit_alarm bus voltage crit alarm limit exceeded +in0_lcrit bus voltage low-crit alarm limit (mV) +in0_lcrit_alarm bus voltage low-crit alarm limit exceeded + +curr1_input current measurement (mA) +curr1_crit current crit alarm limit (mA) +curr1_crit_alarm current crit alarm limit exceeded +curr1_lcrit current low-crit alarm limit (mA) +curr1_lcrit_alarm current low-crit alarm limit exceeded + +power1_input power measurement (uW) +power1_crit power crit alarm limit (uW) +power1_crit_alarm power crit alarm limit exceeded + +shunt_resistor shunt resistor value (uOhms) +shunt_voltage_uvolts shunt voltage raw measurement (uV) + +temp1_input temperature measurement (mdegC) +temp1_crit temperature crit alarm limit (mdegC) +temp1_crit_alarm temperature crit alarm limit exceeded + +update_interval data conversion time (1 - 33ms), longer conversion ti= me corresponds + to higher effective resolution in bits +=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D =3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D + +General Remarks +--------------- + +The TSC1641 driver requires the value of the external shunt resistor to +correctly compute current and power measurements. The resistor value, in +micro-ohms, should be provided either through the device tree property +"shunt-resistor" or via the writable sysfs attribute "shunt_resistor". +Please refer to the Documentation/devicetree/bindings/hwmon/st,tsc1641.yaml +for bindings if the device tree is used. + +If the shunt resistor value is not specified in the device tree, the driver +initializes it to 0 uOhm by default. In this state, current and power +measurements will read as zero and are considered invalid. To enable these +measurements, users must configure the correct shunt resistor value at +runtime by writing to the "shunt_resistor" sysfs attribute. --=20 2.43.0 From nobody Sat Feb 7 16:26:49 2026 Received: from mail-pj1-f46.google.com (mail-pj1-f46.google.com [209.85.216.46]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 14A932D97A0 for ; Wed, 22 Oct 2025 04:47:16 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.216.46 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761108439; cv=none; b=Wv7sPlDTGEUT6Ys4Gj0Flj3MOLfFLuewdH0rhu4hrlfCY4ZW4GRI0vAOP7c5xpTov8VCRz4jLbLbJ42GiugRUJw4JhZEw5u2xwgx3kgzxF1jh4TShDlL76AaVwytNAaZhtRQ+PRp3pp5wUv7G1ZlYXnWqf5OmPLhhD7iwpBJ0rE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761108439; c=relaxed/simple; bh=tRmg0nM0yOi19ddPpyllwAng8EhI2p+zBWRtANG9g3k=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JhbeSLqXwu0HUVmNb8M4+KZu46XOL9K5vm5Kwq5OWgZp6unhHLTz/rYrsbFiOcOrgJGYW/eQEgV8PFX8gbiggkwbW1zVEnwph+Ke0HCCDXS3W5eRHnvcFkk+ei1Y2sS1+TnO/7EY8po6mW3gYlul/5RAAuh9dm3mENp36RHUh/I= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=reznichenko.net; spf=none smtp.mailfrom=dpplabs.com; dkim=pass (2048-bit key) header.d=reznichenko.net header.i=@reznichenko.net header.b=j4d9Ouqh; arc=none smtp.client-ip=209.85.216.46 Authentication-Results: smtp.subspace.kernel.org; dmarc=none (p=none dis=none) header.from=reznichenko.net Authentication-Results: smtp.subspace.kernel.org; spf=none smtp.mailfrom=dpplabs.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=reznichenko.net header.i=@reznichenko.net header.b="j4d9Ouqh" Received: by mail-pj1-f46.google.com with SMTP id 98e67ed59e1d1-33d7589774fso3986589a91.0 for ; Tue, 21 Oct 2025 21:47:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=reznichenko.net; s=google; t=1761108436; x=1761713236; darn=vger.kernel.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=+g3w2/WDXSoRhXJMMBp8Ljyd85I3LbiCuNCDyo4g5rM=; b=j4d9OuqhMHAUkHo181/Gg+2LpYBMjVOn+EjuqLI6WnAJ4m/nNctyqVRH8sYABxkuP5 puLk0Ajaz9HJSG0Ra2VoOO4AC+MaW2CYBm2PDWBkrLt6YhXvBPnthMW+Gop0hhqtrlj3 gQ6vJ4CNYmvAg9Ys7n1zL0KirVbzmtVnD+R+2sLCeHM3aJxgnjjEttHrQXdhS1u/TzVy T5xmxh4E5/N3zIh6JuFl+YVKkxz+5c3FIAqfBgOdNVZcuPhRD3iu6PCYCDEOE81YmZoy yd3vbhQAMQKGJYhjf72jyVBWhyRtg2gAnmdxkO+Vx65QInG1jfeidKqU3Vr/xqaGWzNo x0WA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1761108436; x=1761713236; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+g3w2/WDXSoRhXJMMBp8Ljyd85I3LbiCuNCDyo4g5rM=; b=Vu50BUst8n9NZxZyjBd/qmsGSMBrcP61i2JKCM1ejus7d6bYEfBX4A7Un5x6Cs/Gsd ZJz2KG6oxgbaMZKdXCwGy7dhuo1FHG1Z5mWE88F+D8mibTBhnUs2bEQCS8OJMOSQbpyH Wp+aEdoaYjhybf1OXhcPH/0No9OhS7JfGEW5XhkGM4/6bYzD1bVTM8M7TnpejNl3ALcX ruyda6BSJr+FzA8ePboLWJ9WuU+C+mfS3pFj3AnBsPQ7rQPBbSySfVlgrgO7W46ELO2G mCbtFLCetxgDDF5s2mVWxaMKODzv+FW5IoucLErmpf7AoR6gInHNP+H4YQwEZMrj9VT5 k4Mw== X-Forwarded-Encrypted: i=1; AJvYcCU76KIfxQipvSrO9Nd2b5/d/UnTVMGJMbr+bdG91noZTiegV1X5b7w+5vz+rmpYaDtlisFT60AAuQHM1IE=@vger.kernel.org X-Gm-Message-State: AOJu0YydNNbHOlb54Ukip1iAEjROejxFF76dzVm/FfCxPTrsw3llyNzE /TJNZMkHpaPs4J4bbezoX7Y8TmeqQ/I1ybl5K7afbbpOq9X4nV36RHCA4PWZ1aPZm0I= X-Gm-Gg: ASbGncusKu4eHAJVnmPd3LOKbHOzR3f+oleef6zjN7sUOuvpxiFI9TD21vm1zsO+rxY QhUrB7Wf8OJoXnk9PQHYbNMn6tvPMuqOKMpE+XJ2jhG5TK7LkB3BduaUfak8enL1YdoyLrFK8lk lgRwalDJagu3WbcwL5mUIt7+Achq5juTucFvWKvbKpfHx7IEyZp5qD0wiFyHHG5EBibbeGeU8kS R1CuwqrIm28HxJ+a8QEdwJwPobbCgOzsdVYw3hMordzQ4z9x6nGfaCpXPzzI/zd+E4yE/rr1QAm gxjpyaMJDeMQK+shvn0MApMaP98kYRqMr76swC9Nx2b54W7IJUU876SJQbQ/6h/mBaDHTOPL+I2 cvvdcSk7d3w/NzjrEHeZl7ARDoix17m6/ppi7wCiwJQ7sjOYaIYmiB1+S5/Uxc2vPbeDtP8aZp0 Y9/gld X-Google-Smtp-Source: AGHT+IFW1zF3iL/OYtMt8e8D26V/k4CY22GYL4vfqmAbUGpIaxRLd5gEXU0u21nkZey/eOJ5HimP6w== X-Received: by 2002:a17:90b:2d8b:b0:336:bfce:13c9 with SMTP id 98e67ed59e1d1-33bcf8e3d37mr25973339a91.20.1761108436088; Tue, 21 Oct 2025 21:47:16 -0700 (PDT) Received: from z440.. ([2601:1c0:4502:2d00:8004:e310:f3d:dd0]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-33e223dd9d6sm1257413a91.7.2025.10.21.21.47.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Oct 2025 21:47:15 -0700 (PDT) From: Igor Reznichenko To: linux@roeck-us.net, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, corbet@lwn.net, skhan@linuxfoundation.org, david.hunter.linux@gmail.com Cc: linux-hwmon@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-doc@vger.kernel.org Subject: [PATCH 5/5] Documentation/devicetree/bindings/hwmon: Add TSC1641 binding Date: Tue, 21 Oct 2025 21:47:08 -0700 Message-ID: <20251022044708.314287-6-igor@reznichenko.net> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251022044708.314287-1-igor@reznichenko.net> References: <20251022044708.314287-1-igor@reznichenko.net> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Add a devicetree binding for the TSC1641 I2C power monitor. Signed-off-by: Igor Reznichenko --- .../devicetree/bindings/hwmon/st,tsc1641.yaml | 54 +++++++++++++++++++ 1 file changed, 54 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwmon/st,tsc1641.yaml diff --git a/Documentation/devicetree/bindings/hwmon/st,tsc1641.yaml b/Docu= mentation/devicetree/bindings/hwmon/st,tsc1641.yaml new file mode 100644 index 000000000000..e79f6dab4a87 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/st,tsc1641.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/st,tsc1641.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ST Microelectronics TSC1641 I2C power monitor + +maintainers: + - Igor Reznichenko + +description: | + TSC1641 is a 60 V, 16-bit high-precision power monitor with I2C and MIPI= I3C interface + + Datasheets: + https://www.st.com/resource/en/datasheet/tsc1641.pdf + +properties: + compatible: + const: st,tsc1641 + + reg: + maxItems: 1 + + shunt-resistor: + description: + Shunt resistor value in micro-ohms. + $ref: /schemas/types.yaml#/definitions/uint32 + + st,alert-polarity-active-high: + description: Default value is 0 which configures the normal polarity o= f the ALERT pin, being active low open-drain. + Setting this to 1 configures the polarity of the ALERT pin to be inv= erted and active high open-drain. + Specify this property to set the alert polarity to active-high. + $ref: /schemas/types.yaml#/definitions/flag + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells =3D <1>; + #size-cells =3D <0>; + + power-sensor@40 { + compatible =3D "st,tsc1641"; + reg =3D <0x40>; + shunt-resistor =3D <5000>; + st,alert-polarity-active-high; + }; + }; --=20 2.43.0