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[109.173.93.221]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-591deeaf6e2sm4252192e87.32.2025.10.21.21.13.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 21 Oct 2025 21:13:05 -0700 (PDT) From: Alexandr Sapozhnikov To: Ben Skeggs , David Airlie , Daniel Vetter Cc: Alexandr Sapozhnikov , dri-devel@lists.freedesktop.org, nouveau@lists.freedesktop.org, linux-kernel@vger.kernel.org, lvc-project@linuxtesting.org Subject: [PATCH] drm/nouveau: handle division by zero and overflow in nouveau_bo_fixup_align() Date: Wed, 22 Oct 2025 07:12:59 +0300 Message-ID: <20251022041302.13-1-alsp705@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The expression 64 * nvbo->mode can evaluate to 0 when=20 nvbo->mode =3D U32_MAX/64, which results in division by zero=20 in the do_div() function. A value greater than U32_MAX/64=20 causes a u32 overflow, and the division result may be=20 incorrect. The nvbo->mode value depends on the data=20 passed from the user via ioctl. Generally, the kernel=20 should distrust userspace data (an attacker could operate=20 from there, and there's no guarantee that mesa and similar=20 software are bug-free) and validate it to avoid crashing. Found by Linux Verification Center (linuxtesting.org) with svace. Fixes: a0af9add499c ("drm/nouveau: Make the MM aware of pre-G80 tiling.") Signed-off-by: Alexandr Sapozhnikov --- drivers/gpu/drm/nouveau/nouveau_bo.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau= /nouveau_bo.c index 7daa12eec01b..afe4e73b6190 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c @@ -168,7 +168,7 @@ nouveau_bo_fixup_align(struct nouveau_bo *nvbo, int *al= ign, u64 *size) struct nvif_device *device =3D &drm->client.device; =20 if (device->info.family < NV_DEVICE_INFO_V0_TESLA) { - if (nvbo->mode) { + if (nvbo->mode && nvbo->mode < U32_MAX / 64) { if (device->info.chipset >=3D 0x40) { *align =3D 65536; *size =3D roundup_64(*size, 64 * nvbo->mode); --=20 2.43.0