From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 790372BE7CC; Tue, 21 Oct 2025 22:42:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=192.198.163.8 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086542; cv=fail; b=jDgBkFMNT4Z4+Ol6076zplqbtO+XJxMIAJXrpukmYLe1oyRR0T6VTE67Fc7YPTUJb7i4BUvqBdw+u0QBLs+0g/caW1Io18tbhstxVrsz8HTZ+fi0OyHdR/Js41Q9RX0awOcWnTVP+iSxJeUYo8fmqumtNxQybIfaxag9kHblA5k= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086542; c=relaxed/simple; bh=jxic5jFEGhJhM100pw0DlpUzTQBGQ9B6mWLoKkJ9Z84=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=bZpoaxXV1iB+dLzPcQG3fLV0x7ydHIm+GNNOy6UnmZcvk95fxTmSpdfYAUQo4vl66Kh60/Zb5JatwcivLX0bvoLgeqfDOlZrzZ8eQuSxUjQC/1ejmPP35wHTqeFEW32rdFA/rD3mqVkVWQle90CVzEgovgo03xIPeeFWnkQTo9s= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=MEiRjG8w; arc=fail smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="MEiRjG8w" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086540; x=1792622540; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=jxic5jFEGhJhM100pw0DlpUzTQBGQ9B6mWLoKkJ9Z84=; b=MEiRjG8wOzguJ7FRaI+KGbjUTFtGvSoTIUKlre+JD1JdtyvX1+KLbBen 8er2b03DGy1FTLcQG58Q0MAp1752kAEHcbBfyFuJ7DYVjt7hajWyYNZxu 08hM5DYodEmuxywyn/TdAR9a7CjG7xdCD4k6FMyhhfBh/PCH32zzaaTAT rU/T2gMHcwwH23XEwPDNkjfyUS1pYkNyGGcqy6TZ44eJPhoP+Z60KMamj 1Q18Rw9P4vZAU87MebM+wXcYlTXMkSLZFTwp8MnDqZctfhhxfiViTBwIQ gHkLcbbU1OvgmVMV/fXaghtzM+ATs0iFiX+l2TAk3UtSYZaNziN2Z9aIU w==; X-CSE-ConnectionGUID: /ot8wKJKQOi72Yep9iCqAg== X-CSE-MsgGUID: 6F3N7D1SSOyLn7nRjr6kXg== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="80848841" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="80848841" Received: from fmviesa008.fm.intel.com ([10.60.135.148]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:42:20 -0700 X-CSE-ConnectionGUID: 8BwoBELvRqqCxmSPs6AmyA== X-CSE-MsgGUID: Itv3rcbSRE23Fs9FRnxdww== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="184110594" Received: from orsmsx902.amr.corp.intel.com ([10.22.229.24]) by fmviesa008.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:42:20 -0700 Received: from ORSMSX903.amr.corp.intel.com (10.22.229.25) by ORSMSX902.amr.corp.intel.com (10.22.229.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:42:19 -0700 Received: from ORSEDG903.ED.cps.intel.com (10.7.248.13) by ORSMSX903.amr.corp.intel.com (10.22.229.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:42:19 -0700 Received: from PH7PR06CU001.outbound.protection.outlook.com (52.101.201.48) by edgegateway.intel.com (134.134.137.113) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:42:18 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=eKKYzY2vKPmtZ3ZdzvCGhUeTF2mVu+ZIzpkApeFyrU0yqO4q4RvQ/H1dkEG+67F0PcJ8iOMTZO/eT1hePNyb4x42YXPhvQU3F0f0ZS3uWZDwmN9HKdl9imQYSxf5kAoU6PkJOtDcZKAL3KlK4Cik84sW2J8I+DDgVm0HzPkTDqmmWEzv9FlZR77XIB1SodbZMB9hKgdqY15HcB6RGmniwZsbFvvFUXAtjNtfSVYL4YtcK8KxO4bth4RaM5c2ZCQbnzBcG0QGyiqXLGNn+TOtxsYYFFB3nSf62EOi1AgrLeJmnJEOOEpXDHNIgN4sxv7UdptwSUUzgj9mbfAsZJnZdw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=R6SDXboVeZ8mdsD48xRqdq6LT6SaL/hVLr6KD1e2QIw=; b=trlC7uSEeHBcfvVkLVB3kBPs8APBls5LEI/1SipoHyIBzqq81pkvIFtBMP1+IlpfXvCN3VazFiEZKED3TYPCboYACLxS30vbSoVuyzhQMioZv7qtbMoTqLHJ1IBR9dza3TNJJV9Z74ClJA2e8Beiqsf3q+9+2IOSRWYprZzvDvT6cHz+WiiFTjsI2tugfebBCLMXRyd6XGFfEfbWAXnM4l0thC0C56b/qs7AbSodNUQAULKPBPzHBp2j37MT4fm/Bi7D1gnyZ/DwLe+W+TAy0lgnCBYjh+BJtZn9j0uGP49fDMn2E9MnyQBXZi6ZavW4OEgu+gTRxb0OxhjhG65DYA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by PH8PR11MB6753.namprd11.prod.outlook.com (2603:10b6:510:1c8::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Tue, 21 Oct 2025 22:42:15 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:42:15 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 01/26] drm/xe/pf: Remove GuC version check for migration support Date: Wed, 22 Oct 2025 00:41:08 +0200 Message-ID: <20251021224133.577765-2-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VI1PR09CA0164.eurprd09.prod.outlook.com (2603:10a6:800:120::18) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|PH8PR11MB6753:EE_ X-MS-Office365-Filtering-Correlation-Id: d96ea410-ab86-4242-cd16-08de10f31529 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|366016|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?Y0hNQnJmTXpZdmIxWkNGR0dhajMxcFVCczBmMCtQeHhleHFCNEpGNVBMbkc5?= =?utf-8?B?WXVSOUJlOFBlOW5UamdZL0VSTmhvdzlIaEtDdHUxSEx5RlRmUkkrOER3ZGdu?= =?utf-8?B?aHJvRFJHOE9vWXlYaGoxMGNoMTQ2bFJ0WnErbVdGTlc4OWtkdmtHdDJkZnRO?= =?utf-8?B?QzBCYjBFU2xsaE1FK0ZOTzdTY090TXg1dkcveHBpNzNRWWxKVTBiSFZBTTlM?= =?utf-8?B?TGNCc3dWNktzdWVmYWYyVjNXVHlYb2tlSmJNZDVoWWlNTnFQMWhPZksxd1Nj?= =?utf-8?B?NHg3bEFuS2NVL2NzY1B6QmJleGNjUU1RVGFJMG9QZ3M4WURUaVZWTjA0czNJ?= =?utf-8?B?b0lyQktQMWVROEdmdnRKR2hlYUpQS1lyK2l1RmhJZGZxVHJRQkJPNGt3ekh5?= =?utf-8?B?QXFBdUhSTWx1aDBJNk02OGVZelE5TUt2RUw3djdGZzd6T0RmcldQVGpuNS9F?= =?utf-8?B?eHg4MGUwRmdtbkUvUEJoZEpWRGZOUkdZQUtQMitlTXZES1R3WllXbkJ3S1dE?= =?utf-8?B?YzRnY0RTclpMZCtlYUYwVGhwZ1poNWFObXFhamtIQ3pIODRJclVCK2hnKzZ2?= =?utf-8?B?Q2tENWVscWpteG4rMDlWamxEcTFWUUlRamZIZGl0Y2dWNnp6YXI4QU1Yd2Rr?= =?utf-8?B?eUpBK0J2RXdTbGxQK082cXFIM29na3R1YVA3amRlQzlBd2hSUC8xS2RrNTBS?= =?utf-8?B?VkZlNmljdExnOUtHT3g2dzJ0Nm4vN0pBWXNIR2tCQkVuODY2UEhWV2lzdDQ2?= =?utf-8?B?SUZ3UnRRcTlIVmNXNVFsNktDeDIwK2c3elZiQU5zWVoyQnNJWi84Y1lRNVBF?= =?utf-8?B?MnNRNkNaU05Ed3pDVWNPZmVDeWpoZ2o4enViclpIVUJ4Sk1PTzlaUnQ3QXFn?= =?utf-8?B?bWhvc3FRZ1VTWFExY3JQdzlpRW1USVpzTWdqU25Fd0tkMHFQR2Z3SURoUXVK?= =?utf-8?B?NVdZYkg4cjVEMjREeldtemNYYjZNZWhjQnlOUUl5WTI3QS9LeHpveElqQm1a?= =?utf-8?B?Q2I5ZU11dk0zbUNqZVp6QVMzMEYwMzdoNGRSR1lSM0JIaFRSY0FIVXlNdmVh?= =?utf-8?B?Z3Y3ZHpNZUVWUVZ1M2wxc2JYcmFUbkRkVkxIWk5BVklHSHVuaFhIRHJUZVlG?= =?utf-8?B?akpmU1F5MmF6S05tSFAvVkJhNkh5YWI0Tm5UV3pwVnZKOFFMVTdtbnRUWnUv?= =?utf-8?B?TUUyV3dKeGgybm93QmU0NVp5TTdhZmRFaUNXdjMxbmVxTDBQdFVSUFhGNEFj?= =?utf-8?B?bmU0SG1nU0tEN0M2WTlVVkJYWngzNEFrdUtWM2RaYkZ2Z0hyZVRrYll5eWVn?= =?utf-8?B?TEcxQW54Y1BLWExJaEVlazdNSjNlRFlOZVIzQVFQSzE2V3ZSSTVUYm9KYm9N?= =?utf-8?B?S0h4aEZQbXJOQy9iSGRvOWdDWjFhWXVlYVJYMGZwNGtVQW9nV2ZadnEyK0JP?= =?utf-8?B?QW9ZQWU0d05oeit5V3REbHJibjJldWxDelU5MWNKbGEvcGlkcUFzUXkxSVdl?= =?utf-8?B?bmtETk8xajZkVjdZOGhQRzJWaTJFYTVJSFhGY3dVS1RSM1p2ZmxsQitHaDhl?= =?utf-8?B?R2xLdE14d0NrVFlGUjdGeXB0bDBjWjFnVGM5cGF5VFBWM2h3UW1IYTI4cWs0?= =?utf-8?B?R3k0WFNRTkYyTGZiSkNXVFlJeFl4dWFwcEhmeUE5Yk9jNkFNYnFrNGUvV21B?= =?utf-8?B?a3VOamtmdEZFVEwxUjZBK2pwZVNnRklmNUJhRWMyNUZOV2J1NzR4UGdyWmxS?= =?utf-8?B?M1gwTzF5Mktnc0duMlZ3ZTRKM3JXbGg3c0JYKzFrVTI5amhqZ0ZmVzdkQUh3?= =?utf-8?B?a09CZVdIZjl0VkJ2VDUwUzAzNStDanFJSGxzRmRzZUlIOW1QaU1xbnNVVldH?= =?utf-8?B?VXl5OXlIVDJXSFQxcC9reURrOU5ZMStrOXdMb3hVMk9Ka055cElxRnFmTlJK?= =?utf-8?B?VkQxbjk1N1ZGWS9PWU8wUEx5QlEzcGdVVlJoWkhGc2NFaTYxbFlIZGl4U0Jp?= =?utf-8?Q?459YldcGgBtw6JWHR1AfVg/PhOPYwo=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(366016)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?MFhvZEdtVktHUzF6V2Z5S1pHWUJtdFF5U1RVYm42QWZmNU5wREkvSUszVW9R?= =?utf-8?B?UGVjdjZBMEVDUGFyRGd5dlpudXpYSWhnUGM0c2dVcGtZbG1lN25vUHlzSG45?= =?utf-8?B?TThMblhLYjNoSlRlallXN0NITDRkRzhjN1h1Q2FYZitlNGUzVkRXSTZTNDV3?= =?utf-8?B?ZmlXR3BUT0VoVjJRWkpnbHpTMS9oU0dLUnJuaWZkYVJDUlFXSEJhTlRsbk1k?= =?utf-8?B?ZCsxZSttd294NUE4ekZxaTN1UUFxOVpiejRHVnROenVZQ3NOTDE1SitYVG0z?= =?utf-8?B?aVBUNmxFbkQxeWNXS0VsQy9hOWRPT1U1TjFYT2Y0V2hoTUtrRE1telk5eGs2?= =?utf-8?B?aVdETHNVZUFMMTJNWTVNZnk3TmQ5YnhhcENBWWsrWEpBSlRJTEMxMzErNFA4?= =?utf-8?B?M2pxdWJFK2NFVkRvb1E1Vm9tczl0V29vb3A3Ymx6MHc1WmxPRHF2SGtnOWRX?= =?utf-8?B?V2sweGp5TmFLYVZEdlBHTHFwOXl6NUt0YVFmeGQra01TamN6dENXdVErenJz?= =?utf-8?B?ekFvVlNKVU1YdmdrbWtpbEtyWmFlanl0KzlpaUdDanVXejZCeG1IRDlLWjRY?= =?utf-8?B?YmEweDJONkNVMldvREVCZGNlSE1lWUt4S0dwV0M5d2RNMzJsa25yMHNJVFd0?= =?utf-8?B?S1pENlBlTEVPUzhUWEZwZGNFSzVGbldzQk5sTklVMDlYOUJ6TjdaYnpmRXNT?= =?utf-8?B?NzAzeXg3RFlXZkl1WUN3dkFqL09mVVNwY1lFei9aRE1JaHQ2ejBlbFJ6anJ1?= =?utf-8?B?eG05VmFQM0hLeG8rSEVUa1loSDdvU21XL25HcUowMjJRZjdkTjFkUVNQM0JO?= =?utf-8?B?STR1WUNFZDlpUnFqcnJpa1ZPdUl0L3p4eHY5V1RmTEUvaTVFZEtrOUphQjI4?= =?utf-8?B?VCtCc0Q2Y0lTS2lYMkRTWEtMUldQOEVkcm4yNGxHVWdqdWdFRmxvRm1HUFlV?= =?utf-8?B?RXB1UkpOdS8ybzNNU3pCYjNyM0t1OEh0cURGVjAwTURaRjNlcGFLei8vN3JB?= =?utf-8?B?RkFWSnVzM3lpMkpadFM3QWNwR0JROWRjUmJtaWlBeHdkUWp6ZTJXWXRERktW?= =?utf-8?B?bEFDNUhzcXlSNk8vVTd4YnNqeXJUQ3pralFnb3J2dVFWVStKVFJRZWVXcUoy?= =?utf-8?B?ckNSYXBCcm1PQVB3M01IVDM4Z2F2Slh3aUlWeWxFdmtxelBsSmtNMEZEMlBT?= =?utf-8?B?cFF5OFN3eGZIcTRsWGNWMWY1dWF2T1dSQWZOaHN4QTRBRnFXb2dtQWRZc1ZE?= =?utf-8?B?NFNsMG9GVHRaQVBiclFUa2F4aVhXdGd1NldrR3lWTFUxdTV4bXQ0OHdoaWtx?= =?utf-8?B?YjkxSVZTaWkwT0hxeE9BbGNRdnVxSVgwaFI1Q3pNYWNjN2I0MzJZU0ZaWXF1?= =?utf-8?B?TGJrY0w0N0pESHJFdWJyejd2QUVLWlRnYlV1bS9EMG5UbFRlZnhUYlZ3V0gz?= =?utf-8?B?YWNnTTFWZWhtMlpXSG1POXl4aU1yWUpMVUNCSnkrdllwUDVoYU9jOWZDWEdo?= =?utf-8?B?MU1PRzJRbEQxNFdybEJhRlllZXdUWTFPR0NaV2E3UCtmRC9iZjU2dGU2TFBZ?= =?utf-8?B?WXcySkdZWnZnblZ1UHJGSVBYRlhaNGlsRGl2OXRzbHMvOXRIS2lVTlo4L0R4?= =?utf-8?B?Ni9jZkFLcUw5bHd4bDU2Q2g4WXNHZ2s1bTR0UnZ0M0s3U00xMko1R1FGbG9j?= =?utf-8?B?TnpRN085Wm1qMjdSU3pzejZJQjFydEIzbWhOdHpGT25iRklzYVM4K2pwSW9q?= =?utf-8?B?SjNvemtCa1JYZ2NYNVhxY2loMVhOdjh0MjlKbzhOUXRuV1RJeXVpM2ovV09x?= =?utf-8?B?VEFXNFdVQm05dkhGaWdYVUlLMzArQXUrdEtJWUREMDVGNmNzcm1LTm1UaXJ6?= =?utf-8?B?alpvVGp1SXRMbUJlVG5yYzBxZUg2RjBORXllaWdXb0hBaHJOa3U2L3pDRDJF?= =?utf-8?B?ZnpSQmtYVXNWR3Q3em9MUHM2Zks4Z2cyTFVQaEhhekIwWC9tZVN6ZXpCR3NQ?= =?utf-8?B?VFVkcHdnU1lNRFdEc2x2b2cxeWwrT3ZyN3EyeGZ5MmxkYUozeVBGTkdVcStY?= =?utf-8?B?WS84RVFTODIvVklmVWtvS2RCMUYySHp4UnZmenVYaTAyZDlFN1ZmTThRaVFn?= =?utf-8?B?aHUyOEJjenNLZVF6YVFNaDF0a0oxWUxUVDdxVlVqVjcyM3N3S2NKVkd1R0hU?= =?utf-8?B?THc9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: d96ea410-ab86-4242-cd16-08de10f31529 X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:42:15.2823 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: fX5fHFuELnfZiPKcoWEhvLo7WU+zQU3qNYBaII+N7HKaQjdObz3N+8TQtlCdmueM6dgTejazALn/+I2MjIeNb5M/IGcKF31AT/dcMz5CyDg= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR11MB6753 X-OriginatorOrg: intel.com Since commit 4eb0aab6e4434 ("drm/xe/guc: Bump minimum required GuC version to v70.29.2"), the minimum GuC version required by the driver is v70.29.2, which should already include everything that we need for migration. Remove the version check. Suggested-by: Michal Wajdeczko Signed-off-by: Micha=C5=82 Winiarski Reviewed-by: Michal Wajdeczko --- drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.c index 44cc612b0a752..a5bf327ef8889 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c @@ -384,9 +384,6 @@ ssize_t xe_gt_sriov_pf_migration_write_guc_state(struct= xe_gt *gt, unsigned int =20 static bool pf_check_migration_support(struct xe_gt *gt) { - /* GuC 70.25 with save/restore v2 is required */ - xe_gt_assert(gt, GUC_FIRMWARE_VER(>->uc.guc) >=3D MAKE_GUC_VER(70, 25, = 0)); - /* XXX: for now this is for feature enabling only */ return IS_ENABLED(CONFIG_DRM_XE_DEBUG); } --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CD2FF2BE03C; Tue, 21 Oct 2025 22:42:23 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=192.198.163.12 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086545; cv=fail; b=jhWjtGntzAyO30yo7BVz/cnNpzTop7HNXtVivh38blN7YSL2ADCAKli5WlzJQ3EEKOCgjyIsvmO6SRbmOKErxXtLeYRWLajbxn/oOnXhwEFJqteQInh0ELk04SWNOFL4hHwq7NeGfA92QBk5HjCMob0+PdyoUI0xM6yTmgMnIY8= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086545; c=relaxed/simple; bh=YzVgWcfTuAFJeL8ew9D510BkwhVAI3ocVBl77gqL7DI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=mh6bHSVYQASQ3upTNPGtwz+4Znya6xkjVXAVmz0/e7+JkUMvRBOwOgbULC51gc2HLlMZ79jC4aF7QDkzV3kI1gCD9t/D+LzJ86vQ/wiv8spD4+nn1BcsajnhXBEnKKmjywfdZrCIEXbzRC5acqxXn0OsPM5halmX0iQj+qCKWd8= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=IGdpqfnw; arc=fail smtp.client-ip=192.198.163.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="IGdpqfnw" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086544; x=1792622544; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=YzVgWcfTuAFJeL8ew9D510BkwhVAI3ocVBl77gqL7DI=; b=IGdpqfnw5C8l3mWrwoXGwzOq8fd4GZqL+zBwqCULmdqm/OmfN+C9Xm03 FJjmOo6S9CzdoMIgZVj8GpWVCuzdBGQqlEvlTW6uWXl44UcAWl9qXPNTx s54KjwnE6+pEozp/Dw8ltrRVo73hUr4ur2GK8LMzwEBzcs56GCEJntE66 SeqEUjYaKSzrX8Uz0OeVzSOSRiVXik6tI/idjbQ/JACKa+4DRRlwHZSt3 595SccDjAOkABrvA13N4FTzl+xVuBy+xdEHyZP5Xtb3TynViUz/4+MOxf C17P8iYnh6nyerZtLEZEFVtWUvK0TkxoSv6EtgQtpcIf574B6hq+jEeBO Q==; X-CSE-ConnectionGUID: +Q+bYAoLS2e0pigzW8Ksdg== X-CSE-MsgGUID: LjDPeemcQkKTO+HE9nusNQ== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="67088841" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="67088841" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:42:23 -0700 X-CSE-ConnectionGUID: VVh9x1amSzyp/lu6NyFNSw== X-CSE-MsgGUID: ohAQ8e+iQZi/6+39PREbjg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="183738458" Received: from orsmsx903.amr.corp.intel.com ([10.22.229.25]) by orviesa008.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:42:23 -0700 Received: from ORSMSX903.amr.corp.intel.com (10.22.229.25) by ORSMSX903.amr.corp.intel.com (10.22.229.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:42:22 -0700 Received: from ORSEDG903.ED.cps.intel.com (10.7.248.13) by ORSMSX903.amr.corp.intel.com (10.22.229.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:42:22 -0700 Received: from PH7PR06CU001.outbound.protection.outlook.com (52.101.201.12) by edgegateway.intel.com (134.134.137.113) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:42:21 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=U5FqLomWNg+u5YTNms+lxSDwLR9bp3XqcCNSuNJxXnZw8TIMqXRbcoJOKNC89B5pgEnA6sHYljJPYdMnH/dhXqxpXV7HuYk8yqzHT6m9CiMey2PE89s1JiMVwkgf5CMp0FQY5CvLDY6SbcvqZWVT8xYB9jRN88umYtiDMUijjaq5fYk7YH6kGb7EDTbYd1OrGYZcrMLgbiVv7C9BOVzUBaDVNsaFv3yELgthWrNPX8nPmoJqRlVuMPW7tqpGHVwuU88PeFmf9AwUHCIp192myFl92aTSFELKSipKLhjfOyesX8i+p06RMu11zjbnoARIR5TtLakGJDnZpG1tYMaoYw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=HYGSrldPZDDSDC1F/qbp95/CiTz4bhJnPePVp22JvFU=; b=jfrdDglh5b5N0RcW4XssSxy0IliQDJcNN40cDCuFzbPqPUjNdgm9SY9bcfL3pWbry14Q3NvvMYOnt5mUn4A8H+PS1rS/ogpMSem4OgkdqJ4/rOTE38jEI8yhMgY4fpjwnBubrwqnL5AHY7TvEEpT0m1iAzHw8Qr9yGiquo9MVDflaOdZDVOSvXbp7IipTJiwo/ga2s1GbgsIh0UT5w8X6EeAY1zs/A0WKTtmQMJyTnSW0n9xjYCp7DewL2ji86QFNLwhNrZP5Wwg50HSeaEgxhFxA24noqYuMl4vNQIWQm53YB4HoAKTdboDiXZNJYwSbUsN0OWDEEO52ij/QVU1vg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by PH8PR11MB6753.namprd11.prod.outlook.com (2603:10b6:510:1c8::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Tue, 21 Oct 2025 22:42:19 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:42:19 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 02/26] drm/xe: Move migration support to device-level struct Date: Wed, 22 Oct 2025 00:41:09 +0200 Message-ID: <20251021224133.577765-3-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VIXP296CA0001.AUTP296.PROD.OUTLOOK.COM (2603:10a6:800:2a9::16) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|PH8PR11MB6753:EE_ X-MS-Office365-Filtering-Correlation-Id: df5bb84f-a50b-4367-4b7f-08de10f317d6 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|366016|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?dmdsM3dCMzVxWGNORHBXdmNUVk4rL0Z5T05ML3cra040eFNWNGJUNktVNjFs?= =?utf-8?B?RVdMdWlYSWIxblF6U3pIRHdTMW5sWEpsWExHSnNYUk9SMzVYSG82ZisyekVq?= =?utf-8?B?b1B6RG15cmxtNi96L0VKdEg5WGtyU3czQ2M0TFJ0V1JZY0xjT0cvZU9tNktM?= =?utf-8?B?ZDdMV2xpdTNVMmZ1OUxoS2E2REs0VS96MjNoektHajN3eHRQRlN6ZUtrUFpQ?= =?utf-8?B?bUdoeG5CakxvNUtTeDNtblNTSVBlVGN0c1RUY3MzSS92Y1Vnb0NPS2xwQk0y?= =?utf-8?B?eGovL3lCaiszY3JsNDNsVkFXKzlYQ3gycGdXdDFnOGQ3Rzl5RUVsOFNRQlZO?= =?utf-8?B?SG12RjJITng1ZjVsaWo1ZmFiMUdFbVZtOCtDdUQxSGM4dnh0aGtCMWxrQWgx?= =?utf-8?B?ektMaVVjSGVoRDkraGQxclh2RDAwWTBScSt0cU5ZdGhLNnUzSjg5bWJjWEox?= =?utf-8?B?MWM3eWJHR09nMEN0Q3ZuNU8yVFRUQVYvL2lwMkNrVCsyRy9FSU96RGltVnJy?= =?utf-8?B?cVRRSTNqT1dONkZQODlrd1pHU0VaMGxxNVBEZ0NGRCs0QWd1ZG43YW1GUWFW?= =?utf-8?B?NWRoaEtsVVROTU82WXduZUJia083VmF1MjR6dVlDeFNVOVk5aElpTURyM25X?= =?utf-8?B?bGdKMHZKaTRER0ZVMFVDaTFVUWtxQmFEWDNsVGlUNEZqTVFzNzJqM1Bvd2ZO?= =?utf-8?B?cS83bXZTOXo0U1dsY3U5WVYwcGI0SUhtVkVsNDhQbTh3TW9iSkdWWDRlYnpX?= =?utf-8?B?ZWd4VTQzbnhkU1ZUcTFhRE02QmdDMmRPOEp0Q0Z1c3FvNFJoMGtBdUliYzBl?= =?utf-8?B?TFIzY3pEUTV0eXlpTE5qdmpWcjE0cTNQTTRMcmpMd2tOU1p0dW90S1VnOWVZ?= =?utf-8?B?Vnh1Y3NDcUlzSVhibkhWazRxbUI3UTI3aFYvUmppanE5dU52QnNZdVRURGUx?= =?utf-8?B?OG5MdHlHQkZDS2VZVzJBVGhWTXJzb3ByYjFmNnE0Z21yWGN6M1lWRnJZWjlY?= =?utf-8?B?L01CTW43MHRGd0J6aGZZMXJlcSsyYy9EUFBtY2FCL1BIeFJ4UE9SMkVsZyta?= =?utf-8?B?aHZSYkJJUlNnTjhHNnN0YnRPb1pya3F5ZzQvRHpIUHg5eHBpbWFOdk9NWS9j?= =?utf-8?B?cnNvaEx6QjdGanc1a1AxZDdrQU1mT3lobTQxQmV6WC9kbkI4NXQ4NmduazhT?= =?utf-8?B?QjlqMnNqRUNHaXBYWlRiV0lCZDk1V1FsWU9LZnBaQWx3dlNqRTRoUitHRHRL?= =?utf-8?B?M1hFY2xyZmlFMVU0QjVxRVUwSis1ZHZhMlJUNUJGZlZvSjQ0d0wvcnVLTFQ3?= =?utf-8?B?bFNPanZRaGFsSDZpbzU5V1EyOStPdmpVK0VwRXFrWElYcm9VUS8yQ1U4aVE3?= =?utf-8?B?TXU4Q3pBRFJpUWk5UVEvU1AyTDFTeWI2bjdaNG9paCtqWWp3RW5ESy94VGlr?= =?utf-8?B?ZkpBTkpyaE9yNDNLR0dSdjJhcHk3TkNTZWxNZkVDejhWMUtGaTZkTWxVOTZn?= =?utf-8?B?MW5QNVdaMjBZK3o4eTZwcVJjbGdGcnlLMVZCejlOK1dOaG9kZGdrL2xpM3dC?= =?utf-8?B?M2I2VDFKMkFzV3VtY202WlJIYlZnWHpwakVScjRYQlNjTFQ1YnpNVEQ1ZWJo?= =?utf-8?B?SVU3ZS9EK1JML0hueFExRExZZnloVEFYc3ZvL0xIWXBNNG90SHJxZ0tuUFRJ?= =?utf-8?B?WFN3eDdGYXhNZ0NJWlorTGc4OThGeHFmOWdoTkduWHk4YXB2WW8yc3dTcmg2?= =?utf-8?B?R3RZN3dVUlh0bktzUFRRQkg4aTFmQlNtWDhiOTB5SmUvQWJ2bHgyd3RWSFRJ?= =?utf-8?B?SXM1WTdVQWxTc1FVLzNNNWF4V0FuQytONVVOd0d4SXB0M0ZvZzJUVnpWNU1N?= =?utf-8?B?QmZackpZc0FQTFdCRXlFODgyVHFTbXpPaWdFSDBkZ2tiazZCSkVtOHY0TkZH?= =?utf-8?B?VG5FcWZXTllTYjIvd2gydGgvTjhVM09vaGRJZkwwZThCVUMvZ3kvcVY3TFgv?= =?utf-8?Q?eY6Wx7aEV3tFsfssDalF4J27z1j4Uc=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(366016)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?SjR6SUhaSzdoRFlEaDZUNDIwSWwvNCtROVpOVTlPb1VFTHNWekpTV043RG96?= =?utf-8?B?RmtxNVpZZVJnbUNaK0ZqV3NkWkE4azN1MXo5NjNOV2h3Q1BncTRiUlFWbUNv?= =?utf-8?B?WUJjakY1MEsva1F4aThneUh2cyt4ZVlLcnNqMEV6NFRwTTBCY1NuYjFtVjhW?= =?utf-8?B?WHgrOFZCRlh6Y2tFN1A0eDdoZDJLU2xKdjRJNVRRcjlUOE5BYTkyb08zL3JK?= =?utf-8?B?aEdaV3FlSWZmbkpxajdoWUJtZ25VUjl4Y3FoMEd0TWpBYmlQNXBFRFFRemNT?= =?utf-8?B?aUtZMUJUazdMbm5WUHVsY1FhenVlTERIYTAzci94MlE5Wnl0cVZkYXNpVTI3?= =?utf-8?B?S1pSK3IrZjVXVU43a1ZUVjdNTFNBVk1QZlBVQ1RsM3lESW9HanNwdHF1WXA0?= =?utf-8?B?VHVXaExwSkwxdVpPSlo2TllzM0JocFl1Q09BOThiV0dwVXVpN1ZjNzBGMHJ3?= =?utf-8?B?cE9lOTlCNkhjSzNVbjRvWlFTcUtIaUJGbkwxTWZnUCtWRHVtdjNDdVdHTDFh?= =?utf-8?B?S1NPVURmVmo0VHMxcjIycVZWUXd2OTZRWTh1Y1MwWERaMXR4NXJCOHRKQ21L?= =?utf-8?B?OXJFcVdia056N2JBeWJxY1RDb1NJTWVORHhMNnM3TGpnTEtDejJ2LzBQRjJX?= =?utf-8?B?dXZZTkE0Zlo1eURiV3BqQmlsMUZBblN2SGZXSGNqcTF5eVQzcXo0VTIva3dZ?= =?utf-8?B?WkFHV0ErYzJ4YUMyUUgrNWFBMjlXUndJZnJaQ0x0Mm0wL0l1enEySWpLb1dS?= =?utf-8?B?VC8rYll2N1AvaXMxZStNMFZvcmR1cjk0M3VHaEd4TTZJMGJ3aWV0clFPcWF4?= =?utf-8?B?YWV3ZkhmSVZrVUFMVWZrUFNnRDYyTGxGTjhOTUZ6QzFMUjdmT2tCOU5YUUdq?= =?utf-8?B?Zll5dFl5VWQ2MkRIMVJjS2dmR1U5UEZMWHE2c09OOWUrblJOWGZpdVRLeHpP?= =?utf-8?B?eHdLdjFqY3paTG5TSG4wTzZ5Vk5qSnZwcGF5Sy9UcTBsdTRvK0s3YWVSYUd6?= =?utf-8?B?YlRDK3JUR3E4Y1FhREh0STBCVllLSlJxQUZESFlmdnJWUE9UMFF5Q2I3K2Jl?= =?utf-8?B?S1lRejY5VUh3TlpMWk82eG1LUVdLOWtpYUpzVW5nV0dzVEZMc1hrenZRVWth?= =?utf-8?B?NUpSeU9pZmFoTUl6REhGZjVuTC9GK3ZweDVqaXVhVUNsdFRiNitXRzJqVEZW?= =?utf-8?B?UUVxWDJkQ3M2WWlOV1JvR3FyQUttUU4ybHpjQlNvQVBLZ2hyNHFoMi9ScFB2?= =?utf-8?B?NFdrQXRvU1U2b092djlRWXByTUYwL09mR0x5OExIallVRFZIZERxZDlVTDZC?= =?utf-8?B?bWZXOEZBUnpnZWF5TDhobXZpYkVnamxLdk8vOWxUQ3lPNlQ4bS92OStEcVEr?= =?utf-8?B?eUd2WGwzVDBKRmw2UzhyVnJIQkRYNEVjSXZzZW9XRVdqTFlKdTQ5QlBQeTVV?= =?utf-8?B?OE85dWdTT0dYc05qK3dlVWt0czZWZm5KbUhoYXpwdy9rMTM0My9LUWFKWXA3?= =?utf-8?B?TmQ4eUVHbXJXUW9vQzEzMk1UNitoWGVJUlNrQzBhdm1jRDlRc3o3ZWRpcUFQ?= =?utf-8?B?MHdoMHpPQmd4VVU2RzZ5a3dwZEQ2WDFzazlhVFZoeGZiU1JjVWlmZWJVK2I2?= =?utf-8?B?RGI2blI1OGV4WlUvbERtN3BUaXQyYnRiZEtiVEh0ejZxcVJDc2FUSHRlMzhO?= =?utf-8?B?cW5zd1lkRnZZeGhJUHA4djRNdUwzOWxHeklydUZONHRqUlM0cGEyZ2tmR2lh?= =?utf-8?B?NEMvbktnc2tlM3lnaUwzQXFHOW1OTXUzMFZGaUZIZ0g2Z1F1bG04ZDUyQTNY?= =?utf-8?B?Zk85NmdQTkpFeGlUL0NpMFpSWlBaRkpUdWVGYUloM1RRWGVvdmE2L0NUMnFV?= =?utf-8?B?VERYQnVEZmNweEVnbzNkQnpvb0dLMm4rd2szTkVaV2Y4UHdCTVVaWm1hR0tF?= =?utf-8?B?QUk5bWsrNVRvMWVlZXB6UnY3S20yVlVKZStFNmlWaHExdnNoREw4cVprVVlV?= =?utf-8?B?eHU5VnZhaXZya2VqWnRzRXUxUisvQnNGZnNnWFphSkdUUTd5YTFrREc5WjNs?= =?utf-8?B?eFNxOHpER3EzNVRZZ2wveXBPSlpDL29YRnZPZEdFVFhDR2Y1c1hoc3Rsd1hP?= =?utf-8?B?SGRpL1NFNWsxT1RKWjMxMGNRMWxwbG1wSFlmeXFETjAwK2dPYXFxazRMemNh?= =?utf-8?B?bGc9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: df5bb84f-a50b-4367-4b7f-08de10f317d6 X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:42:19.7375 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Oc2FmiPwV/8hbGau39xm+h0FefDxSdP34hflGOtj5v/CO5ohqh3mYS6zMWukoOrd5v+wipoF8up4eVnITZ6VVJdFgY47HlISqHVz0kxkVEg= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR11MB6753 X-OriginatorOrg: intel.com Upcoming changes will allow users to control VF state and obtain its migration data with a device-level granularity (not tile/gt). Change the data structures to reflect that and move the GT-level migration init to happen after device-level init. Signed-off-by: Micha=C5=82 Winiarski Reviewed-by: Michal Wajdeczko --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c | 12 +----- .../drm/xe/xe_gt_sriov_pf_migration_types.h | 3 -- drivers/gpu/drm/xe/xe_sriov_pf.c | 5 +++ drivers/gpu/drm/xe/xe_sriov_pf_migration.c | 41 +++++++++++++++++++ drivers/gpu/drm/xe/xe_sriov_pf_migration.h | 16 ++++++++ .../gpu/drm/xe/xe_sriov_pf_migration_types.h | 0 drivers/gpu/drm/xe/xe_sriov_pf_types.h | 6 +++ 8 files changed, 71 insertions(+), 13 deletions(-) create mode 100644 drivers/gpu/drm/xe/xe_sriov_pf_migration.c create mode 100644 drivers/gpu/drm/xe/xe_sriov_pf_migration.h create mode 100644 drivers/gpu/drm/xe/xe_sriov_pf_migration_types.h diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile index 82c6b3d296769..89e5b26c27975 100644 --- a/drivers/gpu/drm/xe/Makefile +++ b/drivers/gpu/drm/xe/Makefile @@ -176,6 +176,7 @@ xe-$(CONFIG_PCI_IOV) +=3D \ xe_sriov_pf.o \ xe_sriov_pf_control.o \ xe_sriov_pf_debugfs.o \ + xe_sriov_pf_migration.o \ xe_sriov_pf_provision.o \ xe_sriov_pf_service.o \ xe_tile_sriov_pf_debugfs.o diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.c index a5bf327ef8889..ca28f45aaf481 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c @@ -13,6 +13,7 @@ #include "xe_guc.h" #include "xe_guc_ct.h" #include "xe_sriov.h" +#include "xe_sriov_pf_migration.h" =20 /* Return: number of dwords saved/restored/required or a negative error co= de on failure */ static int guc_action_vf_save_restore(struct xe_guc *guc, u32 vfid, u32 op= code, @@ -115,8 +116,7 @@ static int pf_send_guc_restore_vf_state(struct xe_gt *g= t, unsigned int vfid, =20 static bool pf_migration_supported(struct xe_gt *gt) { - xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); - return gt->sriov.pf.migration.supported; + return xe_sriov_pf_migration_supported(gt_to_xe(gt)); } =20 static struct mutex *pf_migration_mutex(struct xe_gt *gt) @@ -382,12 +382,6 @@ ssize_t xe_gt_sriov_pf_migration_write_guc_state(struc= t xe_gt *gt, unsigned int } #endif /* CONFIG_DEBUG_FS */ =20 -static bool pf_check_migration_support(struct xe_gt *gt) -{ - /* XXX: for now this is for feature enabling only */ - return IS_ENABLED(CONFIG_DRM_XE_DEBUG); -} - /** * xe_gt_sriov_pf_migration_init() - Initialize support for VF migration. * @gt: the &xe_gt @@ -403,8 +397,6 @@ int xe_gt_sriov_pf_migration_init(struct xe_gt *gt) =20 xe_gt_assert(gt, IS_SRIOV_PF(xe)); =20 - gt->sriov.pf.migration.supported =3D pf_check_migration_support(gt); - if (!pf_migration_supported(gt)) return 0; =20 diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration_types.h b/drivers/= gpu/drm/xe/xe_gt_sriov_pf_migration_types.h index 1f3110b6d44fa..9d672feac5f04 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration_types.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration_types.h @@ -30,9 +30,6 @@ struct xe_gt_sriov_state_snapshot { * Used by the PF driver to maintain non-VF specific per-GT data. */ struct xe_gt_sriov_pf_migration { - /** @supported: indicates whether the feature is supported */ - bool supported; - /** @snapshot_lock: protects all VFs snapshots */ struct mutex snapshot_lock; }; diff --git a/drivers/gpu/drm/xe/xe_sriov_pf.c b/drivers/gpu/drm/xe/xe_sriov= _pf.c index bc1ab9ee31d92..95743c7af8050 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf.c +++ b/drivers/gpu/drm/xe/xe_sriov_pf.c @@ -15,6 +15,7 @@ #include "xe_sriov.h" #include "xe_sriov_pf.h" #include "xe_sriov_pf_helpers.h" +#include "xe_sriov_pf_migration.h" #include "xe_sriov_pf_service.h" #include "xe_sriov_printk.h" =20 @@ -101,6 +102,10 @@ int xe_sriov_pf_init_early(struct xe_device *xe) if (err) return err; =20 + err =3D xe_sriov_pf_migration_init(xe); + if (err) + return err; + xe_sriov_pf_service_init(xe); =20 return 0; diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_migration.c b/drivers/gpu/drm/x= e/xe_sriov_pf_migration.c new file mode 100644 index 0000000000000..8c523c392f98b --- /dev/null +++ b/drivers/gpu/drm/xe/xe_sriov_pf_migration.c @@ -0,0 +1,41 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright =C2=A9 2025 Intel Corporation + */ + +#include "xe_sriov.h" +#include "xe_sriov_pf_migration.h" + +/** + * xe_sriov_pf_migration_supported() - Check if SR-IOV VF migration is sup= ported by the device + * @xe: the &xe_device + * + * Return: true if migration is supported, false otherwise + */ +bool xe_sriov_pf_migration_supported(struct xe_device *xe) +{ + xe_assert(xe, IS_SRIOV_PF(xe)); + + return xe->sriov.pf.migration.supported; +} + +static bool pf_check_migration_support(struct xe_device *xe) +{ + /* XXX: for now this is for feature enabling only */ + return IS_ENABLED(CONFIG_DRM_XE_DEBUG); +} + +/** + * xe_sriov_pf_migration_init() - Initialize support for SR-IOV VF migrati= on. + * @xe: the &xe_device + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_sriov_pf_migration_init(struct xe_device *xe) +{ + xe_assert(xe, IS_SRIOV_PF(xe)); + + xe->sriov.pf.migration.supported =3D pf_check_migration_support(xe); + + return 0; +} diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_migration.h b/drivers/gpu/drm/x= e/xe_sriov_pf_migration.h new file mode 100644 index 0000000000000..d2b4a24165438 --- /dev/null +++ b/drivers/gpu/drm/xe/xe_sriov_pf_migration.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright =C2=A9 2025 Intel Corporation + */ + +#ifndef _XE_SRIOV_PF_MIGRATION_H_ +#define _XE_SRIOV_PF_MIGRATION_H_ + +#include + +struct xe_device; + +int xe_sriov_pf_migration_init(struct xe_device *xe); +bool xe_sriov_pf_migration_supported(struct xe_device *xe); + +#endif diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_migration_types.h b/drivers/gpu= /drm/xe/xe_sriov_pf_migration_types.h new file mode 100644 index 0000000000000..e69de29bb2d1d diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_types.h b/drivers/gpu/drm/xe/xe= _sriov_pf_types.h index c753cd59aed2b..24d22afeececa 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_types.h +++ b/drivers/gpu/drm/xe/xe_sriov_pf_types.h @@ -39,6 +39,12 @@ struct xe_device_pf { /** @provision: device level provisioning data. */ struct xe_sriov_pf_provision provision; =20 + /** @migration: device level VF migration data */ + struct { + /** @migration.supported: indicates whether VF migration feature is supp= orted */ + bool supported; + } migration; + /** @service: device level service data. */ struct xe_sriov_pf_service service; =20 --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id ADBC52BE631; Tue, 21 Oct 2025 22:42:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=198.175.65.15 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086555; cv=fail; b=YyIB9dl5bYKxroAbFQkiTGaaHytPGwlRNkVybmIzKmC4JTLUhzCG5ktCNPOSTWKFUB/OaqyOgYL7tRzI6XIkko09kY86/SLCl1Kl0A3/p4n2ktTVIzjbHONIfRxzD0iME5WjH5XIJAVcvpKTJIy7WcLrmlwDFURcOBZHGHW0Bjg= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086555; c=relaxed/simple; bh=TGkR44qN2DoNy6mpLqkgR5QKxW1Qkbi/B8dm2FfJFKA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=ZPD+1sYOPQZpAeH80pK+Sxx3g7NnuAMd3iWGHgkWYQDYbSOQwMTJ9QLtplJHMwBEeKF4/TAp9QU8CcuQfXKeWkliHi65axgHr1v07j0SDd8asu3xB8TE6Qo5m1ErHZ0vHpuCUgogu4NThtvAugp/YUjsOcm6xsO0n472zIOkn2c= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=hacxdl3l; arc=fail smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="hacxdl3l" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086554; x=1792622554; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=TGkR44qN2DoNy6mpLqkgR5QKxW1Qkbi/B8dm2FfJFKA=; b=hacxdl3lOfQmeUP/WT4QjFWrQ5T5kWlb4soFhztPvLonGr6yVhDox98I 5KOqtVF+skWaURtC0oiPp6QQY2ffAqt1/qAY4PFwKx8+10khlatBxOxyS Oopkl35MPGKcDxbAySskcJpgUxApmLXncP1K+wt623IdGECjIQ4w4TK/f nP3EHjNCohiqPfCfMQyWhUaxKrreB1MfAGrRyikTVYsFRkFadKBV+RMr9 lIBEFba1UAHLn1/L9+GUOjd1kxp1qgF0GxWbEjXBUwRdtOJmLyddB/mPB cJgiM+rQhkQWOll//u+UxmkvNX/HUUJG25/kD1K3aqlQUgydillxpszLv Q==; X-CSE-ConnectionGUID: J3vSzx+DQ7a0eHIVmYFMPQ== X-CSE-MsgGUID: mZTYs+D9RL+m3AljJPHN1w== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="66866265" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="66866265" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:42:33 -0700 X-CSE-ConnectionGUID: +avmrByzR1i1ltQGs9nlrg== X-CSE-MsgGUID: 2mfmoJr5Q9SEplCTGRJRBw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="188988479" Received: from orsmsx902.amr.corp.intel.com ([10.22.229.24]) by fmviesa004.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:42:32 -0700 Received: from ORSMSX903.amr.corp.intel.com (10.22.229.25) by ORSMSX902.amr.corp.intel.com (10.22.229.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:42:32 -0700 Received: from ORSEDG902.ED.cps.intel.com (10.7.248.12) by ORSMSX903.amr.corp.intel.com (10.22.229.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:42:32 -0700 Received: from PH7PR06CU001.outbound.protection.outlook.com (52.101.201.5) by edgegateway.intel.com (134.134.137.112) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:42:31 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=vHfgJ18KXOqlfa+4o5LyuhqqsrwcDNJUjmoAk+BpG/bF+TavjNiVARa44lWZt7lJtmoiIs4AGTZSnZeOCBcEx7Dx8YgK9fbsq624Oy5jimWwptfP6FxJeYkvLDY2AtobTcV7YCzSNnD+M50CC/Ihc28Hz8ed/oBQ7DmaRjjZD5y1E9wvInHAFOiLP/99e7vaWXi+fwgKnfsCJiPaADK648/Bg81B1z+SM9MaqkKq6nym/tIs/uSf0wbnd+TabaPcr3lzxQLxGbJzUkNMsZjTpszLL9jI7Vasy1hStrw7mNNHR/dSHrdiuE0bwZHi3Rq044iISl40uZCMEAavW4F+Wg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=mACTcjUkUBoWInY9xKsVEBolLBSNmkVSeGTAadlbccY=; b=tn4+pUXLe18AYhqnxQxyrqUPaubCUdOI75PUO2bvsx5Swe3g+u4wCh7gM+ubvsgWPkJFvfdnDnZcmpDhH1S84Dw6aloetlreyvBITR77XoBUeIc4jsugGbaHqzBkN8eb8z43WQ/OebS7sASCtj8VXw/emke+ImDPcUTMzdGa4+do3JYV2JtfysbJrlQyPG6fhw5VDVYSSjIVPiRZGGHPN2POkMEhInasrxQQc/L4qEfgDYV0WQFu4eIkBHPxctRqZgolNHXIONcmjin0sOB3/J1BidzbEo6JB+SY7UPg8n4y876Gprr2m8Sst570gh6I0IU3bUyAk4E+t/IxnSIv9Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by PH8PR11MB6753.namprd11.prod.outlook.com (2603:10b6:510:1c8::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Tue, 21 Oct 2025 22:42:25 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:42:25 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 03/26] drm/xe/pf: Add save/restore control state stubs and connect to debugfs Date: Wed, 22 Oct 2025 00:41:10 +0200 Message-ID: <20251021224133.577765-4-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VI1P194CA0029.EURP194.PROD.OUTLOOK.COM (2603:10a6:803:3c::18) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|PH8PR11MB6753:EE_ X-MS-Office365-Filtering-Correlation-Id: 55c536fd-1028-456b-35f1-08de10f31ae5 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|366016|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?ZTFPMWV1azVTQ1N2eU5sZFdmR3hWcXpvYUhrQ05iNmUwOVZUKzVEM3hMQXdo?= =?utf-8?B?ZENRS0VoNVIwTDB0eXB2S1pDalgza3VrbG1HRFc2Q01mQzFqRk5PZGxxcXhI?= =?utf-8?B?WWhPSlZ2YUI2dkdxN0RnMzA5bmtvT1R5a2hNREp6VFMzOW10UDB6WEZRZVA1?= =?utf-8?B?alkzZjl3NTdDWTczS1lBVmFvK2RDVGJwWFlBWDU3OEsvMmo2YVAya2dVeUo5?= =?utf-8?B?NUpEMG9WcjdkMXF0VmNVUUZUSXlFZWMwcVRiM2dGdzRoN0M3OXl2bEZ4ZnVj?= =?utf-8?B?ZUs2dUxXY3I1d3d1OEZoUHcySzZWelFUSFo5b0c3YTFhOHN3QlNnWlJxTlVy?= =?utf-8?B?clh5MmVpZjhVNzVobVgzTnZMRDkzTk1CWEh4QzZQc1VJU2dCMGJuWG1HM2ls?= =?utf-8?B?VUo1eFFVei96cjljMitVMjVaMVZLODRnZHVZYndLU01kcEtZUjlwKzl6V3gz?= =?utf-8?B?SzJSaVpKWDNqZ1Y2TnlLVWpjWjNBYzF1c09FSHhacGYzNnFwUDNBM1JZQzJv?= =?utf-8?B?UWd0enlvUU0wOS9ML1B1dVVLUEtOUmNmY215SHE4SDV5SXNaWFJxcnB2Z1Za?= =?utf-8?B?ZU1BbEJKMkhZSks3N3pmck9jemR3d0ZSZ01tN0EvUXc0Y204eXEwNVhIZVoy?= =?utf-8?B?NWxSenczd2FiWVFnYzhmODUxYlZXcVRBMTFBZDNML3ByWnBTSG93dkE4WXBU?= =?utf-8?B?UXk0M0p6dFQ5cTVFTGs4YnEvOHl5eXNyRGlHMFBXNTExUHFWdGgvNG41dUZk?= =?utf-8?B?VGl4MER0eW9leVk5Z1o3ZWRXMWZoMGNtMS9zdk14NlhFQ2Myei9oczJYUWRV?= =?utf-8?B?MlJjcUxTc0YvcE1iaE9qamRscXZ1TmYvYmpCWXUzWGhmWVNEVllvUUZ1MWto?= =?utf-8?B?cGNWRnZQUU5IalM1OWR4MTcva2xMTmcyM2gycy9PYjk0WWFhK3BPdnJSa0hm?= =?utf-8?B?RnJya2YrbXNhZmxobWltV01IMjZ5SmhqREt0RDA1cnF1OTdDWjRXWWRqZFN3?= =?utf-8?B?YWJQWVpwLzgyNmZra25XeStKelB6Y1RPTW5rcmpQYmI1VW1vU3hLVGFiMmhJ?= =?utf-8?B?a2QxMEVybTlGcHI1S1BIVmNXTUhOckE2T0YyMWpES0I4MityVktHSXBPOFl0?= =?utf-8?B?Rk9mUjNCUTY0cTc1djlTd2MwdVNQNzhsUHpSb2NuT1RQamp3ZjZyNXI2TGIw?= =?utf-8?B?MGRLZG5vVWxzSXVRUmhFaDNKNFY3d2tPYzVJWXZDd3ZiRERhQ1U1d1RST2VO?= =?utf-8?B?cjRORDdSZXNFMVl3eVNKY0x1dHVtYWxNeHZwb2xFMmt6L0JLUDlZd1Z6YnNj?= =?utf-8?B?S0lldy9La2ZXZkpjalpFTHlKaGVvcm5qZ09Bc3d3N2F2Q1hjRmJEN1FvZURy?= =?utf-8?B?S0RpNVF3YUtERUg2ZXFSZ1c5UnN6VHpzU3JBQUR2UXFHcE0rYmNXZEcwVEZV?= =?utf-8?B?MTU1SmltZGttUDdHTnkxbkZSaHBqNE1PN1J6VzEwL2lLMjcyZGFoMCtMMGVY?= =?utf-8?B?Qkx3V0FMbEdQY3NmekliYnBURUR6TXVoR3FCVUFlLzdocGg5cWk0VXVuMXdD?= =?utf-8?B?MU5MVmF3a2pJMloxQnJ5NlZSVVJ0aUdDdTVjejhDRjd2Qm41SkdqYzZmRjlR?= =?utf-8?B?Ukh5VUNRODRqSExhSExnUXg5SVZVaFNSb292dm5od1pPTU1VQUU2YVVmZlhv?= =?utf-8?B?WEZ0bnV5c2pTRHllNitGbWxoVkZNbUxwZ290VFMxM3dmZkRrdjJrRTAwR3Fx?= =?utf-8?B?NXV5cENxSFpXOHN0ZFBhbWlqTE9VVkZGU1VsUG5ZdXk0K1hBN1FQTzN6ZTV4?= =?utf-8?B?V2h5d0Eva1c0dy9KMHRYYkZ2T2tCRGhYcFd1L3dZYTFYajdURVFiUlNiYjZr?= =?utf-8?B?TXE2cFdadER4MGhCV3NORDNYODJOWkl6M2RWY1pUbXJoNk1yQXNRZTdrV0Y0?= =?utf-8?B?M2VPOGRBemxCTnlEcFZJcjd4V0hrR00rdk5jcWVQcTA2S0M0TE1CWloyMUxZ?= =?utf-8?Q?9Tg48Q8n6w/INkjYZxCyN73d6QtNds=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(366016)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?S1hxV3dKQUZLOG9DVHdidExUYnRGYlJSRHMzZW56YThCbE5nV1pOWXdtdlFD?= =?utf-8?B?clRjMGViV3J0OG9JR2pPQmRGcmZPVkdpdXR4UlBwcklPNUFNNUpkSDVkZ0xL?= =?utf-8?B?SGpMdkdLUXpnTkpWZ3hNbGJoZzdlWkJCbWt0VzhxWWtQK09rWVhIY0daYnlP?= =?utf-8?B?SmtxVmdqV01aVVdZQTJYQ0RrSkhQQ290WXpvOHZLNFRiYkFOamNFbEEvTm54?= =?utf-8?B?YUhZdHBrS0ZHOU9zSDVwb3lVOWNEaVJUbTV0TW4zcEtUVUR0V1hmem1GcHVD?= =?utf-8?B?Y1p2WjM4TGNLeWo0SGNONW12OVRSZ0RteHN6Z0FjSHBmRWQxdDNZVzJxWUhP?= =?utf-8?B?cDBSbmxCTVNYd1Bqa0dqOGk0L3U5Z01qNDBsejB6WUtsSGZ3N2hteDE2bHh5?= =?utf-8?B?NGptVTBzT3Y1ajVpY1BVUHNkSXZrZDlZZ1hCSWRZOUJ4dzR1QjFLdmV6K2Jx?= =?utf-8?B?b0FISGIybE85ckpxWkNEek9JZ3dzYnZmL0MvSnI3THR3cnBBRkk5Zkw3MXBL?= =?utf-8?B?TG4rRzNuSklnbDRwbFR1SUdsSlFveUtCR0hTRDdYVU1mK21xd0IvNmc4VEcv?= =?utf-8?B?eXhqUnQ3Q2Yvck1EUXBDbkVncTVtblR2RllWdzdnVlZ3UFFaVTVraXlBdHVy?= =?utf-8?B?RlkrL2FzZ3l0L0xjZnNYM05pNXc4RHhOOUpvQXAyY3hNaDRZeTZGME1Ca0F5?= =?utf-8?B?bmltaEZvSnFlTkEyWVQ4M25Pc3p4WFErUEgxQ1VZWVdWemsxTUxudUV4NnZN?= =?utf-8?B?bjRFQTFWa1VHVFZtMHJtdEVreTIyS0RNSEx1OHZVVjl4RVRqYjFyN1RzNmx1?= =?utf-8?B?ZjNDdVM0Mk8vZnRBUzZ6UEt4VVQrUXpWeWtUZFpPSkJWemxBSklRTGhyc2Vo?= =?utf-8?B?elYxNFM5TmtKNVd0WWVrWXZZNEVTRHkxZkh2dmhOdlk2VEN0VUJjLzNkYTdG?= =?utf-8?B?aGIvQW9GVUFHS3J0bWozZnAxR2gwc2ltb1FKcjNoRkpOVUYxRU5ydzBzMzVz?= =?utf-8?B?bTVpK3JENllHWlhzUFFqakcvOEhNR2JONTZLWGQ0M0FoaXRBL0FzNTQ3UWtX?= =?utf-8?B?aFlqWXdjQ1RwZG44ZytKNHVYNXNQVlFXajBFU2pab3NCNDd6ejZlUVYzK0g3?= =?utf-8?B?YzNSTWFzTk1SaVF6NnRac3BTb3E1ZGQyaFM0YW1QbS9qRVQxOExNVVd1ZGcz?= =?utf-8?B?NDN0d2hXcERqcndFSFE4ditpcEw3WDNrVElQbUU3c0xPd0x2akwzZ2pYb25C?= =?utf-8?B?c25Ua2lkOENMZDFxUUJqTTU3QUQ1bmwzS3NXY1VLWTJHTlR1M1ZBMXB4Q0F4?= =?utf-8?B?Zm9ERU8xaW9udkFUeG51TFRoTldqSHpIRzIxTjNTK2tvL2s0dnhjME13bFky?= =?utf-8?B?Z3JXN2FLU09WNWF0Y1lJVkVGRUhaV05Nd3Z5Q2JaVTdNdHE2Z0V1c3JYRHpx?= =?utf-8?B?b1hqb1NjM3VEc2dYczVQRU9RcDNlU3AxTnIvRXJielpTNWVNOVNEcHV6UWZz?= =?utf-8?B?ZGc2cGZhY0Zac2Q1bGlLeldtRTlTSnlOem5Oc0grQnRJZGhZM2hRTGJZN0M1?= =?utf-8?B?SzRHcHE5enJVc3B2WkpTN21BUi9VdFNYUDRvYjZBNnZMU0IxWkFHTGdVZ1VT?= =?utf-8?B?TkVYUlZCWk9zcTdtbEI1clA2c1h0aDNQNHNUQVc2bnpFMlpxM1NkNWVOMW5Z?= =?utf-8?B?K09Xd3JjZkIzY0JGcjVPZ0o4cXpsNkRRdDRXNGpJbFRCRkRna3B4VWRsRUd1?= =?utf-8?B?ZUJ3YmFSdkZ1ZmNqalNHWnk1K1pZZXpHV1FvNDNaejNGaGl3ZHh3NHZlUWE2?= =?utf-8?B?MWNsdWRGRWI2VVFYODNaUHFoQUw4N2NTb1ZsRnJpa0R2MXhBTTJheXpIMzUv?= =?utf-8?B?R3B3SXZtcktyYTB3bDZqL0FqaE15bjM0S09KRW9memlsSlpZdTJrelJBUUVz?= =?utf-8?B?R3liZWExVUV4RFhMem9idGQvanRaVWtKbEV3RFNVSTdMcklEOUhvc0dxZnEx?= =?utf-8?B?MVZ0Z01pSEtiQXpnSkFTME84bjhkbTgvT3RMeFprN1M0MVdQTlZxemh3dVRk?= =?utf-8?B?dERSbUtVTE9acUQzWVhlUUJrTkxZYkYrckl5aFRjVHNNT0c5cmszMVBzNXIv?= =?utf-8?B?clRBbGdKU2JUR3Z4Q0FRY21YNHB2QkNKYmlYbEFzRjBzTFQwekxDc3BqNmNG?= =?utf-8?B?aUE9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: 55c536fd-1028-456b-35f1-08de10f31ae5 X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:42:25.0241 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: sXz5+AWjjU+cqku7Isz+cozx7AZwFeREO6kqO9di4x4eOaaNT61qEtJC+F4i86CAydOtPmyY4WU3Py0q2gUFJLo76v7XQKQupQRgMjYSnDw= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR11MB6753 X-OriginatorOrg: intel.com The states will be used by upcoming changes to produce (in case of save) or consume (in case of resume) the VF migration data. Signed-off-by: Micha=C5=82 Winiarski Reviewed-by: Michal Wajdeczko --- drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 248 ++++++++++++++++++ drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h | 6 + .../gpu/drm/xe/xe_gt_sriov_pf_control_types.h | 14 + drivers/gpu/drm/xe/xe_sriov_pf_control.c | 96 +++++++ drivers/gpu/drm/xe/xe_sriov_pf_control.h | 4 + drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c | 38 +++ 6 files changed, 406 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c b/drivers/gpu/drm/= xe/xe_gt_sriov_pf_control.c index 2e6bd3d1fe1da..b770916e88e53 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c @@ -184,6 +184,12 @@ static const char *control_bit_to_string(enum xe_gt_sr= iov_control_bits bit) CASE2STR(PAUSE_SAVE_GUC); CASE2STR(PAUSE_FAILED); CASE2STR(PAUSED); + CASE2STR(SAVE_WIP); + CASE2STR(SAVE_FAILED); + CASE2STR(SAVED); + CASE2STR(RESTORE_WIP); + CASE2STR(RESTORE_FAILED); + CASE2STR(RESTORED); CASE2STR(RESUME_WIP); CASE2STR(RESUME_SEND_RESUME); CASE2STR(RESUME_FAILED); @@ -208,6 +214,8 @@ static unsigned long pf_get_default_timeout(enum xe_gt_= sriov_control_bits bit) case XE_GT_SRIOV_STATE_FLR_WIP: case XE_GT_SRIOV_STATE_FLR_RESET_CONFIG: return 5 * HZ; + case XE_GT_SRIOV_STATE_RESTORE_WIP: + return 20 * HZ; default: return HZ; } @@ -329,6 +337,8 @@ static void pf_exit_vf_mismatch(struct xe_gt *gt, unsig= ned int vfid) pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSE_FAILED); pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESUME_FAILED); pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_FAILED); + pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_FAILED); + pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_FAILED); } =20 #define pf_enter_vf_state_machine_bug(gt, vfid) ({ \ @@ -359,6 +369,8 @@ static void pf_queue_vf(struct xe_gt *gt, unsigned int = vfid) =20 static void pf_exit_vf_flr_wip(struct xe_gt *gt, unsigned int vfid); static void pf_exit_vf_stop_wip(struct xe_gt *gt, unsigned int vfid); +static void pf_exit_vf_save_wip(struct xe_gt *gt, unsigned int vfid); +static void pf_exit_vf_restore_wip(struct xe_gt *gt, unsigned int vfid); static void pf_exit_vf_pause_wip(struct xe_gt *gt, unsigned int vfid); static void pf_exit_vf_resume_wip(struct xe_gt *gt, unsigned int vfid); =20 @@ -380,6 +392,8 @@ static void pf_exit_vf_wip(struct xe_gt *gt, unsigned i= nt vfid) =20 pf_exit_vf_flr_wip(gt, vfid); pf_exit_vf_stop_wip(gt, vfid); + pf_exit_vf_save_wip(gt, vfid); + pf_exit_vf_restore_wip(gt, vfid); pf_exit_vf_pause_wip(gt, vfid); pf_exit_vf_resume_wip(gt, vfid); =20 @@ -399,6 +413,8 @@ static void pf_enter_vf_ready(struct xe_gt *gt, unsigne= d int vfid) pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSED); pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_STOPPED); pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESUMED); + pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVED); + pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORED); pf_exit_vf_mismatch(gt, vfid); pf_exit_vf_wip(gt, vfid); } @@ -675,6 +691,8 @@ static void pf_enter_vf_resumed(struct xe_gt *gt, unsig= ned int vfid) { pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESUMED); pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSED); + pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVED); + pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORED); pf_exit_vf_mismatch(gt, vfid); pf_exit_vf_wip(gt, vfid); } @@ -753,6 +771,16 @@ int xe_gt_sriov_pf_control_resume_vf(struct xe_gt *gt,= unsigned int vfid) return -EPERM; } =20 + if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WIP)) { + xe_gt_sriov_dbg(gt, "VF%u save is in progress!\n", vfid); + return -EBUSY; + } + + if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WIP)) { + xe_gt_sriov_dbg(gt, "VF%u restore is in progress!\n", vfid); + return -EBUSY; + } + if (!pf_enter_vf_resume_wip(gt, vfid)) { xe_gt_sriov_dbg(gt, "VF%u resume already in progress!\n", vfid); return -EALREADY; @@ -776,6 +804,218 @@ int xe_gt_sriov_pf_control_resume_vf(struct xe_gt *gt= , unsigned int vfid) return -ECANCELED; } =20 +static void pf_exit_vf_save_wip(struct xe_gt *gt, unsigned int vfid) +{ + pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WIP); +} + +static void pf_enter_vf_saved(struct xe_gt *gt, unsigned int vfid) +{ + if (!pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVED)) + pf_enter_vf_state_machine_bug(gt, vfid); + + xe_gt_sriov_dbg(gt, "VF%u saved!\n", vfid); + + pf_exit_vf_mismatch(gt, vfid); + pf_exit_vf_wip(gt, vfid); + pf_expect_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSED); +} + +static bool pf_handle_vf_save(struct xe_gt *gt, unsigned int vfid) +{ + if (!pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WIP)) + return false; + + pf_enter_vf_saved(gt, vfid); + + return true; +} + +static bool pf_enter_vf_save_wip(struct xe_gt *gt, unsigned int vfid) +{ + if (pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WIP)) { + pf_enter_vf_wip(gt, vfid); + pf_queue_vf(gt, vfid); + return true; + } + + return false; +} + +/** + * xe_gt_sriov_pf_control_trigger_save_vf() - Start an SR-IOV VF migration= data save sequence. + * @gt: the &xe_gt + * @vfid: the VF identifier + * + * This function is for PF only. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_gt_sriov_pf_control_trigger_save_vf(struct xe_gt *gt, unsigned int = vfid) +{ + if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_STOPPED)) { + xe_gt_sriov_dbg(gt, "VF%u is stopped!\n", vfid); + return -EPERM; + } + + if (!pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSED)) { + xe_gt_sriov_dbg(gt, "VF%u is not paused!\n", vfid); + return -EPERM; + } + + if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WIP)) { + xe_gt_sriov_dbg(gt, "VF%u restore is in progress!\n", vfid); + return -EBUSY; + } + + if (!pf_enter_vf_save_wip(gt, vfid)) { + xe_gt_sriov_dbg(gt, "VF%u save already in progress!\n", vfid); + return -EALREADY; + } + + return 0; +} + +/** + * xe_gt_sriov_pf_control_finish_save_vf() - Complete a VF migration data = save sequence. + * @gt: the &xe_gt + * @vfid: the VF identifier + * + * This function is for PF only. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_gt_sriov_pf_control_finish_save_vf(struct xe_gt *gt, unsigned int v= fid) +{ + if (!pf_expect_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVED)) { + pf_enter_vf_mismatch(gt, vfid); + return -EIO; + } + + pf_expect_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSED); + + return 0; +} + +static void pf_exit_vf_restore_wip(struct xe_gt *gt, unsigned int vfid) +{ + pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WIP); +} + +static void pf_enter_vf_restored(struct xe_gt *gt, unsigned int vfid) +{ + if (!pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORED)) + pf_enter_vf_state_machine_bug(gt, vfid); + + xe_gt_sriov_dbg(gt, "VF%u restored!\n", vfid); + + pf_exit_vf_mismatch(gt, vfid); + pf_exit_vf_wip(gt, vfid); + pf_expect_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSED); +} + +static bool pf_handle_vf_restore(struct xe_gt *gt, unsigned int vfid) +{ + if (!pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WIP)) + return false; + + pf_enter_vf_restored(gt, vfid); + + return true; +} + +static bool pf_enter_vf_restore_wip(struct xe_gt *gt, unsigned int vfid) +{ + if (pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WIP)) { + pf_enter_vf_wip(gt, vfid); + pf_queue_vf(gt, vfid); + return true; + } + + return false; +} + +/** + * xe_gt_sriov_pf_control_trigger restore_vf() - Start an SR-IOV VF migrat= ion data restore sequence. + * @gt: the &xe_gt + * @vfid: the VF identifier + * + * This function is for PF only. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_gt_sriov_pf_control_trigger_restore_vf(struct xe_gt *gt, unsigned i= nt vfid) +{ + if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_STOPPED)) { + xe_gt_sriov_dbg(gt, "VF%u is stopped!\n", vfid); + return -EPERM; + } + + if (!pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSED)) { + xe_gt_sriov_dbg(gt, "VF%u is not paused!\n", vfid); + return -EPERM; + } + + if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WIP)) { + xe_gt_sriov_dbg(gt, "VF%u save is in progress!\n", vfid); + return -EBUSY; + } + + if (!pf_enter_vf_restore_wip(gt, vfid)) { + xe_gt_sriov_dbg(gt, "VF%u restore already in progress!\n", vfid); + return -EALREADY; + } + + return 0; +} + +static int pf_wait_vf_restore_done(struct xe_gt *gt, unsigned int vfid) +{ + unsigned long timeout =3D pf_get_default_timeout(XE_GT_SRIOV_STATE_RESTOR= E_WIP); + int err; + + err =3D pf_wait_vf_wip_done(gt, vfid, timeout); + if (err) { + xe_gt_sriov_notice(gt, "VF%u RESTORE didn't finish in %u ms (%pe)\n", + vfid, jiffies_to_msecs(timeout), ERR_PTR(err)); + return err; + } + + if (!pf_expect_vf_not_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_FAILED)) + return -EIO; + + return 0; +} + +/** + * xe_gt_sriov_pf_control_finish_restore_vf() - Complete a VF migration da= ta restore sequence. + * @gt: the &xe_gt + * @vfid: the VF identifier + * + * This function is for PF only. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_gt_sriov_pf_control_finish_restore_vf(struct xe_gt *gt, unsigned in= t vfid) +{ + int ret; + + if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WIP)) { + ret =3D pf_wait_vf_restore_done(gt, vfid); + if (ret) + return ret; + } + + if (!pf_expect_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORED)) { + pf_enter_vf_mismatch(gt, vfid); + return -EIO; + } + + pf_expect_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSED); + + return 0; +} + /** * DOC: The VF STOP state machine * @@ -817,6 +1057,8 @@ static void pf_enter_vf_stopped(struct xe_gt *gt, unsi= gned int vfid) =20 pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESUMED); pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSED); + pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVED); + pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORED); pf_exit_vf_mismatch(gt, vfid); pf_exit_vf_wip(gt, vfid); } @@ -1461,6 +1703,12 @@ static bool pf_process_vf_state_machine(struct xe_gt= *gt, unsigned int vfid) if (pf_exit_vf_pause_save_guc(gt, vfid)) return true; =20 + if (pf_handle_vf_save(gt, vfid)) + return true; + + if (pf_handle_vf_restore(gt, vfid)) + return true; + if (pf_exit_vf_resume_send_resume(gt, vfid)) return true; =20 diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h b/drivers/gpu/drm/= xe/xe_gt_sriov_pf_control.h index 8a72ef3778d47..abc233f6302ed 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h @@ -14,8 +14,14 @@ struct xe_gt; int xe_gt_sriov_pf_control_init(struct xe_gt *gt); void xe_gt_sriov_pf_control_restart(struct xe_gt *gt); =20 +bool xe_gt_sriov_pf_control_check_vf_data_wip(struct xe_gt *gt, unsigned i= nt vfid); + int xe_gt_sriov_pf_control_pause_vf(struct xe_gt *gt, unsigned int vfid); int xe_gt_sriov_pf_control_resume_vf(struct xe_gt *gt, unsigned int vfid); +int xe_gt_sriov_pf_control_trigger_save_vf(struct xe_gt *gt, unsigned int = vfid); +int xe_gt_sriov_pf_control_finish_save_vf(struct xe_gt *gt, unsigned int v= fid); +int xe_gt_sriov_pf_control_trigger_restore_vf(struct xe_gt *gt, unsigned i= nt vfid); +int xe_gt_sriov_pf_control_finish_restore_vf(struct xe_gt *gt, unsigned in= t vfid); int xe_gt_sriov_pf_control_stop_vf(struct xe_gt *gt, unsigned int vfid); int xe_gt_sriov_pf_control_trigger_flr(struct xe_gt *gt, unsigned int vfid= ); int xe_gt_sriov_pf_control_sync_flr(struct xe_gt *gt, unsigned int vfid, b= ool sync); diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h b/drivers/gp= u/drm/xe/xe_gt_sriov_pf_control_types.h index c80b7e77f1ad2..e113dc98b33ce 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h @@ -31,6 +31,12 @@ * @XE_GT_SRIOV_STATE_PAUSE_SAVE_GUC: indicates that the PF needs to save = the VF GuC state. * @XE_GT_SRIOV_STATE_PAUSE_FAILED: indicates that a VF pause operation ha= s failed. * @XE_GT_SRIOV_STATE_PAUSED: indicates that the VF is paused. + * @XE_GT_SRIOV_STATE_SAVE_WIP: indicates that VF save operation is in pro= gress. + * @XE_GT_SRIOV_STATE_SAVE_FAILED: indicates that VF save operation has fa= iled. + * @XE_GT_SRIOV_STATE_SAVED: indicates that VF data is saved. + * @XE_GT_SRIOV_STATE_RESTORE_WIP: indicates that VF restore operation is = in progress. + * @XE_GT_SRIOV_STATE_RESTORE_FAILED: indicates that VF restore operation = has failed. + * @XE_GT_SRIOV_STATE_RESTORED: indicates that VF data is restored. * @XE_GT_SRIOV_STATE_RESUME_WIP: indicates the a VF resume operation is i= n progress. * @XE_GT_SRIOV_STATE_RESUME_SEND_RESUME: indicates that the PF is about t= o send RESUME command. * @XE_GT_SRIOV_STATE_RESUME_FAILED: indicates that a VF resume operation = has failed. @@ -63,6 +69,14 @@ enum xe_gt_sriov_control_bits { XE_GT_SRIOV_STATE_PAUSE_FAILED, XE_GT_SRIOV_STATE_PAUSED, =20 + XE_GT_SRIOV_STATE_SAVE_WIP, + XE_GT_SRIOV_STATE_SAVE_FAILED, + XE_GT_SRIOV_STATE_SAVED, + + XE_GT_SRIOV_STATE_RESTORE_WIP, + XE_GT_SRIOV_STATE_RESTORE_FAILED, + XE_GT_SRIOV_STATE_RESTORED, + XE_GT_SRIOV_STATE_RESUME_WIP, XE_GT_SRIOV_STATE_RESUME_SEND_RESUME, XE_GT_SRIOV_STATE_RESUME_FAILED, diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_control.c b/drivers/gpu/drm/xe/= xe_sriov_pf_control.c index 416d00a03fbb7..8d8a01faf5291 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_control.c +++ b/drivers/gpu/drm/xe/xe_sriov_pf_control.c @@ -149,3 +149,99 @@ int xe_sriov_pf_control_sync_flr(struct xe_device *xe,= unsigned int vfid) =20 return 0; } + +/** + * xe_sriov_pf_control_trigger_save_vf - Start a VF migration data SAVE se= quence on all GTs. + * @xe: the &xe_device + * @vfid: the VF identifier + * + * This function is for PF only. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_sriov_pf_control_trigger_save_vf(struct xe_device *xe, unsigned int= vfid) +{ + struct xe_gt *gt; + unsigned int id; + int ret; + + for_each_gt(gt, xe, id) { + ret =3D xe_gt_sriov_pf_control_trigger_save_vf(gt, vfid); + if (ret) + return ret; + } + + return 0; +} + +/** + * xe_sriov_pf_control_finish_save_vf - Complete a VF migration data SAVE = sequence on all GTs. + * @xe: the &xe_device + * @vfid: the VF identifier + * + * This function is for PF only. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_sriov_pf_control_finish_save_vf(struct xe_device *xe, unsigned int = vfid) +{ + struct xe_gt *gt; + unsigned int id; + int ret; + + for_each_gt(gt, xe, id) { + ret =3D xe_gt_sriov_pf_control_finish_save_vf(gt, vfid); + if (ret) + break; + } + + return ret; +} + +/** + * xe_sriov_pf_control_trigger_restore_vf - Start a VF migration data REST= ORE sequence on all GTs. + * @xe: the &xe_device + * @vfid: the VF identifier + * + * This function is for PF only. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_sriov_pf_control_trigger_restore_vf(struct xe_device *xe, unsigned = int vfid) +{ + struct xe_gt *gt; + unsigned int id; + int ret; + + for_each_gt(gt, xe, id) { + ret =3D xe_gt_sriov_pf_control_trigger_restore_vf(gt, vfid); + if (ret) + return ret; + } + + return ret; +} + +/** + * xe_sriov_pf_control_wait_restore_vf - Complete a VF migration data REST= ORE sequence in all GTs. + * @xe: the &xe_device + * @vfid: the VF identifier + * + * This function is for PF only. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_sriov_pf_control_finish_restore_vf(struct xe_device *xe, unsigned i= nt vfid) +{ + struct xe_gt *gt; + unsigned int id; + int ret; + + for_each_gt(gt, xe, id) { + ret =3D xe_gt_sriov_pf_control_finish_restore_vf(gt, vfid); + if (ret) + break; + } + + return ret; +} diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_control.h b/drivers/gpu/drm/xe/= xe_sriov_pf_control.h index 2d52d0ac1b28f..30318c1fba34e 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_control.h +++ b/drivers/gpu/drm/xe/xe_sriov_pf_control.h @@ -13,5 +13,9 @@ int xe_sriov_pf_control_resume_vf(struct xe_device *xe, u= nsigned int vfid); int xe_sriov_pf_control_stop_vf(struct xe_device *xe, unsigned int vfid); int xe_sriov_pf_control_reset_vf(struct xe_device *xe, unsigned int vfid); int xe_sriov_pf_control_sync_flr(struct xe_device *xe, unsigned int vfid); +int xe_sriov_pf_control_trigger_save_vf(struct xe_device *xe, unsigned int= vfid); +int xe_sriov_pf_control_finish_save_vf(struct xe_device *xe, unsigned int = vfid); +int xe_sriov_pf_control_trigger_restore_vf(struct xe_device *xe, unsigned = int vfid); +int xe_sriov_pf_control_finish_restore_vf(struct xe_device *xe, unsigned i= nt vfid); =20 #endif diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c b/drivers/gpu/drm/xe/= xe_sriov_pf_debugfs.c index a81aa05c55326..e0e6340c49106 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c +++ b/drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c @@ -136,11 +136,31 @@ static void pf_populate_pf(struct xe_device *xe, stru= ct dentry *pfdent) * =E2=94=82 =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 reset * =E2=94=82 =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 resume * =E2=94=82 =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 stop + * =E2=94=82 =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 save + * =E2=94=82 =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 restore * =E2=94=82 =E2=94=82 : * =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 vf2 * =E2=94=82 =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 ... */ =20 +static int from_file_read_to_vf_call(struct seq_file *s, + int (*call)(struct xe_device *, unsigned int)) +{ + struct dentry *dent =3D file_dentry(s->file)->d_parent; + struct xe_device *xe =3D extract_xe(dent); + unsigned int vfid =3D extract_vfid(dent); + int ret; + + xe_pm_runtime_get(xe); + ret =3D call(xe, vfid); + xe_pm_runtime_put(xe); + + if (ret < 0) + return ret; + + return 0; +} + static ssize_t from_file_write_to_vf_call(struct file *file, const char __= user *userbuf, size_t count, loff_t *ppos, int (*call)(struct xe_device *, unsigned int)) @@ -179,10 +199,26 @@ static ssize_t OP##_write(struct file *file, const ch= ar __user *userbuf, \ } \ DEFINE_SHOW_STORE_ATTRIBUTE(OP) =20 +#define DEFINE_VF_CONTROL_ATTRIBUTE_RW(OP) \ +static int OP##_show(struct seq_file *s, void *unused) \ +{ \ + return from_file_read_to_vf_call(s, \ + xe_sriov_pf_control_finish_##OP); \ +} \ +static ssize_t OP##_write(struct file *file, const char __user *userbuf, \ + size_t count, loff_t *ppos) \ +{ \ + return from_file_write_to_vf_call(file, userbuf, count, ppos, \ + xe_sriov_pf_control_trigger_##OP); \ +} \ +DEFINE_SHOW_STORE_ATTRIBUTE(OP) + DEFINE_VF_CONTROL_ATTRIBUTE(pause_vf); DEFINE_VF_CONTROL_ATTRIBUTE(resume_vf); DEFINE_VF_CONTROL_ATTRIBUTE(stop_vf); DEFINE_VF_CONTROL_ATTRIBUTE(reset_vf); +DEFINE_VF_CONTROL_ATTRIBUTE_RW(save_vf); +DEFINE_VF_CONTROL_ATTRIBUTE_RW(restore_vf); =20 static void pf_populate_vf(struct xe_device *xe, struct dentry *vfdent) { @@ -190,6 +226,8 @@ static void pf_populate_vf(struct xe_device *xe, struct= dentry *vfdent) debugfs_create_file("resume", 0200, vfdent, xe, &resume_vf_fops); debugfs_create_file("stop", 0200, vfdent, xe, &stop_vf_fops); debugfs_create_file("reset", 0200, vfdent, xe, &reset_vf_fops); + debugfs_create_file("save", 0600, vfdent, xe, &save_vf_fops); + debugfs_create_file("restore", 0600, vfdent, xe, &restore_vf_fops); } =20 static void pf_populate_with_tiles(struct xe_device *xe, struct dentry *de= nt, unsigned int vfid) --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 893312BE03C; Tue, 21 Oct 2025 22:42:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=198.175.65.11 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086556; cv=fail; b=aTXk7ME5guacoJewSCkqac77Qo08/4DNe+ou2xaF8plNGRiXABUoMBzsidumXOHn9WtUuaC9ltKOk9Vkxr0gg9ZfTAPjRGoXhY6G5j92qAWwLpTjHgMYZEP53CVek99MdM3esDylfWAH6phqbErZSRAG6jLGVNVL2YCIubT6vd0= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086556; c=relaxed/simple; bh=ncs/smUsaGDkTdIAfsfA0wjX93+VU6pKAYQISgt9TwU=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=FOUfTFFtCKYuwQE9tQ16CbuV/6VLMxDNDIW9B88DxfgMt7pmywv76UBsv8eCeY52iCWNz1vphzmNYQohLYFIy0L3Gxfx+8qwbWFSKw5CCzwI+fatcLrJFJQw2o90XlkFapCFpuo5cOx053OixzU1gsdEbeRY5abhEWIEsDx8eRQ= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=GXCq5p6o; arc=fail smtp.client-ip=198.175.65.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="GXCq5p6o" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086554; x=1792622554; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=ncs/smUsaGDkTdIAfsfA0wjX93+VU6pKAYQISgt9TwU=; b=GXCq5p6o7WIWaZX4JRt2MmjiZL1M+yU+MrjSE8gXBhDXsBCZ2jP+yND9 4+nSaySoDRArrp3FMTj8lQiWV85M6p7HNDbe25zf5B8maSnr4/Ci30I3n j8655dBX/ix1VlfrUDfv8Hdm7uyeFpuNJW0FnDVPG4gzYlnz0Da64ADU2 O/QStnpD95ZpOBuitSNYml8bXAwiunCcYjCgSoA77lq+ycsooOKt065bB 14GsNyWdloDaSanZ8qc9V2ztG2yG2K2hwch91UHQphlc7x8fieKa2GIAK yGpERZhKZ2zjrp3wJTC+nu0beIau2gtwbr4g7cZypU1cmUftWFIVgsfkp w==; X-CSE-ConnectionGUID: s3w11LUtQdOqASVq40ZAXQ== X-CSE-MsgGUID: dt+wp1mxRH+excrivc6XFg== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="73515169" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="73515169" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:42:33 -0700 X-CSE-ConnectionGUID: TORThV96RX2R/4FizdySiQ== X-CSE-MsgGUID: peEbsIt+RY+XCkqaquaJ2Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="183738497" Received: from orsmsx903.amr.corp.intel.com ([10.22.229.25]) by orviesa008.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:42:33 -0700 Received: from ORSMSX901.amr.corp.intel.com (10.22.229.23) by ORSMSX903.amr.corp.intel.com (10.22.229.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:42:32 -0700 Received: from ORSEDG902.ED.cps.intel.com (10.7.248.12) by ORSMSX901.amr.corp.intel.com (10.22.229.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:42:32 -0700 Received: from PH7PR06CU001.outbound.protection.outlook.com (52.101.201.5) by edgegateway.intel.com (134.134.137.112) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:42:32 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=ktTNl+o+RsFEzBwyu9kghAjU7MCGyr6X19E4DlJ/uhrrb6UaBkZgdku/gyeIJjBnfONhOHpvX47QH90Fixpo7jf4jTOGf6uOUkFdKOnRc9Wcca+9SArHK7Ujjs/wQQE4A9RrjfsPfPvtjUNWs+yMNh1AwwnMomJW9/ZV8dtkJFF1hjkyVw2fIAEU75dDJrfkE9tquUgZ01q8rtoHTKDosaVOum+nmSMTSQN+HGupWsI/t73svRZR83q0OMfSVvqCV87vWVphhQOku4x76k8EYxgGE62LdXRfzRXfZTD+dAnbGsltOHDP0h1/84l4XbMkDpn3qPHbOmNXK7uy+X7zGA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=yVqWm06bVIVBSkckawqvb9T/mjNXnw1B9tcYnpO2gYs=; b=jmo+rfXfb2guYFNMmFQ/yJh+PX29NWRO8BVcuu49c4KEPsEX2syLwQOwAAS/V9mStCyq6DFyOHVgTkuq44qo7fS8NeoLNq82SgQHAVxEkU/1RFwLIFlvtnYFDdunur3vGLPZs+An968caRJ3Mk9T4gZqlJ8sGszHvmInEypH1piyiespQm05tW2F8xD554qjDVmLRXEGvXqRV/0gNhpOidkN5+W2IDwWAkMGr1pklAU6YKEoT5lOPzj77hN+ojLnk5DQjntt/ivOmR5QqAa5eDfw2U3MGs9D0KtiVlTOErp89BAPCln7pDSsgHKKEYslzfojX3vJ54dsq9Oth1oQTw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by PH8PR11MB6753.namprd11.prod.outlook.com (2603:10b6:510:1c8::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Tue, 21 Oct 2025 22:42:29 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:42:29 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 04/26] drm/xe/pf: Add data structures and handlers for migration rings Date: Wed, 22 Oct 2025 00:41:11 +0200 Message-ID: <20251021224133.577765-5-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: WA0P291CA0002.POLP291.PROD.OUTLOOK.COM (2603:10a6:1d0:1::29) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|PH8PR11MB6753:EE_ X-MS-Office365-Filtering-Correlation-Id: e034d3fd-4b5b-473c-8861-08de10f31da3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|366016|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?YjVQYjJ3QXpDc0l1WDYyczdCS21Pb0RwUkpuU3Rja0tBWjVkL0ZKUnRqa01R?= =?utf-8?B?YzBDQVl0L1I4MjhrU0VFMnJGUk84NFlmb1hoUkpUQUVlenJvZVFXcjdySElj?= =?utf-8?B?ZDJFajZESHJYOU0yc21scHpPTTdVS242SjcxQktPMHdoS2JqajR0VGRKTklL?= =?utf-8?B?dEdmVG9QTjREY2Q4TXNGTDd6Qnk0b0tvTzFQa01XWGJmQ2RQay8xYmFFUHFv?= =?utf-8?B?Um5yMGxLbEZlc1c2cWo1ek9DaitRaU5yd1FGNjlDTUY0UU43c2F4SXAxeUhF?= =?utf-8?B?Qy9UcW5BbkF4QkhoNGZUSFpuSTB4VWJDWGVpQlFEOVZvdjVmZVVmNXpsYk1T?= =?utf-8?B?bnNKcnNDOXJWd3N2YnIrY0Vja2drSGpJTW5sdkJYcFBreWQrTjduc3dPT01Y?= =?utf-8?B?a0htdHAxazZDRUFTK1d1WXBMTlFXNHJPMGVNUWYrTVhrN3lIb0NkWFExOUFv?= =?utf-8?B?RVNLaG80cWJtdWRPVXkvaytWUndkeXE0NkwxeklEb2V3K2NNRnlVVUJ4VGsx?= =?utf-8?B?K1RoS1lrZlJNaTc1ZTFDNkI4MEpNSTJNcll0TElWRTNldTFqUzgvcmZlVmlr?= =?utf-8?B?YzZ4bmpHcklmVFpwOTRjS3VkZHdJSUd0NURFOFRBSEJ1MEgxWDZocHhzSXhz?= =?utf-8?B?eE9uQmdhY0NDVnRYK1RrWHlWVnYraUo5NVQ1dlJDaXFKVllOcEZqYTQzMk5i?= =?utf-8?B?TGgzVkhRaHRoWlNjNURWYy9sN3ZmYjdNbnFDMmlNc2pQN3pyUnFoVkpFcS9u?= =?utf-8?B?dzNZWXMxYk9iQTgrRjBpYVU1U2QyYW5ucmJZUHhMVFZFam5INnBJellrdmx0?= =?utf-8?B?ZTFSNkovdTJvLzRZN25FR1Z4QWpsRWZFQlNrTHpGaFozTkljQjFmeXdnR3Mw?= =?utf-8?B?cXkzUVEvQXVYak1Cdytnais3T05WQ0FCcFNWRmFRM21KRDVYY2tTWWdVK0dR?= =?utf-8?B?SFJZY1NGNE1jcXNQTTA0S1MreFV0UngrVUJXbStTM2hKeWhzczNobG5ObUxr?= =?utf-8?B?N1hjRkRXZ1VNOE9yakptbVlYNFFQOFVDK0ozQzhJSHhsRzQvRWFXNkNPb1pH?= =?utf-8?B?bEdhRWpPWkhMaHZqWncwd3BZVWp5QXFISVdtT1dVeUJtWXNRT2RpclQ2Vlp2?= =?utf-8?B?QUhIUFNRTkpqcGxOeXZTd3ZOc1VSbGlGbjZPVVordFJad2dmTmh6SnF2UFFK?= =?utf-8?B?OHJyc1J5Q0FiUU5aQ21FVWV6R2Z6VDlDQ1F5MytVY2Y2c0x0UjVJN01zc0hz?= =?utf-8?B?NTdtdS9UVmZ5eWxobU9NVmMxSUxKdEx0cDVzTlhDNjErVDFoaWZsYmJQK2E1?= =?utf-8?B?VFJHbTVWcUZFWFNuUVkwZHlRK2xTTE9nSFM3UVRKTnVTaXVleVNvUExJRGUy?= =?utf-8?B?VHB0VVdid28zRzlTU1Yxd1VwRzB4N1ZOSU5NYjMzdDN2TksrSytpY0dUZEF1?= =?utf-8?B?VFN0VFhUTFZqUTloYUw4VGhyWmhRUktucnFIVDMxcVJ2SHFxQTVId0NHdkls?= =?utf-8?B?UFhDR0QybTZXYllXc1A4UGFRK3JCTVUxY3RFUlRZb2dMdnQ4Wm9pMUNwTlFq?= =?utf-8?B?dHY4VklqM0h0dmttM3JkVXFZM2tvZFNST2YxVWpTQkQraHdiSEpiSXAwYW5C?= =?utf-8?B?NnZzTVBZeDErcDNqanQwNm5yaHF0aE9ROWt2T1Jrdno4emp1QkdOUjBzUVVp?= =?utf-8?B?NXp0c0VacjZ5VzNvclp2SnA4ajh4YVBrQkxoU1J0dDdJdnAyK3dDS0tjYTl3?= =?utf-8?B?R2pudFA1MWtKQytIWmVDcGM5TkJ2LzltbUl0cGtDNWRwWmVSUkdTYmE3OFZN?= =?utf-8?B?NWplZkhhSmFFR3hoTjduS1dsUFZsVXJRU29XczBmdUdIcC9obGZVWitBN2ZV?= =?utf-8?B?MW9vRmxLaHVXMXJLdktNdlhFWkFPV21ORWh1RmQ3MkE5Vk1EODRnWFoxVXlU?= =?utf-8?B?S3QybVozcjFPcGxYR1JUT3VrV0RPU2FIQkFXWGxES1oyS0VMbStnSm5HZXRz?= =?utf-8?Q?ngDs6/KPV6o9bJL2n9S1SIalmlYyN0=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(366016)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?S3dMRmVxMlJKV0FxQmxxVmRheS9Mem5sRDlrckxUcFNZazVadVhRNDVrSjVW?= =?utf-8?B?b0gxWkZZbVk4U25sVEhoSlNNZGpzQk5XajJDcnBndjEraDBDM0FicjZlZWta?= =?utf-8?B?ZzE2V0JXRHYrTjBRanVjcEJTckw3UWJ6UWtjMlZFbzQrRmFqaHBwVGhSdXQ0?= =?utf-8?B?UGptRWZWRGhEWnFROVJvWmNvdnpIMWhoam1CaTduanhJM1hVcENqQmZnQWh3?= =?utf-8?B?aENSVWtYdFpVVWgxbWc1bmFScHhyVUJEd2JyQUxML1RIYmwrbE9TSzJ2NFlU?= =?utf-8?B?bVdFaFpzZUNUUnc4T3h2OGpFajZpcEF0YmZ5WWJsTW9VSHlPVFRnMXhuVDVO?= =?utf-8?B?ek03RGV1QWNvOEhudHNiYzlHVVJmRUdwNkc4ZnNrckFrK3hMY21JRnFmOTVL?= =?utf-8?B?akdvVnNEZ2tubzA3Yzg2Nmt2QU85TG80Z09hdGVEelJpUzNGOGZTTFNNMTUw?= =?utf-8?B?NGwrVUNRWTNYaE9BdUx1WGJUSkhiMFczVWx5K2dQYXo2Q2tmdjVrdmRleGJ3?= =?utf-8?B?VWIzYWlNWk9ERFRiV2I4a2tPR25iN21BdVlyZDQyYUNkalZCRlJZTzV6R0dW?= =?utf-8?B?UUdYYkRpOWRtQ3JjandrdGdZOXFkckR4WUJEcEJSRlB1T1crTFJhZTNQWGpG?= =?utf-8?B?ZlBCZ1JoY0JKS2wydHdaMkNXMUFaMkNCRFFMR0lPRnVvY1NKNzVNOTdxNU41?= =?utf-8?B?bzMwK1dGM3V0WTRidUVZam1qVHdTakJyTmsvMzUvT3pkcnpJTXlibDJYVlJq?= =?utf-8?B?a0xPVUhxNWl1RlIrYWRmS2krTFd5c2MrQUpmNEY4UzJPamNlQjVuUVEvSW5l?= =?utf-8?B?VkhVaUFjVStud2ZUcVhaL25wR0ZzRGtRMWVYYjhWR3ZQc2ZjNDhMZHdGdllC?= =?utf-8?B?NmlMbDc1VUVsSTNXTlVlOWdjcGphQzU5VDJRcysyQitQb1dmOFdIVk9hMkpU?= =?utf-8?B?UTBSWVdsT1VYd3Rnb01qYTM1cjRHUDlWdEd5Qld5ekhnaEdpOTRCVTBTSGxz?= =?utf-8?B?a21DSklvQmh6R2NIcHZuSGw4Sld5bUUwM2lqVmRtdzZWT3lzNlBhdm84V3ll?= =?utf-8?B?eHpEd1U3UjZ2K0w0TGgxcHdEd21YblE1RE4rSzB3WXQxeWtaMHY2eEx1Skph?= =?utf-8?B?bTNQQzNEaWFaMmtnWGE5UG44U0kxdXQrcmIwOFVweWRMcy9qcWZvMXFhSzlV?= =?utf-8?B?K0ZyMHpPdVU4czI4eC9iZzNFS1R4NlVCYjc0cVhCZnVtOVkrZXpRRVRkUm5C?= =?utf-8?B?MU1vaEVUa2pMaWswL1cydmFpZ21naHZTZDJPSHEvS1Z2aXhhaVhwN3ZtWE9j?= =?utf-8?B?R0xKOFhUNGlaRlRGOG5CVDc0ZG51Yi9lY1QwT09MMHpBQ0hGK0pKUitNSW9K?= =?utf-8?B?SEk1QlNubU9jWGFRMjdRNldjUVVFWUc2a3kzR2cwZUx3RXFPbnhhT1o3S0Rz?= =?utf-8?B?UG5VYXNSaGQ0UCtEYXk0MVZDc2VkMURGUEVpOGVEQWx4QVhvRERnencxeE50?= =?utf-8?B?TmhCNmhxbW5QdWN5a3hVSnhMd2hXTzJCTDhNRno0TzFqV1JuRENTTFV3SkFy?= =?utf-8?B?Tzk1OE5EL0Q2alZCQkxsa013cittVU1xU2RsaFZJeTBMbU1pdDZpakJNR0ZJ?= =?utf-8?B?WXRtRXRqbllVbFJoTEtFKzN1RHB4TGRlQ1RxaGdSemVtUDNCa2hmdVNBMmxX?= =?utf-8?B?dnRITlBLR3BWOVdzeksvMTM0Zi9ldnYrQksvLzZ6TnNiOWZTekhZU1lqU0Jv?= =?utf-8?B?SWV5TjU0RGFIRUxJc3huWnMyQU1TcDZ2TGZ2SnVyaCtPSFJiNUNSUzJoakJz?= =?utf-8?B?Z2ZOYjZwWTgxVkVhdzJHU0xLVjVCMW5lWXJmUXBsaTFHRFBHanhQVTFmTGZn?= =?utf-8?B?bmMycDFCZDc2SG1MaXFlOTE2NmxPYkZaOVdUMk1PN3JiREc0Q0dWSWk2NlZr?= =?utf-8?B?Rll5aVFzUkZBNE5mSzRkOVVkMkZ2YnByb0tYck5WUTVpVWloaVZNUEZmQ3JX?= =?utf-8?B?cjRnOG5RNlc3OWo2bjVqbmpVeCs3TkdnSFRCekptWnMxa3JDTktRUnhFMlpB?= =?utf-8?B?TU00MlNyRVFVS2s5NDloSEQwL1hrSHlLYlR6ZFFyZ2RQVWVzNHhyMDRQRHZS?= =?utf-8?B?eXJoV2tHYW04VEJnUW9mYklUcHhNL2ZhWnpMVkZJZDdXd0hQbnBGUWp0WVZ1?= =?utf-8?B?ZUE9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: e034d3fd-4b5b-473c-8861-08de10f31da3 X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:42:29.6560 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Ddw2PGrVJRuOYA43ptos0bwEY27IIrdupk/bmNhGuQ5ZJ7YaNqShI1XbUEGu9/VLoBr9Ecwc5yBEAD3FUPbi9GR/C4KGD8IpO2yNS4ChwSY= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR11MB6753 X-OriginatorOrg: intel.com Migration data is queued in a per-GT ptr_ring to decouple the worker responsible for handling the data transfer from the .read() and .write() syscalls. Add the data structures and handlers that will be used in future commits. Signed-off-by: Micha=C5=82 Winiarski --- drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 259 +++++++++++++++++- drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h | 6 +- .../gpu/drm/xe/xe_gt_sriov_pf_control_types.h | 12 + drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c | 183 +++++++++++++ drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h | 14 + .../drm/xe/xe_gt_sriov_pf_migration_types.h | 11 + drivers/gpu/drm/xe/xe_gt_sriov_pf_types.h | 3 + drivers/gpu/drm/xe/xe_sriov_pf_migration.c | 143 ++++++++++ drivers/gpu/drm/xe/xe_sriov_pf_migration.h | 7 + .../gpu/drm/xe/xe_sriov_pf_migration_types.h | 58 ++++ drivers/gpu/drm/xe/xe_sriov_pf_types.h | 3 + 11 files changed, 684 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c b/drivers/gpu/drm/= xe/xe_gt_sriov_pf_control.c index b770916e88e53..cad73fdaee93c 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c @@ -19,6 +19,7 @@ #include "xe_guc_ct.h" #include "xe_sriov.h" #include "xe_sriov_pf_control.h" +#include "xe_sriov_pf_migration.h" #include "xe_sriov_pf_service.h" #include "xe_tile.h" =20 @@ -185,9 +186,15 @@ static const char *control_bit_to_string(enum xe_gt_sr= iov_control_bits bit) CASE2STR(PAUSE_FAILED); CASE2STR(PAUSED); CASE2STR(SAVE_WIP); + CASE2STR(SAVE_PROCESS_DATA); + CASE2STR(SAVE_WAIT_DATA); + CASE2STR(SAVE_DATA_DONE); CASE2STR(SAVE_FAILED); CASE2STR(SAVED); CASE2STR(RESTORE_WIP); + CASE2STR(RESTORE_PROCESS_DATA); + CASE2STR(RESTORE_WAIT_DATA); + CASE2STR(RESTORE_DATA_DONE); CASE2STR(RESTORE_FAILED); CASE2STR(RESTORED); CASE2STR(RESUME_WIP); @@ -804,9 +811,50 @@ int xe_gt_sriov_pf_control_resume_vf(struct xe_gt *gt,= unsigned int vfid) return -ECANCELED; } =20 +/** + * DOC: The VF SAVE state machine + * + * SAVE extends the PAUSED state. + * + * The VF SAVE state machine looks like:: + * + * ....PAUSED.................................................... + * : : + * : (O)<---------o : + * : | \ : + * : save (SAVED) (SAVE_FAILED) : + * : | ^ ^ : + * : | | | : + * : ....V...............o...........o......SAVE_WIP......... : + * : : | | | : : + * : : | empty | : : + * : : | | | : : + * : : | | | : : + * : : | DATA_DONE | : : + * : : | ^ | : : + * : : | | error : : + * : : | no_data / : : + * : : | / / : : + * : : | / / : : + * : : | / / : : + * : : o---------->PROCESS_DATA<----consume : : + * : : \ \ : : + * : : \ \ : : + * : : \ \ : : + * : : ring_full----->WAIT_DATA : : + * : : : : + * : :......................................................: : + * :............................................................: + * + * For the full state machine view, see `The VF state machine`_. + */ static void pf_exit_vf_save_wip(struct xe_gt *gt, unsigned int vfid) { - pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WIP); + if (pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WIP)) { + pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_PROCESS_DATA); + pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WAIT_DATA); + pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_DONE); + } } =20 static void pf_enter_vf_saved(struct xe_gt *gt, unsigned int vfid) @@ -821,12 +869,39 @@ static void pf_enter_vf_saved(struct xe_gt *gt, unsig= ned int vfid) pf_expect_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSED); } =20 +static void pf_enter_vf_save_failed(struct xe_gt *gt, unsigned int vfid) +{ + pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_FAILED); + pf_exit_vf_wip(gt, vfid); +} + +static int pf_handle_vf_save_data(struct xe_gt *gt, unsigned int vfid) +{ + return 0; +} + static bool pf_handle_vf_save(struct xe_gt *gt, unsigned int vfid) { - if (!pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WIP)) + int ret; + + if (!pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_PROCESS_DATA)) return false; =20 - pf_enter_vf_saved(gt, vfid); + pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WAIT_DATA); + if (xe_gt_sriov_pf_migration_ring_full(gt, vfid)) { + pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_PROCESS_DATA); + + return true; + } + pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WAIT_DATA); + + ret =3D pf_handle_vf_save_data(gt, vfid); + if (ret =3D=3D -EAGAIN) + pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_PROCESS_DATA); + else if (ret) + pf_enter_vf_save_failed(gt, vfid); + else + pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_DONE); =20 return true; } @@ -834,6 +909,7 @@ static bool pf_handle_vf_save(struct xe_gt *gt, unsigne= d int vfid) static bool pf_enter_vf_save_wip(struct xe_gt *gt, unsigned int vfid) { if (pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WIP)) { + pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_PROCESS_DATA); pf_enter_vf_wip(gt, vfid); pf_queue_vf(gt, vfid); return true; @@ -842,6 +918,36 @@ static bool pf_enter_vf_save_wip(struct xe_gt *gt, uns= igned int vfid) return false; } =20 +/** + * xe_gt_sriov_pf_control_check_save_data_done() - Check if all save migra= tion data was produced. + * @gt: the &xe_gt + * @vfid: the VF identifier + * + * This function is for PF only. + * + * Return: 0 on success or a negative error code on failure. + */ +bool xe_gt_sriov_pf_control_check_save_data_done(struct xe_gt *gt, unsigne= d int vfid) +{ + return pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_DONE); +} + +/** + * xe_gt_sriov_pf_control_process_save_data() - Queue VF save migration da= ta processing. + * @gt: the &xe_gt + * @vfid: the VF identifier + * + * This function is for PF only. + */ +void xe_gt_sriov_pf_control_process_save_data(struct xe_gt *gt, unsigned i= nt vfid) +{ + if (xe_gt_sriov_pf_control_check_save_data_done(gt, vfid)) + return; + + if (pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WAIT_DATA)) + pf_queue_vf(gt, vfid); +} + /** * xe_gt_sriov_pf_control_trigger_save_vf() - Start an SR-IOV VF migration= data save sequence. * @gt: the &xe_gt @@ -887,19 +993,62 @@ int xe_gt_sriov_pf_control_trigger_save_vf(struct xe_= gt *gt, unsigned int vfid) */ int xe_gt_sriov_pf_control_finish_save_vf(struct xe_gt *gt, unsigned int v= fid) { - if (!pf_expect_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVED)) { - pf_enter_vf_mismatch(gt, vfid); + if (!pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_DONE)) { + xe_gt_sriov_err(gt, "VF%u save is still in progress!\n", vfid); return -EIO; } =20 pf_expect_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSED); + pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_DONE); + pf_enter_vf_saved(gt, vfid); =20 return 0; } =20 +/** + * DOC: The VF RESTORE state machine + * + * RESTORE extends the PAUSED state. + * + * The VF RESTORE state machine looks like:: + * + * ....PAUSED.................................................... + * : : + * : (O)<---------o : + * : | \ : + * : restore (RESTORED) (RESTORE_FAILED) : + * : | ^ ^ : + * : | | | : + * : ....V...............o...........o......RESTORE_WIP...... : + * : : | | | : : + * : : | empty | : : + * : : | | | : : + * : : | | | : : + * : : | DATA_DONE | : : + * : : | ^ | : : + * : : | | error : : + * : : | trailer / : : + * : : | / / : : + * : : | / / : : + * : : | / / : : + * : : o---------->PROCESS_DATA<----produce : : + * : : \ \ : : + * : : \ \ : : + * : : \ \ : : + * : : ring_empty---->WAIT_DATA : : + * : : : : + * : :......................................................: : + * :............................................................: + * + * For the full state machine view, see `The VF state machine`_. + */ static void pf_exit_vf_restore_wip(struct xe_gt *gt, unsigned int vfid) { - pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WIP); + if (pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WIP)) { + pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_PROCESS_DATA); + pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WAIT_DATA); + pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_DATA_DONE); + } } =20 static void pf_enter_vf_restored(struct xe_gt *gt, unsigned int vfid) @@ -914,12 +1063,50 @@ static void pf_enter_vf_restored(struct xe_gt *gt, u= nsigned int vfid) pf_expect_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSED); } =20 +static void pf_enter_vf_restore_failed(struct xe_gt *gt, unsigned int vfid) +{ + pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_FAILED); + pf_exit_vf_wip(gt, vfid); +} + +static int +pf_handle_vf_restore_data(struct xe_gt *gt, unsigned int vfid) +{ + struct xe_sriov_migration_data *data =3D xe_gt_sriov_pf_migration_restore= _consume(gt, vfid); + + xe_gt_assert(gt, data); + + xe_gt_sriov_notice(gt, "Skipping VF%u unknown data type: %d\n", vfid, dat= a->type); + + return 0; +} + static bool pf_handle_vf_restore(struct xe_gt *gt, unsigned int vfid) { - if (!pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WIP)) + int ret; + + if (!pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_PROCESS_DATA)) return false; =20 - pf_enter_vf_restored(gt, vfid); + pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WAIT_DATA); + if (xe_gt_sriov_pf_migration_ring_empty(gt, vfid)) { + if (pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_DATA_DONE)) { + pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WAIT_DATA); + pf_enter_vf_restored(gt, vfid); + + return true; + } + + pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_PROCESS_DATA); + return true; + } + pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WAIT_DATA); + + ret =3D pf_handle_vf_restore_data(gt, vfid); + if (ret) + pf_enter_vf_restore_failed(gt, vfid); + else + pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_PROCESS_DATA); =20 return true; } @@ -927,6 +1114,7 @@ static bool pf_handle_vf_restore(struct xe_gt *gt, uns= igned int vfid) static bool pf_enter_vf_restore_wip(struct xe_gt *gt, unsigned int vfid) { if (pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WIP)) { + pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_PROCESS_DATA); pf_enter_vf_wip(gt, vfid); pf_queue_vf(gt, vfid); return true; @@ -935,6 +1123,41 @@ static bool pf_enter_vf_restore_wip(struct xe_gt *gt,= unsigned int vfid) return false; } =20 +/** + * xe_gt_sriov_pf_control_restore_data_done() - Indicate the end of VF mig= ration data stream. + * @gt: the &xe_gt + * @vfid: the VF identifier + * + * This function is for PF only. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_gt_sriov_pf_control_restore_data_done(struct xe_gt *gt, unsigned in= t vfid) +{ + if (!pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_DATA_DONE)) { + pf_enter_vf_state_machine_bug(gt, vfid); + return -EIO; + } + + return 0; +} + +/** + * xe_gt_sriov_pf_control_process_restore_data() - Queue VF restore migrat= ion data processing. + * @gt: the &xe_gt + * @vfid: the VF identifier + * + * This function is for PF only. + */ +void xe_gt_sriov_pf_control_process_restore_data(struct xe_gt *gt, unsigne= d int vfid) +{ + if (!pf_expect_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WIP)) + pf_enter_vf_state_machine_bug(gt, vfid); + + if (pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WAIT_DATA)) + pf_queue_vf(gt, vfid); +} + /** * xe_gt_sriov_pf_control_trigger restore_vf() - Start an SR-IOV VF migrat= ion data restore sequence. * @gt: the &xe_gt @@ -1000,11 +1223,9 @@ int xe_gt_sriov_pf_control_finish_restore_vf(struct = xe_gt *gt, unsigned int vfid { int ret; =20 - if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WIP)) { - ret =3D pf_wait_vf_restore_done(gt, vfid); - if (ret) - return ret; - } + ret =3D pf_wait_vf_restore_done(gt, vfid); + if (ret) + return ret; =20 if (!pf_expect_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORED)) { pf_enter_vf_mismatch(gt, vfid); @@ -1703,9 +1924,21 @@ static bool pf_process_vf_state_machine(struct xe_gt= *gt, unsigned int vfid) if (pf_exit_vf_pause_save_guc(gt, vfid)) return true; =20 + if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WAIT_DATA)) { + xe_gt_sriov_dbg_verbose(gt, "VF%u in %s\n", vfid, + control_bit_to_string(XE_GT_SRIOV_STATE_SAVE_WAIT_DATA)); + return false; + } + if (pf_handle_vf_save(gt, vfid)) return true; =20 + if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WAIT_DATA)) { + xe_gt_sriov_dbg_verbose(gt, "VF%u in %s\n", vfid, + control_bit_to_string(XE_GT_SRIOV_STATE_RESTORE_WAIT_DATA)); + return false; + } + if (pf_handle_vf_restore(gt, vfid)) return true; =20 diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h b/drivers/gpu/drm/= xe/xe_gt_sriov_pf_control.h index abc233f6302ed..6b1ab339e3b73 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.h @@ -14,12 +14,14 @@ struct xe_gt; int xe_gt_sriov_pf_control_init(struct xe_gt *gt); void xe_gt_sriov_pf_control_restart(struct xe_gt *gt); =20 -bool xe_gt_sriov_pf_control_check_vf_data_wip(struct xe_gt *gt, unsigned i= nt vfid); - int xe_gt_sriov_pf_control_pause_vf(struct xe_gt *gt, unsigned int vfid); int xe_gt_sriov_pf_control_resume_vf(struct xe_gt *gt, unsigned int vfid); +bool xe_gt_sriov_pf_control_check_save_data_done(struct xe_gt *gt, unsigne= d int vfid); +void xe_gt_sriov_pf_control_process_save_data(struct xe_gt *gt, unsigned i= nt vfid); int xe_gt_sriov_pf_control_trigger_save_vf(struct xe_gt *gt, unsigned int = vfid); int xe_gt_sriov_pf_control_finish_save_vf(struct xe_gt *gt, unsigned int v= fid); +int xe_gt_sriov_pf_control_restore_data_done(struct xe_gt *gt, unsigned in= t vfid); +void xe_gt_sriov_pf_control_process_restore_data(struct xe_gt *gt, unsigne= d int vfid); int xe_gt_sriov_pf_control_trigger_restore_vf(struct xe_gt *gt, unsigned i= nt vfid); int xe_gt_sriov_pf_control_finish_restore_vf(struct xe_gt *gt, unsigned in= t vfid); int xe_gt_sriov_pf_control_stop_vf(struct xe_gt *gt, unsigned int vfid); diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h b/drivers/gp= u/drm/xe/xe_gt_sriov_pf_control_types.h index e113dc98b33ce..6e19a8ea88f0b 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h @@ -32,9 +32,15 @@ * @XE_GT_SRIOV_STATE_PAUSE_FAILED: indicates that a VF pause operation ha= s failed. * @XE_GT_SRIOV_STATE_PAUSED: indicates that the VF is paused. * @XE_GT_SRIOV_STATE_SAVE_WIP: indicates that VF save operation is in pro= gress. + * @XE_GT_SRIOV_STATE_SAVE_PROCESS_DATA: indicates that VF migration data = is being produced. + * @XE_GT_SRIOV_STATE_SAVE_WAIT_DATA: indicates that PF awaits for space i= n migration data ring. + * @XE_GT_SRIOV_STATE_SAVE_DATA_DONE: indicates that all migration data wa= s produced by Xe. * @XE_GT_SRIOV_STATE_SAVE_FAILED: indicates that VF save operation has fa= iled. * @XE_GT_SRIOV_STATE_SAVED: indicates that VF data is saved. * @XE_GT_SRIOV_STATE_RESTORE_WIP: indicates that VF restore operation is = in progress. + * @XE_GT_SRIOV_STATE_RESTORE_PROCESS_DATA: indicates that VF migration da= ta is being consumed. + * @XE_GT_SRIOV_STATE_RESTORE_WAIT_DATA: indicates that PF awaits for data= in migration data ring. + * @XE_GT_SRIOV_STATE_RESTORE_DATA_DONE: indicates that all migration data= was produced by the user. * @XE_GT_SRIOV_STATE_RESTORE_FAILED: indicates that VF restore operation = has failed. * @XE_GT_SRIOV_STATE_RESTORED: indicates that VF data is restored. * @XE_GT_SRIOV_STATE_RESUME_WIP: indicates the a VF resume operation is i= n progress. @@ -70,10 +76,16 @@ enum xe_gt_sriov_control_bits { XE_GT_SRIOV_STATE_PAUSED, =20 XE_GT_SRIOV_STATE_SAVE_WIP, + XE_GT_SRIOV_STATE_SAVE_PROCESS_DATA, + XE_GT_SRIOV_STATE_SAVE_WAIT_DATA, + XE_GT_SRIOV_STATE_SAVE_DATA_DONE, XE_GT_SRIOV_STATE_SAVE_FAILED, XE_GT_SRIOV_STATE_SAVED, =20 XE_GT_SRIOV_STATE_RESTORE_WIP, + XE_GT_SRIOV_STATE_RESTORE_PROCESS_DATA, + XE_GT_SRIOV_STATE_RESTORE_WAIT_DATA, + XE_GT_SRIOV_STATE_RESTORE_DATA_DONE, XE_GT_SRIOV_STATE_RESTORE_FAILED, XE_GT_SRIOV_STATE_RESTORED, =20 diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.c index ca28f45aaf481..b6ffd982d6007 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c @@ -7,6 +7,7 @@ =20 #include "abi/guc_actions_sriov_abi.h" #include "xe_bo.h" +#include "xe_gt_sriov_pf_control.h" #include "xe_gt_sriov_pf_helpers.h" #include "xe_gt_sriov_pf_migration.h" #include "xe_gt_sriov_printk.h" @@ -15,6 +16,17 @@ #include "xe_sriov.h" #include "xe_sriov_pf_migration.h" =20 +#define XE_GT_SRIOV_PF_MIGRATION_RING_SIZE 5 + +static struct xe_gt_sriov_migration_data *pf_pick_gt_migration(struct xe_g= t *gt, unsigned int vfid) +{ + xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); + xe_gt_assert(gt, vfid !=3D PFID); + xe_gt_assert(gt, vfid <=3D xe_sriov_pf_get_totalvfs(gt_to_xe(gt))); + + return >->sriov.pf.vfs[vfid].migration; +} + /* Return: number of dwords saved/restored/required or a negative error co= de on failure */ static int guc_action_vf_save_restore(struct xe_guc *guc, u32 vfid, u32 op= code, u64 addr, u32 ndwords) @@ -382,6 +394,162 @@ ssize_t xe_gt_sriov_pf_migration_write_guc_state(stru= ct xe_gt *gt, unsigned int } #endif /* CONFIG_DEBUG_FS */ =20 +/** + * xe_gt_sriov_pf_migration_ring_empty() - Check if a migration ring is em= pty. + * @gt: the &xe_gt + * @vfid: the VF identifier + * + * Return: true if the ring is empty, otherwise false. + */ +bool xe_gt_sriov_pf_migration_ring_empty(struct xe_gt *gt, unsigned int vf= id) +{ + return ptr_ring_empty(&pf_pick_gt_migration(gt, vfid)->ring); +} + +/** + * xe_gt_sriov_pf_migration_ring_full() - Check if a migration ring is ful= l. + * @gt: the &xe_gt + * @vfid: the VF identifier + * + * Return: true if the ring is full, otherwise false. + */ +bool xe_gt_sriov_pf_migration_ring_full(struct xe_gt *gt, unsigned int vfi= d) +{ + return ptr_ring_full(&pf_pick_gt_migration(gt, vfid)->ring); +} + +/** + * xe_gt_sriov_pf_migration_save_produce() - Add VF save data packet to mi= gration ring. + * @gt: the &xe_gt + * @vfid: the VF identifier + * @data: &xe_sriov_migration_data packet + * + * Called by the save migration data producer (PF SR-IOV Control worker) w= hen + * processing migration data. + * Wakes up the save migration data consumer (userspace), that is potentia= lly + * waiting for data when the ring is empty. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_gt_sriov_pf_migration_save_produce(struct xe_gt *gt, unsigned int v= fid, + struct xe_sriov_migration_data *data) +{ + int ret; + + ret =3D ptr_ring_produce(&pf_pick_gt_migration(gt, vfid)->ring, data); + if (ret) + return ret; + + wake_up_all(xe_sriov_pf_migration_waitqueue(gt_to_xe(gt), vfid)); + + return 0; +} + +/** + * xe_gt_sriov_pf_migration_restore_consume() - Get VF restore data packet= from migration ring. + * @gt: the &xe_gt + * @vfid: the VF identifier + * + * Called by the restore migration data consumer (PF SR-IOV Control worker= ) when + * processing migration data. + * Wakes up the restore migration data producer (userspace), that is + * potentially waiting to add more data when the ring is full. + * + * Return: Pointer to &struct xe_sriov_migration_data on success, + * NULL if ring is empty. + */ +struct xe_sriov_migration_data * +xe_gt_sriov_pf_migration_restore_consume(struct xe_gt *gt, unsigned int vf= id) +{ + struct xe_gt_sriov_migration_data *migration =3D pf_pick_gt_migration(gt,= vfid); + struct wait_queue_head *wq =3D xe_sriov_pf_migration_waitqueue(gt_to_xe(g= t), vfid); + struct xe_sriov_migration_data *data; + + data =3D ptr_ring_consume(&migration->ring); + if (data) + wake_up_all(wq); + + return data; +} + +/** + * xe_gt_sriov_pf_migration_restore_produce() - Add VF restore data packet= to migration ring. + * @gt: the &xe_gt + * @vfid: the VF identifier + * @data: &xe_sriov_migration_data packet + * + * Called by the restore migration data producer (userspace) when processi= ng + * migration data. + * If the ring is full, waits until there is space. + * Queues the restore migration data consumer (PF SR-IOV Control worker), = that + * is potentially waiting for data when the ring is empty. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_gt_sriov_pf_migration_restore_produce(struct xe_gt *gt, unsigned in= t vfid, + struct xe_sriov_migration_data *data) +{ + struct wait_queue_head *wq =3D xe_sriov_pf_migration_waitqueue(gt_to_xe(g= t), vfid); + struct xe_gt_sriov_migration_data *migration =3D pf_pick_gt_migration(gt,= vfid); + int ret; + + xe_gt_assert(gt, data->tile =3D=3D gt->tile->id); + xe_gt_assert(gt, data->gt =3D=3D gt->info.id); + + while (1) { + ret =3D ptr_ring_produce(&migration->ring, data); + if (!ret) + break; + + ret =3D wait_event_interruptible(*wq, !ptr_ring_full(&migration->ring)); + if (ret) + return ret; + } + + xe_gt_sriov_pf_control_process_restore_data(gt, vfid); + + return 0; +} + +/** + * xe_gt_sriov_pf_migration_save_consume() - Get VF save data packet from = migration ring. + * @gt: the &xe_gt + * @vfid: the VF identifier + * + * Called by the save migration data consumer (userspace) when + * processing migration data. + * Queues the save migration data producer (PF SR-IOV Control worker), tha= t is + * potentially waiting to add more data when the ring is full. + * + * Return: Pointer to &struct xe_sriov_migration_data on success, + * NULL if ring is empty and there's no more data available, + * ERR_PTR(-EAGAIN) if the ring is empty, but data is still produced. + */ +struct xe_sriov_migration_data * +xe_gt_sriov_pf_migration_save_consume(struct xe_gt *gt, unsigned int vfid) +{ + struct xe_gt_sriov_migration_data *migration =3D pf_pick_gt_migration(gt,= vfid); + struct xe_sriov_migration_data *data; + + data =3D ptr_ring_consume(&migration->ring); + if (data) { + xe_gt_sriov_pf_control_process_save_data(gt, vfid); + return data; + } + + if (xe_gt_sriov_pf_control_check_save_data_done(gt, vfid)) + return NULL; + + return ERR_PTR(-EAGAIN); +} + +static void action_ring_cleanup(struct drm_device *dev, void *arg) +{ + struct ptr_ring *r =3D arg; + + ptr_ring_cleanup(r, NULL); +} + /** * xe_gt_sriov_pf_migration_init() - Initialize support for VF migration. * @gt: the &xe_gt @@ -393,6 +561,7 @@ ssize_t xe_gt_sriov_pf_migration_write_guc_state(struct= xe_gt *gt, unsigned int int xe_gt_sriov_pf_migration_init(struct xe_gt *gt) { struct xe_device *xe =3D gt_to_xe(gt); + unsigned int n, totalvfs; int err; =20 xe_gt_assert(gt, IS_SRIOV_PF(xe)); @@ -404,5 +573,19 @@ int xe_gt_sriov_pf_migration_init(struct xe_gt *gt) if (err) return err; =20 + totalvfs =3D xe_sriov_pf_get_totalvfs(xe); + for (n =3D 1; n <=3D totalvfs; n++) { + struct xe_gt_sriov_migration_data *migration =3D pf_pick_gt_migration(gt= , n); + + err =3D ptr_ring_init(&migration->ring, + XE_GT_SRIOV_PF_MIGRATION_RING_SIZE, GFP_KERNEL); + if (err) + return err; + + err =3D drmm_add_action_or_reset(&xe->drm, action_ring_cleanup, &migrati= on->ring); + if (err) + return err; + } + return 0; } diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.h index 09faeae00ddbb..9e67f18ded205 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h @@ -9,11 +9,25 @@ #include =20 struct xe_gt; +struct xe_sriov_migration_data; =20 int xe_gt_sriov_pf_migration_init(struct xe_gt *gt); int xe_gt_sriov_pf_migration_save_guc_state(struct xe_gt *gt, unsigned int= vfid); int xe_gt_sriov_pf_migration_restore_guc_state(struct xe_gt *gt, unsigned = int vfid); =20 +bool xe_gt_sriov_pf_migration_ring_empty(struct xe_gt *gt, unsigned int vf= id); +bool xe_gt_sriov_pf_migration_ring_full(struct xe_gt *gt, unsigned int vfi= d); + +int xe_gt_sriov_pf_migration_save_produce(struct xe_gt *gt, unsigned int v= fid, + struct xe_sriov_migration_data *data); +struct xe_sriov_migration_data * +xe_gt_sriov_pf_migration_restore_consume(struct xe_gt *gt, unsigned int vf= id); + +int xe_gt_sriov_pf_migration_restore_produce(struct xe_gt *gt, unsigned in= t vfid, + struct xe_sriov_migration_data *data); +struct xe_sriov_migration_data * +xe_gt_sriov_pf_migration_save_consume(struct xe_gt *gt, unsigned int vfid); + #ifdef CONFIG_DEBUG_FS ssize_t xe_gt_sriov_pf_migration_read_guc_state(struct xe_gt *gt, unsigned= int vfid, char __user *buf, size_t count, loff_t *pos); diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration_types.h b/drivers/= gpu/drm/xe/xe_gt_sriov_pf_migration_types.h index 9d672feac5f04..84be6fac16c8b 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration_types.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration_types.h @@ -7,6 +7,7 @@ #define _XE_GT_SRIOV_PF_MIGRATION_TYPES_H_ =20 #include +#include #include =20 /** @@ -24,6 +25,16 @@ struct xe_gt_sriov_state_snapshot { } guc; }; =20 +/** + * struct xe_gt_sriov_migration_data - GT-level per-VF migration data. + * + * Used by the PF driver to maintain per-VF migration data. + */ +struct xe_gt_sriov_migration_data { + /** @ring: queue containing VF save / restore migration data */ + struct ptr_ring ring; +}; + /** * struct xe_gt_sriov_pf_migration - GT-level data. * diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_types.h b/drivers/gpu/drm/xe= /xe_gt_sriov_pf_types.h index a64a6835ad656..812e74d3f8f80 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_types.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_types.h @@ -33,6 +33,9 @@ struct xe_gt_sriov_metadata { =20 /** @snapshot: snapshot of the VF state data */ struct xe_gt_sriov_state_snapshot snapshot; + + /** @migration: per-VF migration data. */ + struct xe_gt_sriov_migration_data migration; }; =20 /** diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_migration.c b/drivers/gpu/drm/x= e/xe_sriov_pf_migration.c index 8c523c392f98b..eaf581317bdef 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_migration.c +++ b/drivers/gpu/drm/xe/xe_sriov_pf_migration.c @@ -3,8 +3,36 @@ * Copyright =C2=A9 2025 Intel Corporation */ =20 +#include + +#include "xe_device.h" +#include "xe_gt_sriov_pf_control.h" +#include "xe_gt_sriov_pf_migration.h" +#include "xe_pm.h" #include "xe_sriov.h" +#include "xe_sriov_pf_helpers.h" #include "xe_sriov_pf_migration.h" +#include "xe_sriov_printk.h" + +static struct xe_sriov_pf_migration *pf_pick_migration(struct xe_device *x= e, unsigned int vfid) +{ + xe_assert(xe, IS_SRIOV_PF(xe)); + xe_assert(xe, vfid <=3D xe_sriov_pf_get_totalvfs(xe)); + + return &xe->sriov.pf.vfs[vfid].migration; +} + +/** + * xe_sriov_pf_migration_waitqueue - Get waitqueue for migration. + * @xe: the &xe_device + * @vfid: the VF identifier + * + * Return: pointer to the migration waitqueue. + */ +wait_queue_head_t *xe_sriov_pf_migration_waitqueue(struct xe_device *xe, u= nsigned int vfid) +{ + return &pf_pick_migration(xe, vfid)->wq; +} =20 /** * xe_sriov_pf_migration_supported() - Check if SR-IOV VF migration is sup= ported by the device @@ -33,9 +61,124 @@ static bool pf_check_migration_support(struct xe_device= *xe) */ int xe_sriov_pf_migration_init(struct xe_device *xe) { + unsigned int n, totalvfs; + xe_assert(xe, IS_SRIOV_PF(xe)); =20 xe->sriov.pf.migration.supported =3D pf_check_migration_support(xe); + if (!xe_sriov_pf_migration_supported(xe)) + return 0; + + totalvfs =3D xe_sriov_pf_get_totalvfs(xe); + for (n =3D 1; n <=3D totalvfs; n++) { + struct xe_sriov_pf_migration *migration =3D pf_pick_migration(xe, n); + + init_waitqueue_head(&migration->wq); + } =20 return 0; } + +static bool pf_migration_data_ready(struct xe_device *xe, unsigned int vfi= d) +{ + struct xe_gt *gt; + u8 gt_id; + + for_each_gt(gt, xe, gt_id) { + if (!xe_gt_sriov_pf_migration_ring_empty(gt, vfid) || + xe_gt_sriov_pf_control_check_save_data_done(gt, vfid)) + return true; + } + + return false; +} + +static struct xe_sriov_migration_data * +pf_migration_consume(struct xe_device *xe, unsigned int vfid) +{ + struct xe_sriov_migration_data *data; + struct xe_gt *gt; + u8 gt_id; + bool more_data =3D false; + + for_each_gt(gt, xe, gt_id) { + data =3D xe_gt_sriov_pf_migration_save_consume(gt, vfid); + if (data && PTR_ERR(data) !=3D EAGAIN) + return data; + if (PTR_ERR(data) =3D=3D -EAGAIN) + more_data =3D true; + } + + if (!more_data) + return NULL; + + return ERR_PTR(-EAGAIN); +} + +/** + * xe_sriov_pf_migration_save_consume() - Consume a VF migration data pack= et from the device. + * @xe: the &xe_device + * @vfid: the VF identifier + * + * Called by the save migration data consumer (userspace) when + * processing migration data. + * If there is no migration data to process, wait until more data is avail= able. + * + * Return: Pointer to &xe_sriov_migration_data on success, + * NULL if ring is empty and no more migration data is expected, + * ERR_PTR value in case of error. + * + * Return: 0 on success or a negative error code on failure. + */ +struct xe_sriov_migration_data * +xe_sriov_pf_migration_save_consume(struct xe_device *xe, unsigned int vfid) +{ + struct xe_sriov_pf_migration *migration =3D pf_pick_migration(xe, vfid); + struct xe_sriov_migration_data *data; + int ret; + + xe_assert(xe, IS_SRIOV_PF(xe)); + + while (1) { + data =3D pf_migration_consume(xe, vfid); + if (PTR_ERR(data) !=3D -EAGAIN) + goto out; + + ret =3D wait_event_interruptible(migration->wq, + pf_migration_data_ready(xe, vfid)); + if (ret) + return ERR_PTR(ret); + } + +out: + return data; +} + +/** + * xe_sriov_pf_migration_restore_produce() - Produce a VF migration data p= acket to the device. + * @xe: the &xe_device + * @vfid: the VF identifier + * @data: Pointer to &xe_sriov_migration_data + * + * Called by the restore migration data producer (userspace) when processi= ng + * migration data. + * If the underlying data structure is full, wait until there is space. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_sriov_pf_migration_restore_produce(struct xe_device *xe, unsigned i= nt vfid, + struct xe_sriov_migration_data *data) +{ + struct xe_gt *gt; + + xe_assert(xe, IS_SRIOV_PF(xe)); + + gt =3D xe_device_get_gt(xe, data->gt); + if (!gt || data->tile !=3D gt->tile->id) { + xe_sriov_err_ratelimited(xe, "VF%d Invalid GT - tile:%u, GT:%u\n", + vfid, data->tile, data->gt); + return -EINVAL; + } + + return xe_gt_sriov_pf_migration_restore_produce(gt, vfid, data); +} diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_migration.h b/drivers/gpu/drm/x= e/xe_sriov_pf_migration.h index d2b4a24165438..df81a540c246a 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_migration.h +++ b/drivers/gpu/drm/xe/xe_sriov_pf_migration.h @@ -7,10 +7,17 @@ #define _XE_SRIOV_PF_MIGRATION_H_ =20 #include +#include =20 struct xe_device; +struct xe_sriov_migration_data; =20 int xe_sriov_pf_migration_init(struct xe_device *xe); bool xe_sriov_pf_migration_supported(struct xe_device *xe); +int xe_sriov_pf_migration_restore_produce(struct xe_device *xe, unsigned i= nt vfid, + struct xe_sriov_migration_data *data); +struct xe_sriov_migration_data * +xe_sriov_pf_migration_save_consume(struct xe_device *xe, unsigned int vfid= ); +wait_queue_head_t *xe_sriov_pf_migration_waitqueue(struct xe_device *xe, u= nsigned int vfid); =20 #endif diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_migration_types.h b/drivers/gpu= /drm/xe/xe_sriov_pf_migration_types.h index e69de29bb2d1d..2a45ee4e3ece8 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_migration_types.h +++ b/drivers/gpu/drm/xe/xe_sriov_pf_migration_types.h @@ -0,0 +1,58 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright =C2=A9 2025 Intel Corporation + */ + +#ifndef _XE_SRIOV_PF_MIGRATION_TYPES_H_ +#define _XE_SRIOV_PF_MIGRATION_TYPES_H_ + +#include +#include + +/** + * struct xe_sriov_migration_data - Xe SR-IOV VF migration data packet + */ +struct xe_sriov_migration_data { + /** @xe: Xe device */ + struct xe_device *xe; + /** @vaddr: CPU pointer to payload data */ + void *vaddr; + /** @remaining: payload data remaining */ + size_t remaining; + /** @hdr_remaining: header data remaining */ + size_t hdr_remaining; + union { + /** @bo: Buffer object with migration data */ + struct xe_bo *bo; + /** @buff: Buffer with migration data */ + void *buff; + }; + __struct_group(xe_sriov_pf_migration_hdr, hdr, __packed, + /** @hdr.version: migration data protocol version */ + u8 version; + /** @hdr.type: migration data type */ + u8 type; + /** @hdr.tile: migration data tile id */ + u8 tile; + /** @hdr.gt: migration data gt id */ + u8 gt; + /** @hdr.flags: migration data flags */ + u32 flags; + /** @hdr.offset: offset into the resource; + * used when multiple packets of given type are used for migration + */ + u64 offset; + /** @hdr.size: migration data size */ + u64 size; + ); +}; + +/** + * struct xe_sriov_pf_migration - Per VF device-level migration related da= ta + */ +struct xe_sriov_pf_migration { + /** @wq: waitqueue used to avoid busy-waiting for snapshot production/con= sumption */ + wait_queue_head_t wq; +}; + +#endif diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_types.h b/drivers/gpu/drm/xe/xe= _sriov_pf_types.h index 24d22afeececa..c92baaa1694ca 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_types.h +++ b/drivers/gpu/drm/xe/xe_sriov_pf_types.h @@ -9,6 +9,7 @@ #include #include =20 +#include "xe_sriov_pf_migration_types.h" #include "xe_sriov_pf_provision_types.h" #include "xe_sriov_pf_service_types.h" =20 @@ -18,6 +19,8 @@ struct xe_sriov_metadata { /** @version: negotiated VF/PF ABI version */ struct xe_sriov_pf_service_version version; + /** @migration: migration data */ + struct xe_sriov_pf_migration migration; }; =20 /** --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D291A2D190C; Tue, 21 Oct 2025 22:42:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=198.175.65.15 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086560; cv=fail; b=R5tZADTkmNETc7Qqm3a8Fr8REvxldUMwMumVR/DG/XsH8h1/Vnep9ZQPS2eeNy2tzGPD9p8m8BUoALEcvhbVRE7ikZjgXdd3NMIhybBtz7Wb9WBxvaqQ+Qsxsr7wK3T7rntUP8kpIwgbhoAiiFok3u/lDv0Yw2JGk56LfaztHi4= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086560; c=relaxed/simple; bh=KlyFIvsP13Zpis6AimpONUfRQqfibhykGsKCB3fY0EI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=RuL5Hw2DRHusgTJ+iT3EXw2SHU5pGd2yBPAR6UI34nTxbGB8Ny303kDqOZlVMfL9VReiiwZyiEF8WeFL/xXuqg3zg4OmZwvRx2caMDD3rcCjB1DCCoPtBkRVRo09s3UxC/60X3cR3E+p9Yb7cTdLrHJqlqgeNLcA9loHcxPT2E4= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=f4xYVCMS; arc=fail smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="f4xYVCMS" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086558; x=1792622558; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=KlyFIvsP13Zpis6AimpONUfRQqfibhykGsKCB3fY0EI=; b=f4xYVCMSw5BOPvolXDmKdp006JxfgTEOLVNSZD7mDt/ctPI3aHG5YnOa hdQdZCpEcF9dzdwE27yGA7dwuj7U3nDXkbOyWfowAKsPeeMXLWTE3MrJ2 UZpiiNs9isCFINJ4l4VrYIKzwHlfoJLIl/sk9cQVzJ3Np02A0UhYynqaz igWKDV8y4eM64nD5O0wMRzgXkD9VU07zd71EaF5i6UNWTLAU6u2mrUgv9 kQJYcZwqn5GGNY8HEbMBNjflqvTCa6HW0GKO//905Z6i+PhLGlIsAE5J0 3dZFAoqhK8XJP1QyXPaMkjaPjjHTJWHjmotR4xAi0m/6Nb8nGa5+Z3x/f g==; X-CSE-ConnectionGUID: jLQUOQy5RXiW4UaW5c3EJA== X-CSE-MsgGUID: 7cs5/q86SiOyqIfYf7eUog== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="66866267" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="66866267" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:42:38 -0700 X-CSE-ConnectionGUID: qrNCboi5QbOy7/WW7GCykw== X-CSE-MsgGUID: /sgZYa8nRQS6MaYmOUK8SQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="188988496" Received: from orsmsx902.amr.corp.intel.com ([10.22.229.24]) by fmviesa004.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:42:37 -0700 Received: from ORSMSX901.amr.corp.intel.com (10.22.229.23) by ORSMSX902.amr.corp.intel.com (10.22.229.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:42:36 -0700 Received: from ORSEDG902.ED.cps.intel.com (10.7.248.12) by ORSMSX901.amr.corp.intel.com (10.22.229.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:42:36 -0700 Received: from PH7PR06CU001.outbound.protection.outlook.com (52.101.201.42) by edgegateway.intel.com (134.134.137.112) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:42:36 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=T2gnIVF+Mye3syVBpqdiYkXMVx5o8ae5fy6xAx7ohM0BZLjnxOXmeWUdozAhrWroTiIhvlmlawBXw9gY+jfQCeJEwo+BWFb/938mJR6CpMk4McfLRXdHmwcUwRxpHdqnjJYKmCD3f7bZj5K4CnejVYRKuH3o5yhx4bq1UklCKX+BAbDgyfKyBCC/77w5Z/YPXq6E0zWg+CTk85E4mQyJtJF51j89nB5EuJe4ELMmAekydMM2kpJJoZT4+4k6dRG+JpCR0h4toynglsAmYh3FtZQt+vqvsbhKeb8ieIjw4JQi8QHi5hrLfUD99u62NbWddlpmX/yvLQyPB6C30+reew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=nu40GJPCQTRP/yB+hYIbZH3zUyfpPKlnb41zWApGyjM=; b=sCtjQFGUAtLPj7JDQbdoAku+Men/jdKchnjqp4tifRv9hE1bV+xEg/tT34dE6JjEK9bVFxh66iZSx9oRvXdhQSLkE2Y2CRCFW+iQmKEBkmBhFP+4I5sfTAYP0jxTWEng97Dm6Pm4mMQM8WUcuQHfPElu8gQ8hKBOBWYFDKMZbfrw3NqaS+GKEl6UlwDhKsJDz+u1sbUSaJn/FaJEXnzCBTlAdoj0Uoc6oSUkYGDfG7WoRTkTHxa+JESXIzNd2I4XbaHku6D5fvL2WzvE4yXASEcbbpNGF0vt++JW3fYyzPKVLlkO1R5nguSmBBXIhPGmSYk5DunpkA/th4N6bYGSxQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by PH8PR11MB6753.namprd11.prod.outlook.com (2603:10b6:510:1c8::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Tue, 21 Oct 2025 22:42:34 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:42:34 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 05/26] drm/xe/pf: Add helpers for migration data allocation / free Date: Wed, 22 Oct 2025 00:41:12 +0200 Message-ID: <20251021224133.577765-6-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VI1PR06CA0172.eurprd06.prod.outlook.com (2603:10a6:803:c8::29) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|PH8PR11MB6753:EE_ X-MS-Office365-Filtering-Correlation-Id: d4253408-dd49-4448-0d89-08de10f32074 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|366016|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?RXl6RFJsN0hLKyt1MjYxSE0yUEpTbEVkS2dUazhDRCthUTY1dk1TTmpzS2VR?= =?utf-8?B?VURYaFcrK2xSTm85VzNMSjN4U1pyUThLMVdiUy82WmRYOXN4aHc2MTJzZHdP?= =?utf-8?B?RTE1czJYZEF3SmFldEFFMHBXMFk4Y2IzejlBTm01ekhyM2NMU1hqQ2tSb1hQ?= =?utf-8?B?bmFRenI0aVYxR21Ib2Y4MVY3Rmc1aFJQNEFUN2VuL09NZTVKcWdITGpaSEJy?= =?utf-8?B?WlJRaDEzSStPbjRHUWtrQjFpVzIwTGNEYjFVWXlIKzFnR0tmeXIvc2hQalk3?= =?utf-8?B?VlZBVXVKblJ0NXorZUpORWxNbm1mek9LcWR2dDJTVUY2NFVYczhzM3YwNHlZ?= =?utf-8?B?Q3pjMXh4ZVdsNGZGT1BDSEx5RXNtQzZTcmtsOHBxOVh3VktUVVJQc21SUHFJ?= =?utf-8?B?YWc2TFRHWjNzczNGSTlScVI1ZEVTZXNDL0JwVnREbGpRUTJBbzZaRE9JMmtK?= =?utf-8?B?OE0xZjFrdGVrU3ZiWmFpbmg4cFJVUWtNZDRnUUFDS3Bha21FOHg0VWh0OEUy?= =?utf-8?B?elBWVWRsVkUvT1R0QWtBalZ0dkFYUUc1Tm5jdlNmQzJVNTVCdUpNNkRGZUVu?= =?utf-8?B?VW1xeUxwTmxVcHpCTU9SSGVKQTlSVUhNditFd3lKRTE2QXpKR0wzR1NEVVZ0?= =?utf-8?B?dzE5U1pReldCaTU3MVd0VzRVNG1TQ3Nma29YNXhuWGVscEh6clhjV0JSOEFk?= =?utf-8?B?aFhKdGE0MzM1VXluQ3hneE04MWRLS1BXQ3BEQk1OaEZBVzZxemY2UTJ3M3d0?= =?utf-8?B?QzlRekVJQWwyRS9RMDlSMXVMY2ZHRUMxSXA3T25yRXJUMjVsUkNXVXVCQVor?= =?utf-8?B?SXAzKzRPcStubWpMSU1FWWpEb0ppRUtqQ1FGTGs4ZmhUbThBNk5PR0pkODZ6?= =?utf-8?B?MFZFVXhJL1UycFppK0FSVVJjT2NEYVdNQzg3RklTYTVXZUgxQnZlUGIxSDBS?= =?utf-8?B?RjNFaUhpZ28xNit1bDRWZ3pJcXhpQUwwMzFBQVZDVXN4eTJ3ZmV1ZXRWSW5Y?= =?utf-8?B?WWovWGlxOVNZTTBRZTB0QmFKY2I2M29ZSm11RjhLT2NKQkJJVFZ1b0MyQ3hT?= =?utf-8?B?WTJ0bVBrRjNwUktFZE1LYTFNN0duT0I0WUUrM0Zqc3ZUbGIwTTVVN2xMbThQ?= =?utf-8?B?TVpUR09LVWZCZEtNZHlrcGFTSnVhYjhpemVzVXJSemhBYms5YXlxaXlyNXpw?= =?utf-8?B?Tzk4M2YyMVZwQ0lFVjFvRVFwTGFvaSttaUE3UEw0cXNEZENnQXdUTkUvK0FX?= =?utf-8?B?bU9xL2M1R3VsVWRmUzNzYzVLQ0xFUGhWY1N0MlMrZzNSU0pyUFhyMXJGOWE5?= =?utf-8?B?TjdNMUtyUXBzWXd4QUJyUGc0MVVLK2xROHd4dVRmYXoyOEdaN0k4VURVWDFK?= =?utf-8?B?MysxdWpIQmxPVXNaRy9nSVBxZ243eXA3ZnFnRlRVWDVGeEhBTlF4LzVFOEFB?= =?utf-8?B?Z3JidjRXb2E2SEJzRmVkaWk0Q3R6eEFJSXRCZ252VFR2YUtsdTc2blpuelRj?= =?utf-8?B?bmsyd0ExVzMvS05YWXBud1ArR2FTOUd6WUhaeFRIUmowbm5oVTE5OVNFT081?= =?utf-8?B?V1lhUWd5MloxMk9DUDBvVUQ1TmRUbGhNWUhpd1E4RzF5cklLVlI3YVdqRXRX?= =?utf-8?B?czVCVmJEem4vaTBLSlBIVXhwSWwrY1BTaUNnOXpHaW5QTEpDMnFCWTlvb0tq?= =?utf-8?B?eHlTdG9PNFVobEJmYzVqNXhiNElHM3FtTDJ6MVBxWStmMG5yb00vZkdpdzNK?= =?utf-8?B?MWZTWENDa2d4eWlUdWpoQ0toSTlIS0orR2xOcUxjMmdKWWg4OG01Y3ZxUWpV?= =?utf-8?B?VTIzeUx3RUtITFRxb1VPL285d0NkZlE2Z2JVTVNmMWVWdDNvb2FuUnVHaSs4?= =?utf-8?B?cXBkWHYzem1TWXlxcVozS3YyZlpwQ1hMQk1LcFV3ME9pZjZiLzlxbzNEaFBG?= =?utf-8?B?OUdZNWU0TzE4dy9TSXRYeldVQm5leHRnd0VtcGhPbDJLTEJIeWd2Z3k4WlJW?= =?utf-8?Q?abeyomZzI6YObpBFTSviu+TZ1zbps4=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(366016)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?c0Z0aE5oSDVUaEhFTDViYXdlUXJIZUZ0M1UyNTVyWnU5MUQzblViN1g3YUlV?= =?utf-8?B?ZS9qTWQvaVo5SE5pQkxZV0xnVmxYUHpDK0pvbmZjb2F5bFVpMnRJbjI0TjIw?= =?utf-8?B?NDIzZi9wbzB5cTV5ekxpQmxjWmlVZXpYZDRTc0psZEoxZGlJYzFOV2NBTTg3?= =?utf-8?B?VUJySHNTUnFCWElPSStBcEZxTmNwTnAvNEVzenFNNzRxN21mZDY1YXdjRW9w?= =?utf-8?B?THJwZjV4R1l6dkpjZ1hxd0hkWjNqZVF4Nm1tMGRMQ0N0RXY0c1BtM2VoZDBN?= =?utf-8?B?ZUxucjdqaHdGaWFFNjZqeE9taDdoZFh3UGRTejVIZndabmJhUGtKUEtQOHdz?= =?utf-8?B?Ymthd1pxYWs1U3F0SnVxTDlQb2VuZWpFc1FCWWw2cEVVY2JKR0Njd0R4eHJM?= =?utf-8?B?RGpzM2lKWEo0bzNNSndPRW1KQmZMMjUvV1JvenpiYzZZQytEUExxeHovc0gz?= =?utf-8?B?NDZqRE9jSG9VSDlqd2FTWU9VK25RMUNxVTZib1RNL3JEWGpPelZmWDlOK2FL?= =?utf-8?B?MEJ5cktCcmhFYUpaSVRxMkFOazdWZ0Y5WExWazQ1YUYrSk9hTk5HWHoyMWhG?= =?utf-8?B?Y3ZLaEQ5ZGJqYm1CVkRhQnNrOFpzUXZpRk5OYmlwVVVGamhqdHJMY3ZSSnV6?= =?utf-8?B?NUluY2hJL3lLcmVLSzMwN1MrWkRDTU1FcW9mdmNSR0pPTmFUV1Y4WDJVazRs?= =?utf-8?B?YUZTL2VOdm5mOHV5MFNsZjM4c0tBeC9HK0VJSXVoZWoza2hGanYwd044ZHl0?= =?utf-8?B?RmlOMitLOXdJQm0wT1EwNWkwZ05PWmxhNGRRRGM0eGFVb0hXOUd0cU1lQlRu?= =?utf-8?B?Y00wMTkrVkJIdEJaQURURHcrc0NJQ0oxYUU5OXY5U2JqUWdVR29DMGdiakx4?= =?utf-8?B?N1VqbU1CN0lmNUFMMUtWUnpDbUU2c1BTcHNKelEvNjhVSmliaGZQWHNVcy83?= =?utf-8?B?cWJ2MEIrck1qd3JNRm1WTFhXaCtReDFnNXJRTjUxRGw2V0swVlZqNGl6Mzh4?= =?utf-8?B?WXNLVTZJMXo4bTcvdG9aWFRHZ1hPOFlmVlZwYjNGNGcyWWNUU2ZMY1BEcCs4?= =?utf-8?B?VTJrUVFRTDVyVXF4MDFYU05yT1k1dkw3ZitRM2NPaDNlMm10cjNUMEZCV0ZS?= =?utf-8?B?SnNhSjRPUjczc2ZzdkhnRVU1WEk3QVAzVTZZVXJoNDFrZHA2bDBibUU5SEZE?= =?utf-8?B?K3JqU01ZR3hjdExhZGtQVnRZdTFLTWt6NkI1VTJKK1habWNYRlJwcTNVckpI?= =?utf-8?B?U1dOYngwa2w0eHFCaFVJcmRUSnFCV2NTenl3WTRFNUlQbnBxOWF6SVVyTlAv?= =?utf-8?B?aHB5RkxxbmdIVFJ6Tjk0SGVTZXFFcDhpVVNlS3lSeHE0YVhZQ216alhXQ0NW?= =?utf-8?B?NWQ2Zk1yTE1uR0ZCKzhnT1B2c21qSVhsTGE0WFZLYVdYMUtuRThwcjQ4RHRx?= =?utf-8?B?Y3lXejVwTmpiY3MrMjhhMm1zSWh2VG8wY25GN3FtMDNvVnV6NHN3VFNEdFhR?= =?utf-8?B?ZjFhTlRDVmZRNzUwbjRkeDRnZFFJUmRLVE5YVFBGSnpZRFdLeG9HTUZMaDZo?= =?utf-8?B?d3JUY3E1VmI5K0xrajJKeVIzRnlGTUNRMzRiSWtsZUJCRVkvdldMajdPR3pC?= =?utf-8?B?WDd6NVA2VmVNZ0RLYlVvL3ZSUjFrL3JyTWx3T1o2QzdHMk92SlpBTVQvYVls?= =?utf-8?B?QlAzd0tvS0FSZnc2OHBONHQ0SEFrL3ZZNkJCbFpUL3BDQjVIeHZ6VTI3cDhL?= =?utf-8?B?Szl4NlEvcVdkRDZ3N2VJZXBaK3c4eDNlQi8rQlduR3dRaWlMU1ZGeGs0cWw5?= =?utf-8?B?dzgyUzQxWWREWDcwenhtT29RNFVlNnVUdExsS0d0dmNJU1VrU1lUM1Y3K1FX?= =?utf-8?B?YkZzdEJWQmJNVFE0ZDZqM2Z6RTlmRDQwVCtWSjEwMGdTZ1VwOS9HNkNrSWJL?= =?utf-8?B?aW1oMEpCMDlxeUZtR1FFVm5Dc1UwMGFqd1ZtS3A3aVdUYnJCZnFUSFRLOEU4?= =?utf-8?B?NTNTT0R2aTI3TXF1YktNcUdQMFFaS2ZzdjJxNDFPTFFuSlFNQTNOdXRoMjBp?= =?utf-8?B?MlI1bWQxL3RTT0x3cnllREVJeFVuYU9JWCt3d1RtRS9WdEJWVjFGVVp0Ykho?= =?utf-8?B?d09ETDk1YkMwa1FNU0laOXdKU0lZblNBL29xMHlqaUtzMExSMWJkNDhrdG5K?= =?utf-8?B?M2c9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: d4253408-dd49-4448-0d89-08de10f32074 X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:42:34.2940 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: MtoLp063Pnwj42tecaRTddlZIqJ81Dlh0yg9LDgPOxs6STsYz6eAP+N1How3Z/9+J+kWKsnetOX30u1GIyO4HJs7GDSngWiapGAixWuGX6E= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR11MB6753 X-OriginatorOrg: intel.com Now that it's possible to free the packets - connect the restore handling logic with the ring. The helpers will also be used in upcoming changes that will start producing migration data packets. Signed-off-by: Micha=C5=82 Winiarski Reviewed-by: Michal Wajdeczko --- drivers/gpu/drm/xe/Makefile | 1 + drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 7 + drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c | 29 +++- drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h | 1 + drivers/gpu/drm/xe/xe_sriov_migration_data.c | 127 ++++++++++++++++++ drivers/gpu/drm/xe/xe_sriov_migration_data.h | 31 +++++ 6 files changed, 195 insertions(+), 1 deletion(-) create mode 100644 drivers/gpu/drm/xe/xe_sriov_migration_data.c create mode 100644 drivers/gpu/drm/xe/xe_sriov_migration_data.h diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile index 89e5b26c27975..3d72db9e528e4 100644 --- a/drivers/gpu/drm/xe/Makefile +++ b/drivers/gpu/drm/xe/Makefile @@ -173,6 +173,7 @@ xe-$(CONFIG_PCI_IOV) +=3D \ xe_lmtt_2l.o \ xe_lmtt_ml.o \ xe_pci_sriov.o \ + xe_sriov_migration_data.o \ xe_sriov_pf.o \ xe_sriov_pf_control.o \ xe_sriov_pf_debugfs.o \ diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c b/drivers/gpu/drm/= xe/xe_gt_sriov_pf_control.c index cad73fdaee93c..dd9bc9c99f78c 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c @@ -18,6 +18,7 @@ #include "xe_gt_sriov_printk.h" #include "xe_guc_ct.h" #include "xe_sriov.h" +#include "xe_sriov_migration_data.h" #include "xe_sriov_pf_control.h" #include "xe_sriov_pf_migration.h" #include "xe_sriov_pf_service.h" @@ -851,6 +852,8 @@ int xe_gt_sriov_pf_control_resume_vf(struct xe_gt *gt, = unsigned int vfid) static void pf_exit_vf_save_wip(struct xe_gt *gt, unsigned int vfid) { if (pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WIP)) { + xe_gt_sriov_pf_migration_ring_free(gt, vfid); + pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_PROCESS_DATA); pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WAIT_DATA); pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_DONE); @@ -1045,6 +1048,8 @@ int xe_gt_sriov_pf_control_finish_save_vf(struct xe_g= t *gt, unsigned int vfid) static void pf_exit_vf_restore_wip(struct xe_gt *gt, unsigned int vfid) { if (pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WIP)) { + xe_gt_sriov_pf_migration_ring_free(gt, vfid); + pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_PROCESS_DATA); pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_WAIT_DATA); pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_DATA_DONE); @@ -1078,6 +1083,8 @@ pf_handle_vf_restore_data(struct xe_gt *gt, unsigned = int vfid) =20 xe_gt_sriov_notice(gt, "Skipping VF%u unknown data type: %d\n", vfid, dat= a->type); =20 + xe_sriov_migration_data_free(data); + return 0; } =20 diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.c index b6ffd982d6007..8ba72165759b3 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c @@ -14,6 +14,7 @@ #include "xe_guc.h" #include "xe_guc_ct.h" #include "xe_sriov.h" +#include "xe_sriov_migration_data.h" #include "xe_sriov_pf_migration.h" =20 #define XE_GT_SRIOV_PF_MIGRATION_RING_SIZE 5 @@ -418,6 +419,25 @@ bool xe_gt_sriov_pf_migration_ring_full(struct xe_gt *= gt, unsigned int vfid) return ptr_ring_full(&pf_pick_gt_migration(gt, vfid)->ring); } =20 +/** + * xe_gt_sriov_pf_migration_ring_free() - Consume and free all data in mig= ration ring + * @gt: the &xe_gt + * @vfid: the VF identifier + */ +void xe_gt_sriov_pf_migration_ring_free(struct xe_gt *gt, unsigned int vfi= d) +{ + struct xe_gt_sriov_migration_data *migration =3D pf_pick_gt_migration(gt,= vfid); + struct xe_sriov_migration_data *data; + + if (ptr_ring_empty(&migration->ring)) + return; + + xe_gt_sriov_notice(gt, "VF%u unprocessed migration data left in the ring!= \n", vfid); + + while ((data =3D ptr_ring_consume(&migration->ring))) + xe_sriov_migration_data_free(data); +} + /** * xe_gt_sriov_pf_migration_save_produce() - Add VF save data packet to mi= gration ring. * @gt: the &xe_gt @@ -543,11 +563,18 @@ xe_gt_sriov_pf_migration_save_consume(struct xe_gt *g= t, unsigned int vfid) return ERR_PTR(-EAGAIN); } =20 +static void pf_mig_data_destroy(void *ptr) +{ + struct xe_sriov_migration_data *data =3D ptr; + + xe_sriov_migration_data_free(data); +} + static void action_ring_cleanup(struct drm_device *dev, void *arg) { struct ptr_ring *r =3D arg; =20 - ptr_ring_cleanup(r, NULL); + ptr_ring_cleanup(r, pf_mig_data_destroy); } =20 /** diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.h index 9e67f18ded205..1ed2248f0a17e 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h @@ -17,6 +17,7 @@ int xe_gt_sriov_pf_migration_restore_guc_state(struct xe_= gt *gt, unsigned int vf =20 bool xe_gt_sriov_pf_migration_ring_empty(struct xe_gt *gt, unsigned int vf= id); bool xe_gt_sriov_pf_migration_ring_full(struct xe_gt *gt, unsigned int vfi= d); +void xe_gt_sriov_pf_migration_ring_free(struct xe_gt *gt, unsigned int vfi= d); =20 int xe_gt_sriov_pf_migration_save_produce(struct xe_gt *gt, unsigned int v= fid, struct xe_sriov_migration_data *data); diff --git a/drivers/gpu/drm/xe/xe_sriov_migration_data.c b/drivers/gpu/drm= /xe/xe_sriov_migration_data.c new file mode 100644 index 0000000000000..b04f9be3b7fed --- /dev/null +++ b/drivers/gpu/drm/xe/xe_sriov_migration_data.c @@ -0,0 +1,127 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright =C2=A9 2025 Intel Corporation + */ + +#include "xe_bo.h" +#include "xe_device.h" +#include "xe_sriov_migration_data.h" + +static bool data_needs_bo(struct xe_sriov_migration_data *data) +{ + return data->type =3D=3D XE_SRIOV_MIGRATION_DATA_TYPE_VRAM; +} + +/** + * xe_sriov_migration_data() - Allocate migration data packet + * @xe: the &xe_device + * + * Only allocates the "outer" structure, without initializing the migration + * data backing storage. + * + * Return: Pointer to &xe_sriov_migration_data on success, + * NULL in case of error. + */ +struct xe_sriov_migration_data * +xe_sriov_migration_data_alloc(struct xe_device *xe) +{ + struct xe_sriov_migration_data *data; + + data =3D kzalloc(sizeof(*data), GFP_KERNEL); + if (!data) + return NULL; + + data->xe =3D xe; + data->hdr_remaining =3D sizeof(data->hdr); + + return data; +} + +/** + * xe_sriov_migration_data_free() - Free migration data packet. + * @data: the &xe_sriov_migration_data packet + */ +void xe_sriov_migration_data_free(struct xe_sriov_migration_data *data) +{ + if (data_needs_bo(data)) + xe_bo_unpin_map_no_vm(data->bo); + else + kvfree(data->buff); + + kfree(data); +} + +static int mig_data_init(struct xe_sriov_migration_data *data) +{ + struct xe_gt *gt =3D xe_device_get_gt(data->xe, data->gt); + + if (data->size =3D=3D 0) + return 0; + + if (data_needs_bo(data)) { + struct xe_bo *bo =3D xe_bo_create_pin_map_novm(data->xe, gt->tile, + PAGE_ALIGN(data->size), + ttm_bo_type_kernel, + XE_BO_FLAG_SYSTEM | XE_BO_FLAG_PINNED, + false); + if (IS_ERR(bo)) + return PTR_ERR(bo); + + data->bo =3D bo; + data->vaddr =3D bo->vmap.vaddr; + } else { + void *buff =3D kvzalloc(data->size, GFP_KERNEL); + + if (!buff) + return -ENOMEM; + + data->buff =3D buff; + data->vaddr =3D buff; + } + + return 0; +} + +#define XE_SRIOV_MIGRATION_DATA_SUPPORTED_VERSION 1 +/** + * xe_sriov_migration_data_init() - Initialize the migration data header a= nd backing storage. + * @data: the &xe_sriov_migration_data packet + * @tile_id: tile identifier + * @gt_id: GT identifier + * @type: &xe_sriov_migration_data_type + * @offset: offset of data packet payload (within wider resource) + * @size: size of data packet payload + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_sriov_migration_data_init(struct xe_sriov_migration_data *data, u8 = tile_id, u8 gt_id, + enum xe_sriov_migration_data_type type, loff_t offset, size_t size) +{ + data->version =3D XE_SRIOV_MIGRATION_DATA_SUPPORTED_VERSION; + data->type =3D type; + data->tile =3D tile_id; + data->gt =3D gt_id; + data->offset =3D offset; + data->size =3D size; + data->remaining =3D size; + + return mig_data_init(data); +} + +/** + * xe_sriov_migration_data_init() - Initialize the migration data backing = storage based on header. + * @data: the &xe_sriov_migration_data packet + * + * Header data is expected to be filled prior to calling this function. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_sriov_migration_data_init_from_hdr(struct xe_sriov_migration_data *= data) +{ + if (data->version !=3D XE_SRIOV_MIGRATION_DATA_SUPPORTED_VERSION) + return -EINVAL; + + data->remaining =3D data->size; + + return mig_data_init(data); +} diff --git a/drivers/gpu/drm/xe/xe_sriov_migration_data.h b/drivers/gpu/drm= /xe/xe_sriov_migration_data.h new file mode 100644 index 0000000000000..ef65dccddc035 --- /dev/null +++ b/drivers/gpu/drm/xe/xe_sriov_migration_data.h @@ -0,0 +1,31 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright =C2=A9 2025 Intel Corporation + */ + +#ifndef _XE_SRIOV_MIGRATION_DATA_H_ +#define _XE_SRIOV_MIGRATION_DATA_H_ + +#include + +struct xe_device; + +enum xe_sriov_migration_data_type { + /* Skipping 0 to catch uninitialized data */ + XE_SRIOV_MIGRATION_DATA_TYPE_DESCRIPTOR =3D 1, + XE_SRIOV_MIGRATION_DATA_TYPE_TRAILER, + XE_SRIOV_MIGRATION_DATA_TYPE_GGTT, + XE_SRIOV_MIGRATION_DATA_TYPE_MMIO, + XE_SRIOV_MIGRATION_DATA_TYPE_GUC, + XE_SRIOV_MIGRATION_DATA_TYPE_VRAM, +}; + +struct xe_sriov_migration_data * +xe_sriov_migration_data_alloc(struct xe_device *xe); +void xe_sriov_migration_data_free(struct xe_sriov_migration_data *snapshot= ); + +int xe_sriov_migration_data_init(struct xe_sriov_migration_data *data, u8 = tile_id, u8 gt_id, + enum xe_sriov_migration_data_type, loff_t offset, size_t size); +int xe_sriov_migration_data_init_from_hdr(struct xe_sriov_migration_data *= snapshot); + +#endif --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 950242D47E8; Tue, 21 Oct 2025 22:42:42 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=198.175.65.14 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086565; cv=fail; b=KoXvIQi+540dbOWIyIcTS9/w2kdwdVJ7ygw3gRY625+chdTtOt+8bfYik490c0bq1A6hf5k+CFPS1O0zD/xOeJ5n116R1Ka5Pf5gIi5r2j+W1EzFDMoGHwFvL3l0HIpTdu1I5/4Jj1/rzFgHD3B5tI5kEnIaDcwe0zcxjDOFJRA= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086565; c=relaxed/simple; bh=uhEw0dbce/QVAx2XX5Q0DDMhcUfSct2wYqL3OIDA3KA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=oDCVuOOI/PK9yMMg4pnzbFt3MLchCUF1fCgB8ZVCI1gEZBl2iIRTeBJIq09W7LLOso5zGH1DsTXT9TYogime4UcL+aoj/BT0MNpje5kVUxb1rZrP9cdsdGwEouJsctf0XkMbLrmyzNwEVNJC2F8jmlsfSn5W8iY7Ma4yXHYC3vQ= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=TueIifjy; arc=fail smtp.client-ip=198.175.65.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="TueIifjy" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086562; x=1792622562; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=uhEw0dbce/QVAx2XX5Q0DDMhcUfSct2wYqL3OIDA3KA=; b=TueIifjyoejBYJy5tu71S8ojG6j78Sv/UsOp8JXGJvJ3+vJGXLS5OPEn 8NW+2/+0GYaamdivSvKP+20u0l1fSAa9KmULFpeO7XmCikdvYFLchRuFL 5YkPPtP/6GoZM8jXalI0WGq8diz33t9rfF2/AvmJQW3DE2+huHUEXtRAg dTqsMUj6ZcQr/luP420WitwOKjwYyNANcoyeDwAPc27bXulpZ35hLW88k ExOpxeWKK4+Ex+NmmYF5iOCvFS8CndxG1WB/eqjiK9a8ASVI1hH4ZBMOD jQ/NicLdtf5JZfOAJsp6Bn+mTaOEW9yDyauQCtXJIzkYZ/MSXxwqMlYdQ Q==; X-CSE-ConnectionGUID: GE4MCNAUT1ijZJsQScDa6w== X-CSE-MsgGUID: LfukrqcAQBafjfh1VQ3ipA== X-IronPort-AV: E=McAfee;i="6800,10657,11531"; a="67060950" X-IronPort-AV: E=Sophos;i="6.17,312,1747724400"; d="scan'208";a="67060950" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:42:42 -0700 X-CSE-ConnectionGUID: W3UoNGbfTcCvbG8QogdwCw== X-CSE-MsgGUID: tttsF6N9SWCr9yLxaM170Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="183644326" Received: from orsmsx901.amr.corp.intel.com ([10.22.229.23]) by fmviesa006.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:42:41 -0700 Received: from ORSMSX901.amr.corp.intel.com (10.22.229.23) by ORSMSX901.amr.corp.intel.com (10.22.229.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:42:40 -0700 Received: from ORSEDG901.ED.cps.intel.com (10.7.248.11) by ORSMSX901.amr.corp.intel.com (10.22.229.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:42:40 -0700 Received: from MW6PR02CU001.outbound.protection.outlook.com (52.101.48.49) by edgegateway.intel.com (134.134.137.111) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:42:40 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=GtobgwqL+rL49EDTMhrz80VgdJ8qmFbxkAAwIe7tAwc+JmRAyJlW8l6TBfU6yi0adD+tdlBGSJzqSBxeQ/Ate5dw6oxDKPZU7UUNWXFzhzvbCGCHSQUIIuQUvwA0P3EBOW/+O5DNeN4OdLpyAt+s4mN+gL6A4now20i5L7oZgZpdZtDJVQkFkNgRzN7f4fPJhzv3QL3O/L4wMv5UaLNJgp2TZUz6MaZdt/BxrGk3UZnh4rEmLAFAbAhdG076VsIgEw/9hMC8hcc59Bsrg/Dwrw3fq65KZVllBmZkWlC0hzmJ4CFffzfSSD6a5DwGtNZw5M45ayLA6U7x0sMBMBaGMg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=NfZiJeZ8R+AASyUEHf/iKFyj3c5OTrZqt0kbfic6cK4=; b=A5bY8Jrv9r9o63sDyVt5rNMYmmTd/fJ1OwOFBfIbIqytMbco3OfCfH7Azfx5BZWMQ3eYz9MxVWxIXPjTPMMrDobOm4bEX4QGPHkMF9a9BTzvsW+mUAOJkMiYr1MhEZVK19yUbqFnvA1sZQa73IulLQdjM33/xX8zzZfk+TyJqCs+I8LHvUzhykUZ0smBu+eYawDRfozTVBvk3m2MS0iete0QvzZB5ex2knOpe1eaA1L0uEbi1NIvr3dD7fJavjmhlR2bxCRZxWGjdmnA9ZKiaEzlzjiZy+J70gumv622QlWlvFqdXIeG17jUXqfDi19IWOL1osGnRSL7+XEMo5OHbQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by PH8PR11MB6753.namprd11.prod.outlook.com (2603:10b6:510:1c8::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Tue, 21 Oct 2025 22:42:39 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:42:39 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 06/26] drm/xe/pf: Add support for encap/decap of bitstream to/from packet Date: Wed, 22 Oct 2025 00:41:13 +0200 Message-ID: <20251021224133.577765-7-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VI1PR07CA0248.eurprd07.prod.outlook.com (2603:10a6:803:b4::15) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|PH8PR11MB6753:EE_ X-MS-Office365-Filtering-Correlation-Id: 0a36bd38-80e6-4cd0-b50a-08de10f32335 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|366016|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?TnlMaW5UWnNJNzhPYVduTzhsN1RLWU8vSTJHcEE1cXpQNEdFemZqYVhnT3g3?= =?utf-8?B?Y1JtSmFyQWNrWGozZFhZQkJYQ1Q4UUxNZFgyRklCd2dDaUZBM29nVnU3T043?= =?utf-8?B?QlNHdHFuVGlyWERrZE9pNCtwRFJHQzEvM3FTZ0htS0ZBVFp3V2JKankzLzFx?= =?utf-8?B?UTVTNmZra0FhU2k5T09RN2NXY3p2VFZhbzhNZlR6Zjc0NkdUUGhoakFDbkRZ?= =?utf-8?B?Vk9pYjFVZWNGMnh4RWluTVdNUGFWNmtIVDRhcGZVbTlhRXdKQndYbE5seHJy?= =?utf-8?B?d0tLTG5nSmQyM0JreEVRYzFTbzhGWWpWWlhzamFmendzUWsvSHBobWIralBp?= =?utf-8?B?ZUNqMXBzd3h6c3BNT3k2MnorWllqbC80QUdoRDBJdUpLSS9Ma3ZCQTdLV3B1?= =?utf-8?B?ektyWk5XVEgxY3BUY3NPRksyNXZMZUE0aVllcTJTR1p0UnJGamtueG43cFI1?= =?utf-8?B?SkZNYjNiNTlYSUsrTG1TUDRCdmd4WGFoNXB0Q2pONzVCTXdTdlJUYWJ0UjBh?= =?utf-8?B?N3dvd2tvcFZkTkc1VFh4eDZ5Q09uUFZvUjhyNEpjWXRjalFnN0YxYnVHQVRq?= =?utf-8?B?S0VmeEhHWUZtb1BKWUlRb3dHRzh5Zy95NlJ3d0JzMEJ5UksvVjY1Z1NZcnJp?= =?utf-8?B?ZjNiaUE5T2dsTS8rWmVpbml4U2xiMFVoY2F5bTl4eWdQTmZDQ3VNSWVncCtv?= =?utf-8?B?Wm5Ha2xGTW1HN05mdE5sZEt5WjF5TWtEYWk2WUxaRlFOT2ZqcDZINGZZU2hT?= =?utf-8?B?WHgvNGhtUGU5d0hiNGUxb0dWU1B5aDA2RzJGd2NaODNnRmxtTllHT0ovVHIy?= =?utf-8?B?S203TmZBdVZ5bnR1eHhHbXVXbG5BZWova3BrRE0yRUNHdVZsRVNKTG5Ea2lm?= =?utf-8?B?Z2RWVnhkZDJsd2lGOHFmRGlzTkNCQnM4a2VkbXZiZE1tWDQ5cU55VlNzQWw2?= =?utf-8?B?Z0hWN0ZnazFyL1dVZDMwVzcxYmVLaTNBVFhKWkRiWFR2RE1zVjVaRUdFaFlB?= =?utf-8?B?TVZRMUI3Q01zYTRpLzRrcUlKTTBjTEYrZnI4NWFlZVdJSHlGUFRMY0tuZUx2?= =?utf-8?B?VmJwNjhpeGtDdVZ6S2NycDU0WDZzS1U5a0QrVjlYZmZBZ2ZmTWJGSHl6MDlB?= =?utf-8?B?d0lTMmcrblJoWjNERjlsTG9jOWgwNENhSERSdyt6SGljbW9tc2NodmxseVBO?= =?utf-8?B?Ym50YkUza25qcnM2UXhqYkZVSmxabWd6M2tUMHFWcElsUE5jSnMreEJ1TXRi?= =?utf-8?B?SGtpaVBHbXFrVHVMM2NySVJoNStUdW9KQTFvSllkajBuSWpaL053Wmd3aWh5?= =?utf-8?B?UEJFejhmbWR4enBKT2x5VzdleGdEbm8zV1R3S0Q4MzN5Y0JWbDZSdXdzM0Vw?= =?utf-8?B?VHdHY2ErODdhWmh2K2dOK1F6NDIrcVV6Z2l1d3dkZVIxREZ2emQ5N3prMlc2?= =?utf-8?B?c0FvTThIZ0V0OVZ2RW5ES2oxeXpNdTdvTnNsemxhL0p2RkFSRi9BQzNhbU9q?= =?utf-8?B?N3Q3aEFLRVlPWHFBSDN2Y0FpdGM4RDQ5RloyU1RUNHJmMUdnSjFpRy9DMHZF?= =?utf-8?B?ZCswalhlNklGam5ISkFzZHdaYzZuajZOQjdGaENJRGZjNDF3SmUvTm5Eam5o?= =?utf-8?B?bUJnTEp4NDB0ZHB4NTlQYnRkNGY0VFJqaWFBRzc2Unc2QlRrTWsrell3NXlT?= =?utf-8?B?alF2L0RzdzE5VWZuNVBsMWNETUhCa05UczlVeEFKU2h4aWVjcVZGUHJCYkFF?= =?utf-8?B?a1FjSFI0N2FDOUtKY0hSdnYwQTFieUJWNTZ0QTlDRE1KM3VzM2NxZXBjYUl0?= =?utf-8?B?UUZMb0RnRHlSTzNNeGdPZjZyMEZTMHdaamlMT0x2akpwTXcrVDZ0MTUvaExV?= =?utf-8?B?bWJGOXM0VmVqZzNlU3NXNG03WlpZdGtXcDJiby9PQmdvYzRMYWdaS1pleE5F?= =?utf-8?B?dzJ5UWxuWUZqSjhpYlNFYW9CVDY1MTVOKzA2UGFxSUhWS2JkZGFOZFVDckhv?= =?utf-8?Q?MqJBK4mYz/eEqZOibfi1iajVdwMFO4=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(366016)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?c244TzlTNkdIREdFajRZSEdGckJVMmJ6QWN6cFViSUY0bjRwSnNVODdXQlJm?= =?utf-8?B?bXkyQyt6ZUpETHNmZ05tMXlMNXNqR01xN0cyUWYrRkxGSmc3SVpDbEI0N1J5?= =?utf-8?B?N25oZ1RGa08yaEFLSHZxeUl1NEJFNjhmTGkwQ3NTcjdUUzQ1aFdUOVlDOFhV?= =?utf-8?B?WmpsYS9VRHFTa3BZL3h5WXQ1VDV2Nm9WSjY3OXlYNStBTm1ZNTJCYXFQYmdi?= =?utf-8?B?TjhLSjF5dFBUNVI0elpJUXg3dFdqNE84REN4YnNKc2R5eThoamR0em85bk0x?= =?utf-8?B?bmZBc0djWVVIQTlVSjkzZmtzYnNsRExKQjAwUXl3c0JjUjNpM0NzejhKSTdN?= =?utf-8?B?M21Tb1FCdXVlbWNuQnljTnZyTDhSZHJtaE9iMFZwaWJ2RTZhSndvVkdqcCtV?= =?utf-8?B?MFpZWm0yWG1OOTQvQ2JueXBzaXJkU2YwaC9YcGVJTjFSdk5rYm50L1pnaUtu?= =?utf-8?B?d2FUWU9UdmlHRE5MSVFyRUZveXpGL0cvWTZFSzVBVnhHSk9KU01BeFQwNGlP?= =?utf-8?B?ekUwcmtVZTRMdytCWkxqZXBkWmVQOEd5SitSUjRoZHFyWVUraHVQVTdjTUtn?= =?utf-8?B?TituY0M2RkQ1elJnTkhPQ0FGVWNKaTJWT2d0VFkxa2ZGYmZQMkN4cGFLYWpU?= =?utf-8?B?cFFON1RwSVJkZUpBR0V3MlJ6czJyVlVFQmx4RTNidEdORzRuOXR3c25QWjIw?= =?utf-8?B?Sm1SaS9VTUVUNjlxVnRuaWF6ZUluWHlqWmVJZnNDcFoxL3lkWlNlTXVuRVpJ?= =?utf-8?B?cWQ3b2E2S0RPYjRpYjdYbTlkSkg0bTVRR0NCbk5Jdmk5R1h0VkE3b1R6M0ll?= =?utf-8?B?RUZWQktjdmhDZUJYSjlJZmZTdVZ4bEdCSEczWVhxaVBhdHdLaVpnOXlaekl2?= =?utf-8?B?c29hUHR3MW1qTTI3VE9hM2ZPV21NT0crdnU3ekR1SjFXcnl3WC8zVzNTZWxR?= =?utf-8?B?WkVoVENQckM2eUJUUzZYOENZckZzWnU1NUJyK3UzNnVhOHZrTURQNld5Qi9U?= =?utf-8?B?eW9uQmloNGxWSElRei9YUlFzaDZwcmk4aXQwTjZxZWVNT09icmcrOEVNeTh4?= =?utf-8?B?RjMxcTFqRHcraXpGaVRpUmpZSWlxaTYwemJjT0QyOUlzWjdKVXNLWWhoaDdF?= =?utf-8?B?MzBYcU9vMEdTc2owTThrNXVSS1A2NWpEdTZZUmh6WDV2WUh0UXVpQ3FxbDBV?= =?utf-8?B?dUNpUld2QUtRMzduQk1LK0pqb29VbXUxVUlyS2orQ04zMmhMbitRMWRCeFox?= =?utf-8?B?dlhMeHhtTmx1dHZkM3MvcVZRS3JJMDB6VGtrc1RDOXArVlVpQVFuaXlPSjJW?= =?utf-8?B?R09IZkZiRWlYTFU5U3FKL3ozTU9Hb1NvTEFML1dxOFAzWlFQd1dSMXp0RFR5?= =?utf-8?B?NjYwYm8waWZsZll3YUN3Y2gzaVJXWU80dHRhY0ZjZlBtTktudFNHSU00M2V1?= =?utf-8?B?OFJUUE5QMU9oSnBPL21oU1liY044dlVqR3lqcDFqOE5JVXJxK1d1dzg2QWlp?= =?utf-8?B?ckg5VUdwRmFSU0tuMnlwbzNpU0hHVUovS1hZdDE0K2pQdlAzZnY5OHpNd3Ra?= =?utf-8?B?RCtDYjlrT2piUlBWT3Bsdkl1SGwyaVZvUjNHeC9FZXYrSnhXZitOLzJCTnZn?= =?utf-8?B?dVBhQ0MzRFkvZFJEZkxFV1lyVEh1Wks0RlRmeTExaDhFcGJOb016ams2R1lN?= =?utf-8?B?VElxU1A0VHRaa2ppWE1qREgwQ3ROS0QyTVJFR2tTMEZsVXNyTzI4QlFqR1Av?= =?utf-8?B?M2VUcklqR2ZLZ2JPTGo0OG12U0xxZmZIa3YzVVRkTlpPYXUyazduQmRYQThB?= =?utf-8?B?TTFkUUdISFdiNTN3YmYwbEJJSnhlam5HNERpNlZtVVBBQzdIZWk4ZG9sS3h1?= =?utf-8?B?ckVicUZzMFdMd2VBQzNmRnVJb0hsUndBbHRnUHBmNXhsU2ZXMDZ2dG5keFoy?= =?utf-8?B?UGxGQU5TdU9wcmJCUUJkT3F3YWxaSnVESDNPMktEaXo1dTZ3bVFZbUI5S055?= =?utf-8?B?QWtZTnVYSG9ocDIzNXpMSXN3SVVnTjYxTTBIZnRkM2lwN0xrL2xrZVd4OUpj?= =?utf-8?B?am0yb1l5clNzajIvMHZRT1BLZEphd0tnYWZha1NTdGJiendWSSt4MGgxMDhU?= =?utf-8?B?LzVxL01TTDFXTFBvNWppbWRTNC9PQUE0YXViSk1Ed1RHcjdtbk5sRUNUcExT?= =?utf-8?B?Smc9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: 0a36bd38-80e6-4cd0-b50a-08de10f32335 X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:42:38.9336 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: UnL/Uj82LFi/MGBuKYqgzXcjVzdhx4hdN6gjg9nrboDVO7lOZhyGQ4j4Mya0q3kIGsR2XU9f0qE7SUH3FGfAG6b+71ZtXLHEakwWdB1VsFU= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR11MB6753 X-OriginatorOrg: intel.com Add debugfs handlers for migration state and handle bitstream .read()/.write() to convert from bitstream to/from migration data packets. As descriptor/trailer are handled at this layer - add handling for both save and restore side. Signed-off-by: Micha=C5=82 Winiarski --- drivers/gpu/drm/xe/xe_sriov_migration_data.c | 336 ++++++++++++++++++ drivers/gpu/drm/xe/xe_sriov_migration_data.h | 5 + drivers/gpu/drm/xe/xe_sriov_pf_control.c | 5 + drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c | 35 ++ drivers/gpu/drm/xe/xe_sriov_pf_migration.c | 54 +++ .../gpu/drm/xe/xe_sriov_pf_migration_types.h | 9 + 6 files changed, 444 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_sriov_migration_data.c b/drivers/gpu/drm= /xe/xe_sriov_migration_data.c index b04f9be3b7fed..4cd6c6fc9ba18 100644 --- a/drivers/gpu/drm/xe/xe_sriov_migration_data.c +++ b/drivers/gpu/drm/xe/xe_sriov_migration_data.c @@ -6,6 +6,44 @@ #include "xe_bo.h" #include "xe_device.h" #include "xe_sriov_migration_data.h" +#include "xe_sriov_pf_helpers.h" +#include "xe_sriov_pf_migration.h" +#include "xe_sriov_printk.h" + +static struct mutex *pf_migration_mutex(struct xe_device *xe, unsigned int= vfid) +{ + xe_assert(xe, IS_SRIOV_PF(xe)); + xe_assert(xe, vfid <=3D xe_sriov_pf_get_totalvfs(xe)); + return &xe->sriov.pf.vfs[vfid].migration.lock; +} + +static struct xe_sriov_migration_data **pf_pick_pending(struct xe_device *= xe, unsigned int vfid) +{ + xe_assert(xe, IS_SRIOV_PF(xe)); + xe_assert(xe, vfid <=3D xe_sriov_pf_get_totalvfs(xe)); + lockdep_assert_held(pf_migration_mutex(xe, vfid)); + + return &xe->sriov.pf.vfs[vfid].migration.pending; +} + +static struct xe_sriov_migration_data ** +pf_pick_descriptor(struct xe_device *xe, unsigned int vfid) +{ + xe_assert(xe, IS_SRIOV_PF(xe)); + xe_assert(xe, vfid <=3D xe_sriov_pf_get_totalvfs(xe)); + lockdep_assert_held(pf_migration_mutex(xe, vfid)); + + return &xe->sriov.pf.vfs[vfid].migration.descriptor; +} + +static struct xe_sriov_migration_data **pf_pick_trailer(struct xe_device *= xe, unsigned int vfid) +{ + xe_assert(xe, IS_SRIOV_PF(xe)); + xe_assert(xe, vfid <=3D xe_sriov_pf_get_totalvfs(xe)); + lockdep_assert_held(pf_migration_mutex(xe, vfid)); + + return &xe->sriov.pf.vfs[vfid].migration.trailer; +} =20 static bool data_needs_bo(struct xe_sriov_migration_data *data) { @@ -43,6 +81,9 @@ xe_sriov_migration_data_alloc(struct xe_device *xe) */ void xe_sriov_migration_data_free(struct xe_sriov_migration_data *data) { + if (IS_ERR_OR_NULL(data)) + return; + if (data_needs_bo(data)) xe_bo_unpin_map_no_vm(data->bo); else @@ -125,3 +166,298 @@ int xe_sriov_migration_data_init_from_hdr(struct xe_s= riov_migration_data *data) =20 return mig_data_init(data); } + +static ssize_t vf_mig_data_hdr_read(struct xe_sriov_migration_data *data, + char __user *buf, size_t len) +{ + loff_t offset =3D sizeof(data->hdr) - data->hdr_remaining; + + if (!data->hdr_remaining) + return -EINVAL; + + if (len > data->hdr_remaining) + len =3D data->hdr_remaining; + + if (copy_to_user(buf, (void *)&data->hdr + offset, len)) + return -EFAULT; + + data->hdr_remaining -=3D len; + + return len; +} + +static ssize_t vf_mig_data_read(struct xe_sriov_migration_data *data, + char __user *buf, size_t len) +{ + if (len > data->remaining) + len =3D data->remaining; + + if (copy_to_user(buf, data->vaddr + (data->size - data->remaining), len)) + return -EFAULT; + + data->remaining -=3D len; + + return len; +} + +static ssize_t __vf_mig_data_read_single(struct xe_sriov_migration_data **= data, + unsigned int vfid, char __user *buf, size_t len) +{ + ssize_t copied =3D 0; + + if ((*data)->hdr_remaining) + copied =3D vf_mig_data_hdr_read(*data, buf, len); + else + copied =3D vf_mig_data_read(*data, buf, len); + + if ((*data)->remaining =3D=3D 0 && (*data)->hdr_remaining =3D=3D 0) { + xe_sriov_migration_data_free(*data); + *data =3D NULL; + } + + return copied; +} + +static struct xe_sriov_migration_data **vf_mig_pick_data(struct xe_device = *xe, unsigned int vfid) +{ + struct xe_sriov_migration_data **data; + + data =3D pf_pick_descriptor(xe, vfid); + if (*data) + return data; + + data =3D pf_pick_pending(xe, vfid); + if (!*data) + *data =3D xe_sriov_pf_migration_save_consume(xe, vfid); + if (*data) + return data; + + data =3D pf_pick_trailer(xe, vfid); + if (*data) + return data; + + return ERR_PTR(-ENODATA); +} + +static ssize_t vf_mig_data_read_single(struct xe_device *xe, unsigned int = vfid, + char __user *buf, size_t len) +{ + struct xe_sriov_migration_data **data =3D vf_mig_pick_data(xe, vfid); + + if (IS_ERR_OR_NULL(data)) + return PTR_ERR(data); + + return __vf_mig_data_read_single(data, vfid, buf, len); +} + +/** + * xe_sriov_migration_data_read() - Read migration data from the device. + * @xe: the &xe_device + * @vfid: the VF identifier + * @buf: start address of userspace buffer + * @len: requested read size from userspace + * + * Return: number of bytes that has been successfully read, + * 0 if no more migration data is available, + * -errno on failure. + */ +ssize_t xe_sriov_migration_data_read(struct xe_device *xe, unsigned int vf= id, + char __user *buf, size_t len) +{ + ssize_t ret, consumed =3D 0; + + xe_assert(xe, IS_SRIOV_PF(xe)); + + scoped_cond_guard(mutex_intr, return -EINTR, pf_migration_mutex(xe, vfid)= ) { + while (consumed < len) { + ret =3D vf_mig_data_read_single(xe, vfid, buf, len - consumed); + if (ret =3D=3D -ENODATA) + break; + if (ret < 0) + return ret; + + consumed +=3D ret; + buf +=3D ret; + } + } + + return consumed; +} + +static ssize_t vf_mig_hdr_write(struct xe_sriov_migration_data *data, + const char __user *buf, size_t len) +{ + loff_t offset =3D sizeof(data->hdr) - data->hdr_remaining; + int ret; + + if (len > data->hdr_remaining) + len =3D data->hdr_remaining; + + if (copy_from_user((void *)&data->hdr + offset, buf, len)) + return -EFAULT; + + data->hdr_remaining -=3D len; + + if (!data->hdr_remaining) { + ret =3D xe_sriov_migration_data_init_from_hdr(data); + if (ret) + return ret; + } + + return len; +} + +static ssize_t vf_mig_data_write(struct xe_sriov_migration_data *data, + const char __user *buf, size_t len) +{ + if (len > data->remaining) + len =3D data->remaining; + + if (copy_from_user(data->vaddr + (data->size - data->remaining), buf, len= )) + return -EFAULT; + + data->remaining -=3D len; + + return len; +} + +static ssize_t vf_mig_data_write_single(struct xe_device *xe, unsigned int= vfid, + const char __user *buf, size_t len) +{ + struct xe_sriov_migration_data **data =3D pf_pick_pending(xe, vfid); + int ret; + ssize_t copied; + + if (IS_ERR_OR_NULL(*data)) { + *data =3D xe_sriov_migration_data_alloc(xe); + if (!*data) + return -ENOMEM; + } + + if ((*data)->hdr_remaining) + copied =3D vf_mig_hdr_write(*data, buf, len); + else + copied =3D vf_mig_data_write(*data, buf, len); + + if ((*data)->hdr_remaining =3D=3D 0 && (*data)->remaining =3D=3D 0) { + ret =3D xe_sriov_pf_migration_restore_produce(xe, vfid, *data); + if (ret) { + xe_sriov_migration_data_free(*data); + return ret; + } + + *data =3D NULL; + } + + return copied; +} + +/** + * xe_sriov_migration_data_write() - Write migration data to the device. + * @xe: the &xe_device + * @vfid: the VF identifier + * @buf: start address of userspace buffer + * @len: requested write size from userspace + * + * Return: number of bytes that has been successfully written, + * -errno on failure. + */ +ssize_t xe_sriov_migration_data_write(struct xe_device *xe, unsigned int v= fid, + const char __user *buf, size_t len) +{ + ssize_t ret, produced =3D 0; + + xe_assert(xe, IS_SRIOV_PF(xe)); + + scoped_cond_guard(mutex_intr, return -EINTR, pf_migration_mutex(xe, vfid)= ) { + while (produced < len) { + ret =3D vf_mig_data_write_single(xe, vfid, buf, len - produced); + if (ret < 0) + return ret; + + produced +=3D ret; + buf +=3D ret; + } + } + + return produced; +} + +#define MIGRATION_DESCRIPTOR_DWORDS 0 +static size_t pf_descriptor_init(struct xe_device *xe, unsigned int vfid) +{ + struct xe_sriov_migration_data **desc =3D pf_pick_descriptor(xe, vfid); + struct xe_sriov_migration_data *data; + int ret; + + data =3D xe_sriov_migration_data_alloc(xe); + if (!data) + return -ENOMEM; + + ret =3D xe_sriov_migration_data_init(data, 0, 0, XE_SRIOV_MIGRATION_DATA_= TYPE_DESCRIPTOR, + 0, MIGRATION_DESCRIPTOR_DWORDS * sizeof(u32)); + if (ret) { + xe_sriov_migration_data_free(data); + return ret; + } + + *desc =3D data; + + return 0; +} + +static void pf_pending_init(struct xe_device *xe, unsigned int vfid) +{ + struct xe_sriov_migration_data **data =3D pf_pick_pending(xe, vfid); + + *data =3D NULL; +} + +#define MIGRATION_TRAILER_SIZE 0 +static int pf_trailer_init(struct xe_device *xe, unsigned int vfid) +{ + struct xe_sriov_migration_data **trailer =3D pf_pick_trailer(xe, vfid); + struct xe_sriov_migration_data *data; + int ret; + + data =3D xe_sriov_migration_data_alloc(xe); + if (!data) + return -ENOMEM; + + ret =3D xe_sriov_migration_data_init(data, 0, 0, XE_SRIOV_MIGRATION_DATA_= TYPE_TRAILER, + 0, MIGRATION_TRAILER_SIZE); + if (ret) { + xe_sriov_migration_data_free(data); + return ret; + } + + *trailer =3D data; + + return 0; +} + +/** + * xe_sriov_migration_data_save_init() - Initialize the pending save migra= tion data. + * @xe: the &xe_device + * @vfid: the VF identifier + * + * Return: 0 on success, -errno on failure. + */ +int xe_sriov_migration_data_save_init(struct xe_device *xe, unsigned int v= fid) +{ + int ret; + + scoped_cond_guard(mutex_intr, return -EINTR, pf_migration_mutex(xe, vfid)= ) { + ret =3D pf_descriptor_init(xe, vfid); + if (ret) + return ret; + + ret =3D pf_trailer_init(xe, vfid); + if (ret) + return ret; + + pf_pending_init(xe, vfid); + } + + return 0; +} diff --git a/drivers/gpu/drm/xe/xe_sriov_migration_data.h b/drivers/gpu/drm= /xe/xe_sriov_migration_data.h index ef65dccddc035..5cde6e9439677 100644 --- a/drivers/gpu/drm/xe/xe_sriov_migration_data.h +++ b/drivers/gpu/drm/xe/xe_sriov_migration_data.h @@ -27,5 +27,10 @@ void xe_sriov_migration_data_free(struct xe_sriov_migrat= ion_data *snapshot); int xe_sriov_migration_data_init(struct xe_sriov_migration_data *data, u8 = tile_id, u8 gt_id, enum xe_sriov_migration_data_type, loff_t offset, size_t size); int xe_sriov_migration_data_init_from_hdr(struct xe_sriov_migration_data *= snapshot); +ssize_t xe_sriov_migration_data_read(struct xe_device *xe, unsigned int vf= id, + char __user *buf, size_t len); +ssize_t xe_sriov_migration_data_write(struct xe_device *xe, unsigned int v= fid, + const char __user *buf, size_t len); +int xe_sriov_migration_data_save_init(struct xe_device *xe, unsigned int v= fid); =20 #endif diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_control.c b/drivers/gpu/drm/xe/= xe_sriov_pf_control.c index 8d8a01faf5291..c2768848daba1 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_control.c +++ b/drivers/gpu/drm/xe/xe_sriov_pf_control.c @@ -5,6 +5,7 @@ =20 #include "xe_device.h" #include "xe_gt_sriov_pf_control.h" +#include "xe_sriov_migration_data.h" #include "xe_sriov_pf_control.h" #include "xe_sriov_printk.h" =20 @@ -165,6 +166,10 @@ int xe_sriov_pf_control_trigger_save_vf(struct xe_devi= ce *xe, unsigned int vfid) unsigned int id; int ret; =20 + ret =3D xe_sriov_migration_data_save_init(xe, vfid); + if (ret) + return ret; + for_each_gt(gt, xe, id) { ret =3D xe_gt_sriov_pf_control_trigger_save_vf(gt, vfid); if (ret) diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c b/drivers/gpu/drm/xe/= xe_sriov_pf_debugfs.c index e0e6340c49106..a9a28aec22421 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c +++ b/drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c @@ -9,6 +9,7 @@ #include "xe_device.h" #include "xe_device_types.h" #include "xe_pm.h" +#include "xe_sriov_migration_data.h" #include "xe_sriov_pf.h" #include "xe_sriov_pf_control.h" #include "xe_sriov_pf_debugfs.h" @@ -132,6 +133,7 @@ static void pf_populate_pf(struct xe_device *xe, struct= dentry *pfdent) * /sys/kernel/debug/dri/BDF/ * =E2=94=9C=E2=94=80=E2=94=80 sriov * =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 vf1 + * =E2=94=82 =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 migration_data * =E2=94=82 =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 pause * =E2=94=82 =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 reset * =E2=94=82 =E2=94=82 =E2=94=9C=E2=94=80=E2=94=80 resume @@ -220,6 +222,38 @@ DEFINE_VF_CONTROL_ATTRIBUTE(reset_vf); DEFINE_VF_CONTROL_ATTRIBUTE_RW(save_vf); DEFINE_VF_CONTROL_ATTRIBUTE_RW(restore_vf); =20 +static ssize_t data_write(struct file *file, const char __user *buf, size_= t count, loff_t *pos) +{ + struct dentry *dent =3D file_dentry(file)->d_parent; + struct xe_device *xe =3D extract_xe(dent); + unsigned int vfid =3D extract_vfid(dent); + + if (*pos) + return -ESPIPE; + + return xe_sriov_migration_data_write(xe, vfid, buf, count); +} + +static ssize_t data_read(struct file *file, char __user *buf, size_t count= , loff_t *ppos) +{ + struct dentry *dent =3D file_dentry(file)->d_parent; + struct xe_device *xe =3D extract_xe(dent); + unsigned int vfid =3D extract_vfid(dent); + + if (*ppos) + return -ESPIPE; + + return xe_sriov_migration_data_read(xe, vfid, buf, count); +} + +static const struct file_operations data_vf_fops =3D { + .owner =3D THIS_MODULE, + .open =3D simple_open, + .write =3D data_write, + .read =3D data_read, + .llseek =3D default_llseek, +}; + static void pf_populate_vf(struct xe_device *xe, struct dentry *vfdent) { debugfs_create_file("pause", 0200, vfdent, xe, &pause_vf_fops); @@ -228,6 +262,7 @@ static void pf_populate_vf(struct xe_device *xe, struct= dentry *vfdent) debugfs_create_file("reset", 0200, vfdent, xe, &reset_vf_fops); debugfs_create_file("save", 0600, vfdent, xe, &save_vf_fops); debugfs_create_file("restore", 0600, vfdent, xe, &restore_vf_fops); + debugfs_create_file("migration_data", 0600, vfdent, xe, &data_vf_fops); } =20 static void pf_populate_with_tiles(struct xe_device *xe, struct dentry *de= nt, unsigned int vfid) diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_migration.c b/drivers/gpu/drm/x= e/xe_sriov_pf_migration.c index eaf581317bdef..029e14f1ffa74 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_migration.c +++ b/drivers/gpu/drm/xe/xe_sriov_pf_migration.c @@ -10,6 +10,7 @@ #include "xe_gt_sriov_pf_migration.h" #include "xe_pm.h" #include "xe_sriov.h" +#include "xe_sriov_migration_data.h" #include "xe_sriov_pf_helpers.h" #include "xe_sriov_pf_migration.h" #include "xe_sriov_printk.h" @@ -53,6 +54,15 @@ static bool pf_check_migration_support(struct xe_device = *xe) return IS_ENABLED(CONFIG_DRM_XE_DEBUG); } =20 +static void pf_migration_cleanup(struct drm_device *dev, void *arg) +{ + struct xe_sriov_pf_migration *migration =3D arg; + + xe_sriov_migration_data_free(migration->pending); + xe_sriov_migration_data_free(migration->trailer); + xe_sriov_migration_data_free(migration->descriptor); +} + /** * xe_sriov_pf_migration_init() - Initialize support for SR-IOV VF migrati= on. * @xe: the &xe_device @@ -62,6 +72,7 @@ static bool pf_check_migration_support(struct xe_device *= xe) int xe_sriov_pf_migration_init(struct xe_device *xe) { unsigned int n, totalvfs; + int err; =20 xe_assert(xe, IS_SRIOV_PF(xe)); =20 @@ -73,7 +84,15 @@ int xe_sriov_pf_migration_init(struct xe_device *xe) for (n =3D 1; n <=3D totalvfs; n++) { struct xe_sriov_pf_migration *migration =3D pf_pick_migration(xe, n); =20 + err =3D drmm_mutex_init(&xe->drm, &migration->lock); + if (err) + return err; + init_waitqueue_head(&migration->wq); + + err =3D drmm_add_action_or_reset(&xe->drm, pf_migration_cleanup, migrati= on); + if (err) + return err; } =20 return 0; @@ -154,6 +173,36 @@ xe_sriov_pf_migration_save_consume(struct xe_device *x= e, unsigned int vfid) return data; } =20 +static int pf_handle_descriptor(struct xe_device *xe, unsigned int vfid, + struct xe_sriov_migration_data *data) +{ + if (data->tile !=3D 0 || data->gt !=3D 0) + return -EINVAL; + + xe_sriov_migration_data_free(data); + + return 0; +} + +static int pf_handle_trailer(struct xe_device *xe, unsigned int vfid, + struct xe_sriov_migration_data *data) +{ + struct xe_gt *gt; + u8 gt_id; + + if (data->tile !=3D 0 || data->gt !=3D 0) + return -EINVAL; + if (data->offset !=3D 0 || data->size !=3D 0 || data->buff || data->bo) + return -EINVAL; + + xe_sriov_migration_data_free(data); + + for_each_gt(gt, xe, gt_id) + xe_gt_sriov_pf_control_restore_data_done(gt, vfid); + + return 0; +} + /** * xe_sriov_pf_migration_restore_produce() - Produce a VF migration data p= acket to the device. * @xe: the &xe_device @@ -173,6 +222,11 @@ int xe_sriov_pf_migration_restore_produce(struct xe_de= vice *xe, unsigned int vfi =20 xe_assert(xe, IS_SRIOV_PF(xe)); =20 + if (data->type =3D=3D XE_SRIOV_MIGRATION_DATA_TYPE_DESCRIPTOR) + return pf_handle_descriptor(xe, vfid, data); + else if (data->type =3D=3D XE_SRIOV_MIGRATION_DATA_TYPE_TRAILER) + return pf_handle_trailer(xe, vfid, data); + gt =3D xe_device_get_gt(xe, data->gt); if (!gt || data->tile !=3D gt->tile->id) { xe_sriov_err_ratelimited(xe, "VF%d Invalid GT - tile:%u, GT:%u\n", diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_migration_types.h b/drivers/gpu= /drm/xe/xe_sriov_pf_migration_types.h index 2a45ee4e3ece8..8468e5eeb6d66 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_migration_types.h +++ b/drivers/gpu/drm/xe/xe_sriov_pf_migration_types.h @@ -7,6 +7,7 @@ #define _XE_SRIOV_PF_MIGRATION_TYPES_H_ =20 #include +#include #include =20 /** @@ -53,6 +54,14 @@ struct xe_sriov_migration_data { struct xe_sriov_pf_migration { /** @wq: waitqueue used to avoid busy-waiting for snapshot production/con= sumption */ wait_queue_head_t wq; + /** @lock: Mutex protecting the migration data */ + struct mutex lock; + /** @pending: currently processed data packet of VF resource */ + struct xe_sriov_migration_data *pending; + /** @trailer: data packet used to indicate the end of stream */ + struct xe_sriov_migration_data *trailer; + /** @descriptor: data packet containing the metadata describing the devic= e */ + struct xe_sriov_migration_data *descriptor; }; =20 #endif --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 19BB32D73A7; Tue, 21 Oct 2025 22:42:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=198.175.65.14 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086569; cv=fail; b=j5sB+MdXkuOxgqz/uXnivdMTqljLCyMjceN0p92OX978CX8bTMXnrNi/A/WxYwmttBhAmJBuUvmlWL+QUb9P6RSM+53sVhGsjnoZ2hJV4XUtZc2A+HVXkQPkoUstEHIG2QPt0Zxv4B/d4nzAOlpFpqJ6IPMZwc3Acw/nNGc9fSQ= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086569; c=relaxed/simple; bh=Bfi2642rY8UEWXdf0C9n0vxJURx0vODX+Lc9LdJxTDo=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=Jypd0W01W7pm7gg2Yqawz8D5aeRrXWQmKfNVIL1MyxIFSUM8mEQR67sAG90hzG/GE3xoE6pXWXcUIQJM3yEswS6py4grOMkINJmbRn0H/RMwRMgxSogvNf/PQX9xR6SqqjvkQxkXT4ch18JifXKTaiex/qP2plyOcmkoNqfExf4= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=jzrmxn8d; arc=fail smtp.client-ip=198.175.65.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="jzrmxn8d" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086567; x=1792622567; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=Bfi2642rY8UEWXdf0C9n0vxJURx0vODX+Lc9LdJxTDo=; b=jzrmxn8d80ivsnyhLB5cAF0uZPlFVeKt2RQW9dS+EQqb0EbYBk9iB/Lt 95JME1rOyWJJCQtfY7eubUTc3e9Ws1OMcrPxnwp8cqrMpH/MMGT4Cj6n2 RGyFPFqgadvbjxdgWc+MbXSkcBbU35yH22lXMlVUoMHSXJfGdT4MXr2Hm suKZrmizIatYmVgvEu0fJzEUFxGCcVH8ek8nzq9kFmyplY8oHsq1cNID2 0Q2mxrMC+rieRKzO2YUnk+lFe0sU7u3l2ET/cGdZwDUXXI+9FSNaHnRJ8 2IjBeM9DPqB3Q7WFSzXtG8fvdr9n25WklgQERVxpGftN4DHn4HinapY2t A==; X-CSE-ConnectionGUID: 6P/Ks71GR1OpsVo3hTuy0Q== X-CSE-MsgGUID: L3hWyhsUR+eAZJgQ7aIzNQ== X-IronPort-AV: E=McAfee;i="6800,10657,11531"; a="67060966" X-IronPort-AV: E=Sophos;i="6.17,312,1747724400"; d="scan'208";a="67060966" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:42:47 -0700 X-CSE-ConnectionGUID: VKfaHUK0TfmH0D3OTwQ4SA== X-CSE-MsgGUID: IQqpKvNsToC45H/+RQ3VcQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="214345510" Received: from fmsmsx901.amr.corp.intel.com ([10.18.126.90]) by orviesa002.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:42:46 -0700 Received: from FMSMSX901.amr.corp.intel.com (10.18.126.90) by fmsmsx901.amr.corp.intel.com (10.18.126.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:42:46 -0700 Received: from fmsedg901.ED.cps.intel.com (10.1.192.143) by FMSMSX901.amr.corp.intel.com (10.18.126.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:42:46 -0700 Received: from BL2PR02CU003.outbound.protection.outlook.com (52.101.52.33) by edgegateway.intel.com (192.55.55.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:42:45 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=C3uDQ8lZd397r1R21NMni3yEGmcc8vo4NdB4IzDZ4idNQ5dCSqhXExics8J6NDJ2DJobcjPjoQ1YCSoauLAPKnKSfUsIvBALSpyjE/QAOny7kgroNTb6aNnJjHACtd2T/5kyb+y00Bk3sHJmDcBs1RpqFAJxgMV2IB+0nsb0voFEYihPK9m8zMdyvW++NG6Q86c1YHimN173lDmv1SoFRhQZoqEa77HZc32m/mpY9JtOG6sq8jGbb9ic0GS3QT1yu2i+8AEWOJtLVZAKA7Rz8D+r3LhYgq7cfB+PwDxbxFl0/6xYU2nHOaiCHWEzO5Oijq3t3++kTG6gJgpxu7sEhQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=blhjKkjYtzaYN7fPaCYMgUK2fuqN/uQUwpaMBLdW+l4=; b=r4/gl42Xg0CvS2DbJh/f+J+iAaOikljEX1BJehxi/f1cn2I3FF1txw33wIbDrNnNHm7ZHedWQRx3QmZ2AZ5gz+X2lHs4kJ91LmSBD7rZCTuqQ3sztHdFaADMFNP7QFHF0w4UTW7qNs/qnFDPKtTUTYH5vHrzeCKGSwrCf8uLNYfpoPhVyEmquqDoEGnGKRpVy8mq0t3TRxNlgR6TfJ54VtktqU+cte7ScYc27lrKPlnv/P2NlMmxB+V8ZdZEIx5XQAXhBd9hkUB6tT/5j0HertOxomMwi2ekafkNgz2hT5fzkq2tsy6tlJm+DQbfDpnzH4Bnzr/t4JgMAwMoZ30ITQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by PH8PR11MB6753.namprd11.prod.outlook.com (2603:10b6:510:1c8::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Tue, 21 Oct 2025 22:42:43 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:42:43 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 07/26] drm/xe/pf: Add minimalistic migration descriptor Date: Wed, 22 Oct 2025 00:41:14 +0200 Message-ID: <20251021224133.577765-8-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VI1PR09CA0125.eurprd09.prod.outlook.com (2603:10a6:803:78::48) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|PH8PR11MB6753:EE_ X-MS-Office365-Filtering-Correlation-Id: 5082d626-fe56-497f-d2c7-08de10f3260d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|366016|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?ZklDa2swRjM1OVZvc0U5anZYanJmZG1sWHk1MDBtZU84clhUdGEyTlFUNlRF?= =?utf-8?B?NFg2YUZoYVNIamhMTk9VREgzR3lrR09EcktZcU9aSkVDRElZVzYyaWFYYkgy?= =?utf-8?B?M1hsZHRhRzdsd2VGVFNVSkFKQmpRZWRJbDVyamNoa3FzQVJCRGtJdlZKZ1ky?= =?utf-8?B?cEZoTlJnMzRlcjFCbXJJQ3R0eURMbE5ISVg3amVJZHk5YjRZdjd5WUdtLzk2?= =?utf-8?B?UmJ4UmZDT2Z3ZTI5cTUxT3JKRVgycjJ4SzNwMkcyQTM0SnZrejY5emNGSEpp?= =?utf-8?B?QkVIbE5rK2svSE5NNkV5T3hsemhyUVlRVGxVVWlXeStIVWpSaVgydElKWnJk?= =?utf-8?B?QlMvWjhrUU5OS0IyQmt2WjU5YWhrMElnemdsaFo4My9uR0NSNEtqNTlGM3c1?= =?utf-8?B?Ym0vUGVhbldONW0ydFB0YkhId2JVdlFMdUJsUHNoSWY0Qis1V1VjbERaK1pj?= =?utf-8?B?M0hBbFdjRjhoSjZPcGhEREtBSVJlcm83SWMrdkhMN1dpT1IvMXJrQzJPUXU3?= =?utf-8?B?UExvdlRBM0VRc2llRWg3T2hPc3Y1blp5YjJCS3BCSVpYZ01OQnFBQ2NZV0pp?= =?utf-8?B?UEN5ZFpNVktBZzhyZlBNZjQrRk5nV3FBR0R1amNETWEzRXY3VExtSFhoVi9H?= =?utf-8?B?K21GMEw1OENmTklZYnlUVmJzYnVIMFdxeWN2eUlDZi9BY0VKNVVCR2FYYm5Y?= =?utf-8?B?UlRDV0FuK1BobTBmT3ZBKzJhZ0dGaENOeHhFbUJDdHlwY1JGZHRQSjM1Yk5Q?= =?utf-8?B?Vkh5L0ZXRlBoV2ljY0tQenlSRCszZW1Dc2JvcHNhdWZVWFFsMXFFUVNkMmVr?= =?utf-8?B?U0hLNEN6MFlTcmwySUZWditDQWVDbHE5N3BwT01rZTZnZ1hZamRyb1ZRL2hl?= =?utf-8?B?UU9nQlZRemtYYit6WHNteTZhK01DdkJINzY4eENXZHUyeXNPYzhvdFI5dE5a?= =?utf-8?B?eHcwUlV4Skd3aWU2SnJKSnBzRWtjNThxN3g3bkVaREtMU2F2QTd2MFZobWdk?= =?utf-8?B?dmEvTjdTNjRFZm0rNVlDL0RCYllpd1pGYml6ZGM5RytPZGZYSVo5NW9HMWlG?= =?utf-8?B?NVlHYmpyamJjZ2tQS1ZZcVEwSCt1M0labHlKSXBXR0hCZVBRdnovOVVDbnU4?= =?utf-8?B?bGJFNVJqcXYrZ2JtenBVbVhMOHBUeGZpNllOWGV4WW1MRjlxdEQvOGpubXJT?= =?utf-8?B?M2FleGpWL1NPd29SWXlzNlQrSTNYSi9ueS9YSTFMYjV6K0VvZnpiWlUraWNS?= =?utf-8?B?Y1VVbTVaU3pLQnk3TC8rUTREeFpyNHIvT0QwY3pvL1dEV1dYTCszUTNUS2dh?= =?utf-8?B?T1VMZ0hWSjFBOHpPNSsxd1VWREE5Tm14R0xZTmF6YzhaTnJvcndQcmRHdDBu?= =?utf-8?B?YWcrNFEvUVhyWTVhMi9zOEowYXo3dVVrZytnazNPNml3VklMdGVuSTZsWnA5?= =?utf-8?B?L1dtSzU2QVNaSkdOWUVEWVRKZ2grWDJBTnVBbkFxTXBLczZqWFJDRXNnV29V?= =?utf-8?B?T0kyczlRVlVYeGJUaHQ1ZkFYdjFIMnFqQTZHR3k4YTVlTVJnVitodDZGVksy?= =?utf-8?B?eWRwbEhPb3loUFVETC9DblBoRVRtUEIzSFRxblMwVUp2SXBnLzU4ZzU4K1Yv?= =?utf-8?B?Ty9sc2tVVW56UFN2M1QrcG8zVFlBclI3c3A0TnFOZUZEWDNVcDd4bzlWazJl?= =?utf-8?B?SS9lVGpiaGR2bGpaZ3c5WFVYeUtnTU1BQVZzdXgxNlVEc2xBS0F2K2F6Qllu?= =?utf-8?B?SFkvSTIrWHM3WW1tUEJzRzVoTThHL2dFSXVVY0lieHJxVkFpbWkwazdZMnE2?= =?utf-8?B?LzI5eGFoazg4RmRXcDc3UnhaN21abzk2L1JaTDRhbUlWY3EvTXRXckEyZ3Fy?= =?utf-8?B?ODEya0hGakRIN2Y2YXFmbjZoOElhbTlTM0haS0RPTTFkMTRHcDJxaFNobEZq?= =?utf-8?B?b0YrWDczOGpEQnZ0dTNtd05PRGtPeW4vUSsyRnZKT0tIRHN4N3JuY09EQ2t2?= =?utf-8?Q?Mnn2hZlUrvoV9XJEyitqagxImMbF9c=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(366016)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?b3VYZGcxcnB4cW4vMGZ0Z1VWQXBjNVdYRmpmVlhzS2d4Qi91cmx0TnBBUlg1?= =?utf-8?B?UEM0cVpnckRjZkduSUZ2dlM1VGduc0Q3MklrWkoyd29lSnpBWWd6V00rWnc1?= =?utf-8?B?Nmp2V0tibWk5RTVYQWJYeEJUMmg5YUNmaXZ6SGNRZDF2elp5aDNQK2RLUkNZ?= =?utf-8?B?RFJUSGg4dkdmWVY1dSttbUd1WUM0emlTbzlQT29POGZtdG1nM0pVYlNWVllH?= =?utf-8?B?ZHo3Vm9aaG0vWndUc1VBMC9zUERBQTZrNWNwV2tuM0Z5d3lKcXduZ3JONk1l?= =?utf-8?B?ak9ZZE0wK284SnZ3V0JGUWtndHc5Q3RJYTBKcTlDUTI1TXVwWVhvdzFNKy81?= =?utf-8?B?UWZWSDkvRVRGa2Jlak5tQXhlalU1enhLU0lVRU5lS3NBbTc0WUorYXllbHhV?= =?utf-8?B?Uzk4bHB4NUoyUnZPTFQ0Vk1jMjVsYmJXMVBxYWJkWEZRQm5iZlh0WVdweFdU?= =?utf-8?B?eXRQOHhCeDNKYjlFTzRmU0s2OGxJTTJpNVFGajBpV1JwUGpoZGhscjJnNGFB?= =?utf-8?B?RWtWMjh6czk0eFN0R2JQb0VIYUtBY1ZqaDl5eW1XaThQcytza2JyaUVsMjRl?= =?utf-8?B?cmhodEU4eXU2eUk0NnMzWFB3RmY5R0tsbG5HaCtlazFMZS9uNnA1dFhBeXBX?= =?utf-8?B?WkVYRkpEVzBQQXNRZkRtcm9lSHlyNjREeTdxdmZ2OU1uU2FLMG5IaHMxZVpj?= =?utf-8?B?SWJqS1p0YjJUSmMxeWJYVWZ6OHJTemtFQW9JZGphbCtZelBGSXR3MUdkQkcw?= =?utf-8?B?d2UwN0lJbUQvcVloOW40MVJGalJ4bXJLSkJLTWJXZjhIajI3bWdQYnpvdHhN?= =?utf-8?B?b3I4SWNwNUlBd2tScjB4Z1lkTTg4SzU0cG96ZXRtZEU3QnErRk9tbDl2TW12?= =?utf-8?B?RDdJUFVjSDZlTlc4SWt3VTV2dGhHamJDRlFlWmhaRmVXekJnODNoVUQ1V0hU?= =?utf-8?B?Z3plSFZLTEkyZHd6MTU5a1pTbEZRWFZRMzNXMXZvNWovZlZmQXpGZUpoRXNX?= =?utf-8?B?aHBaYThYZGxXR0lpRE9ZTGRrT3ZkYlFTSzVPYzlNcTEzT1dBSXZXc1FweXZQ?= =?utf-8?B?YmZySGtVRUJrT1hVYnd4TGV0d25vVnZwSnE5bzh3WXV0eFlEUGdwV1dSclVB?= =?utf-8?B?L1ZtTk9jZEtNbk10YlVIOFFTcCsxaUlzdEt5TGJlTzFCdmRsUzRrbUVQM3c3?= =?utf-8?B?Q1d3NEl3NzB3ZDhvQzcxZUJVY09RYU13cERrVG8ybFBxRlJ1RE9ScGIvVjQr?= =?utf-8?B?cENMMC9IREViUW5Tb0FnNjFlZHJRcnl1NDZOMUhTa2FNSEwxYnJzY2FyNi80?= =?utf-8?B?NFFaTkNZbm1ranBUMVBsM25zVERBRi9mbWllbU5IYWF3ZmpLNEZ4bnJXcXpL?= =?utf-8?B?bGR5U0NyOGhtcmQxbCtnbUVKT053UU1yNmxqR0ZBOW8zcWdsS204M21lVS9V?= =?utf-8?B?TDBpb2tOVkJYOVJrNzdXY0ZwRFlZN2YyeHA1aWxDV2pkdUx6bk52Rm9wOHcz?= =?utf-8?B?OFBEbUprWFpTNkpMWS9JaEw1dGlZcmdLelRQNGh5RkFMWHRQRnZQK1IvaE9n?= =?utf-8?B?SjhHRm1FeHdnQ0c1Smtwc2JkTGNiOVU5bTBNbFMvS0I3TnpGUGE2Q0dyaitT?= =?utf-8?B?RG1WRFhyM3hEZjNFTW5FZU1zcUUzMWo0SUNZTEhlZC9YNUtNdmpRMVpoN3N0?= =?utf-8?B?VDVpQ08rZWNVa0tYMDRLMGhQeVRud0p5Q21FRW5mZExuTlIvUHRFcWFEcXRY?= =?utf-8?B?cnNrY1AxN3FaZ0haNm1xTU54aWFlSmV5US95cVUwUnRHSlU0Tk1BcllJb3dx?= =?utf-8?B?bFd6cld1UjJ6UGdOa0puSWh4VGhPWEc0U1l5N1VsSHhERkpmeHRJTVF1bHZM?= =?utf-8?B?ZkRCNVVQSm5Kb2JHS04rQVhZeXNPNmJnZ1ZYR1V3YmtNdnBmOFZJU1FMTGlB?= =?utf-8?B?eW95YUU0Y2xIQkwxTmx3azl5N2hUbkFnQXpieDhHMEl4TXFhM2t6R3lWMXJS?= =?utf-8?B?QnRsOWVPazI5UVhIeEhOTHkzQ0hqZTUrcXUvTjBQTjJCNXpRbDlvZjBGa0dK?= =?utf-8?B?N0I3bXlLUnlYZnlVTnlEQnNoWG11THNzS012RGVncUUvUUJiUWJ4Rkh1UjlL?= =?utf-8?B?anFlZ3Y4bGorNXV3NGR0UTZycWR5NWZkYlZPVWNnRlY5S2Q2VnN3OVdLZ0NK?= =?utf-8?B?MGc9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: 5082d626-fe56-497f-d2c7-08de10f3260d X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:42:43.5822 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 5xndyj2Vljf4d3TMDs3udvfTot+5526UENLHe2dig9DPfJ9iFZI2HFAb3I8rQrpdeT9FzL6qDR+cPwU4eT0lsuIXm9m086zp4sJHmnxC6Ps= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR11MB6753 X-OriginatorOrg: intel.com The descriptor reuses the KLV format used by GuC and contains metadata that can be used to quickly fail migration when source is incompatible with destination. Signed-off-by: Micha=C5=82 Winiarski --- drivers/gpu/drm/xe/xe_sriov_migration_data.c | 79 +++++++++++++++++++- drivers/gpu/drm/xe/xe_sriov_migration_data.h | 2 + drivers/gpu/drm/xe/xe_sriov_pf_migration.c | 6 ++ 3 files changed, 86 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/xe/xe_sriov_migration_data.c b/drivers/gpu/drm= /xe/xe_sriov_migration_data.c index 4cd6c6fc9ba18..b58508c0c30f1 100644 --- a/drivers/gpu/drm/xe/xe_sriov_migration_data.c +++ b/drivers/gpu/drm/xe/xe_sriov_migration_data.c @@ -5,6 +5,7 @@ =20 #include "xe_bo.h" #include "xe_device.h" +#include "xe_guc_klv_helpers.h" #include "xe_sriov_migration_data.h" #include "xe_sriov_pf_helpers.h" #include "xe_sriov_pf_migration.h" @@ -383,11 +384,18 @@ ssize_t xe_sriov_migration_data_write(struct xe_devic= e *xe, unsigned int vfid, return produced; } =20 -#define MIGRATION_DESCRIPTOR_DWORDS 0 +#define MIGRATION_KLV_DEVICE_DEVID_KEY 0xf001u +#define MIGRATION_KLV_DEVICE_DEVID_LEN 1u +#define MIGRATION_KLV_DEVICE_REVID_KEY 0xf002u +#define MIGRATION_KLV_DEVICE_REVID_LEN 1u + +#define MIGRATION_DESCRIPTOR_DWORDS (GUC_KLV_LEN_MIN + MIGRATION_KLV_DEVIC= E_DEVID_LEN + \ + GUC_KLV_LEN_MIN + MIGRATION_KLV_DEVICE_REVID_LEN) static size_t pf_descriptor_init(struct xe_device *xe, unsigned int vfid) { struct xe_sriov_migration_data **desc =3D pf_pick_descriptor(xe, vfid); struct xe_sriov_migration_data *data; + u32 *klvs; int ret; =20 data =3D xe_sriov_migration_data_alloc(xe); @@ -401,11 +409,80 @@ static size_t pf_descriptor_init(struct xe_device *xe= , unsigned int vfid) return ret; } =20 + klvs =3D data->vaddr; + *klvs++ =3D PREP_GUC_KLV_CONST(MIGRATION_KLV_DEVICE_DEVID_KEY, + MIGRATION_KLV_DEVICE_DEVID_LEN); + *klvs++ =3D xe->info.devid; + *klvs++ =3D PREP_GUC_KLV_CONST(MIGRATION_KLV_DEVICE_REVID_KEY, + MIGRATION_KLV_DEVICE_REVID_LEN); + *klvs++ =3D xe->info.revid; + *desc =3D data; =20 return 0; } =20 +/** + * xe_sriov_migration_data_process_descriptor() - Process migration data d= escriptor. + * @xe: the &xe_device + * @vfid: the VF identifier + * @data: the &struct xe_sriov_pf_migration_data containing the descriptor + * + * The descriptor uses the same KLV format as GuC, and contains metadata u= sed for + * checking migration data compatibility. + * + * Return: 0 on success, -errno on failure. + */ +int xe_sriov_migration_data_process_descriptor(struct xe_device *xe, unsig= ned int vfid, + struct xe_sriov_migration_data *data) +{ + u32 num_dwords =3D data->size / sizeof(u32); + u32 *klvs =3D data->vaddr; + + xe_assert(xe, data->type =3D=3D XE_SRIOV_MIGRATION_DATA_TYPE_DESCRIPTOR); + if (data->size % sizeof(u32) !=3D 0) + return -EINVAL; + + while (num_dwords >=3D GUC_KLV_LEN_MIN) { + u32 key =3D FIELD_GET(GUC_KLV_0_KEY, klvs[0]); + u32 len =3D FIELD_GET(GUC_KLV_0_LEN, klvs[0]); + + klvs +=3D GUC_KLV_LEN_MIN; + num_dwords -=3D GUC_KLV_LEN_MIN; + + switch (key) { + case MIGRATION_KLV_DEVICE_DEVID_KEY: + if (*klvs !=3D xe->info.devid) { + xe_sriov_warn(xe, + "Aborting migration, devid mismatch %#04x!=3D%#04x\n", + *klvs, xe->info.devid); + return -ENODEV; + } + break; + case MIGRATION_KLV_DEVICE_REVID_KEY: + if (*klvs !=3D xe->info.revid) { + xe_sriov_warn(xe, + "Aborting migration, revid mismatch %#04x!=3D%#04x\n", + *klvs, xe->info.revid); + return -ENODEV; + } + break; + default: + xe_sriov_dbg(xe, + "Unknown migration descriptor key %#06x - skipping\n", key); + break; + } + + if (len > num_dwords) + return -EINVAL; + + klvs +=3D len; + num_dwords -=3D len; + } + + return 0; +} + static void pf_pending_init(struct xe_device *xe, unsigned int vfid) { struct xe_sriov_migration_data **data =3D pf_pick_pending(xe, vfid); diff --git a/drivers/gpu/drm/xe/xe_sriov_migration_data.h b/drivers/gpu/drm= /xe/xe_sriov_migration_data.h index 5cde6e9439677..e7f3b332124bc 100644 --- a/drivers/gpu/drm/xe/xe_sriov_migration_data.h +++ b/drivers/gpu/drm/xe/xe_sriov_migration_data.h @@ -31,6 +31,8 @@ ssize_t xe_sriov_migration_data_read(struct xe_device *xe= , unsigned int vfid, char __user *buf, size_t len); ssize_t xe_sriov_migration_data_write(struct xe_device *xe, unsigned int v= fid, const char __user *buf, size_t len); +int xe_sriov_migration_data_process_descriptor(struct xe_device *xe, unsig= ned int vfid, + struct xe_sriov_migration_data *data); int xe_sriov_migration_data_save_init(struct xe_device *xe, unsigned int v= fid); =20 #endif diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_migration.c b/drivers/gpu/drm/x= e/xe_sriov_pf_migration.c index 029e14f1ffa74..0b4b237780102 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_migration.c +++ b/drivers/gpu/drm/xe/xe_sriov_pf_migration.c @@ -176,9 +176,15 @@ xe_sriov_pf_migration_save_consume(struct xe_device *x= e, unsigned int vfid) static int pf_handle_descriptor(struct xe_device *xe, unsigned int vfid, struct xe_sriov_migration_data *data) { + int ret; + if (data->tile !=3D 0 || data->gt !=3D 0) return -EINVAL; =20 + ret =3D xe_sriov_migration_data_process_descriptor(xe, vfid, data); + if (ret) + return ret; + xe_sriov_migration_data_free(data); =20 return 0; --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 463662C2363; Tue, 21 Oct 2025 22:42:50 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=192.198.163.15 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086573; cv=fail; b=SXIHGYcZlqXIrP0R+tEl/ME6z6yecPUwzr5pF3yYuCuXcn0hlEidSMnAqCf5cAdYVGh0a/hRDPNnRujAC1RP/lkZe9/AbAt6y77pdvYfJokEEn+8P7b/ci2+N3dJHu5iwSJLKQ64HQ+eGvKk+DZxY2pma1TBEq8dLvdm7/iRYJM= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086573; c=relaxed/simple; bh=VdtccHmtpdA9g5YYKJJZXXmJlLwMQTaKEg6Vjrb8f08=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=sCTXKUoH7iRZc5ZpEPUKvQZdjntQjXskEplJgoFTWGJJnxPcjDSdp8ajkKvjdk9U2Um2LFQg+/DaCngKM0SJcPyXWHiLnanGaCqPTYPsHpq73DmpMbzh+iyzJxZ1C5A8LKlnbU7tJY/orWRWrDgTk+oak3HZTFj/LPZng3P2Ln0= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ke4pfANV; arc=fail smtp.client-ip=192.198.163.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ke4pfANV" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086571; x=1792622571; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=VdtccHmtpdA9g5YYKJJZXXmJlLwMQTaKEg6Vjrb8f08=; b=ke4pfANVtV/SHw2VwAgEZ2ebZWmIeoM+uLp9KwVlM+usvJePtlSNtqt+ KwnCfRkoCWTShAVmPk3X5N/RVhHPMpU3MJoKQXs8MLaLRUbQrgUe1e3r7 vaANVASXyV5uP4d8R5385hElq2yeyvu5LZaq3FXhE11qZqzumWB3piN9h Hp2alBaDOwBAzqaw5XUJ4f56CZfGOJrG6VL8UDEUD4ySWzgpg5tiRvcU7 QcKf/bnCRjCiCmvVELx9J+s1ayH/sMgf8DID+WS0Svec7fnNajCzvT7+7 yVG1WULNed6qBydJ/XGfnum8KTFh+S4BI+bpTA4hAK9wx3oEkSazsS3E3 Q==; X-CSE-ConnectionGUID: ufDUjdqCSqyWB7dVOefPlA== X-CSE-MsgGUID: knw7NNMXSj2rvJ99x/kjKA== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="63321639" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="63321639" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:42:50 -0700 X-CSE-ConnectionGUID: UUlGihZkRNGrDCw5IzW3rw== X-CSE-MsgGUID: UPsHgc1+QjSZ6Kz3Qw2nLw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="183644355" Received: from orsmsx901.amr.corp.intel.com ([10.22.229.23]) by fmviesa006.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:42:50 -0700 Received: from ORSMSX902.amr.corp.intel.com (10.22.229.24) by ORSMSX901.amr.corp.intel.com (10.22.229.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:42:49 -0700 Received: from ORSEDG901.ED.cps.intel.com (10.7.248.11) by ORSMSX902.amr.corp.intel.com (10.22.229.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:42:49 -0700 Received: from MW6PR02CU001.outbound.protection.outlook.com (52.101.48.60) by edgegateway.intel.com (134.134.137.111) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:42:49 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=hbQvfpyBAZnXLh6yrmiWH0gLu26TjvMFyMbqmPTjxiEWFrGxq4F4b1bzUvCaSuIn6m1PQ95ZGwMYoVjZ92Yi+LuZqyzCqlFdjVcRargeic8ElW72w60jnYv71/C3q6YacpeEbNHymFmKeswGJNqm+anPt0nDRjMO1ERua4UgvOUyQSOUH5bCyJhBH9yGmwXRmZjLivhkAVY8s/U6n8zR6CkP6kxtUtBTgWtsorz0Lo979Tj8XOJK+8C8S17XJUUwBCzfDbHfP8bJKc0jCf/RIDnISY7dTUs/bps5HvhaeLnxN1MEc+2Y6rONxgTtFwIPNdQAfb9C25DxVvA3eiTNbA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=XCPvYsBuo7h/mVdHQ8FtkLh6oW5w8DxDmRT3+p+fvbM=; b=TW7bZ89n4aRqS1LLsBQw+P0PfadZf5NZ9dZgGl6oLe520bHvyGMbuI1bpyND4ZlTgUQW65ipuWgrrVWj00rijORuw/lq+8lGGfLG5jphnXgcomh4GHlc760jbxmjsvDc6y6c4vy91+D0M4BjBx9sGzLNp+GLIPUepGdgRAisW0colic00ONggRH/PQVEX1ykQTaE80MtEl3e1FZJoEdLfY5YmlxmyaszVADs3NNC+PzrDVF6ICda1X2paPQM69ib5YSL4e3cDCbbN0Ea4R+kjHHc9xKzw8iaeCWHwJsyyFcHVUlS7vf40D0dfyIQ2A2fNAQBQ285niL7Mdlr8x/kzA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by PH8PR11MB6753.namprd11.prod.outlook.com (2603:10b6:510:1c8::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Tue, 21 Oct 2025 22:42:48 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:42:48 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 08/26] drm/xe/pf: Expose VF migration data size over debugfs Date: Wed, 22 Oct 2025 00:41:15 +0200 Message-ID: <20251021224133.577765-9-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VIYP296CA0003.AUTP296.PROD.OUTLOOK.COM (2603:10a6:800:29d::9) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|PH8PR11MB6753:EE_ X-MS-Office365-Filtering-Correlation-Id: 26dba436-b1e5-4225-b5be-08de10f328af X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|366016|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?ZWo2SUc1d1BnVjUzc1V0L1lhdWJ2TkJtZk1SL1V1czBLYTJaTFJ1UUdOT1Vi?= =?utf-8?B?YzdaUGx1RkZZVVZVWVF6bXdJVEdFRnhSeFlmc2hGN2ZQL0Ezc3UwTFdkMVdz?= =?utf-8?B?cVo1dDFWYmNjZmJCaDkzbWIrYXg2NXFaSFNIZVJHdGtIb3BlbEpqZHBlZkVk?= =?utf-8?B?bmFseU5QQWNnalNBc2VQTFpISmF1bEVMaTRiVGJXNWU5OVJCOE9RTlJvbkRB?= =?utf-8?B?Wks1eHBGdG5ZS0lrVXFWM2tMdHBOV2dUV0lzaVNPLy90b0ZJYnc3bmh4dHc5?= =?utf-8?B?d2VLZ1BGNzZtUkZlRHYxbnRrQkZFMk5ldHYyNXdpem5TdnpvQnI3RWRabVI2?= =?utf-8?B?WVl5TGM5NWFRTjh1L3BKaE9TRUZuQytNYm1TWFp4WkZ4YXlicTBDQ2wrV3FQ?= =?utf-8?B?L2lYSjdVZzYvUXFVKzA1Zll6T0puajJ3NmNabnM5b1RZSXFPL3JSWGhtTWsw?= =?utf-8?B?OTdDZ21HKzhnNURTT3p5bjFHT3RmaVRiaG05TGRHU1E5eFJOZjJuZmtGZTJE?= =?utf-8?B?ZGkwVU9jUFBSRmpVcXd6UUxqdkp0M2MzbmRFRWpQWXZJaTlDdFNMcEF2U1hU?= =?utf-8?B?WnduS3l6aWtkcDY0NGVMa0tvWk5Uclh6UllxYjBnL2dhUXlvU3I3eThxTlFY?= =?utf-8?B?WlJXTld1S0cyOHRYTmlqQlZ2WkwwNWF2TmRYOHY4SVcrMVVnZnc3aVdnWW93?= =?utf-8?B?SmZmSmlmSVNBNUlUcDQxWURIVlpLbGlLTW1DRU8xYlVEVmszSkRmMFNYTndY?= =?utf-8?B?UXhzaUZYVU1JblFycEp0cHdsc2g3Zng3cnBSRlN4MkludVhUYjlsdFF2ZlJB?= =?utf-8?B?UFdsalR3NDNJWmxnb0tmanpqNkNZQzRldWZtbTlNaFA5eWVRMUJqWXVFNW9v?= =?utf-8?B?dVVDWHZTV0U0ZTJDVWlvcVg5cndjNmZpY0RmWTZsTEdrK1NFNEVUK3loeFRs?= =?utf-8?B?ZlFuOFdPUmVuTmF6L2dnYmwzOEdXYkJYUG1ibGRXWkFmV3Z3cy9SK1pXVnNX?= =?utf-8?B?V3NCMWp0MlpldG1heEt6SWFzU2l0bVlrNXVhRlZjZ2IwUitkZnpGcmNHd3c0?= =?utf-8?B?Tkc1U0tsbXlnNUdZUTRkYUQ0WDM3SVdqL1lTKy9MaUVXRFVjb2dYTnhyeGgw?= =?utf-8?B?VDZhOExMRTRocVlhSzM5KzlRVEpWamlncEQ0MHZEbENHdkFONHF4a2JkMndX?= =?utf-8?B?UnVVem9GZnJFVlJWRG4rc2ZtQ1NoM3laOEdUTkxmVG95dWl2NkhEcTgrYmlG?= =?utf-8?B?cHI3RVBEdFZvTjdqbUJzOUdJWERLWFhEMmhRODVOUVppUFpkVGxoLytlYVl0?= =?utf-8?B?V0ZBTzNoNTFzRjVqS2IyREhxSHVEeGRJUUhPRm92MCttSmJzb1J3K3ZHcE5x?= =?utf-8?B?OW9yZkYrVDkxVmY4bjBhWFgwMzBSK05JZi9RKzhRZzk0Y0xXYnFPUytzRXIr?= =?utf-8?B?SmdvbWlDbEI2UGpuejFlMFM2TWJ3RG9rZU1BN29qTjB3TDVXc3ZoQ3MyS3dO?= =?utf-8?B?U0VVVVFtRHMvUWZrMnZac3RQQTBYVEdITlZkK2NEK254aFNLUkF3MWZRTnZ1?= =?utf-8?B?NVhSYXBWUFp4ZXRWUEdDMXBCbXYzSmNENHRoY0NXWkxPR2x1SzZJdFpTN0lu?= =?utf-8?B?TG02UmtlbnllK1gzVTBXWlkvL0VnTWlnSk1WT0xuUVhhZWMrc0VZR0kzZlpB?= =?utf-8?B?eFpPc1gydVM5S2pYYklYcGZRUjFZaU1Td0VzR1BRUk9rUjdoemd6M2JONDdn?= =?utf-8?B?UmxlSlVpanJUNmxLYmdVZzN0R2U3dDJjQ1k1L0hKb3p2MmdlWjNDMEdFWUl2?= =?utf-8?B?blNBbHRaVnRSbFA3SHRSMFdzUlpHZ2FtbzhuUlBiVjNFNGk3dndnUFkyWXc4?= =?utf-8?B?N25OQVJhOURPZG15eEZYamNPTHlpenlkaTFJbThzOWJjNnhoZ2kyeVV1R21L?= =?utf-8?B?dG8rUGFQUlEwek5WOGlLNlhTdXJCMVpGV1puWFcwaDdWalBxTVZCd0tSNFVh?= =?utf-8?Q?vD3CjNpd40j0XaPcaDi6jB6hu5GmaM=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(366016)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?dnNmcGJwbEVlNFdQQnRsZE9uNkdzVTdIYUc2YWRXK29CWGVBSTJUYjN5Z3g0?= =?utf-8?B?ZzdrQWNYWGxsV3pEYmlEbWNiVDh0T2t5cC91VVYzbVBYNTc4SFJoYVhXc1NR?= =?utf-8?B?T3gzOENuQ05HN0ZOTlNvbjAvZjlGb29ya0xqdnM5K0drRCtOM0RRRU5rVlVF?= =?utf-8?B?QkdWL2Z0S1B6blFXM3A0STBWakNPdkZTWUJuK0FuMWNNcDI3ZVRDb3Q0eDZ5?= =?utf-8?B?OEU2cmEwcXJ3cEQyYU9XTFphUnZjVk11NjBGVzJoQTBlRWpNeXNMVWNYckF2?= =?utf-8?B?d1JoY3hZc2RLSnJLbUNhKzZPQzJKUjdFYkJqQWVkYnJVMDFhNnllMVVtcWZS?= =?utf-8?B?UkNRYnFVbHR1ZDZGazEvM3czdVR1Q20ybjFjbCs4bGs4aGtzS2hMQ3U1TjNq?= =?utf-8?B?T1JNWEM0dEQ3Z0VkY1llZ2tJbFgyMVVxZEU5YXVyV0Z2OXliTTNDcURLWVNx?= =?utf-8?B?Y3dUYkljeFNkTjVXMVd5V1Z6OE16R2l4a3pxMVJiOVVtZDVTeFI2UmxSNWk3?= =?utf-8?B?QzFhUjlndlJ6VnhpVC9MY1FDRk5WZnlXck11eDRlckhTT1U0T0NwakVpSU1Q?= =?utf-8?B?MnkwSktmOFVQaUQwaEpBVlF2MlVFcE11c0NhZE8yY2d3VUdNZFpLU1JZWmFv?= =?utf-8?B?TVdETVVDeUZsWjB6VnhmVjBKSjFyRWxWbER2V0FMcHBBQlFZZVlYSnFzYXZ3?= =?utf-8?B?WmNabVhTZXZVcVBOS1Zodjl2REh4eE9WYTVua1V3UE1WRE5qK2F5UXplVUpy?= =?utf-8?B?VUp2RThnRnR6ekx5QS9TVnlsUzRoL0ZYZ2tuZ0FHTXNUenlBaUcrRzM4RmhO?= =?utf-8?B?Mk5pNFk1aWpFekZkdXc4U20vMUY3Y2p6WS85Mm1VVHVMSTZ0WmxLem1icFlZ?= =?utf-8?B?OVJTNWVELzFiZCtoYzFlNXV1N2dEVnUyRlNoRW9mc09kVm9Yb0ZjUFBoWmk4?= =?utf-8?B?MEJFYk1XRExPTXJCY0s1ekJXdUNxaDZzM0VBaENRTTY3UHlHakpnZ1FGUG1X?= =?utf-8?B?RVduT01ZU3A5MFpubllqVytuZk40WTM5REVmL0ZwSktwQlp0dGg0TTFnU284?= =?utf-8?B?V29vMVEzQTBEZEp6VldoMVV1L3JHQjcxZ29ZcVB3K2pjZHM1RkFhVUdNTjU4?= =?utf-8?B?aU96Vm8xdnRvMEJvaDhLdkFPalJFU2R0OXpmUm5WRUc1S3VCUHozUFlhWHNz?= =?utf-8?B?YlIrOFhQSC9JaXlINjQwV20rVk5RcXN6Tzg3c09kbm5pMFptblFvU0FZNTFl?= =?utf-8?B?VXdrY3JrSmZrRDJDYTZQNTQyRHI1d1YxVjRIZ01HK3Zabi9BVHl3RHJEWEdB?= =?utf-8?B?RnpaMkNGWU1SNmpEOVhpWjZ5RmkzaFRseERVSHdsVEVRanR4Ny94VFp1c0Fn?= =?utf-8?B?U2FicTVSOHNIQWlIV1Mybzl3NmZTZmQxR2hkU3hzWStoditWNjdraityYlJF?= =?utf-8?B?ZTFFaldYdW83cFJnS2NjcW9iU2RBN05rQ2N0L1lJL1daNEFiQTlqa0p2Y0h4?= =?utf-8?B?bUdxeUVlUjFnZHFJTjNRcTR4RW54RUJCMVlUc2FvYnk4NTJoZ3JsSEgyajVv?= =?utf-8?B?amsrTktxVWhxTmJiVVViT1B1Y3ZSOGVpZmsveVZySzFyaW8rLytzek0xeE5m?= =?utf-8?B?YUFBV3JWQk1OMkJqL0JLaFNqSDdPU05yOEJ4d3EzOEtxb0RlN0dKN0tiUGpG?= =?utf-8?B?VUZYbzduMzBmV1JTUkZiRUlzZE5XOCtDUUVYQ1drY0JFR21TbVFJdklwSU5T?= =?utf-8?B?TXhwU0J6d1FHNE1XQ0ZPdUprZURvbHYwSXZrNEtRc0N2QUg0YW9tRUl5VUhz?= =?utf-8?B?cnRMYnVTYW1PYi9pY0l6d0pZeGQzZXB1KzVKNnJvWVlNajhvMG51UFh1VGkx?= =?utf-8?B?SmhsZ3NTUC9sOS9JVXNuaHF4WjRIKzZhSjBIZUZOS3dzZ1lWeUI5NWlFU2t3?= =?utf-8?B?d1IwS2ZvTWdQaSt3b1l5Mk1DTmdYYXJsM2pGMEJmaVBUaWlBVVdqbWF2SGZl?= =?utf-8?B?anN5cmxYS0JhUW9YZ1dHaU1wTTVkWkpNZHpkTC9udmZMMXZYTCt1eXl2RE9Q?= =?utf-8?B?bVFRRnRuc3BhSW5GK1plM0NkZnVtS3hnZWNESHFjYWg0MUcrVEpIWlpQSWlM?= =?utf-8?B?OVF5czNJZ3NCem9jcENhSjJBd1c3dGxjc25aS21oSFNsbEF1cXZCZmwyWVhP?= =?utf-8?B?N3c9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: 26dba436-b1e5-4225-b5be-08de10f328af X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:42:48.0206 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: zV95/aeZItlmAy+ncLOqcKWjPV1N0+BzFKDqwjYXwNjW/6rGJC2iY8xVmVpmbqa+h33ypKipB7OUiv1103qHwXVqrvrwAE32972zP77Jxqg= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR11MB6753 X-OriginatorOrg: intel.com The size is normally used to make a decision on when to stop the device (mainly when it's in a pre_copy state). Signed-off-by: Micha=C5=82 Winiarski Reviewed-by: Michal Wajdeczko --- drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c | 19 ++++++++++++ drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h | 2 ++ drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c | 29 ++++++++++++++++++ drivers/gpu/drm/xe/xe_sriov_pf_migration.c | 30 +++++++++++++++++++ drivers/gpu/drm/xe/xe_sriov_pf_migration.h | 1 + 5 files changed, 81 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.c index 8ba72165759b3..4e26feb9c267f 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c @@ -395,6 +395,25 @@ ssize_t xe_gt_sriov_pf_migration_write_guc_state(struc= t xe_gt *gt, unsigned int } #endif /* CONFIG_DEBUG_FS */ =20 +/** + * xe_gt_sriov_pf_migration_size() - Total size of migration data from all= components within a GT. + * @gt: the &xe_gt + * @vfid: the VF identifier + * + * This function is for PF only. + * + * Return: total migration data size in bytes or a negative error code on = failure. + */ +ssize_t xe_gt_sriov_pf_migration_size(struct xe_gt *gt, unsigned int vfid) +{ + ssize_t total =3D 0; + + xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); + + /* Nothing to query yet - will be updated once per-GT migration data type= s are added */ + return total; +} + /** * xe_gt_sriov_pf_migration_ring_empty() - Check if a migration ring is em= pty. * @gt: the &xe_gt diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.h index 1ed2248f0a17e..e2d41750f863c 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h @@ -15,6 +15,8 @@ int xe_gt_sriov_pf_migration_init(struct xe_gt *gt); int xe_gt_sriov_pf_migration_save_guc_state(struct xe_gt *gt, unsigned int= vfid); int xe_gt_sriov_pf_migration_restore_guc_state(struct xe_gt *gt, unsigned = int vfid); =20 +ssize_t xe_gt_sriov_pf_migration_size(struct xe_gt *gt, unsigned int vfid); + bool xe_gt_sriov_pf_migration_ring_empty(struct xe_gt *gt, unsigned int vf= id); bool xe_gt_sriov_pf_migration_ring_full(struct xe_gt *gt, unsigned int vfi= d); void xe_gt_sriov_pf_migration_ring_free(struct xe_gt *gt, unsigned int vfi= d); diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c b/drivers/gpu/drm/xe/= xe_sriov_pf_debugfs.c index a9a28aec22421..bc2d0b0342f22 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c +++ b/drivers/gpu/drm/xe/xe_sriov_pf_debugfs.c @@ -14,6 +14,7 @@ #include "xe_sriov_pf_control.h" #include "xe_sriov_pf_debugfs.h" #include "xe_sriov_pf_helpers.h" +#include "xe_sriov_pf_migration.h" #include "xe_sriov_pf_provision.h" #include "xe_sriov_pf_service.h" #include "xe_sriov_printk.h" @@ -254,6 +255,33 @@ static const struct file_operations data_vf_fops =3D { .llseek =3D default_llseek, }; =20 +static ssize_t size_read(struct file *file, char __user *ubuf, size_t coun= t, loff_t *ppos) +{ + struct dentry *dent =3D file_dentry(file)->d_parent; + struct xe_device *xe =3D extract_xe(dent); + unsigned int vfid =3D extract_vfid(dent); + char buf[21]; + ssize_t ret; + int len; + + xe_pm_runtime_get(xe); + ret =3D xe_sriov_pf_migration_size(xe, vfid); + xe_pm_runtime_put(xe); + if (ret < 0) + return ret; + + len =3D scnprintf(buf, sizeof(buf), "%zd\n", ret); + + return simple_read_from_buffer(ubuf, count, ppos, buf, len); +} + +static const struct file_operations size_vf_fops =3D { + .owner =3D THIS_MODULE, + .open =3D simple_open, + .read =3D size_read, + .llseek =3D default_llseek, +}; + static void pf_populate_vf(struct xe_device *xe, struct dentry *vfdent) { debugfs_create_file("pause", 0200, vfdent, xe, &pause_vf_fops); @@ -263,6 +291,7 @@ static void pf_populate_vf(struct xe_device *xe, struct= dentry *vfdent) debugfs_create_file("save", 0600, vfdent, xe, &save_vf_fops); debugfs_create_file("restore", 0600, vfdent, xe, &restore_vf_fops); debugfs_create_file("migration_data", 0600, vfdent, xe, &data_vf_fops); + debugfs_create_file("migration_size", 0400, vfdent, xe, &size_vf_fops); } =20 static void pf_populate_with_tiles(struct xe_device *xe, struct dentry *de= nt, unsigned int vfid) diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_migration.c b/drivers/gpu/drm/x= e/xe_sriov_pf_migration.c index 0b4b237780102..88babec9c893e 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_migration.c +++ b/drivers/gpu/drm/xe/xe_sriov_pf_migration.c @@ -242,3 +242,33 @@ int xe_sriov_pf_migration_restore_produce(struct xe_de= vice *xe, unsigned int vfi =20 return xe_gt_sriov_pf_migration_restore_produce(gt, vfid, data); } + +/** + * xe_sriov_pf_migration_size() - Total size of migration data from all co= mponents within a device + * @xe: the &xe_device + * @vfid: the VF identifier (can't be 0) + * + * This function is for PF only. + * + * Return: total migration data size in bytes or a negative error code on = failure. + */ +ssize_t xe_sriov_pf_migration_size(struct xe_device *xe, unsigned int vfid) +{ + size_t size =3D 0; + struct xe_gt *gt; + ssize_t ret; + u8 gt_id; + + xe_assert(xe, IS_SRIOV_PF(xe)); + xe_assert(xe, vfid); + + for_each_gt(gt, xe, gt_id) { + ret =3D xe_gt_sriov_pf_migration_size(gt, vfid); + if (ret < 0) + return ret; + + size +=3D ret; + } + + return size; +} diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_migration.h b/drivers/gpu/drm/x= e/xe_sriov_pf_migration.h index df81a540c246a..16cb444c36aa6 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_migration.h +++ b/drivers/gpu/drm/xe/xe_sriov_pf_migration.h @@ -18,6 +18,7 @@ int xe_sriov_pf_migration_restore_produce(struct xe_devic= e *xe, unsigned int vfi struct xe_sriov_migration_data *data); struct xe_sriov_migration_data * xe_sriov_pf_migration_save_consume(struct xe_device *xe, unsigned int vfid= ); +ssize_t xe_sriov_pf_migration_size(struct xe_device *xe, unsigned int vfid= ); wait_queue_head_t *xe_sriov_pf_migration_waitqueue(struct xe_device *xe, u= nsigned int vfid); =20 #endif --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id A27E82E5B1B; Tue, 21 Oct 2025 22:42:56 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=192.198.163.7 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086578; cv=fail; b=QFaA/OpTEDALPYMdQuXvSwnsRkjd6P0huRLZ87UgIS34RMy4kJwCewLBHga9eplVu9/QvD8Lhzxe4D3grkf0r0v93suEqA2L15H1Dj0DBGkF4xqAdy4degkF5iJZBcQQBtw1xqKXma+1SSDofD/xNDXuwRsuNZ0vBV9+FTuTV9Q= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086578; c=relaxed/simple; bh=5ZHMnDusAZId7birXYh6lGc5zNBKDs/0WDnBKpzt3DY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=kBi3TC7PYP5RpeZ0Hxf5JZ60Fpn0KD1Q5ZEWPy775aQ6uKtpSBCPwFO8ILI+Jp6GaH99hF5MHX37GUbWAT6c9KundwugaJn4ys1CL5HuzEA+xfo4+1PmJgo6xnsp5XQmfN9D0g0ls7y12jkIPCfInvyCRnmD/iM4kNWjtjcVB8Q= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=ZyUBxVI4; arc=fail smtp.client-ip=192.198.163.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="ZyUBxVI4" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086576; x=1792622576; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=5ZHMnDusAZId7birXYh6lGc5zNBKDs/0WDnBKpzt3DY=; b=ZyUBxVI4s1xCzlI4M9xcYi6e1p84VAoXqVjzM4MLGcOl+YrzM90+/zW4 zMCgt720TMgaGs+/eEDnrBi9UYbzd2yOKpguVNyWQArIB3n8w0GpGxiDV MW1MgV8Oifgrw/8u+TxAf9k8dz7ySMrUi3DSrpcrHxfLyWt68Ysjl8uai /odMa3hkYVLNBFOw9BRYAK5lacoqt3Bu1VEXDoXZ1djsddXPDmIi2XNLs eAI6+l6gkGPhy4wsjFi+BsZAsjwXtR4bhmYNxVZMZxm/HGYY6oXgUJ/96 hhgKpbsZhIAC0VgZiSPSON+E16M2CrhuQjiPziKfsE0eOr/m3F49cxo6d g==; X-CSE-ConnectionGUID: C3GD+mTsSeaODDXPMC81uA== X-CSE-MsgGUID: tlV9KqYuQxe5yIwcopgURQ== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="88693470" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="88693470" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:42:56 -0700 X-CSE-ConnectionGUID: 5/vfLUKFTL2LvVqlKiT5wQ== X-CSE-MsgGUID: 4JKMatjMTf25cTCE4mT4yA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="214345548" Received: from fmsmsx901.amr.corp.intel.com ([10.18.126.90]) by orviesa002.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:42:55 -0700 Received: from FMSMSX902.amr.corp.intel.com (10.18.126.91) by fmsmsx901.amr.corp.intel.com (10.18.126.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:42:55 -0700 Received: from fmsedg901.ED.cps.intel.com (10.1.192.143) by FMSMSX902.amr.corp.intel.com (10.18.126.91) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:42:55 -0700 Received: from BL2PR02CU003.outbound.protection.outlook.com (52.101.52.29) by edgegateway.intel.com (192.55.55.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:42:54 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=SwwAv64y9KcPcyndI2gMXUDoeExHDa03PK8zm4L3DbOh5ucqM3RkhXizoYdvUdzjM0CZycuTjKTvt7Qs9rSQVSUWdtljd0NhgXvuG3jKtSNNus9O701xBzU2LydhLmM8DC4R2yIpwZtqZoiTlBspk2oeqs9zV1nZlGJRVGBjzc9UxBVRxDWF1OzXLA421TYm7D83Qdl9YjJNLc6Pk0iTjLDVtFSNTeQZ3lLEu7Srwa1JQ22OhLE52hO5oj4xeTmNCULORZHkeptFSABbRckQU+hoI6p2U6HCVkGqKzqURKgc6KWnX7TEVWl+o9VAuvFbSRHCqCW7j9HQTtU8KS49VA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=U/iTy5tFbKDFp670iPeIdjJ/TaLrvINN0pSTBuFmgKU=; b=p7yXE15A0Je+K6U9bLSaBPxTZsqK9eLKlY7pR4VjJNryiz0EbaBq8T+n7hcsS99JqZZCJzyPhQ60HqKPtkaKA4vmXHR29TOhKadA5NzdiXsGiR/mVPfNu4qP4UZ6edCEqej0xu8Am1JJCFDEYuY3FF26j1LjQ6DJKnY9KaYjW389H52kKl0+abeMq399qVZjUd6nTq7pLzyMXvUMekAgKMfukyezlJ4hrISCN8/bjezq5Kh5JAE42J9T9pkCanGboS5YD3ok+/GuLIic8n2VX0JYidlkIgqUTXC1AgvUG+gYw2grct8aommXFgnW63xVXq2RUtl8Jk4R9EkjYxBvsA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by PH8PR11MB6753.namprd11.prod.outlook.com (2603:10b6:510:1c8::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Tue, 21 Oct 2025 22:42:52 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:42:52 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 09/26] drm/xe: Add sa/guc_buf_cache sync interface Date: Wed, 22 Oct 2025 00:41:16 +0200 Message-ID: <20251021224133.577765-10-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VI1P194CA0026.EURP194.PROD.OUTLOOK.COM (2603:10a6:803:3c::15) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|PH8PR11MB6753:EE_ X-MS-Office365-Filtering-Correlation-Id: 7e07a3e9-6f62-4597-6862-08de10f32b88 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|366016|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?T1dVeGErd2o1cjFjYVNaTEVBMzI3b0JzR0hxNE5PMnV0V3lWUXUxMmNsQU5L?= =?utf-8?B?dW5WeGIyT3U5a3pLWnRGM0puYUt2T0hXUDlsZ1ZabkpxbjIyQnlaQnlsdU5S?= =?utf-8?B?dnFjU0hIMW9CK2cvdU9VZCs1Yzh2a0xFQ3AxQjZ4UmdwMTNnN1VOTkFFWVpU?= =?utf-8?B?UHFIRnNLK0ROR1hIL0dBWlhmRTErNzU5ZUY2WVVvdFcwbUppcUhTMHF1aUNx?= =?utf-8?B?V0FtRXJlbDk0VHQzUFloUjRna2tGdkwyeTc3dTJybVYyaTNiSHRYRTA1Ky9q?= =?utf-8?B?azVZTnA2U1oyUXFFVXdjeUxVUkVuQ0JNd1R3bldJMEhNZnRreVJlTkYvbWdp?= =?utf-8?B?OGp1bmFoc3ZFZlAvbzl6QXhsV1UrbWNQbWpVRlZXMWJFYTQ3K09rRmhqKzVK?= =?utf-8?B?ME43VU9WdVZxaStBMWFpRmNoby9DR1ZaNkY5QlRGWjZMTVFTNWVYbnJwY2Rm?= =?utf-8?B?R3lYVmF3MXM2VFpNSHdTMkVuN1Fza1UwUFFqajdsL3hIV2YzcUdHNzNZNWxM?= =?utf-8?B?N3VudjRVVUlQVkNwV01Qbm15MjZsc1MvYUFIb1g0SXVDbWxzVitNM3pHaERh?= =?utf-8?B?QlA2UEwwS0NTYitQbk5XMlAxK2hYNFdNSHFiclBaOHFpRFJwRkhyRUM4bDFE?= =?utf-8?B?UUtZMkdzNFZOdG5OdTdvRU82Q1BYUVdzcW1LMm1YQndTK3pnQk5LbnUybWRa?= =?utf-8?B?OFNwTjd1ZXI0aDU0S2FZL3FQeGh0VDRKckdxeEpVbUltUzc4bVZsQkV3S1Nx?= =?utf-8?B?bkFoSDd3eGRCQ2FwL0ljQ3NINFNod3F6N2toN1ZSNUdlbjdGUW9YT21hQ0J0?= =?utf-8?B?b1c1WlVJVmRlNFNlbnRlTUdBRUU1TFdqREhBN1RWOVRnYzI4cy8wYWlhUUYv?= =?utf-8?B?TzNUV1pVekREMlRubHljaDM3NkRWR0pXVW5rTVdFUmNsbmhUNnhTQTA2d0Nw?= =?utf-8?B?dEh2dnVFT0tsOW9qTGdTTHZwOWpFQWdjTEFBZjBlb0lhUXdFM0s0SVFCK251?= =?utf-8?B?Um1TSG9WWU1rOWpqQ3hLL3ZtSEU4WTJMODQyblpyaDE3b2hrODNBU1J0aFQ4?= =?utf-8?B?bnVuSmsyMTQyd3BvYUtmM2Q1NHBqOEdTVFVSUVVWTXJLQ1JZdkl0RGhZNTFP?= =?utf-8?B?QlZNQlNNK3hIZXdiU3Vwb1VYTURJM2hlWVppdnNxR2YwRlc2SGlJYm5Dd1NY?= =?utf-8?B?a3VYcGxLbThUMW5IQzlUdmo4d3NpWnZWcDArTGU5bDFsUytkZG03UXBzUjRZ?= =?utf-8?B?RUxzdDFyS0xrOEZnM2VuaE0vVUZkZ3lIV3poRmU4cEJiUU5zajU4ZThSM0sr?= =?utf-8?B?cGRQNFlGSXFHcEdXZGtRaXNrd2pVSHpYNEozTkhPUHVIdGl0aGtocDRlWG5z?= =?utf-8?B?WnV4UDJyUjZJRWVoeTR2NzJzOFdpVlNsbXdlM20zdUpGWFh4TWFCUkhuaGNk?= =?utf-8?B?RldyM0lHcXpOK0FYUzNQbGlLM0I4dUtpREFHVzdMeDdvd2FJSmZ3T2ZuQ1Nr?= =?utf-8?B?V3Bhd3BiWGxwSStUV2RFYzM0SkhTU3RjYTFubFZLVUluM0JXcm5SNDZKZk1I?= =?utf-8?B?ZTVHL3Rxdk5mb25YRkkvTXBpMUJ0eGVwSkxBdFQ3MVYyenFiaStRRXlpMHMz?= =?utf-8?B?Q0kvRStUOEFTc2ZMVmlMaXNacExyWk5la1Nudm9lRWVDU2Rya1d2a3c5ZVBO?= =?utf-8?B?dmxadkZwazI0bmIvUkVNTE84Wm02MXdnTFFrZkNJSk54TzVHcXFKaGUyQURo?= =?utf-8?B?aTFxcFNXZzZjd0gzT2NqazB2K0IzTTJBa3FJMTR4cEVXTHdUd2cvY2pQaWlu?= =?utf-8?B?T2NHQTlBRzRYWjQ0WGU5QjYyNldBK1BUeGlBaTJuYWo2dUJlOHo2eStMZW9k?= =?utf-8?B?VXlkbHpZVDFZZjd2MDZPZEFuK1hZN2dVV3NBRlY2cW8xS09GVGVaZVBLNFlT?= =?utf-8?B?TW4rRmtZbHNoa2R1d2J6emRKdUFabUg0RlZlNjVNdGh6cFJISWdmbFQxekRW?= =?utf-8?Q?4+FCK9EUpxC6j22b5mpS93LByEq2og=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(366016)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?eDJDZnBCMGFrUHp6ZzJaR2wyQXJTdncycDJldlFwd3JVbXdEcjJVeWV4S3p3?= =?utf-8?B?WHhtL0V2T0pLSEZ2MTZkcHlTc3Bwcm9IQmZlbFFyenhsRTFRbkZzOFlVRU1r?= =?utf-8?B?VjdwYXV3NzRCNVh2QVVtV1Q2YlpXTlRrZm1DdEE1VmI0VzAyQW1zdjhRQS9V?= =?utf-8?B?NEl2djhQY1BaNnRnTUFuQzY3Mnc0QWJKRWlZOXJib0tRQnBLSFNtZ3poenFp?= =?utf-8?B?c2RvVUdkc0NuN1Q0eC9NZzA2MUNUTXp2bVpLZE1nUEM5Mkc2cGpFd0lGQ285?= =?utf-8?B?d0hDZ3AwMVpQeFJSWjNRSjZ6MjQ0aXhJVWZTZ2xqSXNPdjhaR3pCSVZmOEhK?= =?utf-8?B?NzkxeVJLMDNLbnora2ZmNXo0b1U4Mjc3UVFuV09QdUhDRVVqMmp5M3R4RGNx?= =?utf-8?B?d2tQc0FHNUtqSmwzWTB5NmE3eVpheml1VHBoY0RaMmZQbkM5VUVIS1JWSU4z?= =?utf-8?B?ZGkweWNmRWI5V1IxUVpqR3BhM1RkMVNHNjFYWFpTcnlXeHByVjlBQnY2bkE1?= =?utf-8?B?dVY3ZXBGZUNvZ0RCN0ZXeENIOUVCN3FiYi9HYmVLbXBNc1A5UmdNSTB4LzN2?= =?utf-8?B?TnVDUXN6eko1VFB6V1hxRUgrczNPREo0UUlaSWpWeFQ5eWgwd2VBQ3ZMSWRa?= =?utf-8?B?OU05Wlp4MlN6ZENJQkNCNnljcXNraVFib3R4SzB6RHdnbHlWREVFQU1KOGc2?= =?utf-8?B?WFI5bUw0Sk9nN1F0ZHJCMktoUXRIcEQxaDBTc0ZYLzllWmhaOFRrNHpSWWll?= =?utf-8?B?WVIzMHRiTDVEZlhkc0tNWExGTk4yS041RlpWY2EyRXRqQkZJQm9GY0JFSE8r?= =?utf-8?B?Z3l5TThmaFFzUS9kZkN6OU1rdmJsa2hBT0pabG9lSVJjd2hNVk1vd3F4VUxF?= =?utf-8?B?SlRGMmJodW9DWmYva1ZPaWorb0s0NE93RUVZb2xLbElvTkdZWUJSMTY1SG5E?= =?utf-8?B?MjdCbUlKTkxDalR3anJ1amNJUVB2N3V2Y01wemQvWW5FZ29kcDA0UVd6bHlF?= =?utf-8?B?a3RBclZaTEdyVXJBL0I0UVpZb1NrZVJOa0ZaUjYrazRnYTNWWEkxNHUwU3pv?= =?utf-8?B?OEdJWXV5cXZVRTI3VTd2N28yOUczdWU5TWIyckFMY01YQVpDQlEvWWxUcGhl?= =?utf-8?B?TWZZenFtWWFCM3AzcmZacW1MYXU5K29BaUxudjM3VzVKTEVzRXl6QUhGR0ds?= =?utf-8?B?WmdheUV0ekZ6ZUp3ZVpSTjBiUm1VZ202c3BwS0h2SkxVMXlsVjJneGNxUDJ1?= =?utf-8?B?N0NTR3hLQ05RTzZjcmR1aEU0aGNHV0VJdlNVUjdhWjJ4WlZvYXdPSUl4MWtm?= =?utf-8?B?dUx5QVl3VXllM3NaWHAxdTV1R1JzUU55ZEZXSnc1UklUS3N3ZnlMVGRxUGdy?= =?utf-8?B?S2JVOTFLa0lneTBTSHFqWjQ1ZFVQbFZ1eDRGRG15dGx0TkJqWUw2Sk5TaHVw?= =?utf-8?B?TTRwZFFHQmpGbVNVblNoQit0bHNVOXl6NnRXU1JleUlkZVdTQVFCRkRVZDNK?= =?utf-8?B?NUFjVEZFYSt3VVdHZ09HSnFSck5Id3pyeEE1VlhaallEMjIwMEtram0zN2NW?= =?utf-8?B?VEMzMUUweWx6b0syWGNFR0NzSGxXbVp0aWJjejlFTlZNTWduTmZXeUZsa3Bk?= =?utf-8?B?aW9neCtOWllmeTBPTnllN3BNbEJaeGZJcGtRdjA5OTNLcVlRaE43ZjdVcjlZ?= =?utf-8?B?VTRxenRmYUJCa3JQSGNOWlVYKzl6bU83VXVZaERacUJJUDV5bFFrenkyaUQx?= =?utf-8?B?YUxpN1dHcjhtSFhDSVMzRkdGT2JPQm5CUlJiZjlYbzdHbVljYkxtdkJmaXNy?= =?utf-8?B?ZVVIUHJRS1U5Y3UraEVwSEE5Uzd3a3Y5VWRVMXF4YmRZaUxBT1p4ZDI3dlJq?= =?utf-8?B?a2ZxaThFZTZta3lJU21JTk90V1RkZEJqZXhmTXVxQkRuVEJmRGUvbGNIQnNI?= =?utf-8?B?S2VtcXUrV2xoNWZhNkg0R2VPTTA5MW5JcnNUZ2txdnpLQ25rMW9ZVmdjeksr?= =?utf-8?B?eW1DM0drbHpzazAxMC9WMDRnUThBcitEdzJmNmYxb2dhYjBtZ0d4TS9ZNXpu?= =?utf-8?B?anBGLzJ6NG9nVlR1WVVpNlF0cjZhSUFHSjlTSk5mbEJ6YWZWbUVsZEsyaGtK?= =?utf-8?B?VzJQd1hRY0VDYjVGUTQyUnNnT3hOaHhRUVFNOGhoRE5jRlRTWkhSVnJHT2ln?= =?utf-8?B?ZWc9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: 7e07a3e9-6f62-4597-6862-08de10f32b88 X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:42:52.7783 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 2IQNCfMgIGICRW+FlPxhOjVcnSkp7S+jUhBGsxyZmGYUavwYTR1gKh9v3Ai63YiLG6I1TC2zVLYroqZNegTXKLBYtPcRuXANDhM7qSmmv9w= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR11MB6753 X-OriginatorOrg: intel.com In upcoming changes the cached buffers are going to be used to read data produced by the GuC. Add a counterpart to flush, which synchronizes the CPU-side of suballocation with the GPU data and propagate the interface to GuC Buffer Cache. Signed-off-by: Micha=C5=82 Winiarski Reviewed-by: Michal Wajdeczko --- drivers/gpu/drm/xe/xe_guc_buf.c | 13 +++++++++++++ drivers/gpu/drm/xe/xe_guc_buf.h | 1 + drivers/gpu/drm/xe/xe_sa.c | 21 +++++++++++++++++++++ drivers/gpu/drm/xe/xe_sa.h | 1 + 4 files changed, 36 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_guc_buf.c b/drivers/gpu/drm/xe/xe_guc_bu= f.c index 502ca3a4ee606..4d8a4712309f4 100644 --- a/drivers/gpu/drm/xe/xe_guc_buf.c +++ b/drivers/gpu/drm/xe/xe_guc_buf.c @@ -115,6 +115,19 @@ void xe_guc_buf_release(const struct xe_guc_buf buf) xe_sa_bo_free(buf.sa, NULL); } =20 +/** + * xe_guc_buf_sync_read() - Copy the data from the GPU memory to the sub-a= llocation. + * @buf: the &xe_guc_buf to sync + * + * Return: a CPU pointer of the sub-allocation. + */ +void *xe_guc_buf_sync_read(const struct xe_guc_buf buf) +{ + xe_sa_bo_sync_read(buf.sa); + + return xe_sa_bo_cpu_addr(buf.sa); +} + /** * xe_guc_buf_flush() - Copy the data from the sub-allocation to the GPU m= emory. * @buf: the &xe_guc_buf to flush diff --git a/drivers/gpu/drm/xe/xe_guc_buf.h b/drivers/gpu/drm/xe/xe_guc_bu= f.h index 0d67604d96bdd..c5e0f1fd24d74 100644 --- a/drivers/gpu/drm/xe/xe_guc_buf.h +++ b/drivers/gpu/drm/xe/xe_guc_buf.h @@ -30,6 +30,7 @@ static inline bool xe_guc_buf_is_valid(const struct xe_gu= c_buf buf) } =20 void *xe_guc_buf_cpu_ptr(const struct xe_guc_buf buf); +void *xe_guc_buf_sync_read(const struct xe_guc_buf buf); u64 xe_guc_buf_flush(const struct xe_guc_buf buf); u64 xe_guc_buf_gpu_addr(const struct xe_guc_buf buf); u64 xe_guc_cache_gpu_addr_from_ptr(struct xe_guc_buf_cache *cache, const v= oid *ptr, u32 size); diff --git a/drivers/gpu/drm/xe/xe_sa.c b/drivers/gpu/drm/xe/xe_sa.c index fedd017d6dd36..63a5263dcf1b1 100644 --- a/drivers/gpu/drm/xe/xe_sa.c +++ b/drivers/gpu/drm/xe/xe_sa.c @@ -110,6 +110,10 @@ struct drm_suballoc *__xe_sa_bo_new(struct xe_sa_manag= er *sa_manager, u32 size, return drm_suballoc_new(&sa_manager->base, size, gfp, true, 0); } =20 +/** + * xe_sa_bo_flush_write() - Copy the data from the sub-allocation to the G= PU memory. + * @sa_bo: the &drm_suballoc to flush + */ void xe_sa_bo_flush_write(struct drm_suballoc *sa_bo) { struct xe_sa_manager *sa_manager =3D to_xe_sa_manager(sa_bo->manager); @@ -123,6 +127,23 @@ void xe_sa_bo_flush_write(struct drm_suballoc *sa_bo) drm_suballoc_size(sa_bo)); } =20 +/** + * xe_sa_bo_sync_read() - Copy the data from GPU memory to the sub-allocat= ion. + * @sa_bo: the &drm_suballoc to sync + */ +void xe_sa_bo_sync_read(struct drm_suballoc *sa_bo) +{ + struct xe_sa_manager *sa_manager =3D to_xe_sa_manager(sa_bo->manager); + struct xe_device *xe =3D tile_to_xe(sa_manager->bo->tile); + + if (!sa_manager->bo->vmap.is_iomem) + return; + + xe_map_memcpy_from(xe, xe_sa_bo_cpu_addr(sa_bo), &sa_manager->bo->vmap, + drm_suballoc_soffset(sa_bo), + drm_suballoc_size(sa_bo)); +} + void xe_sa_bo_free(struct drm_suballoc *sa_bo, struct dma_fence *fence) { diff --git a/drivers/gpu/drm/xe/xe_sa.h b/drivers/gpu/drm/xe/xe_sa.h index 99dbf0eea5402..1be7443508361 100644 --- a/drivers/gpu/drm/xe/xe_sa.h +++ b/drivers/gpu/drm/xe/xe_sa.h @@ -37,6 +37,7 @@ static inline struct drm_suballoc *xe_sa_bo_new(struct xe= _sa_manager *sa_manager } =20 void xe_sa_bo_flush_write(struct drm_suballoc *sa_bo); +void xe_sa_bo_sync_read(struct drm_suballoc *sa_bo); void xe_sa_bo_free(struct drm_suballoc *sa_bo, struct dma_fence *fence); =20 static inline struct xe_sa_manager * --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.7]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 2310A2D0283; Tue, 21 Oct 2025 22:43:01 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=192.198.163.7 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086583; cv=fail; b=Ju2GKuygpEKvuzuf63jZcG13wkt+DgL72hrDzSqUeGuH5mD+Ze1mfW28sD7Qelsey+DnscpDmDPpoj+KfMjTaPEHDAQkyOqyyD3LQyDPH8bXYQ4px4jS4eAdjnQdHmKPo2h+FUBGP4yX/w6dVkRjpWMb9ZF+TI6TLMz83QomlY0= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086583; c=relaxed/simple; bh=r54gz1Rvs5CWCJ+65dpLASOMQmIIFF/HkXwqMJlhBMs=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=IuKvjTwxIEAxnv4Fol1fQ3HziLr+z5akCdr7W5TFDosJpm0mySMD9IUXJK3wRN+XsGmh6KRibA7L2srHBolFi9OvWJl4nbpwfEtCCOulEjtqf4Y1wS7oRZEVI0nd/M9bIpyWX3SisML9xOppnI2ti6hSD7aN+QnmacubK6bD8ks= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=dIZPiwg5; arc=fail smtp.client-ip=192.198.163.7 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="dIZPiwg5" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086581; x=1792622581; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=r54gz1Rvs5CWCJ+65dpLASOMQmIIFF/HkXwqMJlhBMs=; b=dIZPiwg5iz0UyM0njLsNYCripsozx0pUvptXQ7ZyeaP5y+61N7fxg1dK 1FhjYDVgMQ0CvWgXIdX2uzPaz6vxbCAuYrghfM5CPPLdi+CQvu89WSHNm gpsEKAhBcaeDMD3T8JRu3m5/MsNVFmp+jICPUtsXHp2EWtmfQkaLVpgTY pxA6eSjm2jPgAuSdR3U9sv7Z51VPLOk8TWIYbPonL+z6wkSkQcyOUs8Rn 3yBPaTyLOoD0RX3nLNkakNciVk74kA1VPYZKf8YI8/bpJylUElRdExJem vLyLlfHk95GCqFOvZd8GSdKfG6cYTdswKBcIG5xZ31gFBucYCKzaMrMaz w==; X-CSE-ConnectionGUID: 0zHReJ2sT5SZDE4IDZnAgQ== X-CSE-MsgGUID: yCHt4fFaSt6+E3oDIrGsLA== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="88693472" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="88693472" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:01 -0700 X-CSE-ConnectionGUID: 80yML68LTsO7zf1uCJPESw== X-CSE-MsgGUID: GdgBHurlSv+KLFMhC+AiFQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="214345564" Received: from fmsmsx901.amr.corp.intel.com ([10.18.126.90]) by orviesa002.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:00 -0700 Received: from FMSMSX902.amr.corp.intel.com (10.18.126.91) by fmsmsx901.amr.corp.intel.com (10.18.126.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:00 -0700 Received: from fmsedg901.ED.cps.intel.com (10.1.192.143) by FMSMSX902.amr.corp.intel.com (10.18.126.91) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:43:00 -0700 Received: from BL2PR02CU003.outbound.protection.outlook.com (52.101.52.19) by edgegateway.intel.com (192.55.55.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:00 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=k+zIgYe3ZMAni83/W35RxfRGyJXb+IOcz6SdK91fJ93WN78l6aQ+RQQYaUfqQHeP5D88Vy+lcRutLi9XMbGiQgbdgFSp7PmFZq6O98aSaSPis6PaNtILSa/LSA+qO418RKjyafxl4w36VIf7htCJ6Q80p3/V8hjikWOh5O9Kg9sCUlrGvfsW03mdLv55T7rQfjZRboGSJjgA7Oc7Rb91WPOGUF1b+XR6M+FvHiFHJpbBoiRYrkRpcA0l2ZCpVLkka7EROVR9yydbSbCfjH/w4D+ET2C4f1ljmkcjbZlAvUVpTHKLgPwU29GjOFIVJMoO66c7cYjgx3YB6Gp9/DsOTQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=xu96fzvSEInF/VB3Dm+ovxTZGoj+tlhFivBjat5ebpE=; b=t+05vVFhBqs5FRx89vPk/r1s2nf17u7CGV99mgyAvvB/v3eD3Gu2m+joze/PPzsoeQE3uJp3AdEc4y8/oxsxyO1nPJgfZMbPItg3UKrHUYN6+/3Um0K9ivpGW8kExHhtMI60+QzQ1PecUuJpiqLtxEoQiKDPckhBmvKv/e7vwGTpUcOrzEEkJta8uqsSNDp8xINCLz4RQ+3rryhjNeTHihse6w1uat8iSDJ9870MVfhBMSPptfX9QYUxCpMeYfTVN+STfqRWnFQSrinqkWxdpTngZJ9QaPSAyO28saOktrHEGXYHBxKULeGJB9rHrFkT0ldLHPxJKLZHUTwPe3QD+Q== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by PH8PR11MB6753.namprd11.prod.outlook.com (2603:10b6:510:1c8::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Tue, 21 Oct 2025 22:42:58 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:42:57 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 10/26] drm/xe: Allow the caller to pass guc_buf_cache size Date: Wed, 22 Oct 2025 00:41:17 +0200 Message-ID: <20251021224133.577765-11-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VI1PR0502CA0008.eurprd05.prod.outlook.com (2603:10a6:803:1::21) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|PH8PR11MB6753:EE_ X-MS-Office365-Filtering-Correlation-Id: 6a096cc8-1acc-4ba4-6175-08de10f32e6b X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|366016|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?cDZxQnBuQjg2M2xuWm41WUVWcUdpWVBpVUFqZnd0Znc3dnZyZE51QW9LcFVY?= =?utf-8?B?MkFYZVZFUGZqUncrUUxjdGxaNmhXUFFTczJ3N2pQR2laZjlMeFVsUTBzbkxU?= =?utf-8?B?U0lRS3V4bnA4aFQ0QTkrZ3FGeWFmeDZPMXkydUx5bGRkVWpuYVJ5L1FOdHgy?= =?utf-8?B?V0ZqTWtVT3F1R3dlN3ZXQWp5STVhYVdOcGxycVhMUlFZdHR0d2E3MlZMMGhR?= =?utf-8?B?NzdhR0lKem04UkJZMWgwcVVsQkNGV3pYM3BJWVJQZkVFWDhnVk1uRm9VcmJX?= =?utf-8?B?NVRKSjhxT0RvaWtvVVlUOWxwNzNid2Vyd3IwRk42NCs0KzBJdDZTbWViQTdQ?= =?utf-8?B?d2hiT3Z0T291MEM4WllFcHZrOFhBcWxTVDVneGNwcmQwaGRIVWZ3L2NDZHZi?= =?utf-8?B?aHRxRGlQMXBnYnJxVkplL0k0d1lsN29HbE5IUENhVWtMNlhSUFBrWEE2b3Nx?= =?utf-8?B?ZkdFZFBaUnI0d2hES252ZmNaVVJzQmJKcHFuN0JhU0VFNGUwVjZlamE4bFg3?= =?utf-8?B?SEpYREZYNllVWVJ3ZFgvRDZMdFVZeUU4UEZUcG1haDZCSEdzY1IzNDUzVWZM?= =?utf-8?B?S1JVb3Q5ZUszSm1BT2xnQ2x5YWY4V0xEY1FrdGJSbUp1NkkySDNvNXFSa0l6?= =?utf-8?B?bDJML3hMTDhGMUc4TXJ3cmw2cDNnMTUxK3JpVDBFK1dTaDFhZEVlc05taHR0?= =?utf-8?B?dmszbjFSV1FPbUdpVmpySFlXRTNZTGxBamR3Q1VEMFhxT3plU0ppMWlGWFQx?= =?utf-8?B?a0dvWXVxTktmWkgyUTV2WHl5dkxhWjZOM0tpMXVyUm9sSS9oNjl2SWpFbTh5?= =?utf-8?B?KzViS0ZSWTN3MXRkemdUQ3FsZHNZNGNaQ1M2S2hkYU1SSHZsT0ZWRUtSblY2?= =?utf-8?B?dmJrb2FXeFB3dkVSRldkNmY2Z2pOZnptcVhOVE1YZldCNzFPdk5HZjNQejND?= =?utf-8?B?OTZqVjdudktpSDdtUlhNSUptZWJsZ2c5TDZta1lKSUNoMzdUczZGRlE3d2c5?= =?utf-8?B?dnBYa2hMSGRJRWNOcWFXQTRWMGtHSWZKNk1TeE4ydVA1TkhUTEM4UGxjZHBH?= =?utf-8?B?K2JsSStOTUlHc1pGcmRPT0lTalpTVWFweDN6THl5YWdDQ3pYNUx3TmNXaUlC?= =?utf-8?B?djlzZE1DcDhja2JFQVRNZEJuNzJqUWd4c00wUmpsWmNta3FWTXFPNk1aWTBY?= =?utf-8?B?VmJKdFFhMGlZL3VEeWFLWldWcW9OaHhvUTNVWVBWdGlsTUtzVTN2ejc1NzRt?= =?utf-8?B?enU2T0o1eW5vclczdDZXYlJKcGpVTWFhdFdBRmFTcmRjTGhvVkk1elkrb0ow?= =?utf-8?B?NXlqMDZBaHJYNVRGT0N1cU1TMDBvNy95NEdPTUVkaUFUWWFMZEZXSWVtRzhi?= =?utf-8?B?ZVphOUV6dUxQMWJmUWd2c1BQNE9UOFV1Y3NlY0JxclBrVWN5U2w0NnpTQ1Zy?= =?utf-8?B?TDM4SzRYMmMyYmZkQjkxTEkwZVpYVHZ0RmkrUXowM3J3d09SQkczbWxIRjdV?= =?utf-8?B?YjkvbkxlM3Y1akVvV0t5b2pvcEVtMDdNczZMYWJRUk1OdXU4L0gyR0hXVVRa?= =?utf-8?B?eVVaTURDTUhXZTRtV2RBOTFEeXJJWURjc1RMcVdmZy9pUUpqMnNtRFMxWUgr?= =?utf-8?B?aFBoMEZ2SThrbnlxR3BjWXROckNkeG9BSThpSnRQQkp0Vk1qRGhhR1FRY0x6?= =?utf-8?B?b3NKTE1ueUtBZGxvM3RjTWVnbGRDVmxqNjgvZmR4eldjSVA5clI1dXEvbmJT?= =?utf-8?B?dHFadENyeE8rNW1HT3F4UjdTTGpXT29qZ1VXZExQcWp2anI5WXJnQWkyQjVl?= =?utf-8?B?OHJJdmhqL2YzUTlhWjJpYmlha2lhTmtYSXY4R21sK3ViVEM5ekdhL1RTb3lP?= =?utf-8?B?WkZpNHF0Ly9ZSXJNTytKdUdmWUNPbUZoSDkvdkRTZEtDbDFGMXJVQWJDblFX?= =?utf-8?B?RCtnNG5mTDVxbjhIZmdpUDQranZoWVlGZUdBbGM0M1Qyd3ZDU2lKRWxPWk9F?= =?utf-8?Q?mw52GsLiyoQH0orbc1yF0aubcy4rXw=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(366016)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?S0xiNGFiSFNsU21McDdzbzl3Y0dzRjVoeXQrUk1wVHdTbU1ndk9PbjRuY2xn?= =?utf-8?B?eGIzbFl6T1hlVDBlYkNYVFZxM2hoWkJNeVl4M3BuMVFwUlRRazN1eStnUGd6?= =?utf-8?B?aVRiaFNMR0NTK3pWQ0ZWTUkyT0tNYUV1OFFUbjc2ZGMvOE1ZQWFPWnBMUjU2?= =?utf-8?B?YkcvNDJreU9CcmNkY290ck52YkNad1Z3czhwQUxjdEtXaWtKUHJHVktSZ2Zq?= =?utf-8?B?Y1c2ZC8xQ2xwUTZIVGNTaHVIUUtBb0tZWnBlVFVqNzhYMDVyamtMcmZzQTk5?= =?utf-8?B?VGtJaXRhTWlRWEppcTRDT0hMSURCY1NEbVRpM2ZLRk41cmFoa2dtN0QvQ1J2?= =?utf-8?B?WDFENjZzMXNDTFoyTHF4RzNSN0FlRjljdUVmYklxUS91N0Uva0J2Z1ZvMXBs?= =?utf-8?B?cnhSTWJzVGZzRElQMHNqRG5qQTYvZzk0YlAxYWExWXpTd1V4NEVTOFFkWFhz?= =?utf-8?B?OWFKWW14blZVak80dzV5WHVQYjlZcG5Db0dMWitwVVo4bkt4NGNJVGt6ZlF3?= =?utf-8?B?dWRrQU43czA3SzRwcVY1MGM2a2o4NmNqTVVvK3VubmR2aUt2R2RYVG5Ickk4?= =?utf-8?B?T0M3MUg2U0VvUDRJQkt5N3AvSlpyQ2YzYVBZTkR1WGhmc3FPelpCQUxYdGxL?= =?utf-8?B?N0lqV29nT09CWVVEZWdRellDK3RCcVhueDgwalVEbEFlYndFRXFiV3hOWWZv?= =?utf-8?B?RTBTQzNKTTVyVjQ5U201aEtTeDNkaTR5dGx3RG4reWhydTRhdVRvKzJpZ2JP?= =?utf-8?B?TEVmUnlBN0doY2ZrZWk3OS9lam4wZGVIeFl6dEtMZkhIZm1rNCtOc0ttWlFK?= =?utf-8?B?c2p2WlpPNjd0QmxueklyUzZxK0pQQUlGdnhicHZCRnNKeldJMU51OWswWkhv?= =?utf-8?B?MjRtcENGWGgxNmRsR0RzQjhMS0hoM0pZRFhoMWgrY09iSTNxVS84em40SjJH?= =?utf-8?B?S3RKMVozYW5JY09ucXVyOWJtZ0pxa0JmZnhBRUVWaUcwT0xLV3N1V1dMbEtP?= =?utf-8?B?eE03bWwxZnhlQTRGMVN3bDN5VUw0OGJxNjU2S1BMdTRIdSt3N2FxamlPYlNQ?= =?utf-8?B?L0hSYnBsMDZ5c09uSnVzOW9sUGFyTVNTeDZhblI2MUFSYkxMV29RbXgraXFr?= =?utf-8?B?byt5ZVlBTjkrY3hYcUFvV1EybEtWbEpmcnduTzlKQVpEV2FzR3lpS0dOd1BB?= =?utf-8?B?YVAyRXdENVVQZU5qdjdhSFJVMEhUV0I4WWd3L3k1bzVhOXU2eXRHWE5rSzVX?= =?utf-8?B?UGZJMlFZQnMvR2JQSmVRbzBxTWhKMHdweUdobDVSZHJ2cDd2YkJ2MzFLRzJn?= =?utf-8?B?S0pzb1djeEFJZjFLQ1BvT2p4a3ZoMktFZjRoK1dHN0l6eEJxTWJaQmpnRDZt?= =?utf-8?B?aWdNYzRPRllLaFNZN1lBekx6NEVpWkhmZGV1WmFlakJ3a3dDU0dnMEpTMkZh?= =?utf-8?B?ZWgwdUNqYkRpazJ5NXRoQmEremNEcmhpNnFhTEs5M2lWNm1JTEJkVnErZ09S?= =?utf-8?B?Q1pET1k0VldwWnZ6ZlRKWmE0aE5kb3ZaYzI3ckd3Zk9jMWtkMTdnWHFCQ1Jt?= =?utf-8?B?NHVBQWExejAyVll3NXFnQ3M4L1hkVlYyRmY4c1JiaHBRUzZXcUZUb1Ircm1G?= =?utf-8?B?cUFRSm9HLzJ1Z1h2NXVSUC9zRndpOGxsOWJXcjVyRzFGZndVS0hpTGNpMnUv?= =?utf-8?B?VXczaUxWUU96cUZMbFVqTUt3ZjkydE1pOEhSK2Z4enBuVTcxbEhRb3dGdXVu?= =?utf-8?B?WjhKY3paQXY2MzZuSVBBYUZrVzRMTnpJc2FkcDZaWTdnT0dYdkdvYTR4S0Zu?= =?utf-8?B?a3hqWFBSRVdYMDF0WHhrOHdSS1JRZ2pkUVQyNlNTcWpET3BscTFIZWk5bnNh?= =?utf-8?B?OE1xSm0rWWhGN1dqekd1eG4rOVJFREdNV3pmVUJLays0eGx4ZEQ4NjJ1QTVN?= =?utf-8?B?MHNJNVRzRXU5SEpwNEQ1N0R4TDFVMEJWZm5iM2UvSmUxekh1Skw1SSs0emh4?= =?utf-8?B?NVoxeDZsWldVWGxPN1ZNdkxmUkx2NGJSOXRpZWNyOVNYU1V0R1JsZHlESFhS?= =?utf-8?B?T3F0di81ZU1BNGRLdHZzRldIelV1WEJmNUJIN2VIQy9iaGJpZ1paVXVJNC9R?= =?utf-8?B?c3Z1dVg4bVVYbG4rL2tqeC8zSnhuWDB0SkM1WVQwTmlVU2NMaFRIRkdoem5G?= =?utf-8?B?UlE9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: 6a096cc8-1acc-4ba4-6175-08de10f32e6b X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:42:57.8810 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: o8tTzIjgKQORu1LowkzbZLDZwOhTE23XQrHRy+icvYyc0sSajaXLnnLhYOzsQQdnYSpsve5RsfJ+VJjBLzXYwe1vOkYx8/7hLizpyXqHUtI= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR11MB6753 X-OriginatorOrg: intel.com An upcoming change will use GuC buffer cache as a place where GuC migration data will be stored, and the memory requirement for that is larger than indirect data. Allow the caller to pass the size based on the intended usecase. Signed-off-by: Micha=C5=82 Winiarski Reviewed-by: Michal Wajdeczko --- drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c | 2 +- drivers/gpu/drm/xe/xe_guc.c | 4 ++-- drivers/gpu/drm/xe/xe_guc_buf.c | 6 +++--- drivers/gpu/drm/xe/xe_guc_buf.h | 4 +++- 4 files changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c b/drivers/gpu/drm/= xe/tests/xe_guc_buf_kunit.c index d266882adc0e0..485e7a70e6bb7 100644 --- a/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c +++ b/drivers/gpu/drm/xe/tests/xe_guc_buf_kunit.c @@ -72,7 +72,7 @@ static int guc_buf_test_init(struct kunit *test) kunit_activate_static_stub(test, xe_managed_bo_create_pin_map, replacement_xe_managed_bo_create_pin_map); =20 - KUNIT_ASSERT_EQ(test, 0, xe_guc_buf_cache_init(&guc->buf)); + KUNIT_ASSERT_EQ(test, 0, xe_guc_buf_cache_init(&guc->buf, XE_GUC_BUF_CACH= E_DEFAULT_SIZE)); =20 test->priv =3D &guc->buf; return 0; diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c index ecc3e091b89e6..7c65528859ecb 100644 --- a/drivers/gpu/drm/xe/xe_guc.c +++ b/drivers/gpu/drm/xe/xe_guc.c @@ -812,7 +812,7 @@ static int vf_guc_init_post_hwconfig(struct xe_guc *guc) if (err) return err; =20 - err =3D xe_guc_buf_cache_init(&guc->buf); + err =3D xe_guc_buf_cache_init(&guc->buf, XE_GUC_BUF_CACHE_DEFAULT_SIZE); if (err) return err; =20 @@ -860,7 +860,7 @@ int xe_guc_init_post_hwconfig(struct xe_guc *guc) if (ret) return ret; =20 - ret =3D xe_guc_buf_cache_init(&guc->buf); + ret =3D xe_guc_buf_cache_init(&guc->buf, XE_GUC_BUF_CACHE_DEFAULT_SIZE); if (ret) return ret; =20 diff --git a/drivers/gpu/drm/xe/xe_guc_buf.c b/drivers/gpu/drm/xe/xe_guc_bu= f.c index 4d8a4712309f4..ed096a0331244 100644 --- a/drivers/gpu/drm/xe/xe_guc_buf.c +++ b/drivers/gpu/drm/xe/xe_guc_buf.c @@ -28,16 +28,16 @@ static struct xe_gt *cache_to_gt(struct xe_guc_buf_cach= e *cache) * @cache: the &xe_guc_buf_cache to initialize * * The Buffer Cache allows to obtain a reusable buffer that can be used to= pass - * indirect H2G data to GuC without a need to create a ad-hoc allocation. + * data to GuC or read data from GuC without a need to create a ad-hoc all= ocation. * * Return: 0 on success or a negative error code on failure. */ -int xe_guc_buf_cache_init(struct xe_guc_buf_cache *cache) +int xe_guc_buf_cache_init(struct xe_guc_buf_cache *cache, u32 size) { struct xe_gt *gt =3D cache_to_gt(cache); struct xe_sa_manager *sam; =20 - sam =3D __xe_sa_bo_manager_init(gt_to_tile(gt), SZ_8K, 0, sizeof(u32)); + sam =3D __xe_sa_bo_manager_init(gt_to_tile(gt), size, 0, sizeof(u32)); if (IS_ERR(sam)) return PTR_ERR(sam); cache->sam =3D sam; diff --git a/drivers/gpu/drm/xe/xe_guc_buf.h b/drivers/gpu/drm/xe/xe_guc_bu= f.h index c5e0f1fd24d74..5210703309e81 100644 --- a/drivers/gpu/drm/xe/xe_guc_buf.h +++ b/drivers/gpu/drm/xe/xe_guc_buf.h @@ -11,7 +11,9 @@ =20 #include "xe_guc_buf_types.h" =20 -int xe_guc_buf_cache_init(struct xe_guc_buf_cache *cache); +#define XE_GUC_BUF_CACHE_DEFAULT_SIZE SZ_8K + +int xe_guc_buf_cache_init(struct xe_guc_buf_cache *cache, u32 size); u32 xe_guc_buf_cache_dwords(struct xe_guc_buf_cache *cache); struct xe_guc_buf xe_guc_buf_reserve(struct xe_guc_buf_cache *cache, u32 d= words); struct xe_guc_buf xe_guc_buf_from_data(struct xe_guc_buf_cache *cache, --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.9]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0093D2D0C97; Tue, 21 Oct 2025 22:43:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=192.198.163.9 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086591; cv=fail; b=BSOgai13/V+hJVsMux+3w62N46yQ8mvUZrmZtr2vMrVfq5GXWt6jh0TDJEtuMxOEZI6fGgv3QdSsOJbKFtjo/TYn4jk8gdL1YemZBLv7CzVEchmnmhWbNbA3xQUs0Iajr8sillpNOLLj0RgztXgOzLXVvd2qgBoepaMfgS40NAA= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086591; c=relaxed/simple; bh=EdAXNdjWD2DIqWyeVawRBVhNvXAbGOngqttWFcfYM1U=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=GFiCpZvdtP2umJG/7foHWA000dDSaOTehyTUYWMfwtnOkUuJ+cFrdWyZa15B3VcdIqtAj3px9DSkQCWvLPcA4S6IhGLaG/pfP3SMP1i/nLKLFZhPJ5lgcedYjN4MySVKeGRxoYjk6vUztGM2x/ijgPWKszdaQEGJvx4UY4pmHoQ= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Hg1Vy8Rx; arc=fail smtp.client-ip=192.198.163.9 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Hg1Vy8Rx" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086586; x=1792622586; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=EdAXNdjWD2DIqWyeVawRBVhNvXAbGOngqttWFcfYM1U=; b=Hg1Vy8RxvLqW7Cwvbgzwaul2tU2OzhMsEKVFVxvPrF5eBkVVHVN15Rsq XlojBlwVA6scrceI8xv0iHY1aWIZsFvfyzC9RXiqACUqEgLemS86VuYVb XzDhSzLpdD+yggZpuy0Sn8rze8Ua7MJNbU9rM9bkQTMNtbTb0vT2tw/6R PgwxUGMYNWnk4r4SHg1FBnb2TeezOlyAH9Sj+8c2TtJJ/g4Ww7UjQGf0O kzZerqLvoF4DaVU4jslEEb0ys+Ulfe7kobKUQ82UCi2E3eZ2FJADvNlnV sAVhTxJxiIikF7iGeJT5bOF1TAjoYw54R11Krii1TI5Vx+beA73c7cJh3 Q==; X-CSE-ConnectionGUID: 7D5ad5FLSd2nAzOOfpb12Q== X-CSE-MsgGUID: /7auMmmTR5Oy+zBZSeG/KQ== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="73895155" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="73895155" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:05 -0700 X-CSE-ConnectionGUID: IDPvQcuwTa25m74cTjGgJg== X-CSE-MsgGUID: I4V4WX1NQkmjm90o4ME41g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="183644417" Received: from orsmsx901.amr.corp.intel.com ([10.22.229.23]) by fmviesa006.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:05 -0700 Received: from ORSMSX902.amr.corp.intel.com (10.22.229.24) by ORSMSX901.amr.corp.intel.com (10.22.229.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:04 -0700 Received: from ORSEDG901.ED.cps.intel.com (10.7.248.11) by ORSMSX902.amr.corp.intel.com (10.22.229.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:43:04 -0700 Received: from MW6PR02CU001.outbound.protection.outlook.com (52.101.48.24) by edgegateway.intel.com (134.134.137.111) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:04 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=TO6oG3SZNs/ku6ZC1Op5X9Q83TwlRoVNa6G2zjIppBQa+yi0fMho1/5UgjJagBYIzACeLf8L8laxcDJV/Q0vizXSgbtP+zJpgxpqi17GbLw74JVUQaaNySgfhq45tCMqrs3Ul4dBvR8Pmaa+3eubRIRDs4syLcwn3nqIqG6uRRjKyFWObln85K91//v7ZgHf7MpyGcj8UX6L4b3065eCKsx0HTvh05y4n/eiZ/PCWnfFhcRFFICtkUMV6y9rX5W3AoBfpHKnaYqCXOvoG+/FiRhoobDZNDc5TIBgjyeZ/WhYgfWIxqU25V+hpr/BlJ54EEC+79A6g8obILX39WEAcg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=MDJoSS2XNyW8y9XAXq1ngU/Jlj+Bthok3L3e/EB1XPQ=; b=x3MUtNMFJ6Jrn40PSLqadTPPwoRM+hJPgTIgBE1vHtNRMPWzuAjKSuhUjeddecb7ICMPxNoZvI2eGpcEvrEr3WFSXoMLbcW2bukG7yU5hIL2JvOLBpYqXiXExefjZdB5UcjlOueTmCxoBvgcbw0rWHkvZ3T+aLA1FGHE41LLhDaq7+z6CoRcU994OzIDx7t670h7IaE1RET/mZ8CMC3WPSQAa+63L4cEp3n56V/+zqPZHTZIjt5fWr1sOTBLFGiljUCM7wIsreuaSX4BXgrv2LhEsO4UThzA0FxFy9FpgHzgCPXI8kPxk3fh02bCv43YourlKvi37KDDA39tPJSCoQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by PH8PR11MB6753.namprd11.prod.outlook.com (2603:10b6:510:1c8::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Tue, 21 Oct 2025 22:43:02 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:43:02 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 11/26] drm/xe/pf: Increase PF GuC Buffer Cache size and use it for VF migration Date: Wed, 22 Oct 2025 00:41:18 +0200 Message-ID: <20251021224133.577765-12-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VI1PR04CA0112.eurprd04.prod.outlook.com (2603:10a6:803:64::47) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|PH8PR11MB6753:EE_ X-MS-Office365-Filtering-Correlation-Id: f3000140-17e6-41a6-a553-08de10f3316d X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|366016|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?T3VndUlMS3ZxUjZ4WEN5b0l0VzJtQzFabVU5WFpuZERJY1h2NVBUb1p6L2cx?= =?utf-8?B?am82aXBOdE1NQ0JwRHl3TEZaNFEyUTNHWGxtbFc4Q2ttQmVHdW9VOVhJVGhr?= =?utf-8?B?TUpNdUlhUm01R1A3eFlRckhINnFWRUNBSE1VNHBmNXlQK3JzcmVDU0I2VnND?= =?utf-8?B?bUpyaHdjeW5FS25zMUliczFOeEhsQWNrUDdKMjkrL2Z3K0xLUzJHSUNoZ0NS?= =?utf-8?B?enA3bDNGNll3cW92UmxBZm8yN2ttNFBYZlAzTWIySGE0MmZqc0lKV1grQ2g5?= =?utf-8?B?dVk5czJyUXkydlZrMCtVTVZwd2lrVm5oaXRWR2lQT1p2djcrenFBR2ptRWJp?= =?utf-8?B?bXNMaVEwTzkvMjV5RityR0QxTGtkWGo0aFFPbGpvcGcvY2E2Njc5YlUva1Z2?= =?utf-8?B?d0c2VmNoRFcwdTc1a2tXQklNYTZLNStUSTVLaFl1TU5KL1liVHNrb2NRanh2?= =?utf-8?B?Y0RyeUtIMGFEek1mREhLZkFiaVdZMUtIY1ZNSjlHTU1EdmxVdXhkOUtOb2pU?= =?utf-8?B?SmdHVjFqeFh2ZkR1c2dkT3d5cmdTWWZBZlFlOUpjS21tampWV2dwOXpOeENY?= =?utf-8?B?WlBqNGs3TTd0eTMwQ0czbCtiaUh2RCtDdm02SW1MSzIwVGxGeldRa3F5Qjhu?= =?utf-8?B?dTdoSnpZN04vYjFRY0twSitNSTlxWlRDRXMxOFdJNDBtT0MzTEdCbGlGbUtL?= =?utf-8?B?bWtBMHRoMC9LK1ZFT0N3clZNeXU3QVY4Z21iaTZYVUJoY2ptOHlQbzBCdFl0?= =?utf-8?B?bjFQK1lueVFkSWJzdUM0RkdpelpyVmZ6NDlvOVZXRldpbTVmSlJkVlFUdFMy?= =?utf-8?B?Zi9qazF3OHRFQWRtYWM1KzdiS21WQW9TWVBIYUNrS0FIRmlhYUhmQ2ltRkVp?= =?utf-8?B?MnA0Y1lJVzVBRmk4bWJFbURnVXF3dTRTaEJRN01rbVlXUjNWdDBPckQ0RXRU?= =?utf-8?B?Q0V5RUVpRnhVRU96MndaQzVWbWdLSFl6cDM3ZDNMKzVsMWtDejVpSys0cGRG?= =?utf-8?B?d2svM09mVDhuTktObHNXQkdCWmZqZUlnbE9VUXZmQmU5S2dIRzhQU1UyOU5a?= =?utf-8?B?L2t3QXJHNkxxMnNvTzRKM3FEWFBxT3VKSHliNGdwT1YwbThYSXVLc29pSWo1?= =?utf-8?B?Y0xtTktFdjNNYkI5WjVoRjJXZUlUK0J4NFhESmhQMmp6SnNudTV5RmROOUs3?= =?utf-8?B?SHRNeVBGVUhhWGhyR1lWQUhnTkp0NzR4QVZDU09qeVdReU5xMXkvc0lVeW1w?= =?utf-8?B?OFhHSmRHNWFEK0lEb25aTjRoOHg0SHY0bE5CNHl3RHJuT3orMy8yRU0xOXRP?= =?utf-8?B?Y1ZjNWRlTGRSUlUrRXZlc0l6RVZsVGcwcFVyYUk4clIxV1I4MnJ6TXo0Vmpo?= =?utf-8?B?bzBDdVBsNTdtMTAyaEtNT2xqTmJnSkx6SHQ2eEZqbjlJN0FucTV6RWNDZDlV?= =?utf-8?B?ZXBmRjJTbnZlUml4cS93eDF4dEJHMzhlQ3pUR0tmaGNDQThnbllrZElyOTMw?= =?utf-8?B?dDdTN3docW9YTGhIZEJPWUdmbUhycWE3ODlqTUZ0YjV4eVBIcWN5ZzV0Rk5T?= =?utf-8?B?SCtQajAzNEcvRDNkdC9HeDBKSllkRjJIQnllWDM3ZUhoeENQb2x6ekpHOTVx?= =?utf-8?B?clllWFJudVlOdjZTTVZkSVhOeXNlOVgwZWxVYW8rRFptc2dWOHdKK29QOXhk?= =?utf-8?B?bkM2OWdDUzd2SEpDMmdNY2ZTN0ozNlk2RW5ic0NTUDRRNG45ZzZmS1RCNC82?= =?utf-8?B?aG9obngzUG1lVE9DUU1jSE5IU1Q0M0pCQU91WmRLV1ZSV0FkR2hEbyt3QXk3?= =?utf-8?B?VXcvREkyY3NETzB2N2tmUkJ2UWQ4dytYQXNNNE9IbFFrWXJMMitqcW4zUUlZ?= =?utf-8?B?alFZR21CTmN6TU95cWU0OUJKak1kS1RWZGNzVXIyWkVFUWpEUE43YlprMlFw?= =?utf-8?B?ZGpLNVZRTnVxaTU4RXYzVEpFUTNsRXhIUmxIUXZYbTRvWC8vMzNPZWNtRmlj?= =?utf-8?Q?97T1EUNXfMfPE7rlxK3Aamyra8AtPc=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(366016)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?SkN2RkoxMzYwUTFEQU44aUZXQVVzd3BqTElrcXlyL3dEQStidkFOOVdTOVpv?= =?utf-8?B?NTA3UTVFR3FYR3dlc1dwd0VWRVBPT2VoNDVJcWxCUTU5b05PUFFZU2V4MHhX?= =?utf-8?B?cFVxZDZWbmVnYjYvcHM0R3NGY0xLcHZvdXpacXZJcWF2TTNkaVlkc2Z5SSt2?= =?utf-8?B?cmZTRExSUXI5VW4vZUNldklxTHc5UjZYZW9LUXF0NFRSWVFkMEQvc2ZFNHc4?= =?utf-8?B?K0lady9kVDBqbG1YVG9KamJkK1FPdTcvZURhMkMrU0lLNkJHRUVGODhxbk44?= =?utf-8?B?L3pZeS9CV2ZSMkdiU1lWdGhNbHJOS29TTGdOSUg5UWUycDRyLzVkWW1iV0pU?= =?utf-8?B?QUpaa1lYZmJDUVYwUUJrWkU3aG5lWlBYZ0lwWFByWmpHbVlveFdwTjhOeFZQ?= =?utf-8?B?Vnl2OHZPRFdLVXF3anIwTGs0VHdiWDZUNXZqSUdGd1ZSNTkrWHZSZkJ5T09t?= =?utf-8?B?STZBcklDQ0NDdTQwK2VWcXJ1VjF1NTN6VmJRQSthak1OZlRDSFNsSUtaVmx4?= =?utf-8?B?N2x1akgya0x5SThocm50VnlnUDlZMWhLVlVIZFA1T3NvOWpndFExai9LZkV3?= =?utf-8?B?Z25LS1hOUGpNaFNQTE1vVGY3a1o5VUVPOGJ0U0lqM0VLZEJYTEVhR3NyMGVx?= =?utf-8?B?aXJaTDhZcWphL202dGs1UTUrWGZiUkFIVnJ4TFQ1NFN3d1RlM3ZJaXNBZVgy?= =?utf-8?B?Z1RaaXdubG8zaFZsZVNvYlpwckltYzV0eFB1Nk5DSDFXVFBNM2NqR0pGcXg2?= =?utf-8?B?V1FGU3ZCOWxmYk5NMHEzTHlMc0U5aGQ1dUpqUzcwczZqdXN6Qk9zK0t6U0F1?= =?utf-8?B?bmk2WEFYejFrSDRwVEtLd3l4VnZFaWtGVG5Obi9wZkx3QUVRcUw0RFJyYnUz?= =?utf-8?B?QnpDalhsci9nRS9kaGNuZFQySjRMUzZQTUtPRlhuNktUUmU4cmZ4N1RvSitV?= =?utf-8?B?WXV3b3Jlb1ZENFFWVE9INDBJZDIrZWNpNDFvbnpDQ3hhU2EvZ2x3dnRqWVhE?= =?utf-8?B?OVNuamdoNjFiSEYzYUtEZ3NOcnJQeDN1WnNTUzdhbUFucXJCSzZoVEhUR1Q0?= =?utf-8?B?UzBObVdZcmFnRGFjZU5sVTNUbjJZT1VkM2tzMVBJWGNwRzFBVVB3QkNlU0sr?= =?utf-8?B?bTBCZWxYZGtFT3dEV0hod0trbjVid0VWVStkREZhZGFNUDRkQ3BXbk9qa0li?= =?utf-8?B?ODJvQVFVSEtvRnBJa2FmaGNqY01IZkh2UXJsOUUxakVkNkpXYlZGcWI4RFZv?= =?utf-8?B?Zm41eEZnY29xN0xvVzNqa01IWHpRVGh0VUhiOVhYQkQ0YnBicWZBbFh2NWNE?= =?utf-8?B?OVkwSUNPL1hQT1hrYlJPZCsyc3RQWklHaEhuV2w2ZGgrVkduNmJYSlYxY2p2?= =?utf-8?B?M05OVzNXc29XR25DZlhJRWdUN2pOSFZTWlQ4RUdhQUtSSk9DMmpqb1JPZmJ3?= =?utf-8?B?OTJjd2FyRVVBdEJ3RjlOZzI5ZC9jS2Rzcm5TSHpnLzJMUndaaWZLRnVBV2Nl?= =?utf-8?B?RGNwTklSNjMzK0QydmlTV2tjNHpKeTNLSklTVEQzdGc4RnZDSkR0d0VHSjB3?= =?utf-8?B?M2tGUFdPWlNFS2x2SXorWjA0cWlnWEFZMnREVFhkMEVGQ2FJS0RaYml0TnZv?= =?utf-8?B?VHFnTnpIUHM4Z0lFRUx5VHB4MURPUnFWZHpmdTZlS2JEQ0gzRXY3YWFvVEtR?= =?utf-8?B?aG42KzJPbk9MeVZPRk9XSzRiSXgwckRzOEpJc082VG5xZGp4SzY5TjRtcEFn?= =?utf-8?B?blg2NkhNZXhhb3JxdGJKUDI5WnpTQ1F6WjVxNUNrV3hYWTFOaGgxRWo5SGlG?= =?utf-8?B?UmlvczVLS2dXVjBld3Z4LzV1eXZnSStKM2VzK2FqT05WTUE0K01EbDUzUXd6?= =?utf-8?B?ZXR4TzkxVk5VQjh0aDZkRVNQUkpUQ21BZmZwbGliU0wxbWVDNk0zSzViMGNH?= =?utf-8?B?N01Mak0xc1EyWFU1dHhvWDNoaU16MEdYOVdqWm4xZkxnRDNkNHp3S1Rvc1Nv?= =?utf-8?B?R3kzeUo2UnNKdmczWGpkNG94d0FUbmM4SjF5azFFNHNxVlRpR1hFTEhvdTJi?= =?utf-8?B?bEl3ZW1Wd2gwZ0NNSy9LRXZaZXJPamNYaGM1RjB1Vms0VlpFbmpHS1FzSGpJ?= =?utf-8?B?cklxMHM0TDRVQWtPRDdWOFNCN2g3bWVFcXduVGYvMW1wdTRxYmtOQjREdndO?= =?utf-8?B?Qnc9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: f3000140-17e6-41a6-a553-08de10f3316d X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:43:02.6821 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: V1O5O42sPvg3ZINWPbdPoPNnUNmnBqlhXLHgxIrOlUE1RwSSuZ16rwbd8aZhpERI2J8YgCyVA8TMZAQcBKVM00hWb3shJPvoi26X/TvOIio= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR11MB6753 X-OriginatorOrg: intel.com Contiguous PF GGTT VMAs can be scarce after creating VFs. Increase the GuC buffer cache size to 4M for PF so that we can fit GuC migration data (which currently maxes out at just under 4M) and use the cache instead of allocating fresh BOs. Signed-off-by: Micha=C5=82 Winiarski --- drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c | 46 ++++++------------- drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h | 3 ++ drivers/gpu/drm/xe/xe_guc.c | 12 ++++- 3 files changed, 28 insertions(+), 33 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.c index 4e26feb9c267f..04fad3126865c 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c @@ -11,7 +11,7 @@ #include "xe_gt_sriov_pf_helpers.h" #include "xe_gt_sriov_pf_migration.h" #include "xe_gt_sriov_printk.h" -#include "xe_guc.h" +#include "xe_guc_buf.h" #include "xe_guc_ct.h" #include "xe_sriov.h" #include "xe_sriov_migration_data.h" @@ -57,73 +57,55 @@ static int pf_send_guc_query_vf_state_size(struct xe_gt= *gt, unsigned int vfid) =20 /* Return: number of state dwords saved or a negative error code on failur= e */ static int pf_send_guc_save_vf_state(struct xe_gt *gt, unsigned int vfid, - void *buff, size_t size) + void *dst, size_t size) { const int ndwords =3D size / sizeof(u32); - struct xe_tile *tile =3D gt_to_tile(gt); - struct xe_device *xe =3D tile_to_xe(tile); struct xe_guc *guc =3D >->uc.guc; - struct xe_bo *bo; + CLASS(xe_guc_buf, buf)(&guc->buf, ndwords); int ret; =20 xe_gt_assert(gt, size % sizeof(u32) =3D=3D 0); xe_gt_assert(gt, size =3D=3D ndwords * sizeof(u32)); =20 - bo =3D xe_bo_create_pin_map_novm(xe, tile, - ALIGN(size, PAGE_SIZE), - ttm_bo_type_kernel, - XE_BO_FLAG_SYSTEM | - XE_BO_FLAG_GGTT | - XE_BO_FLAG_GGTT_INVALIDATE, false); - if (IS_ERR(bo)) - return PTR_ERR(bo); + if (!xe_guc_buf_is_valid(buf)) + return -ENOBUFS; + + memset(xe_guc_buf_cpu_ptr(buf), 0, size); =20 ret =3D guc_action_vf_save_restore(guc, vfid, GUC_PF_OPCODE_VF_SAVE, - xe_bo_ggtt_addr(bo), ndwords); + xe_guc_buf_flush(buf), ndwords); if (!ret) ret =3D -ENODATA; else if (ret > ndwords) ret =3D -EPROTO; else if (ret > 0) - xe_map_memcpy_from(xe, buff, &bo->vmap, 0, ret * sizeof(u32)); + memcpy(dst, xe_guc_buf_sync_read(buf), ret * sizeof(u32)); =20 - xe_bo_unpin_map_no_vm(bo); return ret; } =20 /* Return: number of state dwords restored or a negative error code on fai= lure */ static int pf_send_guc_restore_vf_state(struct xe_gt *gt, unsigned int vfi= d, - const void *buff, size_t size) + const void *src, size_t size) { const int ndwords =3D size / sizeof(u32); - struct xe_tile *tile =3D gt_to_tile(gt); - struct xe_device *xe =3D tile_to_xe(tile); struct xe_guc *guc =3D >->uc.guc; - struct xe_bo *bo; + CLASS(xe_guc_buf_from_data, buf)(&guc->buf, src, size); int ret; =20 xe_gt_assert(gt, size % sizeof(u32) =3D=3D 0); xe_gt_assert(gt, size =3D=3D ndwords * sizeof(u32)); =20 - bo =3D xe_bo_create_pin_map_novm(xe, tile, - ALIGN(size, PAGE_SIZE), - ttm_bo_type_kernel, - XE_BO_FLAG_SYSTEM | - XE_BO_FLAG_GGTT | - XE_BO_FLAG_GGTT_INVALIDATE, false); - if (IS_ERR(bo)) - return PTR_ERR(bo); - - xe_map_memcpy_to(xe, &bo->vmap, 0, buff, size); + if (!xe_guc_buf_is_valid(buf)) + return -ENOBUFS; =20 ret =3D guc_action_vf_save_restore(guc, vfid, GUC_PF_OPCODE_VF_RESTORE, - xe_bo_ggtt_addr(bo), ndwords); + xe_guc_buf_flush(buf), ndwords); if (!ret) ret =3D -ENODATA; else if (ret > ndwords) ret =3D -EPROTO; =20 - xe_bo_unpin_map_no_vm(bo); return ret; } =20 diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.h index e2d41750f863c..4f2f2783339c3 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h @@ -11,6 +11,9 @@ struct xe_gt; struct xe_sriov_migration_data; =20 +/* TODO: get this information by querying GuC in the future */ +#define XE_GT_SRIOV_PF_MIGRATION_GUC_DATA_MAX_SIZE SZ_8M + int xe_gt_sriov_pf_migration_init(struct xe_gt *gt); int xe_gt_sriov_pf_migration_save_guc_state(struct xe_gt *gt, unsigned int= vfid); int xe_gt_sriov_pf_migration_restore_guc_state(struct xe_gt *gt, unsigned = int vfid); diff --git a/drivers/gpu/drm/xe/xe_guc.c b/drivers/gpu/drm/xe/xe_guc.c index 7c65528859ecb..cd6ab277a7876 100644 --- a/drivers/gpu/drm/xe/xe_guc.c +++ b/drivers/gpu/drm/xe/xe_guc.c @@ -24,6 +24,7 @@ #include "xe_gt_printk.h" #include "xe_gt_sriov_vf.h" #include "xe_gt_throttle.h" +#include "xe_gt_sriov_pf_migration.h" #include "xe_guc_ads.h" #include "xe_guc_buf.h" #include "xe_guc_capture.h" @@ -40,6 +41,7 @@ #include "xe_mmio.h" #include "xe_platform_types.h" #include "xe_sriov.h" +#include "xe_sriov_pf_migration.h" #include "xe_uc.h" #include "xe_uc_fw.h" #include "xe_wa.h" @@ -821,6 +823,14 @@ static int vf_guc_init_post_hwconfig(struct xe_guc *gu= c) return 0; } =20 +static u32 guc_buf_cache_size(struct xe_guc *guc) +{ + if (IS_SRIOV_PF(guc_to_xe(guc)) && xe_sriov_pf_migration_supported(guc_to= _xe(guc))) + return XE_GT_SRIOV_PF_MIGRATION_GUC_DATA_MAX_SIZE; + else + return XE_GUC_BUF_CACHE_DEFAULT_SIZE; +} + /** * xe_guc_init_post_hwconfig - initialize GuC post hwconfig load * @guc: The GuC object @@ -860,7 +870,7 @@ int xe_guc_init_post_hwconfig(struct xe_guc *guc) if (ret) return ret; =20 - ret =3D xe_guc_buf_cache_init(&guc->buf, XE_GUC_BUF_CACHE_DEFAULT_SIZE); + ret =3D xe_guc_buf_cache_init(&guc->buf, guc_buf_cache_size(guc)); if (ret) return ret; =20 --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 95FC82C08C2; Tue, 21 Oct 2025 22:43:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=198.175.65.16 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086594; cv=fail; b=LXJOEIac2vRDFt9iu00SQUC60iKWUMhMD/g1te+pza3Z+7qPS3GDNoDzR6zgPySgMsCHEgyQFE40hYXo/3ExXmKsV7xxQjRYnHzFCXpSbAnOmH/5p7PEGZzS8io4g0gIBRvi8pLFbv6k6DukOHO4bSD19gwXXYaZ5O3sxvvAvHE= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086594; c=relaxed/simple; bh=4FR5hdkf8mLI+JfOHm/AJ6RHShH6+nIJ3ePjD977uig=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=sh9IuZ3PGiRLF75ri4mpbO8JlF50gkXtI1kCSD04ofeaeuiAfMLpps6GbyLFbC0tjMl/PYXV+R5ROwkei+htyaVOQxOWScGl+/fJafj75Gj5IS4qvXN3jVfAYakQMZcAwPRXHLaG0NMBA7xiyUMhgoXFY8AAbnolhsfZ0KAnEik= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=cO4WI3pe; arc=fail smtp.client-ip=198.175.65.16 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="cO4WI3pe" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086592; x=1792622592; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=4FR5hdkf8mLI+JfOHm/AJ6RHShH6+nIJ3ePjD977uig=; b=cO4WI3peHDNc7E1fZYy/jPLv4Bl0KE/xjow11J8KyC6KeSmJHGM/D+Li ntSizZMQU6ASEYYa7htKCSMZKIdgVrMs8Ge5YSdLtFF77cB36QH+4+yG3 yE0v/FGhC+r7+OOjQwGM37EP+l/Be9II1DTwwo0C0sACnAlqGc2zomXiN pF6GNJ5N4C/LvLtgI1DLhWFdZvNF7kWQRZEXm8FN9NxqrPH/vHSH71dUj Fh1HNpdxSaeo+KbpBljrBuKzwUi3lk6e/LpXECuo2GlxaXLHKB6AIUYit bXLd2UPXa9r2/Ir5NqXR/7b83BStqrGxwXv9V5MOU+tvwTXCSqLHudHxw A==; X-CSE-ConnectionGUID: i5ZdqAzSSeirQ6KUdejdtg== X-CSE-MsgGUID: SpllyGLFRm2cEYrXMOaUqw== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="63373550" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="63373550" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:11 -0700 X-CSE-ConnectionGUID: 3GeMg0XsQNmkKDaBDb3dvQ== X-CSE-MsgGUID: 4nkzbrrtTCCGllDO9kdkEg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="183644436" Received: from orsmsx901.amr.corp.intel.com ([10.22.229.23]) by fmviesa006.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:10 -0700 Received: from ORSMSX901.amr.corp.intel.com (10.22.229.23) by ORSMSX901.amr.corp.intel.com (10.22.229.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:09 -0700 Received: from ORSEDG901.ED.cps.intel.com (10.7.248.11) by ORSMSX901.amr.corp.intel.com (10.22.229.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:43:09 -0700 Received: from MW6PR02CU001.outbound.protection.outlook.com (52.101.48.33) by edgegateway.intel.com (134.134.137.111) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:09 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=srjk8XQhzAyJLryO0WrDHyL8cpV7znOt8pX5eRu/C+ybMJNTH9+7zcKinYPN2SWIv8ov7HTShEP+ZXOa5+5smGw6GTk3YfE2vTdGw9lDokDKNONeKrUK4C9hXce3pzdHD8L3atXGCUnCKauJncOdHiHy9dZieO6pv8SAqlKgChZYk2pWc3z2bZ6BxW9Qq7W5i+X3M39t3Ne2w3NgQPy/kx51Ma+gxfmjZMLg0BYb7rZBAHE+Y9KlX5usVDP9BLd4/FUABumeWXKznsL2My1WwnLl90tvMwXN3ixiRl63DC1ZFxaecuhiZqgkLPGeq+ijbcjsXPR2LvxpWW4fq1XNzw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=gPIDXNHrvH0gQwsHq1u7nwWuceVbCx/rcMs3HdGxpC8=; b=Uu2JEGYmk36D3IVCPNJDlViLu7mIfijCY42RjLKZ5DxCuWeTbAQi3ptpicpZyl1mFtcCtGPI++w6sVtlKS4sb1udz0Gj8sIufbdoEYNuJmIzV4vTzEHYl6dOp4vULK3iscJSx0z9Ydiff7sMB47hAQDutsv/u41d86lZChvMD5KsiV3Y6Y3UXGEcWT9neC61K4Q2kR8UsJlhNcURveAeeGecIxMuyDkMoJXsKoqcXkl2+/Lg/wPdekzzOErG5jiG+KeBEcBimdY2mdhkIo+NAgyHew3NidC0YLbBrl5qtrxEssH2DVpyi0Gv//HPvFJjJ+wkwLEflFrCb66CmB2YVg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by PH8PR11MB6753.namprd11.prod.outlook.com (2603:10b6:510:1c8::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Tue, 21 Oct 2025 22:43:08 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:43:07 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 12/26] drm/xe/pf: Remove GuC migration data save/restore from GT debugfs Date: Wed, 22 Oct 2025 00:41:19 +0200 Message-ID: <20251021224133.577765-13-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VI1PR07CA0134.eurprd07.prod.outlook.com (2603:10a6:802:16::21) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|PH8PR11MB6753:EE_ X-MS-Office365-Filtering-Correlation-Id: 3acd1710-8f5a-4fdb-22e7-08de10f3341f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|366016|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?TEZHZmhyZjNrTkM4WWwvN0R0QTBUS2VGdUVGVDFqSXl4eWJLTVhoQU1EaVE4?= =?utf-8?B?T29sQWlPWmlqdS9PL2VSdlcydzlCdnU2ZnVCM29wNEpKOTFJU3EyNzB5d09j?= =?utf-8?B?bzVBaVNjRGt2VnlpSWh3NCs2Qm16RjV2MG9VSlloeDhiVE5QS3hQYjl4RldB?= =?utf-8?B?N2l0S0FXNWZQeWZETzhEbFQxdVdtUHJ0MTN1dGpHZVFxeGZFQVRCcjhwbXJJ?= =?utf-8?B?M1loREhmMWN3WG16bS9KbU1PcHFCV0NyYkt1SmQxTGoySTVabzNpQUpTMzNK?= =?utf-8?B?ZWNaT0NkRGxnRVRQSkplT2o3QjJPWVhFK3phUHdINzNmSjZSQUdzRjRSblFh?= =?utf-8?B?MVpvVkhoaUVlMG1VRkp2bWt2Y2puM0hNeUF6S0hDT3ZJZkFObGFjS3VuRkFs?= =?utf-8?B?VFdsVmxJaHpFbHY3aDhkazRkVjZXa0VhcE12QVVUbmE3UnZ2cHN2dVR0R1d3?= =?utf-8?B?anhxbnpsUDMzMFphaU9WWWhjdnFTZkw4Q2toTklmRDNhZzJra1lSWWI2S01J?= =?utf-8?B?ejRzRmsrTGJuM0lSSi9MUmFwdmxuNzRKVHpvaEFkeDVCa1FVQ25tdStUd0hR?= =?utf-8?B?TFVtL2lJS2xCbVNQeDl6WW9EOHZ4aW04TXExV3FaSko3UnNjTDJ2Q1A0VVcw?= =?utf-8?B?eXgvL0dnU0FTQ21OSC9rTmZvQUN3VkcwZEJvdHlBbUZENmdvVTR6VmZzL3h1?= =?utf-8?B?aDIxdGVjYUtaNXM4bGJ4TW1iME1DZzQ4UkY2WEs3djRsMkJzN1FNT0lhSlRG?= =?utf-8?B?d0wxSjJuYmJWWUd5dGRVWjB1eVdyL2dXaDA1cmdxMkpqQTVDOWR2SzhmbzV4?= =?utf-8?B?M3JNa0psWlFxYXhRQWVLR243bUxiQUQxR2VacUVteGFHVUJBVng2NnRqbnV4?= =?utf-8?B?Q0U1aDVJUUlvaFJOUjZYWkZaQVhSeGt0N0lHanpPTGNZWFBsUVNQWGl1WGts?= =?utf-8?B?Y1hwdFVhbG1EOU1HelhkNTVjYnRZdVFwRTJzS0dzcENRMEljc0ZmQVJwbGtm?= =?utf-8?B?dGgwYzBvenFGSVFqNURiRUxXZXRZU1FJTVIzcG55eUtaV0ljeHR3dUJ0SzdW?= =?utf-8?B?L3Z4TmQ2dFJXU1laODgvdkkzNmJjSVkrZnl6bTRyWVFnNGp5Tlkra213MWpW?= =?utf-8?B?L1RMZGRZVFZLUFdGUHJsWGlHdzJMaVRSM2lyeTBqK1NPTzg2dkhMZE00RVlZ?= =?utf-8?B?Y3dvTStBTUFTSzRwL21qaWQzTFNNcGpzRytzUG43RkFtQWMzeWN2SStjWFZW?= =?utf-8?B?anhPeDNVd3lFR0E0cTFGNHFhMmNVYXY1VmhmbmpkOWZucHl4VGJ1TDdaam45?= =?utf-8?B?WTN5cXpTVnh3NkVlMU9YRWRhR2VEZHgxSFhTcTNybnpmSVpzaTN3amdFaTA1?= =?utf-8?B?bWNGa2dSTUs5RW01OFFwWEFRNXBFV3BHWk9GL3BpZWFrRnhyTUNkbGhadG1K?= =?utf-8?B?bkp6NW1YUVlNUlk3c2xJaFd5emF4TWpHZ25EVGlQUjF3ZDMzZnQ4Y0N5ZmxT?= =?utf-8?B?UFNBZ2p4ejNuTnFBSURZaGxGZW5HUVdyMzQ5S0FjREJsbEhCdFJpYjJCOW52?= =?utf-8?B?eDhEOXcwSWt3REpyZG41ZkxIaC9JdGs3TFp5bjFSNlIxbzdobEpYdVJNb2xD?= =?utf-8?B?aCtVMkJyOWwrZ013RkpwdVVDWHE3Q2xxYytDOUlheVFYNjZydWtYQjZxc0hl?= =?utf-8?B?Mkg3RDJSWGkvb1daRk1GemV2YnNYS2RwUXdtdFVBUExsYTd0cXczNXpjMWp2?= =?utf-8?B?eldRMTNqMkZSdkdJLzFMbUM3TndZNnozYkFSZXhqb0g3V0NhQkFzZ3hzWVY1?= =?utf-8?B?OE5ObEhZSmN3WlpXSFVFQVNRVTFwMzVqZ0JpczltWWRuc0x5TEFGMUgvbWtB?= =?utf-8?B?T1h1L0RCV2F6K3pNUC9CSnRmZmNONXN2bVNmWTE2RGpLYmd2enhZemVoMmZR?= =?utf-8?B?RjBLRFUzTEFQbzBxbmpPbWhXTENpVk5tMS9pTkpxb1VxWWszUmtLQjJIU1N2?= =?utf-8?Q?zPoU4l9gekMZ1UxK/BX8Xk3g/F0Nbw=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(366016)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?N0hrNHJMMTN5N0tuZEViS3V1azdicW13Y2RZTnBja0lOLzQrblNtSFpPdFhP?= =?utf-8?B?QzFvTlFLNnlyRU1vOXQ0NENsVUN0MW9Ua2JsNm9uWDlidllXYSsrSG1mQlJH?= =?utf-8?B?Qm1JVGM5eDdSVUVRdFlFY1kvdDVpdWRkZ241ZG5TSFdIeGR0ZzlzSmVFSU1U?= =?utf-8?B?WVRZYmFEdnVEb3I4bXl0UHI5WFo0aG9BVGw5VzR6cU0xWGMrOXAzUEc2THRI?= =?utf-8?B?ZzgrT0ZhM1BhV2RlSS9TcGdhUTEzblpGcGgzSko3bnJ1OTBhQTYvdHE4eG9h?= =?utf-8?B?RTRtdktxWUFLRjFGK3BRZFhraGVwaTkvQzMxR0tncWtOa0FwVnBwaXZXWTB5?= =?utf-8?B?amxjWE9yRFdyMXpZRlFocEhwSmhxcERrbllTY1ZhT0JwWk84M2g4NDREcnln?= =?utf-8?B?L084d0EvTTFMVGwzTkJCNW5lVzNwOXh5SWNIMGpXaTJybSs2Y1hEdC9pOWx4?= =?utf-8?B?RVNTQnlwMEFFcEJ5M0JUMWZySkVWL2dvUVV3N0FqUDY5TENBbVhwWEg2SFh1?= =?utf-8?B?OFVSU2RzMVFaSEdScWw4Q3JOT2owVy9Sa29YU0xxQjVZNUk4cExuUzRiemR4?= =?utf-8?B?U0c3aDhUeXhRSlNBY3BUeVVsNDRmOFVCQ2JTTFF6UmwwN3Erc2s3RkZERTRl?= =?utf-8?B?dlNOanpkem9VaUNDN3hrMjdKRE5hTk1Fa1pDcVplaG1xMUVVTWw3bSttcHdV?= =?utf-8?B?VDI1WSs3TVhuNTVjbHhsTnYrbXdqUU90elAzbjc1WkpKMit5a1dUVFUyQysw?= =?utf-8?B?aFZJcmg5QkpuVlZENDl3dG1IT2YzWjYvSkozZVdMa0xTUFpod3ByU0M1WEE1?= =?utf-8?B?eDY5cGtWQWluL3NkSUN3VDBEWGdRRVp3MnJXRENCTmNBQ0NZNmlrYmNuQWlF?= =?utf-8?B?UmRKTUpJMHloRXl4YThKZHRsWmF2VHdwbnI4cVBiYnhGOENnZEgxT0dpa3cy?= =?utf-8?B?VWIwL3I4SnRhcmdPQVRlRm5WWW5SZ3VKQm1FQ2NPWXk0OWROd01hYm9WNlR0?= =?utf-8?B?L3lSd0t2d0UxVkhuSUxFdnR6TCtNNEdsTTBpT29kZEQ5QWx1Q0VZRENHaWQ4?= =?utf-8?B?K2ZFMjlBRWExR3FtWVdYelpSM01rd0hIckx3aDk4SEpHUFJ1dkdtUDVTOW5w?= =?utf-8?B?NUdVSzQ2MFVXTm1CN1JoOXVWVXdTRzZ6QjJOWTVBRFVhWFRnSjNqaUdFdXBI?= =?utf-8?B?Z293a1RmYVllcU9tSEFkam9YV05KT2FDQWt0eEVUNGU3Ukc0NUUrd0QrUDNW?= =?utf-8?B?c1NId2Y0T0YyQTh5OTRHQ05RZ3hKSkN6MHBwZHRxdXVmM2V2eG9URUc5WWEy?= =?utf-8?B?YnZhNXcwemZFdXpLeVB0S3QyTDkxNDNHd1hHZ1JYNjdlTmFYeDY2Z08yL0FM?= =?utf-8?B?YTJZQkg1dDhFZW9HdFBxSzM0azJBd29kOEp0eEZkTW1GdU44dm5hU0lwckda?= =?utf-8?B?cW8ya1VUdHdYRHY5WFdBdG1Ra1BLd0NoblZuT3c1SncvUVZZUWhYWnQ1WHRs?= =?utf-8?B?aUs0VnlMTll5SlN2aHdLa2tETnB0cnJHdzhFUVBNVE9BRUtxQ1IrTkZxbUdU?= =?utf-8?B?WU9FemZhc0wwMDgyUnlVc2I0WmxsUEE2VVVlTkFuemNyV2ZMeW9TOFRLUkZZ?= =?utf-8?B?MDB1M1Yyd1FjN3NDcy9nMENaVGswb3ovcHkvOVVIU1lTaDRZSGxyektpZUVR?= =?utf-8?B?Z0x3ejNLVytXOS9LZm9hWCtUSjFIQkVsc2IwR2JBMmtmcDd3ajUxRUh6V0x4?= =?utf-8?B?MFZJamY5YnRKUDhUQmxnMG9vL1o4eGNxdVFkRDVEZ1o4QkRJLy8zdkFUbVdP?= =?utf-8?B?LytxU0RGZEVNbkJSUW9JVFVKY0Q3NE5hZG84SktUcW1XQ01wK1U2a1dyQmdl?= =?utf-8?B?UjFzRldNV1pSYTMrRlArc0s0ZU80RERqaHpFckJTRTVCamhlWW5ROUNMeU51?= =?utf-8?B?R25kK1UxM0JZelI1aHFDekppaEp4NjBzUmlpU2hGVTJrb0JUVVBnNDVsN0th?= =?utf-8?B?NjZJbDQyL2o5Wjl2eUlQbUxMRGxZV2FZUjgxZ2lWc1gwcHl1V21VbXFCWkpj?= =?utf-8?B?NnY3NzlCZzRBM09qaEZhWVkveElRc2VYNS9CaHlnMnQrY3pMeHNGZitmNXdl?= =?utf-8?B?bGFhYWFDZDhGdkFPSm1uSzVlUm96aUFuenp5QkJja3J6T0M2STlLR2plMERR?= =?utf-8?B?ZFE9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: 3acd1710-8f5a-4fdb-22e7-08de10f3341f X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:43:07.2033 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: fORZhjos0qslurgZ4FBI6LvwvGuMMKWnBvVGMnBc+DMzPN85jqMc/AH9uCzsFx801kQxy9ey/z1xKbVMXWY0LXEUkoYvfa7fdllOWWJWAZ4= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR11MB6753 X-OriginatorOrg: intel.com In upcoming changes, SR-IOV VF migration data will be extended beyond GuC data and exported to userspace using VFIO interface (with a vendor-specific variant driver) and a device-level debugfs interface. Remove the GT-level debugfs. Signed-off-by: Micha=C5=82 Winiarski Reviewed-by: Michal Wajdeczko --- drivers/gpu/drm/xe/xe_gt_sriov_pf_debugfs.c | 47 --------------------- 1 file changed, 47 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_debugfs.c b/drivers/gpu/drm/= xe/xe_gt_sriov_pf_debugfs.c index 838beb7f6327f..5278ea4fd6552 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_debugfs.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_debugfs.c @@ -327,9 +327,6 @@ static const struct { { "stop", xe_gt_sriov_pf_control_stop_vf }, { "pause", xe_gt_sriov_pf_control_pause_vf }, { "resume", xe_gt_sriov_pf_control_resume_vf }, -#ifdef CONFIG_DRM_XE_DEBUG_SRIOV - { "restore!", xe_gt_sriov_pf_migration_restore_guc_state }, -#endif }; =20 static ssize_t control_write(struct file *file, const char __user *buf, si= ze_t count, loff_t *pos) @@ -393,47 +390,6 @@ static const struct file_operations control_ops =3D { .llseek =3D default_llseek, }; =20 -/* - * /sys/kernel/debug/dri/BDF/ - * =E2=94=9C=E2=94=80=E2=94=80 sriov - * : =E2=94=9C=E2=94=80=E2=94=80 vf1 - * : =E2=94=9C=E2=94=80=E2=94=80 tile0 - * : =E2=94=9C=E2=94=80=E2=94=80 gt0 - * : =E2=94=9C=E2=94=80=E2=94=80 guc_state - */ - -static ssize_t guc_state_read(struct file *file, char __user *buf, - size_t count, loff_t *pos) -{ - struct dentry *dent =3D file_dentry(file); - struct dentry *parent =3D dent->d_parent; - struct xe_gt *gt =3D extract_gt(parent); - unsigned int vfid =3D extract_vfid(parent); - - return xe_gt_sriov_pf_migration_read_guc_state(gt, vfid, buf, count, pos); -} - -static ssize_t guc_state_write(struct file *file, const char __user *buf, - size_t count, loff_t *pos) -{ - struct dentry *dent =3D file_dentry(file); - struct dentry *parent =3D dent->d_parent; - struct xe_gt *gt =3D extract_gt(parent); - unsigned int vfid =3D extract_vfid(parent); - - if (*pos) - return -EINVAL; - - return xe_gt_sriov_pf_migration_write_guc_state(gt, vfid, buf, count); -} - -static const struct file_operations guc_state_ops =3D { - .owner =3D THIS_MODULE, - .read =3D guc_state_read, - .write =3D guc_state_write, - .llseek =3D default_llseek, -}; - /* * /sys/kernel/debug/dri/BDF/ * =E2=94=9C=E2=94=80=E2=94=80 sriov @@ -568,9 +524,6 @@ static void pf_populate_gt(struct xe_gt *gt, struct den= try *dent, unsigned int v =20 /* for testing/debugging purposes only! */ if (IS_ENABLED(CONFIG_DRM_XE_DEBUG)) { - debugfs_create_file("guc_state", - IS_ENABLED(CONFIG_DRM_XE_DEBUG_SRIOV) ? 0600 : 0400, - dent, NULL, &guc_state_ops); debugfs_create_file("config_blob", IS_ENABLED(CONFIG_DRM_XE_DEBUG_SRIOV) ? 0600 : 0400, dent, NULL, &config_blob_ops); --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C43582EDD51; Tue, 21 Oct 2025 22:43:15 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=198.175.65.18 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086598; cv=fail; b=aaif6dc+M/5Jtk5vwDV8y6dKxX7jCdTCgIaoIEshwlOC541vwj0PqMRbkyH6W2YODP3JGBr/YxjhazSeQsXwdABGRQNNll9DSE6ZZV60GGHfBg+urfDIGGd3gw8Hbb+LAaj0vdWw9rcI7jYAnD95Ib0NXhdKpEucK6MZ2+PASZ4= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086598; c=relaxed/simple; bh=2wt9CX3R6z/ATg5cjFng0eCZWP0pM52Eeruk7dNw9II=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=V3Yhye0pj/fVyXI+pdWwvPTY9yNVelZtvqXLNiGJetfd8cDT4lzWWP5klds6t7IxiY0HEVR5BwgJDpKJpLKcfrUnyNpYQjwYzsINngs/rdxAsk4XJM/vBjMjC+cYvpTqoV0dZIWN+dqacjbhh5q3dIBYehfsVbYnx+A9H7W39Fg= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=SzeEzjwK; arc=fail smtp.client-ip=198.175.65.18 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="SzeEzjwK" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086596; x=1792622596; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=2wt9CX3R6z/ATg5cjFng0eCZWP0pM52Eeruk7dNw9II=; b=SzeEzjwKytcpuuY/QYcWUyic/JFr59VydsfGXHV20dIX0aiBR/Ai/FK1 XDtaamLzj2/sBjODL9n9xVPscoCHytxWdQl/FGhmSZjFUVglbWM4b6nTs kVxRXMIT0DlhcOZnEpDzb1oSfJCv016UDyJrBoXGvQxi4eAIlPLRUfkOV JcbDL8w8kaQ8XGxXty+reToIjMiV9afS1Sv824SFrTauH71kP8QLeRECh kQiYMCZlD9K6SIXbW+OXbpkHSx0hom/eR4VRyKNALBdQGpCo3xk4XD+sq PxHrNQtALCurO+q5tbisoOq1qWOfS+ABHszx6WfymvEZ0atZu5DszLCk2 Q==; X-CSE-ConnectionGUID: +BDpSKSiTEOQsIx6902//w== X-CSE-MsgGUID: BS3erIBoSJGZIuIiFXb28Q== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="63264103" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="63264103" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa110.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:15 -0700 X-CSE-ConnectionGUID: QtbGdUq4RqOGwVUuCvKyAg== X-CSE-MsgGUID: 8ilQVeaTQaOs5OKRvH296g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="188988634" Received: from orsmsx902.amr.corp.intel.com ([10.22.229.24]) by fmviesa004.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:14 -0700 Received: from ORSMSX901.amr.corp.intel.com (10.22.229.23) by ORSMSX902.amr.corp.intel.com (10.22.229.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:14 -0700 Received: from ORSEDG901.ED.cps.intel.com (10.7.248.11) by ORSMSX901.amr.corp.intel.com (10.22.229.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:43:14 -0700 Received: from BL2PR02CU003.outbound.protection.outlook.com (52.101.52.43) by edgegateway.intel.com (134.134.137.111) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:13 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=rGQr3DgaX6miTDrQyLNY2yPxDdGeFzFVEmW0dUkqXMLAiG94vxkefbqEXjJXQRjrWSwRN7/qX9c+8Y3V+WkRR6slOl5x2vLm7MvzFKw8kDlIUWhKaYypuZ94jqZ1FLu4Obl4jrO+brl7eJTjrBU3LWB7hB1mf4LHkq9SZn8vnoXraDjX+DlDeuae/Tznk4fHEsDN1ZfpF4DfVHHbWGML0vRv1LA8yTNvCQ8aOj2QUeytF2AQSQ1NPWV3t0IN3J63aj01i25a8ZJWUzFdNNtv1Vb2yHYW5zttbiuwySwvoKmeWrCV4q9fZcmyE61wZlIFDBosuvsZLzUWgrghLbV5cg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=hkAU6c4Gz+NnBk8Sool5TZa0ZRdaZzJTynRvgNy4qu4=; b=D1e3nr8YrUN8FXCvbESApMSkyPwBbFRJxgbn6VzxNmO0cUIPkd7fyaH7rTzMy0AvpKgoCRH4GLtW4FAK6pW/Qzj+/mv8l56gvJfiPA1G4KaEgfgMttW3xsrtuDHVd7iQkypCn3/12DOG+iFQ8rpBO06Nffz/LcbwnoeAN7h966pRUYbmFaz9XpBTPq+RKL+yBDVcVba4x6LOUXScCBcPkA0/5hDqCbTinPPaAbPzUT9xaQdFDtv35DJFFAqRvIK5fWSlCwzpuGzGcf0lo1S9KLl7i2d79h2teVGfs3SR1e6kU6PDC0YUEAjsJmsAPvHFSPhZdVBZnixa/g9ECoqbdA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by PH8PR11MB6753.namprd11.prod.outlook.com (2603:10b6:510:1c8::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Tue, 21 Oct 2025 22:43:11 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:43:11 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 13/26] drm/xe/pf: Don't save GuC VF migration data on pause Date: Wed, 22 Oct 2025 00:41:20 +0200 Message-ID: <20251021224133.577765-14-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VI1P191CA0005.EURP191.PROD.OUTLOOK.COM (2603:10a6:800:1ba::12) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|PH8PR11MB6753:EE_ X-MS-Office365-Filtering-Correlation-Id: 0f604dcd-3291-445a-382c-08de10f33691 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|366016|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?MTZTT2FxSkJhbUZxYjBNbURpYzVSckU5bVVnandycS9yTG9OWEYwL05nYmRG?= =?utf-8?B?TVVmTmJGWjFBVkZHYlA0WWx2MUVXdWQ5WHU2aDM3NHRvRzhNU0ZPclBKSzBP?= =?utf-8?B?K3ZLZzZJZkQ1anUzbHZTZ2pIcnF2L25ieS9GWUVTdDMxU3dNMDM3Z2NWek53?= =?utf-8?B?ZWgxdklsQTJmNnNBY0V5WnFiT25EWnZWeEtuZkVmMzI4R3VndDlxa3pOQ3Ry?= =?utf-8?B?SWJYMnZoeHd6SUJLdUdTUG9nMWc2THpPZlR6Z3dQbVBtQUh2Y1R1SGFTZlFO?= =?utf-8?B?Rml6N01CS1MyYUh6Y1pvTmVOVjBURkNlMGl3NkNIdkRrQXZDT29qdXJVTDc0?= =?utf-8?B?c3Y1ejgyT1V6OHdMRmljdVdDSkpONC9aTlN3cXR5YzFLK3ozQUF3aFdIclZv?= =?utf-8?B?YURBSkFDanZIcFFLV3ZZK1NxZ0JuT0JTVkJzRS9LU3FPKzVVTi91dUptMUo3?= =?utf-8?B?SVpxUnhxVEhDUnh2TWlBdmduemkzTmdVemVNNTFiQWN1dlVyR3dnVnNsNFo1?= =?utf-8?B?MFdKT3BKem03WDQ2Zy9jdmpMYUZLL3ZCUjdsOHNoangxN1J3R1Z3K2xob1RI?= =?utf-8?B?cnB1dzU1Qm1vT3NnTnVoWkNRbTB3S3JnbVdmRmNtNTVLRzErbTdwYW1CWlR4?= =?utf-8?B?Q3VkVFM3RWZhL3NYY2NTbnVyU0RsSnVKK0NPN3NGMnl1enN6V0twaTM1SXk5?= =?utf-8?B?VzlpQUp3ZjlzUmJ2UGVsYW9VT2pJdEVuZHNCNEdSV1FyRW9wN0J1bXhnd1BO?= =?utf-8?B?REtNVDBqb3RGbzMralk3aGZsR21pb1dJMThQMFVWR082NGQ3VUxtY1YxZFp3?= =?utf-8?B?enJHbXRoaVBYUTN5SUtnWk9BZ3FrdFF1K0Jac2E4Y3MyN3NxMEh1ZjczZjlK?= =?utf-8?B?VEJHL2tYdGlWMUN5MFp5QXBOOGs2RmFxb2EvYThIVGJPZVZsa1BkdlFHS1Ey?= =?utf-8?B?RHhQb2NCSTZlWW1hRktQemdkYmVRZjRhYkpjWlVCR3R0YzduNlhSLzFZM0Zl?= =?utf-8?B?QzIrVi9KTGdyTXZaUDFVVWU4T0crRDlqYUJlSnEzWmFBK2c0NnJjSXFjZ3hM?= =?utf-8?B?TTdXYW5Cb1NaVDJCMzE1b3ljWUFzUDN0WXUxSFBBNTdnRFlzQi9wcGVFL3dW?= =?utf-8?B?WmdUQlhSQU9ucUxodCtLQWpZU1pVdk9MeWdja2hDQWgyMXB1YVlNZVlnMEtE?= =?utf-8?B?NVYyTGVCRkFNd05MSjM2VWNMUFpra2tSQWx1TnNZaFBQMXB6bVAxNEZMZ2d6?= =?utf-8?B?bGlBR3FkWHc1eWs2MWdXcmkvNHJaeXh0eGRteUZKSThieTZWanZDTG9TVUFv?= =?utf-8?B?QWhDVTh0bGJkM1IwWVJ3VVpaNFF5Sy93ai9KM1M1amQ0aDFjSDV1NzhkZlMv?= =?utf-8?B?SWRYYldMMElwMitJN2NWd1hjK2ZVZW5JdE9BSWVJWFlNTm1vWkRIRGNOT1Ns?= =?utf-8?B?djdiNlAxWDl0RVQxY0hOTFVDREYyOTVwK2c5Y2tCWVF5VVVOVWNBYzlaTTcx?= =?utf-8?B?WVlqeitaL0ZueFR2TTJ6WXc2UURzak9FQjhOcll6ZWtNdTY1bElrWXNnTXNj?= =?utf-8?B?UXdNd3EvRmVhdWJiRVBlY1V4SFIvVTJ6YW1haEgwTFp2T0F3NFNtYVVVS291?= =?utf-8?B?bEwrUk9MdHlWaHpwSDR6cldVNSs3cllsQXhQK2Z0TkdHc2tlM1JtNWxheGhL?= =?utf-8?B?ZWNGSFB0STAxd2owQnBCbFE4djFIYzE0TWMyRGdmanhIOEgzQVFFVmZYbHRl?= =?utf-8?B?aG1TaEdKOGFvZ1ZuYVFlWlRRelY2Y3o1UnVjOXVjQ3VvWWEvQ1BXbGFnWVNO?= =?utf-8?B?bGcyQ2gxVW1pbXdHRVRVaXdkL1l4OTl2REszSWt0eGVCamRienpMQ0VwTmEw?= =?utf-8?B?cFBCUlRlQWpkejF6c1NuVkY3NS9DWGs4QzhjK1IyZE94QWZudFFNaXJMbVJJ?= =?utf-8?B?a2tQbEpiclRWZXFXS0lvK0FzVXRHV2dydC9JRnZmbmFIWGsvLzZIZEN4VDNj?= =?utf-8?Q?/LlCHUKkcenqy4M683p1dLlFI6gPK4=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(366016)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?M0RWa0x1cklwajBnamhZTk9ITW1VWXVQcWYyU1k2STBxQnJWdlJBZ3p5TEZk?= =?utf-8?B?b0JaYWM4U3N5M08xaVdTTXBUZGFVMVVPdGxBL0R2U3c0TWk3eUxJWGNKQ2w1?= =?utf-8?B?MWtpbnpmdmRicU1oNGpZSG83bk1BZ3VEU2NhRHN2OWJ5OGNtWGZ6czlNVG1Z?= =?utf-8?B?cEY3SktBV1dVODQ1TnFjMWl2RlN4WC9OU2NZdEZWZGdoT0tNNnN5bFZPZUhD?= =?utf-8?B?ZjJFOTNQeXNSQ1hHUzRaR0dKQU96NzF5WnlqdlZRZ3ZVTUJXcFNqb3ZUeWlo?= =?utf-8?B?d0ZBaVNycWlLOGRSRmxZY3cxTXUxcVZrRHZhbnhwd2w5NkNZQ1NMd1htdlVl?= =?utf-8?B?VkZnTm53elE0TUJ2K1Bva0d2Z01WTm9GMVVrS3YvS0pyU3dIM3dEVTl6bWZE?= =?utf-8?B?dFJFOGZoQ0Z1czdPWUUwekJpN2FQTU5LOEtLZC93VkhTYUZPOGVtblpaTjQ4?= =?utf-8?B?Sm8xa2NicEpBNmZwOFIydXUvSkpDTWYyTkxXZ1lYZGNuVVBnRUIvNlQzRyt3?= =?utf-8?B?UktDQ1lmZnVpL3IvaHloSnY3QjR1QTBEUEJpbDd5TzVVNEJSWm5LbGp0bTh4?= =?utf-8?B?ekkvYStHRjVMV2pvRkZrTTd2Q21aOU5YNm5kdUFDblE4V2kzVFA1enpCc2tH?= =?utf-8?B?YTZhL3BIcUxSbStZN09IR2ZVK2NZQW80NlViell2Z1FHUnk4ZThPM21IMERm?= =?utf-8?B?QzBHaEl6SjloV1lJYVRpdGRyMHhxbWl5NEtuWngrMVhpLzAzTFBBUXBqS2Jw?= =?utf-8?B?S1lmdm0zOTJjTXRIOFRqWG1oVDFUT0UvYTNLWkxLcExYNVhRR2djeFJQdjVI?= =?utf-8?B?YjhTM0JGU0J5ZFlwMnlDOXNVdStHc0tweDNjeWpBUWlxUXkvTGRnZ1Zqc2JJ?= =?utf-8?B?MDRRV0N2OGRlVzNnZm9odUZVKzYyQTJHcEI5MWF6bXd3UWhRYmxsellqd3Rx?= =?utf-8?B?aThHblF6dkdGVVdZQ2pwS0pPSW1PS21FUkJucjdZY2k0eWVkbk5wTXUrQUVZ?= =?utf-8?B?ZVg5V2tuN3RuemlVcUpOUDAycTZiVXJHY0YzNmtnNGF4bnQxRmtjQWJESXNH?= =?utf-8?B?Z21YQUhCUHRTb1pwV3E0Yzh1SUVjODM5eWNDeVVrWmRjbm9vRmpPMUZDbmdR?= =?utf-8?B?aDRKSXg2elZRbThveFpQUitCM0IwYVVpWUkvdHl5ZDRoMCtuYktlWVV6UnMx?= =?utf-8?B?TmZwVXRGRUZmZ2l2VGJHb0hlelMwSFR6M0lHcFVwRUJ6Qy9mQnQrN0c3dG85?= =?utf-8?B?amhQQWQ1TmprNFRzRjRURGo3Si9vS1BRMW4rdDgyUWEwWkVsQk5EZkd3NldV?= =?utf-8?B?VGRMdVo5VnFMRFdEckhoak1rYy91MGk0UWs5ZzZHUndNRUdtV2NqTm5ZSC9Q?= =?utf-8?B?YzVObnV1US84QitKSnBpdEltcUw2Vmk2dURkRzJxa1U5dERDWGl2WGVwRGtv?= =?utf-8?B?cFNnY1hDaXh3S0ZlWSt0OUd2NVgwbk1haEhpaXJETW9tcnk3dmZZWkxMbUtC?= =?utf-8?B?M2dNSnlxb3ZUMXltUkRYck1GdVc5RUtMa3NOVG00QVd4SmZiUlY2em5hYXlQ?= =?utf-8?B?THJqSW1TV0tzb09wMnhxQWtWZ0FPTU82U2I1UHZjQ0ZWZXQ0Sm9MaWwrcHh2?= =?utf-8?B?cTEvSHVVUE1MTmR0aHpnT3N1UDdacjlXYU9CVUFNWTJPV1ZOMEx1MjFFK0Ra?= =?utf-8?B?eEdCWUF6V3F5eTZvNTFjZnhhNkNhVUp6Y3c4WDRiSkZJZlB0alpJbWt1STlx?= =?utf-8?B?MXZNVGpMQjI5Y0JvVW5YUG1MWG1MNk5sK0VSMXZxaTVYR3RvaStlZ0xOUXZK?= =?utf-8?B?V2hyUjU1MGZSMXdnclhOTzJFUW9SWmhYd0hBU3picmxSSU16VWR4ek9YRS80?= =?utf-8?B?Sy9meXVqT2t3NVlnN2JpVkxBM0hWcUVKcmZWWHZwNzdnWjI5V2dCdFpjZmhv?= =?utf-8?B?Y3NsWWxKWkNjL2ZzKzVxUjdiT2hCUUFFUk1hZm9heTFrY3ppSXpoOEJDRy9h?= =?utf-8?B?eWJJSURwSjVDTHBjZlZqM3F6TG90RnVaeGQ5dkJUNU0ybmFBZGNHYjBCTS9Q?= =?utf-8?B?ZWpJZmdRYjhOVG5IbitZUllFcXlmbVNaNGhnZW9aRExRcXQvWGQ3cXBsQnRW?= =?utf-8?B?NjdPNzRhdlNZcUZ1UFdWdEhMdUF4ay94bitMajBoQTR0Smg1UUg4cUlPbi9N?= =?utf-8?B?a1E9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: 0f604dcd-3291-445a-382c-08de10f33691 X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:43:11.3076 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: wdw2Rx97TDNL1Rgs0KWCm3J5p91x/2RbCmcrzGUBQTNKCJrM1ARibNE8rf9h6VLXJBB8ADG/2bNp3hQZuzN1RsR935QacXQVPL5xaCq1Z4E= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR11MB6753 X-OriginatorOrg: intel.com In upcoming changes, the GuC VF migration data will be handled as part of separate SAVE/RESTORE states in VF control state machine. Remove it from PAUSE state. Signed-off-by: Micha=C5=82 Winiarski Reviewed-by: Michal Wajdeczko --- drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 39 +------------------ .../gpu/drm/xe/xe_gt_sriov_pf_control_types.h | 2 - 2 files changed, 2 insertions(+), 39 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c b/drivers/gpu/drm/= xe/xe_gt_sriov_pf_control.c index dd9bc9c99f78c..c159f35adcbe7 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c @@ -183,7 +183,6 @@ static const char *control_bit_to_string(enum xe_gt_sri= ov_control_bits bit) CASE2STR(PAUSE_SEND_PAUSE); CASE2STR(PAUSE_WAIT_GUC); CASE2STR(PAUSE_GUC_DONE); - CASE2STR(PAUSE_SAVE_GUC); CASE2STR(PAUSE_FAILED); CASE2STR(PAUSED); CASE2STR(SAVE_WIP); @@ -453,8 +452,7 @@ static void pf_enter_vf_ready(struct xe_gt *gt, unsigne= d int vfid) * : PAUSE_GUC_DONE o-----restart * : | : * : | o---<--busy : - * : v / / : - * : PAUSE_SAVE_GUC : + * : / : * : / : * : / : * :....o..............o...............o...........: @@ -474,7 +472,6 @@ static void pf_exit_vf_pause_wip(struct xe_gt *gt, unsi= gned int vfid) pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSE_SEND_PAUSE); pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSE_WAIT_GUC); pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSE_GUC_DONE); - pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSE_SAVE_GUC); } } =20 @@ -505,41 +502,12 @@ static void pf_enter_vf_pause_rejected(struct xe_gt *= gt, unsigned int vfid) pf_enter_vf_pause_failed(gt, vfid); } =20 -static void pf_enter_vf_pause_save_guc(struct xe_gt *gt, unsigned int vfid) -{ - if (!pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSE_SAVE_GUC)) - pf_enter_vf_state_machine_bug(gt, vfid); -} - -static bool pf_exit_vf_pause_save_guc(struct xe_gt *gt, unsigned int vfid) -{ - int err; - - if (!pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSE_SAVE_GUC)) - return false; - - err =3D xe_gt_sriov_pf_migration_save_guc_state(gt, vfid); - if (err) { - /* retry if busy */ - if (err =3D=3D -EBUSY) { - pf_enter_vf_pause_save_guc(gt, vfid); - return true; - } - /* give up on error */ - if (err =3D=3D -EIO) - pf_enter_vf_mismatch(gt, vfid); - } - - pf_enter_vf_pause_completed(gt, vfid); - return true; -} - static bool pf_exit_vf_pause_guc_done(struct xe_gt *gt, unsigned int vfid) { if (!pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSE_GUC_DONE)) return false; =20 - pf_enter_vf_pause_save_guc(gt, vfid); + pf_enter_vf_pause_completed(gt, vfid); return true; } =20 @@ -1928,9 +1896,6 @@ static bool pf_process_vf_state_machine(struct xe_gt = *gt, unsigned int vfid) if (pf_exit_vf_pause_guc_done(gt, vfid)) return true; =20 - if (pf_exit_vf_pause_save_guc(gt, vfid)) - return true; - if (pf_check_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WAIT_DATA)) { xe_gt_sriov_dbg_verbose(gt, "VF%u in %s\n", vfid, control_bit_to_string(XE_GT_SRIOV_STATE_SAVE_WAIT_DATA)); diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h b/drivers/gp= u/drm/xe/xe_gt_sriov_pf_control_types.h index 6e19a8ea88f0b..35ceb2ff62110 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h @@ -28,7 +28,6 @@ * @XE_GT_SRIOV_STATE_PAUSE_SEND_PAUSE: indicates that the PF is about to = send a PAUSE command. * @XE_GT_SRIOV_STATE_PAUSE_WAIT_GUC: indicates that the PF awaits for a r= esponse from the GuC. * @XE_GT_SRIOV_STATE_PAUSE_GUC_DONE: indicates that the PF has received a= response from the GuC. - * @XE_GT_SRIOV_STATE_PAUSE_SAVE_GUC: indicates that the PF needs to save = the VF GuC state. * @XE_GT_SRIOV_STATE_PAUSE_FAILED: indicates that a VF pause operation ha= s failed. * @XE_GT_SRIOV_STATE_PAUSED: indicates that the VF is paused. * @XE_GT_SRIOV_STATE_SAVE_WIP: indicates that VF save operation is in pro= gress. @@ -71,7 +70,6 @@ enum xe_gt_sriov_control_bits { XE_GT_SRIOV_STATE_PAUSE_SEND_PAUSE, XE_GT_SRIOV_STATE_PAUSE_WAIT_GUC, XE_GT_SRIOV_STATE_PAUSE_GUC_DONE, - XE_GT_SRIOV_STATE_PAUSE_SAVE_GUC, XE_GT_SRIOV_STATE_PAUSE_FAILED, XE_GT_SRIOV_STATE_PAUSED, =20 --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D8C722F6183; Tue, 21 Oct 2025 22:43:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=198.175.65.17 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086610; cv=fail; b=DY8Pwx1MVpkD7r9xOEZ1Jjw9AINEnmJRsF2VmuABujuxqdZHLI2024HAee7L3bC49NIOAoQGnu1Mu43R1YzSPs2pr6GXuFLo9hBaeFkJ4YbXrT+3Tmd43OdcGBgfdSCYiJsYKOLjiispqBt1C/asWD0N2EY76njyUxU0eKYYc/Y= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086610; c=relaxed/simple; bh=MkJr6PtFJhlNDnTSAPrNAh6gaFgYTYa958tdgCT1BsY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=RGJgx7F/dtGeBR9r8e9N/OLbNan6QRxAgIAFiKVkO2YAnvpaIPFcEbXLi7Sdo11zzE6gCkFIThXaD9QPexZs6U86sdgFj+5M23Bkcu97rvbT5CkyxrNyA1oVrndrPe4fg24JexoE1uec9Rn7PnDdm3Wm8Ko77C4/GxPxrAXXEec= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=hf4TteQw; arc=fail smtp.client-ip=198.175.65.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="hf4TteQw" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086608; x=1792622608; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=MkJr6PtFJhlNDnTSAPrNAh6gaFgYTYa958tdgCT1BsY=; b=hf4TteQwhZMcz6NRNK7gDQ36UlXdZSzOaWUn52KpVA3ghhJ2x/ZDyNMs TXugcTsK9mFot1WBM3l+CXKr6FKlGTri0+CX1s4Z5gpDE1242BceSfbJa 0MrCPQnJMJJpJulE4KwOuGC4N9cON12BM9W8+wN0hoy/0eUzueELNCOBm 8oznE/U77KGtzZ/geaZZnX2gplXKnK7C5diwgEjLstG/cAkHISZV0ER8O rbLMsOr34aDaqMlImBQ1O+m0Ajk0wx1uDZIEuqIkyg9V4Mvnue4h7Y5Lx JswsS+FI6Uy3+4yUByuyB7VQXxNpIq7CjxjKF9npXe7DFg3PywmZbc+fZ w==; X-CSE-ConnectionGUID: j8y6TaCzSw6xFHqhDMWAKg== X-CSE-MsgGUID: w9G9S6M6QpuuZ4DgQeo8Zw== X-IronPort-AV: E=McAfee;i="6800,10657,11531"; a="63146896" X-IronPort-AV: E=Sophos;i="6.17,312,1747724400"; d="scan'208";a="63146896" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:28 -0700 X-CSE-ConnectionGUID: tFb0DJESR9KeMjYC3EJBuA== X-CSE-MsgGUID: +4bVNuHFTZKZCfFMuefCiA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="183738728" Received: from orsmsx903.amr.corp.intel.com ([10.22.229.25]) by orviesa008.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:21 -0700 Received: from ORSMSX903.amr.corp.intel.com (10.22.229.25) by ORSMSX903.amr.corp.intel.com (10.22.229.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:20 -0700 Received: from ORSEDG901.ED.cps.intel.com (10.7.248.11) by ORSMSX903.amr.corp.intel.com (10.22.229.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:43:20 -0700 Received: from MW6PR02CU001.outbound.protection.outlook.com (52.101.48.41) by edgegateway.intel.com (134.134.137.111) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:20 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=R1LmTtFIS0KTaWmGBRnBcUbgNgN29i8qRj75c0HMr/Q+l7xk0OQis7x7tljVA2+WOGNFUMMWAkoPvRK2sFBwDkYqOSpTlrQOeGPXGbuw63ylXP3wGin2uJvlCtfRK7wPmhn9p8Gmj9+gpZWLv01lzf4g9Tb9cJDdGW4mOfBGhuwK/O6WWI5uSeiGQy3frtHcbdWI8u8xn2H0hDhB+XQUuYyG/cgBpX4diS7790r2FcxmnFC1/VH2ouYQ9R6RagCDRV3d2nzd4suGRR2DdOnNmiLCKY+2UtdyMK5pirw7w20OPqNKXtneuFj7azeiMmyCvY81my5CxbugHrEZVFaQLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=P+qJHKqgyIyi2npjxKQTq+CoBvpf0pkV9ekFUbkoUWM=; b=U30pyhtDbog71iBtF57TSPXJYkufl4gWlE6Oye2D0l8neDh8hunfeCg/1OCyF7sS2IQUWUvmwSmNjrUtj3n8XFvs2wFa4cWu1BHqVSuoo5sC9PU/bRGfSFgf2vfqNsI70AQyXOrSaX2VXSe56qjt+6G+TWK8zPMNhtwr2HBo0izK+MV0DMMozYy9ZtTuPWbpdfVlK0oHhzQYdWqRuowH303qxCj2SsNQE8dJpHTUvQsayAWhI16KjgLo8eoNEK9lkKRkgafw0hW8vzd8U/k3/RWeP5D69uVjHmq2JM/QZzYxW11p+uodMDk7ndzPha+ULNCmHB6ttsI0Bn5DreAhIQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by PH8PR11MB6753.namprd11.prod.outlook.com (2603:10b6:510:1c8::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Tue, 21 Oct 2025 22:43:16 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:43:16 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 14/26] drm/xe/pf: Switch VF migration GuC save/restore to struct migration data Date: Wed, 22 Oct 2025 00:41:21 +0200 Message-ID: <20251021224133.577765-15-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VI1P189CA0027.EURP189.PROD.OUTLOOK.COM (2603:10a6:802:2a::40) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|PH8PR11MB6753:EE_ X-MS-Office365-Filtering-Correlation-Id: 6c5a22aa-f675-4b91-176c-08de10f339b7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|366016|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?c1g4Y3hzQlFYaTYwamhhSmMxQzcyTXVPbFRQMDEvSTZURDdvOTdCK3hJQjhv?= =?utf-8?B?S1BzUndFVk5zMmRValdoc0dQaXZEZVFmem5RRWMyR1RKamhQUnJ1ZnFVTXI5?= =?utf-8?B?d2hrTkVTK0R5UmUzR2Y3a1BPTHQzVjFHeW5TSEZwVVZRWkVuZ002YVdzUlhm?= =?utf-8?B?dkdUdFFMZ2UrQnlxMHRVeHhqQWZjWDdrNm1nMmpWOVpkQlpRNUNicS9PeEx3?= =?utf-8?B?UlNoU0s5aDRYRGRqM3pvcFlhRW5ZODBJL0hYam9hNlB3TENoTm1HZ2xsQUJi?= =?utf-8?B?cGJOczg4VVlIR0g2eFRzOG5NeEVCazBIbnpPTjMyK0wyRmVKbHhoaWFrcEhG?= =?utf-8?B?VXdLdmNGc004ZnVjblkxU1VJdHlTdmhObmZ1b2RjTkJLWGtaUGpxbDA1bUJy?= =?utf-8?B?M2JFVkVqYmh4dHpseVNHMnlqQzBkbXhvOVJqZC94L1JrWVJZeFdEbVA1Ri9t?= =?utf-8?B?Qi9TK0NxWE9ucjQ4QVBmS0hvc3p4MW1lNGdoVjlpalhPUzhGcHpONG4zZ2Q3?= =?utf-8?B?MnRaL3FYdlpvME94M3ZGZ0lmd3FCWlJQYnQ3QXdPU0VwbUJPZkJNM3FxSlYy?= =?utf-8?B?NGRjbGs2NjVBdWx1Sm4veDkxWHRzV1pFendmVnNMTmhtUnl2VnlEYzJUMzdH?= =?utf-8?B?WkJmcW5KSHJEQVRFUVhWM25aMGQybUp0RzdYbmliN3h6Z1B6bmhwVTlNUVJB?= =?utf-8?B?Y25pWFh6ZzRzTDNMaG9pQVA4SC9VT05zTWc5eHNTN1o0MnBEQjVhRnMreG9Y?= =?utf-8?B?RndVUWorSU5EZ3FYK1NXZy81dU9MTVloREd3Vm5KTFlyaWdZaEdLbk4zSVlh?= =?utf-8?B?U2JBR05uZ1ZtWE1OR3VVeVZBMzdnL2J6UE9qWWJMU1VkTGxMaFlVSE9SVlI4?= =?utf-8?B?TU5RN25RUnNuOXFLeERkMzFOSHdEUHNhUUZWa2ljZjNhZWZMUnQvSTZTQUFu?= =?utf-8?B?cVpIM2FLWkNNaDY0S2xWM3JLeWdkM0RQUzBLS2hFVDZINjYxNVhMb3dPTllq?= =?utf-8?B?a1VxNEx1RFZqZ01aSFNhQTBtZkJGR29tMDFzdElUWlVKT2pGbUdHa2I4Zy9S?= =?utf-8?B?RXlOSEZ4Mmx5RU5MUjF2dDlNM2xQMGxhTHRIWWpMQmRwZFhIeUYwVDN4dGMy?= =?utf-8?B?cE9RVmhOYi9Dd2xDMGxxV1NjcCtCby9pR2NIVEd3K2VPTXBjMWg2TVVKWlpR?= =?utf-8?B?cEtYMDNIb01zMHIrUk1PL1lBNjlMZUYreW9Wb2tCU0tZTTNtdXgyUGh0N1FS?= =?utf-8?B?bGRIdVFzM2xYTXBUZzg1ZkZPczduZ0I5dlNaOElhOUdaTmkwLzBnVStOUXpB?= =?utf-8?B?WGFBYllwOCt4NkZRcTZpcmliYVdaMldqRzFma2JvcmpIL0lNWEJEQVM1VWw5?= =?utf-8?B?SGFmc2ZodVJQclBhT01TUm5lMXQyWVovYnM3Q0Jaa3BWOXRRTEtiU21pVk44?= =?utf-8?B?QTl2T3NLT2QrWnhOM1NPZmxVNHJuWnc5YUVHVkpvTmN6bWdYNCs5ZjdMUXRC?= =?utf-8?B?Sk1vQ090YnRUN1ZDZUtyRkZocDJ0WGYxRnlFNndacHdrOUJXK2Q2NGNqdkJ0?= =?utf-8?B?aDk5RngvTmZLS2tKRmJtK3FyOTJKaldsbklZSEdTUllSbG9FQUlwb1JTd1Z2?= =?utf-8?B?ejZiNUhqRm9Ud1h3dkpXaGxOM0FQelpNMlR5MXlBb2hSMFRleTN4MDh4eEtv?= =?utf-8?B?bkI5Um83LzNlaVNYd1FlR3dQRjZLSkgzZHBkU2x6WU9lU1hrZ1QvTUlQWXlE?= =?utf-8?B?QTZPalYzT04zWit3eTIwYnpIZGVROHlhOEdqYVhVUFRBVk9pVEF3WjV4dXNh?= =?utf-8?B?WmZNcW9jNVFacnZwMDFLZ3hqRFdHdDRzNThoV09acTRGMW1qUnhyOUdPTUtK?= =?utf-8?B?R1VNSHlDZjRINjdXWitjMWQxSXI4Rnpnd2I2bEYra2R4dEZPclpyRjZJclpt?= =?utf-8?B?UmFzcVFlNy9DT3VXeHNLUTF2VGFlYUx3V2ovaXJlMDhDRjdhSGlIR21OTCtJ?= =?utf-8?Q?KxNtNFWdH4hyjhWFXjPzRQsUgl8qH4=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(366016)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?cTJLa24wZnpwZGFNaklFSFl2ZzhFT2t3U0daRVhIOFBuVHI4VFVUczVNMU1o?= =?utf-8?B?bWpXWUpjemhDOU9VNjV2WVF0a2xJWE0zbGszdythcU1JNC9aSzBNaUNnYnU4?= =?utf-8?B?cjhtSklTUTZ0Z20zTGNxdEZObmdNRE1LUkNyb2JtbEF2YU93MEJoNnJyakJT?= =?utf-8?B?aWZ4cjdSbFpIMmZzNkd0dEJpK3BrNG84RHprbDNBTm1tZnZGMTJKWXpJUGRZ?= =?utf-8?B?SnFSYXpid216eXlQWFRTQW12NDFnak1ORkNXVjIxRWhEVmNhM3VHMktYZXFa?= =?utf-8?B?eG1oWVJZb1VxbFVkWVJnc29uckNIL1NiWXgzZUg4MDZqMkhZN1Y5NVRjL2Rj?= =?utf-8?B?a3dZYmN2WjFWd1NERjFmTkVQMnZmL2tjdEE3WEJnWUZrc1Y3Tk1HYW1kbzA2?= =?utf-8?B?MVV6dm16RkliKy81OTBXQnhPMmxES2JYNXFyRFc5Vnk4d1VvcStBL0ZnOUVq?= =?utf-8?B?alZzRFNEZWJSWFNyejlDL3JhaXByS2pqM2NZOEV0LzhnWS82ellQazMzRThh?= =?utf-8?B?T2xWMDUycE1VdnNnd1Z3eHhzaGN4M2Q3SHVsb1ZhUktkcjFoOW4rbSttK085?= =?utf-8?B?Z2lmKy8zSnR5V3NmK0VKSUxqUXVZUHA0bDlXYTZBRGZ2YnNNWmJlblNqa0pj?= =?utf-8?B?ZmVkUnI3QkdrU2lwTVlVSnd2b2lCUG1kaklNdUF1dTEvc0M1YzRUUzBOYS9o?= =?utf-8?B?dDZvWHpPNmVjaWhBa0p2TXhMWUh4MnQ0VjF1aHlleWpwUmh1cjZNZzdMVmZo?= =?utf-8?B?WElOd3IyOGhvZlpaVkc1Mzl2MWk3MGY1aUkxTzFyQlZWcC92ZHBMc0syZWV2?= =?utf-8?B?WmV2M3VaVTFFOE5OVzBZYUZHbzhTdkhLRUE0UHNuM291MW1XT293TUNLZE9u?= =?utf-8?B?SEFKOUxVQllDcjdpanNlclVMNUVOdWUzWWs1S2ZxS1dOZXhFblJ5d1BVNnBa?= =?utf-8?B?VXBGZGl2RENTWlh2cjlBRnltWi9yejUydkNGK3FTTmJJVGZDc2hhTElFR0V5?= =?utf-8?B?ZVowNGZZL1NuNmRpTVJFQ3JkYWpGdWhqSjkyMSs2SSswOGdiS2E4bUdpN3Iz?= =?utf-8?B?ZlZMcmFXSXJFd2x4eVNTamhuK0tTblFjWlVHWUc0TVYvOXhVRFdWMUYyV0hQ?= =?utf-8?B?dm1oVVZTUVRNRkIvZmVLVDRTa0htMUorOXUwUFNkSXZpMlpkbGxXRUwyUGZu?= =?utf-8?B?bUgvUzM5MmZqMmViSjl0Z0dSdjNlaEUvK0tLOW1laCtDZ284Mm9uUVRVOE5i?= =?utf-8?B?NWFISE9tNHVBd05MeERwMG9Xa2t3SmxmTk9XRFpsVVlqc3ZidGtyZHlrVjk5?= =?utf-8?B?STNEZ3l1a3hkY2RGRGV3eWpSOWRtZXBZRWRQY2o5YXo5V3UxVHZiZW5nSWY2?= =?utf-8?B?QXhLQjJyU0tKaElyaEhQUmx2Ty9kZTdEWm5kQTNwVE05bXlzVGYrV016bmRJ?= =?utf-8?B?M0pjSXB3blNUY0toS28xTDkzbTVzdThOTlo3bnNxY0FKL010a3VoVlJES2FC?= =?utf-8?B?OSswN0J3bEpqWUFyL0tXaDhtMzRpSUFjWDBuNm5nbVR0Zk93WjVic0pXYkZB?= =?utf-8?B?eWpjSUpBKzhUc0lhOE1NemVqbmdGc3d6VDBFSzlrYnowQktISHlOb2ozR2h6?= =?utf-8?B?R1ZLTHptOWVkUS9vUXJVT2llTG0vQ3ZaOFUwMUhlOC8xNnpxbEQyVWcyN2hE?= =?utf-8?B?ekRXNFJIeCtLZVpMYVhieW5LbUEzTTFXOU5CZGdCNTU3WVhZeWFieWNuMDNi?= =?utf-8?B?VFN2VjJWRldpaVNJV3l5ZjdWMzRrZUY3QURuczdHQXRma2dUZ0pwUDRDdGRm?= =?utf-8?B?L1RwQnJuNC93czk2ZzQ3dGJZMW5HRDNRbjhqdm13WnhGWVBvT0J3bWdzd1Rj?= =?utf-8?B?VnVaOTJzY2NVNnJaNjZiZ0M0TkR1WDZaK1pnUWVTZXJXVElyUGI4R0JpWWUy?= =?utf-8?B?ZXZUS3FLSjk1MWNONTM2TVFjLzUzTVBwU3gzbHlKVWoxcFlkVXd4ZTVJUklX?= =?utf-8?B?YStHU0xMS1kveWtkUXBKSzR0Z1FFckcxZUp6UmJmUW1HZmdBS0RxQ0M3OVhN?= =?utf-8?B?VktuMGtnaHNnbHp5YWdhL2h1VlRVK2dUTk8waFVUendhdkx2TUV6Y3hCYmdh?= =?utf-8?B?QmZTVUJLQk9lWXBkdlV2RS9KZVdMdzh2Wmw5WWZGWTN4YU8vRkFZMSs2R0s5?= =?utf-8?B?Mmc9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: 6c5a22aa-f675-4b91-176c-08de10f339b7 X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:43:16.7240 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 9yCXj7q0HrOODNYUdiEmfLt4noW9rwWHXYAvSn7LTk1p/YPubGvsBShPLP+WW971Mf5wWdI7BpdM/x1isOxvENGg8B5R847dY98wCg/41w8= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR11MB6753 X-OriginatorOrg: intel.com In upcoming changes, the GuC VF migration data will be handled as part of separate SAVE/RESTORE states in VF control state machine. Now that the data is decoupled from both guc_state debugfs and PAUSE state, we can safely remove the struct xe_gt_sriov_state_snapshot and modify the GuC save/restore functions to operate on struct xe_sriov_migration_data. Signed-off-by: Micha=C5=82 Winiarski --- drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c | 266 +++++------------- drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h | 13 +- .../drm/xe/xe_gt_sriov_pf_migration_types.h | 27 -- drivers/gpu/drm/xe/xe_gt_sriov_pf_types.h | 4 - 4 files changed, 80 insertions(+), 230 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.c index 04fad3126865c..127162e8c66e8 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c @@ -28,6 +28,15 @@ static struct xe_gt_sriov_migration_data *pf_pick_gt_mig= ration(struct xe_gt *gt, return >->sriov.pf.vfs[vfid].migration; } =20 +static void pf_dump_mig_data(struct xe_gt *gt, unsigned int vfid, + struct xe_sriov_migration_data *data) +{ + if (IS_ENABLED(CONFIG_DRM_XE_DEBUG_SRIOV)) { + print_hex_dump_bytes("mig_data: ", DUMP_PREFIX_OFFSET, + data->vaddr, min(SZ_64, data->size)); + } +} + /* Return: number of dwords saved/restored/required or a negative error co= de on failure */ static int guc_action_vf_save_restore(struct xe_guc *guc, u32 vfid, u32 op= code, u64 addr, u32 ndwords) @@ -47,7 +56,7 @@ static int guc_action_vf_save_restore(struct xe_guc *guc,= u32 vfid, u32 opcode, } =20 /* Return: size of the state in dwords or a negative error code on failure= */ -static int pf_send_guc_query_vf_state_size(struct xe_gt *gt, unsigned int = vfid) +static int pf_send_guc_query_vf_mig_data_size(struct xe_gt *gt, unsigned i= nt vfid) { int ret; =20 @@ -56,8 +65,8 @@ static int pf_send_guc_query_vf_state_size(struct xe_gt *= gt, unsigned int vfid) } =20 /* Return: number of state dwords saved or a negative error code on failur= e */ -static int pf_send_guc_save_vf_state(struct xe_gt *gt, unsigned int vfid, - void *dst, size_t size) +static int pf_send_guc_save_vf_mig_data(struct xe_gt *gt, unsigned int vfi= d, + void *dst, size_t size) { const int ndwords =3D size / sizeof(u32); struct xe_guc *guc =3D >->uc.guc; @@ -85,8 +94,8 @@ static int pf_send_guc_save_vf_state(struct xe_gt *gt, un= signed int vfid, } =20 /* Return: number of state dwords restored or a negative error code on fai= lure */ -static int pf_send_guc_restore_vf_state(struct xe_gt *gt, unsigned int vfi= d, - const void *src, size_t size) +static int pf_send_guc_restore_vf_mig_data(struct xe_gt *gt, unsigned int = vfid, + const void *src, size_t size) { const int ndwords =3D size / sizeof(u32); struct xe_guc *guc =3D >->uc.guc; @@ -114,120 +123,68 @@ static bool pf_migration_supported(struct xe_gt *gt) return xe_sriov_pf_migration_supported(gt_to_xe(gt)); } =20 -static struct mutex *pf_migration_mutex(struct xe_gt *gt) +static int pf_save_vf_guc_mig_data(struct xe_gt *gt, unsigned int vfid) { - xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); - return >->sriov.pf.migration.snapshot_lock; -} - -static struct xe_gt_sriov_state_snapshot *pf_pick_vf_snapshot(struct xe_gt= *gt, - unsigned int vfid) -{ - xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); - xe_gt_assert(gt, vfid <=3D xe_sriov_pf_get_totalvfs(gt_to_xe(gt))); - lockdep_assert_held(pf_migration_mutex(gt)); - - return >->sriov.pf.vfs[vfid].snapshot; -} - -static unsigned int pf_snapshot_index(struct xe_gt *gt, struct xe_gt_sriov= _state_snapshot *snapshot) -{ - return container_of(snapshot, struct xe_gt_sriov_metadata, snapshot) - gt= ->sriov.pf.vfs; -} - -static void pf_free_guc_state(struct xe_gt *gt, struct xe_gt_sriov_state_s= napshot *snapshot) -{ - struct xe_device *xe =3D gt_to_xe(gt); - - drmm_kfree(&xe->drm, snapshot->guc.buff); - snapshot->guc.buff =3D NULL; - snapshot->guc.size =3D 0; -} - -static int pf_alloc_guc_state(struct xe_gt *gt, - struct xe_gt_sriov_state_snapshot *snapshot, - size_t size) -{ - struct xe_device *xe =3D gt_to_xe(gt); - void *p; - - pf_free_guc_state(gt, snapshot); - - if (!size) - return -ENODATA; - - if (size % sizeof(u32)) - return -EINVAL; - - if (size > SZ_2M) - return -EFBIG; - - p =3D drmm_kzalloc(&xe->drm, size, GFP_KERNEL); - if (!p) - return -ENOMEM; - - snapshot->guc.buff =3D p; - snapshot->guc.size =3D size; - return 0; -} - -static void pf_dump_guc_state(struct xe_gt *gt, struct xe_gt_sriov_state_s= napshot *snapshot) -{ - if (IS_ENABLED(CONFIG_DRM_XE_DEBUG_SRIOV)) { - unsigned int vfid __maybe_unused =3D pf_snapshot_index(gt, snapshot); - - xe_gt_sriov_dbg_verbose(gt, "VF%u GuC state is %zu dwords:\n", - vfid, snapshot->guc.size / sizeof(u32)); - print_hex_dump_bytes("state: ", DUMP_PREFIX_OFFSET, - snapshot->guc.buff, min(SZ_64, snapshot->guc.size)); - } -} - -static int pf_save_vf_guc_state(struct xe_gt *gt, unsigned int vfid) -{ - struct xe_gt_sriov_state_snapshot *snapshot =3D pf_pick_vf_snapshot(gt, v= fid); + struct xe_sriov_migration_data *data; size_t size; int ret; =20 - ret =3D pf_send_guc_query_vf_state_size(gt, vfid); + ret =3D pf_send_guc_query_vf_mig_data_size(gt, vfid); if (ret < 0) goto fail; + size =3D ret * sizeof(u32); - xe_gt_sriov_dbg_verbose(gt, "VF%u state size is %d dwords (%zu bytes)\n",= vfid, ret, size); + xe_gt_sriov_dbg_verbose(gt, "VF%u GuC data size is %d dwords (%zu bytes)\= n", + vfid, ret, size); =20 - ret =3D pf_alloc_guc_state(gt, snapshot, size); - if (ret < 0) + data =3D xe_sriov_migration_data_alloc(gt_to_xe(gt)); + if (!data) { + ret =3D -ENOMEM; goto fail; + } + + ret =3D xe_sriov_migration_data_init(data, gt->tile->id, gt->info.id, + XE_SRIOV_MIGRATION_DATA_TYPE_GUC, 0, size); + if (ret) + goto fail_free; =20 - ret =3D pf_send_guc_save_vf_state(gt, vfid, snapshot->guc.buff, size); + ret =3D pf_send_guc_save_vf_mig_data(gt, vfid, data->vaddr, size); if (ret < 0) - goto fail; + goto fail_free; size =3D ret * sizeof(u32); xe_gt_assert(gt, size); - xe_gt_assert(gt, size <=3D snapshot->guc.size); - snapshot->guc.size =3D size; + xe_gt_assert(gt, size <=3D data->size); + data->size =3D size; + data->remaining =3D size; + + pf_dump_mig_data(gt, vfid, data); + + ret =3D xe_gt_sriov_pf_migration_save_produce(gt, vfid, data); + if (ret) + goto fail_free; =20 - pf_dump_guc_state(gt, snapshot); return 0; =20 +fail_free: + xe_sriov_migration_data_free(data); fail: - xe_gt_sriov_dbg(gt, "Unable to save VF%u state (%pe)\n", vfid, ERR_PTR(re= t)); - pf_free_guc_state(gt, snapshot); + xe_gt_sriov_err(gt, "Failed to save VF%u GuC data (%pe)\n", + vfid, ERR_PTR(ret)); return ret; } =20 /** - * xe_gt_sriov_pf_migration_save_guc_state() - Take a GuC VF state snapsho= t. + * xe_gt_sriov_pf_migration_guc_size() - Get the size of VF GuC migration = data. * @gt: the &xe_gt * @vfid: the VF identifier * * This function is for PF only. * - * Return: 0 on success or a negative error code on failure. + * Return: size in bytes or a negative error code on failure. */ -int xe_gt_sriov_pf_migration_save_guc_state(struct xe_gt *gt, unsigned int= vfid) +ssize_t xe_gt_sriov_pf_migration_guc_size(struct xe_gt *gt, unsigned int v= fid) { - int err; + ssize_t size; =20 xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); xe_gt_assert(gt, vfid !=3D PFID); @@ -236,37 +193,15 @@ int xe_gt_sriov_pf_migration_save_guc_state(struct xe= _gt *gt, unsigned int vfid) if (!pf_migration_supported(gt)) return -ENOPKG; =20 - mutex_lock(pf_migration_mutex(gt)); - err =3D pf_save_vf_guc_state(gt, vfid); - mutex_unlock(pf_migration_mutex(gt)); - - return err; -} - -static int pf_restore_vf_guc_state(struct xe_gt *gt, unsigned int vfid) -{ - struct xe_gt_sriov_state_snapshot *snapshot =3D pf_pick_vf_snapshot(gt, v= fid); - int ret; - - if (!snapshot->guc.size) - return -ENODATA; - - xe_gt_sriov_dbg_verbose(gt, "restoring %zu dwords of VF%u GuC state\n", - snapshot->guc.size / sizeof(u32), vfid); - ret =3D pf_send_guc_restore_vf_state(gt, vfid, snapshot->guc.buff, snapsh= ot->guc.size); - if (ret < 0) - goto fail; - - xe_gt_sriov_dbg_verbose(gt, "restored %d dwords of VF%u GuC state\n", ret= , vfid); - return 0; + size =3D pf_send_guc_query_vf_mig_data_size(gt, vfid); + if (size >=3D 0) + size *=3D sizeof(u32); =20 -fail: - xe_gt_sriov_dbg(gt, "Failed to restore VF%u GuC state (%pe)\n", vfid, ERR= _PTR(ret)); - return ret; + return size; } =20 /** - * xe_gt_sriov_pf_migration_restore_guc_state() - Restore a GuC VF state. + * xe_gt_sriov_pf_migration_guc_save() - Save VF GuC migration data. * @gt: the &xe_gt * @vfid: the VF identifier * @@ -274,10 +209,8 @@ static int pf_restore_vf_guc_state(struct xe_gt *gt, u= nsigned int vfid) * * Return: 0 on success or a negative error code on failure. */ -int xe_gt_sriov_pf_migration_restore_guc_state(struct xe_gt *gt, unsigned = int vfid) +int xe_gt_sriov_pf_migration_guc_save(struct xe_gt *gt, unsigned int vfid) { - int ret; - xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); xe_gt_assert(gt, vfid !=3D PFID); xe_gt_assert(gt, vfid <=3D xe_sriov_pf_get_totalvfs(gt_to_xe(gt))); @@ -285,75 +218,45 @@ int xe_gt_sriov_pf_migration_restore_guc_state(struct= xe_gt *gt, unsigned int vf if (!pf_migration_supported(gt)) return -ENOPKG; =20 - mutex_lock(pf_migration_mutex(gt)); - ret =3D pf_restore_vf_guc_state(gt, vfid); - mutex_unlock(pf_migration_mutex(gt)); - - return ret; + return pf_save_vf_guc_mig_data(gt, vfid); } =20 -#ifdef CONFIG_DEBUG_FS -/** - * xe_gt_sriov_pf_migration_read_guc_state() - Read a GuC VF state. - * @gt: the &xe_gt - * @vfid: the VF identifier - * @buf: the user space buffer to read to - * @count: the maximum number of bytes to read - * @pos: the current position in the buffer - * - * This function is for PF only. - * - * This function reads up to @count bytes from the saved VF GuC state buff= er - * at offset @pos into the user space address starting at @buf. - * - * Return: the number of bytes read or a negative error code on failure. - */ -ssize_t xe_gt_sriov_pf_migration_read_guc_state(struct xe_gt *gt, unsigned= int vfid, - char __user *buf, size_t count, loff_t *pos) +static int pf_restore_vf_guc_state(struct xe_gt *gt, unsigned int vfid, + struct xe_sriov_migration_data *data) { - struct xe_gt_sriov_state_snapshot *snapshot; - ssize_t ret; + int ret; =20 - xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); - xe_gt_assert(gt, vfid !=3D PFID); - xe_gt_assert(gt, vfid <=3D xe_sriov_pf_get_totalvfs(gt_to_xe(gt))); + xe_gt_assert(gt, data->size); =20 - if (!pf_migration_supported(gt)) - return -ENOPKG; + xe_gt_sriov_dbg_verbose(gt, "restoring %lld dwords of VF%u GuC data\n", + data->size / sizeof(u32), vfid); + pf_dump_mig_data(gt, vfid, data); =20 - mutex_lock(pf_migration_mutex(gt)); - snapshot =3D pf_pick_vf_snapshot(gt, vfid); - if (snapshot->guc.size) - ret =3D simple_read_from_buffer(buf, count, pos, snapshot->guc.buff, - snapshot->guc.size); - else - ret =3D -ENODATA; - mutex_unlock(pf_migration_mutex(gt)); + ret =3D pf_send_guc_restore_vf_mig_data(gt, vfid, data->vaddr, data->size= ); + if (ret < 0) + goto fail; + + xe_gt_sriov_dbg_verbose(gt, "restored %d dwords of VF%u GuC data\n", ret,= vfid); + return 0; =20 +fail: + xe_gt_sriov_err(gt, "Failed to restore VF%u GuC data (%pe)\n", + vfid, ERR_PTR(ret)); return ret; } =20 /** - * xe_gt_sriov_pf_migration_write_guc_state() - Write a GuC VF state. + * xe_gt_sriov_pf_migration_guc_restore() - Restore VF GuC migration data. * @gt: the &xe_gt * @vfid: the VF identifier - * @buf: the user space buffer with GuC VF state - * @size: the size of GuC VF state (in bytes) * * This function is for PF only. * - * This function reads @size bytes of the VF GuC state stored at user space - * address @buf and writes it into a internal VF state buffer. - * - * Return: the number of bytes used or a negative error code on failure. + * Return: 0 on success or a negative error code on failure. */ -ssize_t xe_gt_sriov_pf_migration_write_guc_state(struct xe_gt *gt, unsigne= d int vfid, - const char __user *buf, size_t size) +int xe_gt_sriov_pf_migration_guc_restore(struct xe_gt *gt, unsigned int vf= id, + struct xe_sriov_migration_data *data) { - struct xe_gt_sriov_state_snapshot *snapshot; - loff_t pos =3D 0; - ssize_t ret; - xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); xe_gt_assert(gt, vfid !=3D PFID); xe_gt_assert(gt, vfid <=3D xe_sriov_pf_get_totalvfs(gt_to_xe(gt))); @@ -361,21 +264,8 @@ ssize_t xe_gt_sriov_pf_migration_write_guc_state(struc= t xe_gt *gt, unsigned int if (!pf_migration_supported(gt)) return -ENOPKG; =20 - mutex_lock(pf_migration_mutex(gt)); - snapshot =3D pf_pick_vf_snapshot(gt, vfid); - ret =3D pf_alloc_guc_state(gt, snapshot, size); - if (!ret) { - ret =3D simple_write_to_buffer(snapshot->guc.buff, size, &pos, buf, size= ); - if (ret < 0) - pf_free_guc_state(gt, snapshot); - else - pf_dump_guc_state(gt, snapshot); - } - mutex_unlock(pf_migration_mutex(gt)); - - return ret; + return pf_restore_vf_guc_state(gt, vfid, data); } -#endif /* CONFIG_DEBUG_FS */ =20 /** * xe_gt_sriov_pf_migration_size() - Total size of migration data from all= components within a GT. @@ -597,10 +487,6 @@ int xe_gt_sriov_pf_migration_init(struct xe_gt *gt) if (!pf_migration_supported(gt)) return 0; =20 - err =3D drmm_mutex_init(&xe->drm, >->sriov.pf.migration.snapshot_lock); - if (err) - return err; - totalvfs =3D xe_sriov_pf_get_totalvfs(xe); for (n =3D 1; n <=3D totalvfs; n++) { struct xe_gt_sriov_migration_data *migration =3D pf_pick_gt_migration(gt= , n); diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.h index 4f2f2783339c3..b3c18e369df79 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h @@ -15,8 +15,10 @@ struct xe_sriov_migration_data; #define XE_GT_SRIOV_PF_MIGRATION_GUC_DATA_MAX_SIZE SZ_8M =20 int xe_gt_sriov_pf_migration_init(struct xe_gt *gt); -int xe_gt_sriov_pf_migration_save_guc_state(struct xe_gt *gt, unsigned int= vfid); -int xe_gt_sriov_pf_migration_restore_guc_state(struct xe_gt *gt, unsigned = int vfid); +ssize_t xe_gt_sriov_pf_migration_guc_size(struct xe_gt *gt, unsigned int v= fid); +int xe_gt_sriov_pf_migration_guc_save(struct xe_gt *gt, unsigned int vfid); +int xe_gt_sriov_pf_migration_guc_restore(struct xe_gt *gt, unsigned int vf= id, + struct xe_sriov_migration_data *data); =20 ssize_t xe_gt_sriov_pf_migration_size(struct xe_gt *gt, unsigned int vfid); =20 @@ -34,11 +36,4 @@ int xe_gt_sriov_pf_migration_restore_produce(struct xe_g= t *gt, unsigned int vfid struct xe_sriov_migration_data * xe_gt_sriov_pf_migration_save_consume(struct xe_gt *gt, unsigned int vfid); =20 -#ifdef CONFIG_DEBUG_FS -ssize_t xe_gt_sriov_pf_migration_read_guc_state(struct xe_gt *gt, unsigned= int vfid, - char __user *buf, size_t count, loff_t *pos); -ssize_t xe_gt_sriov_pf_migration_write_guc_state(struct xe_gt *gt, unsigne= d int vfid, - const char __user *buf, size_t count); -#endif - #endif diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration_types.h b/drivers/= gpu/drm/xe/xe_gt_sriov_pf_migration_types.h index 84be6fac16c8b..75d8b94cbbefb 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration_types.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration_types.h @@ -6,24 +6,7 @@ #ifndef _XE_GT_SRIOV_PF_MIGRATION_TYPES_H_ #define _XE_GT_SRIOV_PF_MIGRATION_TYPES_H_ =20 -#include #include -#include - -/** - * struct xe_gt_sriov_state_snapshot - GT-level per-VF state snapshot data. - * - * Used by the PF driver to maintain per-VF migration data. - */ -struct xe_gt_sriov_state_snapshot { - /** @guc: GuC VF state snapshot */ - struct { - /** @guc.buff: buffer with the VF state */ - u32 *buff; - /** @guc.size: size of the buffer (must be dwords aligned) */ - u32 size; - } guc; -}; =20 /** * struct xe_gt_sriov_migration_data - GT-level per-VF migration data. @@ -35,14 +18,4 @@ struct xe_gt_sriov_migration_data { struct ptr_ring ring; }; =20 -/** - * struct xe_gt_sriov_pf_migration - GT-level data. - * - * Used by the PF driver to maintain non-VF specific per-GT data. - */ -struct xe_gt_sriov_pf_migration { - /** @snapshot_lock: protects all VFs snapshots */ - struct mutex snapshot_lock; -}; - #endif diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_types.h b/drivers/gpu/drm/xe= /xe_gt_sriov_pf_types.h index 812e74d3f8f80..667b8310478d4 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_types.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_types.h @@ -31,9 +31,6 @@ struct xe_gt_sriov_metadata { /** @version: negotiated VF/PF ABI version */ struct xe_gt_sriov_pf_service_version version; =20 - /** @snapshot: snapshot of the VF state data */ - struct xe_gt_sriov_state_snapshot snapshot; - /** @migration: per-VF migration data. */ struct xe_gt_sriov_migration_data migration; }; @@ -61,7 +58,6 @@ struct xe_gt_sriov_pf { struct xe_gt_sriov_pf_service service; struct xe_gt_sriov_pf_control control; struct xe_gt_sriov_pf_policy policy; - struct xe_gt_sriov_pf_migration migration; struct xe_gt_sriov_spare_config spare; struct xe_gt_sriov_metadata *vfs; }; --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7C2B42F3C1E; Tue, 21 Oct 2025 22:43:24 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=198.175.65.15 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086606; cv=fail; b=KJIjg/UgfVQV/eRYTabu5eEInDC3G3w+x42raE082non3Zht5USmv0L9Aue4ECbtAuQIzZnBPq+rIDCRaeD6EYslTnlLclTQJnARRK7vK/Jgd1ZIRX3BEUiK6C04+OmxrjzKqADIEInhhXdKSYzsKwrD+bbSDMtTAQ2CK6Cc1D4= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086606; c=relaxed/simple; bh=I/VX4Iq+1VSWoIzFFP11bU7GByiPpEbZGRl57Lz4fjw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=sgIXXtafUGmUpHcy8UbMM7a+Se7zU39drT2IwxweX0c5VQZNfcHcgNvuSJlTr5ouX2t3G7yo+2kHReVRteOYR/4ib268XSHkz+ETmfuReh882/ziw2xVQ1+PodJYaZLYftOrWi5g5bRlu+1Lo8yqIFU9upW1Hm9IUT8IHnyAxhE= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=LynjRkdF; arc=fail smtp.client-ip=198.175.65.15 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="LynjRkdF" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086605; x=1792622605; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=I/VX4Iq+1VSWoIzFFP11bU7GByiPpEbZGRl57Lz4fjw=; b=LynjRkdFvfNjERF8BiCA+h5K7QZmtIu9jRCjCCpId+HtTt3zxMeKYOxJ azZoORHy+BuLxYWugSMWBj7gbVN8Kuf2cuDWxfWnt7z5pjf8Rf2SIQHrp N5PB0n6FcU5RGkgUIYlBrukcSHvfxtkpSC6LF4wtIoRqIB+9WNoHR3ppx 7w58id/cdL6gvbzNXkvRt4d8nrBZJS9xfrbwbYsc9ryyO99j4/QvyI5oG gWdkkA61lQDvzeisdBssYXtxC7VQCPOyxcPFN7CBsnuxpSIRW/f5fVwZB +7kdlC+CQqqui3TO0ZjE0AkH5DNaQY4bEv+Dh13oqzQ5burI9g2DPaULZ A==; X-CSE-ConnectionGUID: ATNEvm8JTE6CAsUu0oZ1nA== X-CSE-MsgGUID: f9AjrlpqREaC3FFOtAtCKA== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="66866319" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="66866319" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:24 -0700 X-CSE-ConnectionGUID: b5OY9vz7SZuTb6bGd5792g== X-CSE-MsgGUID: 3ldWmELxTSiNzDaI0bpumA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="188988669" Received: from orsmsx902.amr.corp.intel.com ([10.22.229.24]) by fmviesa004.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:23 -0700 Received: from ORSMSX902.amr.corp.intel.com (10.22.229.24) by ORSMSX902.amr.corp.intel.com (10.22.229.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:23 -0700 Received: from ORSEDG901.ED.cps.intel.com (10.7.248.11) by ORSMSX902.amr.corp.intel.com (10.22.229.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:43:23 -0700 Received: from MW6PR02CU001.outbound.protection.outlook.com (52.101.48.9) by edgegateway.intel.com (134.134.137.111) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:22 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=azX957XMVpk/n5jmWrqW49ZRzIb/fSL7DGLNTD7FPIcb4X0EXkATB/c/9Wt/EygXfTgfrEvkr3WW7ZgmWiQMeuBYeSAv8S61AfL9cxmzmp+Obp01jF/wgICSlJVT/lANoqqL0kDqek8DHd0dQDE/OHrf2bZnbxVu4pBRYG7SAHOgeskQUW7jG6MgQSCeQlTFWv0x4AXTTHgPGn+ApDiAybrnoE4LMXfsHFQf7umIdBIjXMvU+/KG33/WmrW6KDsVVbM/Z649Minbeo3Dt6QHkIgiC8RVTKk43OAciAuSYp1JOja6JvNvYPCkNmvg1vZBDXEQzTTQjKJEHhac6uXXFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=xYQzSDSBTchyJHhhuuvYplRRF+pFvFNO01WLE6sxyRA=; b=jFrn2esvnT5Rw/FminCmYnLZ5z1clS9xXu+UYMXeueUDMcqHJP/SfTevxXe6OPGWclv6AnrSdmKprlDI02n2PCxA1YbgEiEak517Q/sdlc2Mf/6CvQTr9Nz6o9olT3lIkVe09xFP5cf3ar7fLkKA5JuuLgXWyPfqXOLdKRTx0RWCZvXqaRtuINBxc1FPxXFKRC3zds2ed60rmDOB0C049/dtrfGd9oeeqDE4f1sosgbk56gBEpcO7IZg3eJfw8u2YjeCyc2prdLb4DIYAy9hWuu/aN+OROIKXYutqWCEinHaL4Dj84fkEKU3DiA+eZMmSOsv7nMcyalEHUrF5xdheg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by PH8PR11MB6753.namprd11.prod.outlook.com (2603:10b6:510:1c8::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9253.12; Tue, 21 Oct 2025 22:43:21 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:43:21 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 15/26] drm/xe/pf: Handle GuC migration data as part of PF control Date: Wed, 22 Oct 2025 00:41:22 +0200 Message-ID: <20251021224133.577765-16-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: BE1P281CA0397.DEUP281.PROD.OUTLOOK.COM (2603:10a6:b10:80::18) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|PH8PR11MB6753:EE_ X-MS-Office365-Filtering-Correlation-Id: e3a21f87-d9f3-425e-f89d-08de10f33c6a X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|376014|7416014|1800799024|366016|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?aUhhdCtRbCtWMCtiZzM4aFlkVEJDRjRMYmFkc3RZM0FUL1RxSjBxUGo1azZJ?= =?utf-8?B?eXRFbi9keHVjWm5lZmpJbXVjd0JwYXE4dUluVVc3djJFYlA3QU5IdEVxOWVV?= =?utf-8?B?S1pyUXg0S2dLakVQWVlyV29Fb1FVaGVoVGUzZVNyV3NPTTFCYUNVd2srU3Yr?= =?utf-8?B?VkgwVVhTSFJkczlwWm0wOFkzazBxT0ZubWlIb2FqSHlMdXhMVkpqeFdYYWJp?= =?utf-8?B?ZmlnR1RyMVpIQlFZWnpaV1c4cDU2OTVLVCtpdjBMSExWNDdBa3RxWVgyd2k3?= =?utf-8?B?cVRuNDBBMjFXa2lYOEFCZnhRaTlzcEJoREtWcnZ3NGhrYUlEbm9BanlScnY0?= =?utf-8?B?cFJ4eTZNU1FpZFM2NlREeG1MTkIwSnU2ZStNZVlwTlBFbmVxZ3NUTWxyWWhW?= =?utf-8?B?L2taZXJPMlJ2NnBuM0xDNks0OWEyRHRQNWFZQ2xBUFlhRGtBZG9GMC91MWpz?= =?utf-8?B?U2NNdnRxS1JBek03Q3V3dExGbS84dUZvcWN5WjE3b0xJRWZtanpTUEptWmJp?= =?utf-8?B?UWZ6cVZ1QmI0MlJrbnlvS1VnWEVyK3NDMlZ2L0JyQzh1Y1kxNzF0M1ZCQjhK?= =?utf-8?B?d2o4NTFCQk51QkFjSDBFeXNYY1F4dVF4bFUxR2doVDdqMEdUeEViKzNzclds?= =?utf-8?B?KzcvQ21KM2p3LzViSFRvMnRxa3ZtWlpWa1YvUkZmTFZKeGdzNm5FNXlvbkJv?= =?utf-8?B?MVN3OHIzMjNyQmpaZm5GeG5RUkNFUmxrRTV1WEUxSEdPc0lzWjlmT1hKTVg1?= =?utf-8?B?aTJlNjY3d2J6UnpoSDlFZ1cxRXdKeVBNRTZxekZxRk50dWxHcXZiUTJZU3dh?= =?utf-8?B?UzFEbDQvTmlVcGdvbnlVaEJTUHp5dSt2cnZUS0lmVExBTXNWZlFRbEJDUUow?= =?utf-8?B?djVGWTVIdHhHYndnRE1hRmhBRVZkblh2RHZMOC8vb1RtQVJHWW91a0ZrVVo0?= =?utf-8?B?cVNwQ0dnZ2F0Mm1DUFJXQlRiSVJidnlNV1JITXh4dEc5eEdkaHYvbWRZZndW?= =?utf-8?B?SWtGQmNKNEhFZUowUG1ZSDkyMWIwS210aW9YbjJZZlVQMlVwTnVzeWtXU01F?= =?utf-8?B?T1FWZXptekJEVlI4TDh2eU9LZytUUHc1amZPWDNDV3FOa3ZWV21OZDJJckE4?= =?utf-8?B?Q2E2YkdiODZWK2JQOVhPK202U1o3ZmEzbVpaUzZ3L2tyZHpob01HL293S0Vh?= =?utf-8?B?a2hTYjhLdlN0WU52Tm8xNVBhQS9RUXUzSms1bUlpZnk1WmJiL01pNGg5V0F5?= =?utf-8?B?SVlPUXU1UTJ0L2lVaDFJZ3lJUGxuSU9qWDBObU1DNEtKajYvNUEzV3lOaFk0?= =?utf-8?B?TUQyVXB6WlBnaTB5Q2cvZU1ha0lVenZ6R1NPOElST3VBT1ZYd0k3V014c1Zj?= =?utf-8?B?TjBtVTdXcmdYN3YzcHhFRFU2ZVN3WEdRaWx0TGpGK08rZ0NYc3kwVktYc1Vn?= =?utf-8?B?Y1NXQy9sN01oVDF1SEdHY2hTWERndVFHOXVPcUVrbGk1dExaWnE3a3lyRThX?= =?utf-8?B?c2JHTGNRNTRDb0JyaDVmMDE1VGp0NWJrY0g3cklRSzFZTDlhWUlRelh0VEZs?= =?utf-8?B?OVdhTWlFLzRlK2trWk5LbUJJaWYzMHJTeW9HQWlYSE9UeHo0a1l2V1FMVGly?= =?utf-8?B?VEVlZUNLeUdLTzR6dlBJWFBBcVlwbTcwYXFZVjIraVdvZEkzbGNQZEFvVUR4?= =?utf-8?B?Z2c2TUdrcXJ4dW5xSS9WRGd6aVJHWDVVNDlpdG9xVnhoTUk4N0JxZDgrWmFU?= =?utf-8?B?WWpYVGlPZXFtUmR2TUlVSFl5NHcrdnFzZVBoUlZUbTB2UnlrT2tzdlg3QUdI?= =?utf-8?B?bWdidCtsa3lPRWF5UlFIUDhqNzNpRnpFK1pOWk9XenhYK0YwQy9OeG1QNXl0?= =?utf-8?B?UnF2QkhmRW0rS09sNzZTME9HRWhtb2Ezbi9wNFV6c2FuUlRzaWg4TUx0aUZR?= =?utf-8?B?VjFjNWlod1I0L3FvMk5KS1JWWmNIU0tMM0hkYVlrOFZJWHUzMk9sVFdxalpq?= =?utf-8?Q?m11oLuUhIx2XufIBF5CIsKMnVfoVLo=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(366016)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?ZC96MkdCeCtFTC9id0hmTk94UjJQT0g2SWV0N1J4U1FwMm1TeVljdTIySTZP?= =?utf-8?B?eTV6YUFpYmtOa2xiL09IclkzM1luTllMTkZXMHBjektVWTc5Zi9JTFFBc042?= =?utf-8?B?Tjh3MStZaW42bkpneSs3RjJ5cHZRclYwQmRJMld3Uk0xNmtQVnh3Qkk4bHhH?= =?utf-8?B?blAyS3FtclJqeEVWN29raXMyaENHMlQwRExOUDNUekk1dm94d1ZqSHJUay9n?= =?utf-8?B?TEs4RjYrcUlrcmhScHJIYzA1M0E2NzJXbXpqb3hNMDJxL1Q3Q09EWDU5R3ps?= =?utf-8?B?TTNHVzJualZtalMyYkVJVlh6cUsyeWRWRmRCb3Vsc21ReUlYQ2o1YnpRVWNB?= =?utf-8?B?VmpNd3p1VlVTSmNTUTR1RVFSQlprdXpvQWlnU21LbFpuQnJVSThXL0lDaFl5?= =?utf-8?B?YjRicHBLSWhMMkVrTWtYTDQ3akMvcDRJRnR0bk5RYlppbmN5dlA4RVErUksy?= =?utf-8?B?ektZdzlwUWwzTjRZQmxkVVhtZm92R3RQcVFYcmg1MFdiQk13QS8rNmIrZjhw?= =?utf-8?B?aXZXdVN3T0Eya2JQalR4YTlyb2ZsWURYRUp5WGcxaXVHTXlsQnROQ2FoOXc1?= =?utf-8?B?clJEdHhlaWF2eERDZVlRM3ZvVjBYMS9CNUkwaUpDMWpaWEVxQXZ5VmpZSFBq?= =?utf-8?B?VjVMRVZiN2p1M3ZrN2duOGtpSHFKeUtwZTJVNytKREd6M0lBLzRKcDNkM1Ro?= =?utf-8?B?M0VINXJDNzFFNlRpdXV6Ykt5YTVnbHVrVzlFYU9TMmNCZmdmeTlIMkZJUExP?= =?utf-8?B?YXZwQ2ViMnRPRkJEdWZya1RRdzRQWGN4M2MxZTlhcnRBbjVQRlRuMTNRTmhQ?= =?utf-8?B?cnB6SzhweFBxS2R1eUtjZkhlclVHcDViTEFORDlxeUprQlJ6OFBXQmVUdEZr?= =?utf-8?B?aFhOMDEwbG1HdklvVFplaXBESEI3VUxIQXRpZWthY01ZWlhTbkZmM2ZSb3ph?= =?utf-8?B?RlJlNUE5RlZWdk1hQVBoMVFSbGc2M0xEMGZTVmFNK1VLcUcxZlQxY0gvRmts?= =?utf-8?B?V3NtZ3BBU3dQTzhZbEFzOStxbzRGOE9vYkN2NndxL2ljcWRFU3B4N25zOXFo?= =?utf-8?B?YldRWS9EZG81cVEvTEM4S1VQWXoydGwwZWlHOGsxZkllc0lGVElrNWJVQkor?= =?utf-8?B?MU81TExOVEY3YlB3Mlp0OXlFSVEwaTFPSjZZWXhMUXhGbWZVd2tlZ2xuOHpV?= =?utf-8?B?WjAzcm55SXVPdVc0dmpPNGVOWEZxL1VkM01jNys0RjBENm9GWXpvcEc3ZlNB?= =?utf-8?B?eDhLMVVjZEdJL0pDRXZQY1RJQnE5ZWo3Y1pXNnZmQkp2M3NweWpKMnhjZ0ht?= =?utf-8?B?WDZqZngwdHdPdE45NGpVQW1tU1hUYk5JZW02UHIxZ2JsaWNKUmsxTXpiYjVW?= =?utf-8?B?NGE4MmJ0RmtNT1RQSW9NbFlUaUFsNlZLN1lkVmppbDVhVUwzVThWVDNBVXpt?= =?utf-8?B?blR6TXJTSFNXZWs2NDNiRHNra3BjKysxYTE2cHVZbjZnZzhzdzNqSEtZVEtt?= =?utf-8?B?alZYN3NCTVpxMzV5OHUvWXR4S05UaWlCcDg0K2NDZTJCeVRPOEx4bWNoV2do?= =?utf-8?B?WUxOSEw3ZVdqRTIxUzB1aVhEemNweVEzVHVzdXZqSjJQbllzWlZmQWRGZzNO?= =?utf-8?B?Y2VFVDNneFA1WWU3LzYxbzBJS3BOVEVkbUF0UWdOeEp3VXh5L29ESTFJNERl?= =?utf-8?B?K25QeGJDM0ZyT2VhR3FxakZJc3FmcWdrWHMxWm41OC9vd2dpZlVjRHlNaW5F?= =?utf-8?B?cEtQWU15TTQyajd5R2NNK1NOWk5ONmpQMm5NVzByZDJXVEM4UFNYT0NqM2RK?= =?utf-8?B?MGpRVmMyczU0TVpQVi9qYXlEMDJOazkvcE04a1BjUHlDcWgxdTUreDA5d0VP?= =?utf-8?B?RzJrWjNNK1V1Vk5OcHN3em94NHpqYkJxSVJodkZ5RjhLQnlYa3pXaEVCbnpU?= =?utf-8?B?UkZ0MWkwekxWN3pZVi9NLzdLaUd2QjlXVitLMGN4VmVFc3p4aWhNeFBLQ1F2?= =?utf-8?B?ODVTTThTL2xTNXJYV3p0NnlsV3VsWDNMWWhTcDJ6N0ZQS1BaYVNnT0FPSnNv?= =?utf-8?B?SGFYNFFDdjlQZ1h6LytURGxkQ25wOWRBWGNFZ01lVGw1T3crUWlCZDN6ckFB?= =?utf-8?B?VW1UNXFKWS9wSlJtbzZWSFdLZ2ZISG5NUjdJUkp4ZzFHbjRJaVhHaHRrRCsz?= =?utf-8?B?Tmc9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: e3a21f87-d9f3-425e-f89d-08de10f33c6a X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:43:21.1612 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: p4uFu88YlD9a0KaZEPBJCnxOfX7bcYJ6FZa0Hecf6eIHiEeWHNiWOTrwux0C9DZ9k40SyK8bHgjs0WsocWLu20q3s8Dib+o8l7earO2OC74= X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH8PR11MB6753 X-OriginatorOrg: intel.com Connect the helpers to allow save and restore of GuC migration data in stop_copy / resume device state. Signed-off-by: Micha=C5=82 Winiarski --- drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 26 +++++++++++++++++-- .../gpu/drm/xe/xe_gt_sriov_pf_control_types.h | 2 ++ drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c | 9 ++++++- 3 files changed, 34 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c b/drivers/gpu/drm/= xe/xe_gt_sriov_pf_control.c index c159f35adcbe7..18f6e3028d4f0 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c @@ -188,6 +188,7 @@ static const char *control_bit_to_string(enum xe_gt_sri= ov_control_bits bit) CASE2STR(SAVE_WIP); CASE2STR(SAVE_PROCESS_DATA); CASE2STR(SAVE_WAIT_DATA); + CASE2STR(SAVE_DATA_GUC); CASE2STR(SAVE_DATA_DONE); CASE2STR(SAVE_FAILED); CASE2STR(SAVED); @@ -343,6 +344,7 @@ static void pf_exit_vf_mismatch(struct xe_gt *gt, unsig= ned int vfid) pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_STOP_FAILED); pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_PAUSE_FAILED); pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESUME_FAILED); + pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_FAILED); pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_FLR_FAILED); pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_FAILED); pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_RESTORE_FAILED); @@ -824,6 +826,7 @@ static void pf_exit_vf_save_wip(struct xe_gt *gt, unsig= ned int vfid) =20 pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_PROCESS_DATA); pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WAIT_DATA); + pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_GUC); pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_DONE); } } @@ -848,6 +851,16 @@ static void pf_enter_vf_save_failed(struct xe_gt *gt, = unsigned int vfid) =20 static int pf_handle_vf_save_data(struct xe_gt *gt, unsigned int vfid) { + int ret; + + if (pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_GUC)) { + xe_gt_assert(gt, xe_gt_sriov_pf_migration_guc_size(gt, vfid) > 0); + + ret =3D xe_gt_sriov_pf_migration_guc_save(gt, vfid); + if (ret) + return ret; + } + return 0; } =20 @@ -881,6 +894,7 @@ static bool pf_enter_vf_save_wip(struct xe_gt *gt, unsi= gned int vfid) { if (pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WIP)) { pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_PROCESS_DATA); + pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_GUC); pf_enter_vf_wip(gt, vfid); pf_queue_vf(gt, vfid); return true; @@ -1046,14 +1060,22 @@ static int pf_handle_vf_restore_data(struct xe_gt *gt, unsigned int vfid) { struct xe_sriov_migration_data *data =3D xe_gt_sriov_pf_migration_restore= _consume(gt, vfid); + int ret =3D 0; =20 xe_gt_assert(gt, data); =20 - xe_gt_sriov_notice(gt, "Skipping VF%u unknown data type: %d\n", vfid, dat= a->type); + switch (data->type) { + case XE_SRIOV_MIGRATION_DATA_TYPE_GUC: + ret =3D xe_gt_sriov_pf_migration_guc_restore(gt, vfid, data); + break; + default: + xe_gt_sriov_notice(gt, "Skipping VF%u unknown data type: %d\n", vfid, da= ta->type); + break; + } =20 xe_sriov_migration_data_free(data); =20 - return 0; + return ret; } =20 static bool pf_handle_vf_restore(struct xe_gt *gt, unsigned int vfid) diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h b/drivers/gp= u/drm/xe/xe_gt_sriov_pf_control_types.h index 35ceb2ff62110..8b951ee8a24fe 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h @@ -33,6 +33,7 @@ * @XE_GT_SRIOV_STATE_SAVE_WIP: indicates that VF save operation is in pro= gress. * @XE_GT_SRIOV_STATE_SAVE_PROCESS_DATA: indicates that VF migration data = is being produced. * @XE_GT_SRIOV_STATE_SAVE_WAIT_DATA: indicates that PF awaits for space i= n migration data ring. + * @XE_GT_SRIOV_STATE_SAVE_DATA_GUC: indicates PF needs to save VF GuC mig= ration data. * @XE_GT_SRIOV_STATE_SAVE_DATA_DONE: indicates that all migration data wa= s produced by Xe. * @XE_GT_SRIOV_STATE_SAVE_FAILED: indicates that VF save operation has fa= iled. * @XE_GT_SRIOV_STATE_SAVED: indicates that VF data is saved. @@ -76,6 +77,7 @@ enum xe_gt_sriov_control_bits { XE_GT_SRIOV_STATE_SAVE_WIP, XE_GT_SRIOV_STATE_SAVE_PROCESS_DATA, XE_GT_SRIOV_STATE_SAVE_WAIT_DATA, + XE_GT_SRIOV_STATE_SAVE_DATA_GUC, XE_GT_SRIOV_STATE_SAVE_DATA_DONE, XE_GT_SRIOV_STATE_SAVE_FAILED, XE_GT_SRIOV_STATE_SAVED, diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.c index 127162e8c66e8..594178fbe36d0 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c @@ -279,10 +279,17 @@ int xe_gt_sriov_pf_migration_guc_restore(struct xe_gt= *gt, unsigned int vfid, ssize_t xe_gt_sriov_pf_migration_size(struct xe_gt *gt, unsigned int vfid) { ssize_t total =3D 0; + ssize_t size; =20 xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); =20 - /* Nothing to query yet - will be updated once per-GT migration data type= s are added */ + size =3D xe_gt_sriov_pf_migration_guc_size(gt, vfid); + if (size < 0) + return size; + else if (size > 0) + size +=3D sizeof(struct xe_sriov_pf_migration_hdr); + total +=3D size; + return total; } =20 --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0A6A42F6576; Tue, 21 Oct 2025 22:43:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=192.198.163.19 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086613; cv=fail; b=q58LG4W9lf4F4wGQocAfmqFVaKIRT/DBx626BAtAYSvOor6zOHgsmpYetx+qjvuOk0TUfPNWMBRcIyJjgkaIJ94wEvourrdnk3+A4HDk4BHM1gNSWNnLVYITU1pynibkm9yobd6H2lJICF4Shggkwtp8ggsSoXMNHWRwf0SHHYw= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086613; c=relaxed/simple; bh=dJ8FHmteLGfUfy2aeybikTUUTgyWKxVcvzUx+XG+yeA=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=b7roCv1f3y4IzkKdD6Bbj3dpTq/VlH7WrUOs9hLIORD6+dwt1TLDyVGMDHh0+bKrRJlOOkLYBcDxMPgWBYmLD1Hgzp/MKqwGIya/SPGZNIu2gfuv/xwv3ePstYGgMEqbGKFtavzIrVIjqLmk6xStyl/E929NBvovGD8iW+cLTbs= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=li3QSpQl; arc=fail smtp.client-ip=192.198.163.19 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="li3QSpQl" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086611; x=1792622611; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=dJ8FHmteLGfUfy2aeybikTUUTgyWKxVcvzUx+XG+yeA=; b=li3QSpQlZm4pfLUVnLW3K+FWxZoADqJ0ryrdeOa/dZFWX++QUsdI4l+9 +n4ZWTzbmITDJobB4K0moL25Y9YC4227gSqj/YKHKNk+gIQWbfyOOSrYu EiP1D9SIpRzEiSQiQtKhKXBUqUbKIZpXLBLgCY9QmQTVjzl7fu2qBOgIS oM7/0J3/Llsbs8wSDyOpfnUw82C/6bVeTy2cZOo4fSWAEaGsKEzpdLx7U 9Rc2OsiS8fBmqynUsor2FjxoPgdwN2w7cEkEjMQu5BfpvPxcCuLVxdPTg x1YZ/xBNOXOjCZUVKclqT17gUVS/D362678g0lrSdICy1y2dN5eDPk+9m A==; X-CSE-ConnectionGUID: Jl04XnvzQNyte8/DiU/9cw== X-CSE-MsgGUID: P5vacbBGS1CoPwnohFwfnw== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="62255837" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="62255837" Received: from fmviesa004.fm.intel.com ([10.60.135.144]) by fmvoesa113.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:30 -0700 X-CSE-ConnectionGUID: M2OuN+WbQCGitFhiOZl3DQ== X-CSE-MsgGUID: zdbbO1XVRKuox5whLP5tfg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="188988709" Received: from orsmsx902.amr.corp.intel.com ([10.22.229.24]) by fmviesa004.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:30 -0700 Received: from ORSMSX901.amr.corp.intel.com (10.22.229.23) by ORSMSX902.amr.corp.intel.com (10.22.229.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:29 -0700 Received: from ORSEDG901.ED.cps.intel.com (10.7.248.11) by ORSMSX901.amr.corp.intel.com (10.22.229.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:43:29 -0700 Received: from SA9PR02CU001.outbound.protection.outlook.com (40.93.196.56) by edgegateway.intel.com (134.134.137.111) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:29 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=lAsuSEMFSUhp4A6u6mLkT3rMtSJORSqbnKbKuRfkXPUJTX1ce9GPZiQapBGeXmKkWYftTKxnzmv04M2DLZP1GlFa7X0ir8E+07ORp7+T5cZ0InVP5ysSOEc6V2nnJ+L4i+KDKf8Pw0gRK3xWnj4O4q6W3vto0JckE060Y5bzZPU+6KYhToL766T/79tCSFNxRC8CkKW63DjYR2pyC4Myay3rjv7zzaEcwm3qrAhsU04v/JkUcmwltK49c+iTXdwEawIN98VAYEr3M6YbNe+X8YNlQYpi676qH1TpPRjFVQ97DDG+d+1eqGn/tF0lkdMsQMATcMc1HDU8NWzaTaXypg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=B1EXMLysIqjGkRvBJLZMy/SmMvt3/7p1P3TCa8fy5d4=; b=vu4IRhdLMijLMqLnXhSos1qeaul+MZNraCLuzbnfX1LewgrPE9NONzxcja2csA8c+LVMZwrDFAM/CKD/Vht6ktlzMP7TQfWcZ7xaL0VzAwxGkAPwdpheDVP12XiG9+5iKDmUwn47Pvyzj5H1+ZdUNPvwsUKf54efpQXsazWS4iMmWTLID7q8WP0PKrXn7duqoKFkw1LaqD045nFySahktcD70esFB7jHTyB2xjyifZLEnT/s45/Jc6+EUUz4YXN1AnBO2cFe/0bXEOUP3x48cTw0kSFQzz6M2mm+Za3N2j31egz6P87jKOtH5I1yR8W4U+JvotZNgPR4iOFfHhk9YA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by DM3PPFF28037229.namprd11.prod.outlook.com (2603:10b6:f:fc00::f5f) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9228.16; Tue, 21 Oct 2025 22:43:25 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:43:25 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 16/26] drm/xe/pf: Add helpers for VF GGTT migration data handling Date: Wed, 22 Oct 2025 00:41:23 +0200 Message-ID: <20251021224133.577765-17-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VI1PR04CA0129.eurprd04.prod.outlook.com (2603:10a6:803:f0::27) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|DM3PPFF28037229:EE_ X-MS-Office365-Filtering-Correlation-Id: 26290032-cf90-476d-9744-08de10f33f02 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|7416014|376014|1800799024|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?UlN3elRYdUpiVXNHNEFxRm41ZjR5bFJETnVHaVJ0T1dQTTZ2ZGpDdk0xR2Ni?= =?utf-8?B?WVlielNaZllUYlQzNmZ4REdNUXNlSWxRZThUbVE3M2l1ak1YRHlreTBDVHAv?= =?utf-8?B?VDZEL2FyU0hGT0dmUUNSdjVwZStmV2MzQXRYZmJ1NWp2bVJsdWxCenU3QmtZ?= =?utf-8?B?bmJROUdON1FSRDVZMTBERC8xdUkxZHR2WWsyeXA2TTYvWFAzR1VnOEJRZ2NX?= =?utf-8?B?eDVtcVo0ZGM2WWJ6SnE5dEMyWjNvMlh6U2xNdkY0aHgyOFJjYWVvMGZ3T09W?= =?utf-8?B?d1FmcFNya29Na0V1d0tvTkpHMUUwY2d0azhkOVpVZDQzL00rZXRzbU5xVThs?= =?utf-8?B?enpoMS9qNTd4M1BXRUtsSzQ4eDVSK2QvcTNFdWVMLzhtcGpJcVFYdDVsUmd0?= =?utf-8?B?czZqTVpZTjk0OUFGZDFlTGRLc25pQnNJaWU0bVJDZS9FcjdIRk5vclA5cDdQ?= =?utf-8?B?SlUrRWZxYUhsMFpWV1BqV1E3R2FHalJiazhQR1VPd3huTU1GdEhnNk5iNzJt?= =?utf-8?B?bTJ0WXpkdCtlWCtDSTVBaVhma2JRcEpFQTFCa1lXZEc4TXREblRoako4b0c1?= =?utf-8?B?ZFd6MFBiamVSVmNrclpDZThhcHYvWDB0U05qblNaQWxueHplZ3p6M2tpOFBD?= =?utf-8?B?K0xVTi9XOVdBa2VIU29MSXpWd2U0SHEvWFkzQ2hKdlFsb3NrMUNTUGVJbEdm?= =?utf-8?B?eGN1VFhRR3FxdGN1QTYxZ3RmSVQ3Y0hKWGtJZWZMSDNlK2pKR0RpRjhVM24x?= =?utf-8?B?dVFPYWUrV0RVZitYVUtXcmlUQnhEalZXVzdHdnNFOElXYnhNamNmS0s5Szd5?= =?utf-8?B?dlFweEYvRnllNXhDUHZsWEJSS0gvYTVNZXZybHZzRlVpVEc3eGxoMVdLYXhD?= =?utf-8?B?M3YyUm1YRnNtaGFuc1dvemg5cndFL1J1ZHpmc29EemliRHgzMWsxN2UvRG1w?= =?utf-8?B?ZmprMmJXS2JlL2E4Zk53bXlpS3RqWS91a1Zzb0haU0VHTW4rWHlZVXFiejBE?= =?utf-8?B?SHJtZGo5Rk9IT1daNkErVDJzcWozOWVWSFBPUzNQbFlMN2NpWmJERFNqNlhY?= =?utf-8?B?bzlrUUs5bmdWQmVaQ3h6Q24yeWtCK3Y0RjlUUHJOc2xpdTlqdlFCN0UzMTNx?= =?utf-8?B?VlRROUF1TVRDWWZPVkJjQmNSdnlXZ1JFZGJ6Wk1IUFR0YzBobXhWUG5OL0Yy?= =?utf-8?B?Z3Q0UHE3RWpPbjljcUEwdUVuY1VUSkRCT2tPdGNUL293b0h2L1R4NXYwclVo?= =?utf-8?B?SmhuT0JPd2NNTkpTYmJKU0hGUHU0ODhzV05FamUyT2VKclExeUxhVDA0b0dk?= =?utf-8?B?SlBlMGJWVFlKV1owLzNEeVRINjRsRzJTR2hZcFpZb3h4VWJUSEhBcjNHbkxE?= =?utf-8?B?d1dMQzVFVkYrV3Nkek4zbUp6VEtKbk42Zjl5bjhWbkg4R1p5Tm90ZzNrN0l5?= =?utf-8?B?ODNRd2ZLUjFBZno0c1ZHSkxUcGcxZVJiQ1ZRVmwwNUZoalZmZDdudWltTEhO?= =?utf-8?B?U2pJUFZzd2FRRURzTnQyZmd5SkZDcU04MnJUdXFmRTdWU0ZQUGNsa1pnbHQw?= =?utf-8?B?b2VHdm1VM2wwbXE4azRGTWRMUlF0a0RwWldEUTJJR2xYb3oxZVJmWHAzVnRD?= =?utf-8?B?ZHduVmluVHRvOFdDeElCdTk2a2ZXcE5YRFRuekVLVFlzeXZvd0tWZ0lrQ3VP?= =?utf-8?B?bWVOaXkweUprVUd5aTN3YmtyTFV3OXZjZ3FVcVNLMjA2WHc0amJrc1ZXbE5E?= =?utf-8?B?a0lsYzdqMElpT3gxSHhLbm9MWVFsN0lINUo1bFlqdEIvOERPQ1EwTThDZVZ1?= =?utf-8?B?L0ZNT0ovL2JsdUJWOTI0dXlmZFdlUUhFSmJaNUQraS9jTkNOUzBvRndKOXdF?= =?utf-8?B?K2hyS1BQeGNiM2gwRndHRXFGdiszNWNQc2RxK3RkU0JkUzBPSWdEWXVyZXRi?= =?utf-8?B?cFMwTWtsRVdJYlFia0JtdnRJVDMrSitDM1ZWajZualZUR1JUZ3ZiVER6TEtM?= =?utf-8?Q?qYDAAwGlWp35g5oUd4ef78M4DZKuhM=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(7416014)(376014)(1800799024)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?RzFzenFkRDd0SVI0NkRwL3ZlVXczQ3BPR2FtVWFPeWd1Zjl5UVhsNGhaQUVv?= =?utf-8?B?N0RoaGhMSzIxODgxMUtnSWoxQUpDZjVCeEg3TW10QkVJeVZGZUxQVklZSWpX?= =?utf-8?B?aU1PUFd1YkZQS3NnNS9xTWh6VlZPdEo0RTE1aENlb25hQkNYVEI3dEFlU01J?= =?utf-8?B?SXdqcjdkcVF0T1FPY1dDSHJZUmRsS2J5TERuclpJZHovWmJnRGF4THhHZDRD?= =?utf-8?B?NjNTcFNmQTlUQ3RiK1J1anhpVXBVN3hnZkdoTDVja1hJWStpU0JMVUV5NEYv?= =?utf-8?B?bjI1MHhQNlkyRTRSZTVxUUhXUFNwOUZOeDZGRnU2S000WEFtaUl3ZzJJWERB?= =?utf-8?B?emR5WlhNZnhUeE9rVWJodHBmeWJFMCtYeWVIeWpNMmM1YUlabmV4bGtkWFNE?= =?utf-8?B?dkd1YmVFSmgzcWJyYUl0bWlHTnZTV3BIZTRFMlFwWjF3TlF3VWdDT0FHa2dI?= =?utf-8?B?b2pndlJsb2NJUXNrNlFYRThXU3pYZjNSNnl1YTM5S3p3RW9ISXhUdUdaRldx?= =?utf-8?B?cFZQL0JOcFNKaHhSQnUxQnZLRE5GM1UzdUN4MDBQRUJodmJlSi9qS1JVblFr?= =?utf-8?B?V2JZL2FTZkNPQldLV1BxeVhqWnpBWElIeGJ3RTIwM2tPRWN3c2JrOTBGMG9U?= =?utf-8?B?RlNpSDlHcjJBdWUyY1Z3aTV3TGppSTd4d092MHU2QUtXVEdpQkdySEhTdzhv?= =?utf-8?B?a1NUb1BHU1RYRW1pWE52akFrNmYrRzIxT2Z4LzNLeGUzaVBnSVc0TlhQSWp0?= =?utf-8?B?Tm5aSFNFL0NTTHpOaWduSE55RDVuK1JPek90YmppeWc5dXhwbWQ5MWQ5d3l1?= =?utf-8?B?RVBOcHA1U3FiRXZTbXBJUW82WEJDK3pEN2NCbXI3a0ZPdFdJSXQzMDBKYmlq?= =?utf-8?B?bllyY1hKb0htRXVRL1ZjUW00cTZ1ekpLQi9IeHcyZjE4aXhKblNuNmN0ZDRE?= =?utf-8?B?RFE0YlJ0K3V4RVpvOVZpdWFldS92QUsvSlFLaG41UHRGOXNsU2MvUFNuT2dK?= =?utf-8?B?ZCtKVGZOVjVzVzUwQk9rU1JZU1dTQTE4OVJ5WTFnUG5yRlRUaWdtdUlFZ3Fo?= =?utf-8?B?WmwzR3gyMFQ1eE5PSHlFdGFkK1ErWUticndzS0MrNkFvL0pnQjZzMDU4T01n?= =?utf-8?B?WllrVVVDTnkyZ0JWaFFQMDE4N0ZheU9aNmxrMm8xQ2tPZS91enNxSG5hQU5h?= =?utf-8?B?QmhMWmJoM0JVRW5YSC96OHZ3WW1sdm9CMi9ONEMxbE9uSFd2QVkyT0d6bEVS?= =?utf-8?B?SmN3RExPMUtqcVp2OEorUG5selh0K3ExMzFhblFiTWFjRERtZTRha0ZrSWZs?= =?utf-8?B?aXFsNUkrRlB3N0lkaEVic1Jsb0JzNXhTdVM0YVZ5d3dsd1dld3dhNjU0ODVF?= =?utf-8?B?YnJXMEowYlp4VnFHY2VZT3FadGdDbTZ3czBtdGhkc1gzdmlZK2NQYVZPY3oy?= =?utf-8?B?MVFSZnR0TVBOdnZRbkdSV1VZZHRUQzEvYVE2WXBqcmF3STVpZ2NmRjRGQ21l?= =?utf-8?B?bWxXc3JENTExSkROZHdqK1QvUk5IazhDWUdwT2Vab1lIUEo2aytabE45ZnJk?= =?utf-8?B?bFdIaEQ0Y1hQT2pISEtNNHUwN0YvRW5ITDFoUkdWeUlmNWJhelJsZFRDRHBF?= =?utf-8?B?cmVFMHdqbHY5VTJ5c0tmTHpwSkFNSTM5TS9HTnBobWk2azM0RWVKd2h4SkVw?= =?utf-8?B?NHJqWEg4VE4vaStTSzBwRWUxSHhPdlVrYy9ueVpWRXpVdDlia3ZjejhhbXJR?= =?utf-8?B?YmJpN3gwNmJZV2FQSWR3bkZBTStLR2hFU1hxNzZiOW5UUE93TkF1RGUzWmNL?= =?utf-8?B?QzJlZXF4d1hoU3IrbzZ2WTkyc0NLdXowU3ZFNHNLbzdUUnZtS3dXWkN4bFg1?= =?utf-8?B?dlJGaWlxWHlMWkRManRabGF6TEd6eU5UNnYveG9qSWJ4NDNyTEl5WkZHeXNC?= =?utf-8?B?OWpnSC9FZ1d5Yk5QVkhGcEg0Y3RBN2VXNzQwNnJ4ZHR0SWozaC9uMlBRbXd2?= =?utf-8?B?dlNyTW40SVhZSytoU2JyNVJQWGwrYUdjVWtvb3FLL3MwTjZlMUZGMU50NU9Y?= =?utf-8?B?bWVTNThWWllqbVFpUjgvM0NuL1IwVzlMUko5Tkh2YThiRmZqSUVqdnM0MTkz?= =?utf-8?B?VXBuUkdHdm5JWHJ2YmZTYTY2MEMvYnlldTZMRUpGSjhFMExJb3ZYUGZIUDRI?= =?utf-8?B?ckE9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: 26290032-cf90-476d-9744-08de10f33f02 X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:43:25.4957 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: Ez0JGtIHnhXuNLYkVJ0oMQyHCaGcfqbz/XRnWMgpDxTX270x/7O1AjHmFlKEsSXtBAbUOJFfec40+NhUeqHhcUg9/SpeTk4rRB6FfLFGMqo= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PPFF28037229 X-OriginatorOrg: intel.com In an upcoming change, the VF GGTT migration data will be handled as part of VF control state machine. Add the necessary helpers to allow the migration data transfer to/from the HW GGTT resource. Signed-off-by: Micha=C5=82 Winiarski --- drivers/gpu/drm/xe/xe_ggtt.c | 100 +++++++++++++++++++++ drivers/gpu/drm/xe/xe_ggtt.h | 3 + drivers/gpu/drm/xe/xe_ggtt_types.h | 2 + drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 44 +++++++++ drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h | 5 ++ 5 files changed, 154 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_ggtt.c b/drivers/gpu/drm/xe/xe_ggtt.c index 40680f0c49a17..99fe891c7939e 100644 --- a/drivers/gpu/drm/xe/xe_ggtt.c +++ b/drivers/gpu/drm/xe/xe_ggtt.c @@ -151,6 +151,14 @@ static void xe_ggtt_set_pte_and_flush(struct xe_ggtt *= ggtt, u64 addr, u64 pte) ggtt_update_access_counter(ggtt); } =20 +static u64 xe_ggtt_get_pte(struct xe_ggtt *ggtt, u64 addr) +{ + xe_tile_assert(ggtt->tile, !(addr & XE_PTE_MASK)); + xe_tile_assert(ggtt->tile, addr < ggtt->size); + + return readq(&ggtt->gsm[addr >> XE_PTE_SHIFT]); +} + static void xe_ggtt_clear(struct xe_ggtt *ggtt, u64 start, u64 size) { u16 pat_index =3D tile_to_xe(ggtt->tile)->pat.idx[XE_CACHE_WB]; @@ -233,16 +241,19 @@ void xe_ggtt_might_lock(struct xe_ggtt *ggtt) static const struct xe_ggtt_pt_ops xelp_pt_ops =3D { .pte_encode_flags =3D xelp_ggtt_pte_flags, .ggtt_set_pte =3D xe_ggtt_set_pte, + .ggtt_get_pte =3D xe_ggtt_get_pte, }; =20 static const struct xe_ggtt_pt_ops xelpg_pt_ops =3D { .pte_encode_flags =3D xelpg_ggtt_pte_flags, .ggtt_set_pte =3D xe_ggtt_set_pte, + .ggtt_get_pte =3D xe_ggtt_get_pte, }; =20 static const struct xe_ggtt_pt_ops xelpg_pt_wa_ops =3D { .pte_encode_flags =3D xelpg_ggtt_pte_flags, .ggtt_set_pte =3D xe_ggtt_set_pte_and_flush, + .ggtt_get_pte =3D xe_ggtt_get_pte, }; =20 static void __xe_ggtt_init_early(struct xe_ggtt *ggtt, u32 reserved) @@ -912,6 +923,22 @@ static void xe_ggtt_assign_locked(struct xe_ggtt *ggtt= , const struct drm_mm_node xe_ggtt_invalidate(ggtt); } =20 +/** + * xe_ggtt_pte_size() - Convert GGTT VMA size to page table entries size. + * @ggtt: the &xe_ggtt + * @size: GGTT VMA size in bytes + * + * Return: GGTT page table entries size in bytes. + */ +size_t xe_ggtt_pte_size(struct xe_ggtt *ggtt, size_t size) +{ + struct xe_device __maybe_unused *xe =3D tile_to_xe(ggtt->tile); + + xe_assert(xe, size % XE_PAGE_SIZE =3D=3D 0); + + return size / XE_PAGE_SIZE * sizeof(u64); +} + /** * xe_ggtt_assign - assign a GGTT region to the VF * @node: the &xe_ggtt_node to update @@ -927,6 +954,79 @@ void xe_ggtt_assign(const struct xe_ggtt_node *node, u= 16 vfid) xe_ggtt_assign_locked(node->ggtt, &node->base, vfid); mutex_unlock(&node->ggtt->lock); } + +/** + * xe_ggtt_node_save() - Save a &xe_ggtt_node to a buffer. + * @node: the &xe_ggtt_node to be saved + * @dst: destination buffer + * @size: destination buffer size in bytes + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_ggtt_node_save(struct xe_ggtt_node *node, void *dst, size_t size) +{ + struct xe_ggtt *ggtt; + u64 start, end; + u64 *buf =3D dst; + + if (!node) + return -ENOENT; + + guard(mutex)(&node->ggtt->lock); + + ggtt =3D node->ggtt; + start =3D node->base.start; + end =3D start + node->base.size - 1; + + if (xe_ggtt_pte_size(ggtt, node->base.size) > size) + return -EINVAL; + + while (start < end) { + *buf++ =3D ggtt->pt_ops->ggtt_get_pte(ggtt, start) & ~GGTT_PTE_VFID; + start +=3D XE_PAGE_SIZE; + } + + return 0; +} + +/** + * xe_ggtt_node_load() - Load a &xe_ggtt_node from a buffer. + * @node: the &xe_ggtt_node to be loaded + * @src: source buffer + * @size: source buffer size in bytes + * @vfid: VF identifier + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_ggtt_node_load(struct xe_ggtt_node *node, const void *src, size_t s= ize, u16 vfid) +{ + u64 vfid_pte =3D xe_encode_vfid_pte(vfid); + const u64 *buf =3D src; + struct xe_ggtt *ggtt; + u64 start, end; + + if (!node) + return -ENOENT; + + guard(mutex)(&node->ggtt->lock); + + ggtt =3D node->ggtt; + start =3D node->base.start; + end =3D start + size - 1; + + if (xe_ggtt_pte_size(ggtt, node->base.size) !=3D size) + return -EINVAL; + + while (start < end) { + ggtt->pt_ops->ggtt_set_pte(ggtt, start, (*buf & ~GGTT_PTE_VFID) | vfid_p= te); + start +=3D XE_PAGE_SIZE; + buf++; + } + xe_ggtt_invalidate(ggtt); + + return 0; +} + #endif =20 /** diff --git a/drivers/gpu/drm/xe/xe_ggtt.h b/drivers/gpu/drm/xe/xe_ggtt.h index 75fc7a1efea76..5f55f80fe3adc 100644 --- a/drivers/gpu/drm/xe/xe_ggtt.h +++ b/drivers/gpu/drm/xe/xe_ggtt.h @@ -42,7 +42,10 @@ int xe_ggtt_dump(struct xe_ggtt *ggtt, struct drm_printe= r *p); u64 xe_ggtt_print_holes(struct xe_ggtt *ggtt, u64 alignment, struct drm_pr= inter *p); =20 #ifdef CONFIG_PCI_IOV +size_t xe_ggtt_pte_size(struct xe_ggtt *ggtt, size_t size); void xe_ggtt_assign(const struct xe_ggtt_node *node, u16 vfid); +int xe_ggtt_node_save(struct xe_ggtt_node *node, void *dst, size_t size); +int xe_ggtt_node_load(struct xe_ggtt_node *node, const void *src, size_t s= ize, u16 vfid); #endif =20 #ifndef CONFIG_LOCKDEP diff --git a/drivers/gpu/drm/xe/xe_ggtt_types.h b/drivers/gpu/drm/xe/xe_ggt= t_types.h index c5e999d58ff2a..dacd796f81844 100644 --- a/drivers/gpu/drm/xe/xe_ggtt_types.h +++ b/drivers/gpu/drm/xe/xe_ggtt_types.h @@ -78,6 +78,8 @@ struct xe_ggtt_pt_ops { u64 (*pte_encode_flags)(struct xe_bo *bo, u16 pat_index); /** @ggtt_set_pte: Directly write into GGTT's PTE */ void (*ggtt_set_pte)(struct xe_ggtt *ggtt, u64 addr, u64 pte); + /** @ggtt_get_pte: Directly read from GGTT's PTE */ + u64 (*ggtt_get_pte)(struct xe_ggtt *ggtt, u64 addr); }; =20 #endif diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/x= e/xe_gt_sriov_pf_config.c index c0c0215c07036..c857879e28fe5 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c @@ -726,6 +726,50 @@ int xe_gt_sriov_pf_config_set_fair_ggtt(struct xe_gt *= gt, unsigned int vfid, return xe_gt_sriov_pf_config_bulk_set_ggtt(gt, vfid, num_vfs, fair); } =20 +/** + * xe_gt_sriov_pf_config_ggtt_save() - Save a VF provisioned GGTT data int= o a buffer. + * @gt: the &xe_gt + * @vfid: VF identifier (can't be 0) + * @buf: the GGTT data destination buffer + * @size: the size of the buffer + * + * This function can only be called on PF. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_gt_sriov_pf_config_ggtt_save(struct xe_gt *gt, unsigned int vfid, + void *buf, size_t size) +{ + xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); + xe_gt_assert(gt, vfid); + + guard(mutex)(xe_gt_sriov_pf_master_mutex(gt)); + + return xe_ggtt_node_save(pf_pick_vf_config(gt, vfid)->ggtt_region, buf, s= ize); +} + +/** + * xe_gt_sriov_pf_config_ggtt_restore() - Restore a VF provisioned GGTT da= ta from a buffer. + * @gt: the &xe_gt + * @vfid: VF identifier (can't be 0) + * @buf: the GGTT data source buffer + * @size: the size of the buffer + * + * This function can only be called on PF. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_gt_sriov_pf_config_ggtt_restore(struct xe_gt *gt, unsigned int vfid, + const void *buf, size_t size) +{ + xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); + xe_gt_assert(gt, vfid); + + guard(mutex)(xe_gt_sriov_pf_master_mutex(gt)); + + return xe_ggtt_node_load(pf_pick_vf_config(gt, vfid)->ggtt_region, buf, s= ize, vfid); +} + static u32 pf_get_min_spare_ctxs(struct xe_gt *gt) { /* XXX: preliminary */ diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h b/drivers/gpu/drm/x= e/xe_gt_sriov_pf_config.h index 513e6512a575b..6916b8f58ebf2 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h @@ -61,6 +61,11 @@ ssize_t xe_gt_sriov_pf_config_save(struct xe_gt *gt, uns= igned int vfid, void *bu int xe_gt_sriov_pf_config_restore(struct xe_gt *gt, unsigned int vfid, const void *buf, size_t size); =20 +int xe_gt_sriov_pf_config_ggtt_save(struct xe_gt *gt, unsigned int vfid, + void *buf, size_t size); +int xe_gt_sriov_pf_config_ggtt_restore(struct xe_gt *gt, unsigned int vfid, + const void *buf, size_t size); + bool xe_gt_sriov_pf_config_is_empty(struct xe_gt *gt, unsigned int vfid); =20 int xe_gt_sriov_pf_config_init(struct xe_gt *gt); --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.14]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id AEC462F7AA8; Tue, 21 Oct 2025 22:43:33 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=198.175.65.14 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086617; cv=fail; b=aNFP0STSUKQzZPrPeg+xsVFr6LMDcG3LofrXd+27cVYhV7OKthVwx2MZ+GBuywheaHpPBSrRNDmN7np/RgRqtqYC9zsj0mXdGFQeZJhxhwEgDz0lu78AFqjTPTJFproDxJBhH2v6fO8Wj0nispEMZmDMoD0Mdmu2cgKHFLpIjN4= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086617; c=relaxed/simple; bh=Tgbejy08OphQtC8W7zcbHBPINxjYHXBxlW6Jgh+9LeI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=t5ZOvGJVelucsE5Sy/oEH/+a1X1Da8Tl1+DONJ5haEEE3B7wnLYpSggvM8L0c64TCA8SxtJNxUiYpOdTvVb8MjI+d86ktPBv/BVTc92uf5/mhU1ak2A3/VT7jbnwcqBYjvm4BB15JyJv5wAx/2NK73whdDaknSutrjJN3qPQ8zo= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=Rz85gu2W; arc=fail smtp.client-ip=198.175.65.14 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="Rz85gu2W" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086616; x=1792622616; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=Tgbejy08OphQtC8W7zcbHBPINxjYHXBxlW6Jgh+9LeI=; b=Rz85gu2WrQP7tEk6NQh/j6WqLyx0Juh9B82LBlVVOvhlLGPRVG2CFnbY AA9Up9uv58JfopUd1AF9mRmszX/7evNyuT5H0WFN/dqRpaJT3Zlz5fihi V7FKVU3UYwA0nyvHq0THuQ8O+5Ii7Y0OnjEsZISsL716es7vCUO/J35xI RRTbNWO6kk6/5ujFQx/DvNoSC5Ueb0c9wmGAIGOlPC55D3DcVFQ0l+LLy kpcq2IdEDiX+OxJQVBtD0Z4XT5Owdg+sAoir+ocPJt7mRiBKr3VwxCeAq gOrxBHHIdnnThRcHGNltUTRTHGLgrCqHKfRZ/7O48RFuL2ppANVWPtjVK g==; X-CSE-ConnectionGUID: eLjmHMPDToqFTVoatxSmkw== X-CSE-MsgGUID: Nkt3lorWT+mb7obGz2a2vA== X-IronPort-AV: E=McAfee;i="6800,10657,11531"; a="67061040" X-IronPort-AV: E=Sophos;i="6.17,312,1747724400"; d="scan'208";a="67061040" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:33 -0700 X-CSE-ConnectionGUID: K5JQTEM/S6+VhZRthbYaQg== X-CSE-MsgGUID: sPaT4PEcQ9W5e5hHR5HtLA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="183410247" Received: from fmsmsx903.amr.corp.intel.com ([10.18.126.92]) by fmviesa007.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:32 -0700 Received: from FMSMSX903.amr.corp.intel.com (10.18.126.92) by fmsmsx903.amr.corp.intel.com (10.18.126.92) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:32 -0700 Received: from fmsedg901.ED.cps.intel.com (10.1.192.143) by FMSMSX903.amr.corp.intel.com (10.18.126.92) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:43:32 -0700 Received: from PH8PR06CU001.outbound.protection.outlook.com (40.107.209.56) by edgegateway.intel.com (192.55.55.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:32 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=ccbDY9Dt2H2+N7Zdl+7Xr5bs5cE8Xq1+69l3UPmAlgI3CbXYDMnmhNp22oSfy6RH1JUghFoFQWElxWbulmXyMbsNSx8uByL6WxvJRwPRozSsxaBCcjrSFoAkXmHbeqDtJ8ZUfEFRoH9IYXBD4AXW5aEnpa46sv0bBAJCCWmzGO7BdHbKjKcUOhzewOMxLFgVEWHD+CCVuIT8lXdX96dNaFdrgsDtFYwm4sVQfi5c85s+rrnr/JunsUHE1ZwRnfTcQhaN33qOXf9xERTg9zeUGLvV6qKyMohCuiy2zrwPDs5uJ/YlDP7XCvn+QqRRPJgaxe21KY0RYdSEd7mw8eHdvA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=6Qa5w5T8djEhnbwB5LFCx05Nhtl7hSkFyuR5+0S92bI=; b=F0iVw5c8RMKF2i7Ypk7LtpqiiP+9e6t7FoMV9g5u7jb+bQ2CVvwM76WO08fDeUJbgJyOTFfY7tObPxGq19yiRo0VPCWJRSBewgMsxofxXxkF15BQrd0zG8LhJbCEce7AYRQ3prVEZTTnwbVNlytJmCVE5mRmgrHDvo6MpNQcAGYO8FuUyb//gbJld3f5/nKVRLC+ts6I9mCrBnISF/z1vBv1rKO76mKsourw/WgOIPfi+nm3PCdOJrjvAKXh0pTzTxc0B2fhwRkEOAkiYTq1Yh9VDvPhmXml0ghNzl+0KXCTYs/1meoKVvyELHRrwwrISD4TtvogJrc+l2BYUnaMiA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by DM3PPFF28037229.namprd11.prod.outlook.com (2603:10b6:f:fc00::f5f) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9228.16; Tue, 21 Oct 2025 22:43:30 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:43:30 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 17/26] drm/xe/pf: Handle GGTT migration data as part of PF control Date: Wed, 22 Oct 2025 00:41:24 +0200 Message-ID: <20251021224133.577765-18-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VI1PR0102CA0092.eurprd01.prod.exchangelabs.com (2603:10a6:803:15::33) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|DM3PPFF28037229:EE_ X-MS-Office365-Filtering-Correlation-Id: da23adb0-a4ce-4133-f124-08de10f3419f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|7416014|376014|1800799024|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?OTNhUVpiWHlhQjU4QkZVTERWZUdwVGlYWis4aU9tSk5rckV2amRWb3pVTGs3?= =?utf-8?B?dTlKM3M3Z05uNCtxYTFJWVpkQWtwem45bS80VGpZcVRFb1RMTFdVd0xETy9n?= =?utf-8?B?SUd5RWRkNCtDY044aTlURi9nZS9oKzV3K1VENXhPSDV5OTY0cEhrNEsyS2FY?= =?utf-8?B?eThRZWJwakNoNktmWXc0ck8yaVJZS3EvSmpvdDVNdWt2eDN4YWlKWTlRd01X?= =?utf-8?B?TDJibHVTVFBPdjN0UDlUVk9BanR0VHFPNjdEdlZtK3Q1cm10MnV6MlBleS9q?= =?utf-8?B?b0lyVmJjdVRFWEJuVTJQZDRnUmtwcllHZTdxSUJDcXliUnRvZEluQVkrRE1R?= =?utf-8?B?bTN6OGhIMGFmL3ZLWS9wTzlWNG5KWmFyVGphdXMzcG95K3pQeEJJTTZnZFVO?= =?utf-8?B?VE9jdyt5TkwyN0JnYURLa0lGRWh5SFZFaktobkMwajdBWisxcUdKSzhhT2or?= =?utf-8?B?djBQY0FSN0hDTmhUUFBUaGRwNk5yVUdMK2wzTTN2ZDVWdmdQWmJkd1FsRnh6?= =?utf-8?B?U1dTU1lMQWdVTW9CMHpTSDZHWThWR29CTUo0NTlsSUxQV2ZJQSs3bDhMblds?= =?utf-8?B?TzlUQ0c3L2FmakRWNmRqWStrUk9KWVpZUTYzYUZtR2pkakNOUEUxZ05CaVBq?= =?utf-8?B?WUZoOHk0TWlrR1NsVWJuWDFnTEsvL0g1TGxuZ25pa3Rpb3dwL293NU5NOFA3?= =?utf-8?B?VkVCcFdwbEpFMitVQjZvVmxVOEI3Nk1BNkNQczFUK0htZ1dFQ2thSmx4dXZh?= =?utf-8?B?d2Rza0Ixd2pjU3hKM0JTRnIwL0hPUCtwMnFKT1duODdnTUlEUjEwSUZoZmJH?= =?utf-8?B?bFdQZGZkWHQrL2tHbFJmZmcyRjM2SEdvOEZ1RU9NWUxmRWpxVEhUWmlBbzJP?= =?utf-8?B?eFdnRnphWDBka2g4MHRWQk5wL2FPbzZtRjVWYmIvN0RZVVYwN0FSRUlLdExp?= =?utf-8?B?UUhmbXR2a2JJdWkwMWVOL3hWbDhKY0p6V0srUHJWc0dpV2ZBN0pTbzRrem9o?= =?utf-8?B?ckpEZEZvSFBhR3VqWjdpODJoTWtXTG1uTndjQjZ0WnYwTGZnN0lJZWJpbkV4?= =?utf-8?B?NjBUL0xBR1BkV3BxblpkZXJKTEZWcXRtNENXTlJUTkcwaktLMXJBektnT3R3?= =?utf-8?B?Zkw2SStFYXVxNFhYZzRLUDFoYkRnU0doUXFYUWsxaFVXZFIvb0VIY2owbCs1?= =?utf-8?B?RWN3aXNSbzRBTWc2YnlCeFJucWxwUmY2dSt1NFJtOUR6OGlINlptNlV2cXQr?= =?utf-8?B?NDd4ZkpaTU9tR1JDUDZHSkxacEpuQTkyOW5yK1lLRndrMEpxTWphQ0R3NHN6?= =?utf-8?B?ZXRyeVkyZ3RFWDE3dXRQZ2szSnZOWFVXbC9DUEwwTk93ditZUTlpSUVNb3hr?= =?utf-8?B?aEVkNWpqQ1Bod0pHR3VDK0p3bG9oZTZUNWw5bkhPQ3Z6TUp5K2IrbW40ZU1m?= =?utf-8?B?cjNkdHlLVHFlWU13N2NKeXdmUnU1Sk8xd1JqbXIwaGlFYmxTQ1Jlc2J2Y3RW?= =?utf-8?B?QlFScjhlcWU0T1JqN0JvSWFhZkN2YTZjUnJqSnEwM3pObjNxR2U0TFBmZHJa?= =?utf-8?B?eDUxSUJwZkJHNnNzZExGSXZxWW00bTFCbGF6WkJWLzdQV3REUkE5alc5WjBC?= =?utf-8?B?bXUyclJlaC9HZnpZRWZDVWFOeDZnLzdiNGtGc0FVOVV3OHNPYkFyYU5nNnkz?= =?utf-8?B?Z3YzQ2hWVmNaSFR2bkNqUzZBSk12eDE5WFUrNmYxcnplbkZqNmJyNDQzQ3A4?= =?utf-8?B?UXJBdjJrUjdkVmZDRUovdHoyVHRXYmhTN0RndmljZlR2WnhmU09zQVRhd2xD?= =?utf-8?B?MEVERUw3M21BV3hRQlpLaXR6TkhxU3dYT242Q1ZaUTVoZUZXODIza05CZ0xV?= =?utf-8?B?U2N3SkYzYzd3cDFkdFRkbW5rZiswaUtGUDFqbTlTY3p2MFZWZncrcmxHZExM?= =?utf-8?B?dkkxWDJNNHhpYnVPMXJIR0QxZTRlVFNFSVpqZWVxa0dkeHRrL254VVZoUDVX?= =?utf-8?Q?7niW9LUtWeMPB8VHI1XGUgkRa+lRnU=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(7416014)(376014)(1800799024)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?cUJDL2dtVGxtTFB1TFR6ZGZ6N0o1NCthMXVyMGJjb0pHb1lwL0hHOVVMbEsv?= =?utf-8?B?M3NMMzMxcEd1L1gyMHdRN1pnWkRmdEJKQmUyZmx1MG4xc3pmWDdnZkNUeEc4?= =?utf-8?B?Q3FGTkt1QmViS3RGQk93UEswSjFGRFMzd3NIcFM2MXVOTzFkMmhPemVRQ1cy?= =?utf-8?B?cVRLUEQ1WkNtdmZyUEtjcm90UFRlMHNRUi9NRjV5cVg2eENFK3U4SGFNWnFp?= =?utf-8?B?OHJ6alNFNzVXSngxMlAwdkNJS0NoRlNTeDg1TGtFbTFLRmU0T1JjdjE5Vnpu?= =?utf-8?B?Y2JTb3BweXdNbmhPUWp2QzU4NEc5TkhzYk54KzBWZUQ4Z3JObnlFdnJUUjFz?= =?utf-8?B?aWl1UDhnNjFGSGk5VnkrbTRlbjM0WnczRU1NeWc1aXJ6VHBBekJTL0ZQcFpa?= =?utf-8?B?TTdyWHgya1RZZ0NKVVJML2dUMUtqcE9mUFc1aGp2VkE0ZEJUNS9qVm9vbDRG?= =?utf-8?B?Skk2OXlqdnplT3BMbGRHclQyNGdlYXgzQVVSQStwUXptelpsY1gxY0k4c3Jr?= =?utf-8?B?WHYyKzBJS0Z6OUdVaXJBdU1KNEVHRU9tYy9mdk5qNEdob2JYSkdqMHNUeG5k?= =?utf-8?B?djhmOXlrMFZrZldVQy9rWEgvbHZCM0FPNDRMR3dSaElJWlRGNlVQN3pvbjNh?= =?utf-8?B?L2VzbXdWWHpXd2hFZVd2bzAwTzZKYk1sNmNUL2ZHTXk5M0sxME90Z21KeGhk?= =?utf-8?B?SEREVFpBVzBUMjZVM0w4YWx5TTE0eFZ0S0RXN1h6UmxDUTVRZStjUlVMRWY5?= =?utf-8?B?SFFYKzl4NzRtblVDRjZnZE15WW1YWm1aS0NzSk5VVjRMVzZ5VU10a3NTUFhT?= =?utf-8?B?RU8zQnBFUU54TlkxV0VkLzFuM290eXpNQ05YczlKRWFLQlFMZ2c4Ny9mVzJv?= =?utf-8?B?YlJtUklqQXBFbDZvTW56ZWh4WnNXb09IQnhIcGFJd1NCdkt4NTFpMWM0c3Jj?= =?utf-8?B?cTRhZWNNbkJuWFdvVjhENFR0eGpZZXJ6cks0OUhaWGYvSzBtdzNlL3dSZTJ5?= =?utf-8?B?Z2NjYTVFK1FKaGt6UzVWQVJIWmNpZ1RxT2Y4bnp2U1I4ZXUraFFGbVEyVlpO?= =?utf-8?B?RnMzK2JzU1BLSkU4dU92YWZXTFZzWS8ycy9SQlBzazdpUGFkaUVVaGFXbE1D?= =?utf-8?B?TU1hdGxyeGxMMStTeEVoRmtySm9WenNqMlVwd2ZuTUJsY29TbDhrbmtwOUtw?= =?utf-8?B?TnI5d3RDdWRYckpzTDNaRzJSQXhVOGNDMlo3QXd5aFhFd2w3SUNMckFpd0lJ?= =?utf-8?B?U0Y4R05KMklYTmt2TFM1amhxdS9RT1UxZGRteXE1dXBsSlRTak9OcjB4Lysz?= =?utf-8?B?SDNWZng0cEJvTTVhYVZhaXBscmdLcW5XMHNDaXlQTXg1ekN2WHgxbGdDZm5H?= =?utf-8?B?Q2swajRKcmNwTTdlY1dicDZFMW5HSzBwSWVBK0dvcXJDMjJPZ2YrenpwemRS?= =?utf-8?B?VXFEUDcvMGQweUg5SzZMZExjWXlYTGkzR0N3RFRzalZ4Wlg5cVFpdENSZTc1?= =?utf-8?B?ekVpcHJDMXM5Smkvak16b1pXSlROTjhJWURXYlM2QmlFYTlCanh4Wk5wQjNz?= =?utf-8?B?Rk0zM054a1ZTRnNxTG5HR2hRYzQ3Zkp4ZHc0QURqTlJuNzRtODRwNGZFalYw?= =?utf-8?B?bjNxNmxJckI4T2JZeU9DSnpoOFNGWXNtUytyUUVPTSs2SklobnBZQVVJRktC?= =?utf-8?B?a0RIRFBpM3diRGtxN3FMVm9rUjV3S0huMmxLdW5SRENZcnRlR1phYmhHRFln?= =?utf-8?B?dVFlWG1LckpKWHEvYkRpa3ArT21xcFNINzBERUxNRFg4SFI3OHhpTHppL1p3?= =?utf-8?B?VC95V0JJcGwzUEUrWjVOblUrbTFnUGhYalpTSWdFQ0F4bTRPbldFMzFCRE5q?= =?utf-8?B?eFVZMHNldzlZUzYyOE8zNWhWTWNnN1E1SDVZN3R3V3lyNlJmNElRQU11VUZB?= =?utf-8?B?WVZWc21aUmtlZ0dPYlE1YmsvT1pSNmlQYVB5M0pudzZ3UHJmSnpNMFR1aW5Z?= =?utf-8?B?Mkkxc3I4Q0tsTk5KM3N6WlZUcEg1eUlIaUJyNVlQcmNKOHhMeGtBRk1RS1I4?= =?utf-8?B?cGpKdDdXZVJvT1lLMm1janhML0M1MTRnaG8vdENCMUpIYUF4OXp3L1duNTFK?= =?utf-8?B?bVJ1c3MrNUNhNVlQeWFKT3pDalMrNVdKVWJvSVlKZllrSkJ0ZzdqalNTMTdN?= =?utf-8?B?SHc9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: da23adb0-a4ce-4133-f124-08de10f3419f X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:43:29.8969 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: QPlVhjTaCtQbj/qOA2Tv66DyDfLFxcMIo8i0bg9KOZMtutGxjZ1vtdCDQ3HPhm2ZBv1INl+BeTS3bHP/bW+c1LsoO0rmU4vSh66iWUAQPrI= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PPFF28037229 X-OriginatorOrg: intel.com Connect the helpers to allow save and restore of GGTT migration data in stop_copy / resume device state. Signed-off-by: Micha=C5=82 Winiarski --- drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 16 +++ .../gpu/drm/xe/xe_gt_sriov_pf_control_types.h | 2 + drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c | 118 ++++++++++++++++++ drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h | 4 + 4 files changed, 140 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c b/drivers/gpu/drm/= xe/xe_gt_sriov_pf_control.c index 18f6e3028d4f0..f5c215fb93c5a 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c @@ -189,6 +189,7 @@ static const char *control_bit_to_string(enum xe_gt_sri= ov_control_bits bit) CASE2STR(SAVE_PROCESS_DATA); CASE2STR(SAVE_WAIT_DATA); CASE2STR(SAVE_DATA_GUC); + CASE2STR(SAVE_DATA_GGTT); CASE2STR(SAVE_DATA_DONE); CASE2STR(SAVE_FAILED); CASE2STR(SAVED); @@ -827,6 +828,7 @@ static void pf_exit_vf_save_wip(struct xe_gt *gt, unsig= ned int vfid) pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_PROCESS_DATA); pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WAIT_DATA); pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_GUC); + pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_GGTT); pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_DONE); } } @@ -859,6 +861,17 @@ static int pf_handle_vf_save_data(struct xe_gt *gt, un= signed int vfid) ret =3D xe_gt_sriov_pf_migration_guc_save(gt, vfid); if (ret) return ret; + + pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_GGTT); + return -EAGAIN; + } + + if (pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_GGTT)) { + if (xe_gt_sriov_pf_migration_ggtt_size(gt, vfid) > 0) { + ret =3D xe_gt_sriov_pf_migration_ggtt_save(gt, vfid); + if (ret) + return ret; + } } =20 return 0; @@ -1065,6 +1078,9 @@ pf_handle_vf_restore_data(struct xe_gt *gt, unsigned = int vfid) xe_gt_assert(gt, data); =20 switch (data->type) { + case XE_SRIOV_MIGRATION_DATA_TYPE_GGTT: + ret =3D xe_gt_sriov_pf_migration_ggtt_restore(gt, vfid, data); + break; case XE_SRIOV_MIGRATION_DATA_TYPE_GUC: ret =3D xe_gt_sriov_pf_migration_guc_restore(gt, vfid, data); break; diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h b/drivers/gp= u/drm/xe/xe_gt_sriov_pf_control_types.h index 8b951ee8a24fe..1e8fa3f8f9be8 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h @@ -34,6 +34,7 @@ * @XE_GT_SRIOV_STATE_SAVE_PROCESS_DATA: indicates that VF migration data = is being produced. * @XE_GT_SRIOV_STATE_SAVE_WAIT_DATA: indicates that PF awaits for space i= n migration data ring. * @XE_GT_SRIOV_STATE_SAVE_DATA_GUC: indicates PF needs to save VF GuC mig= ration data. + * @XE_GT_SRIOV_STATE_SAVE_DATA_GGTT: indicates PF needs to save VF GGTT m= igration data. * @XE_GT_SRIOV_STATE_SAVE_DATA_DONE: indicates that all migration data wa= s produced by Xe. * @XE_GT_SRIOV_STATE_SAVE_FAILED: indicates that VF save operation has fa= iled. * @XE_GT_SRIOV_STATE_SAVED: indicates that VF data is saved. @@ -78,6 +79,7 @@ enum xe_gt_sriov_control_bits { XE_GT_SRIOV_STATE_SAVE_PROCESS_DATA, XE_GT_SRIOV_STATE_SAVE_WAIT_DATA, XE_GT_SRIOV_STATE_SAVE_DATA_GUC, + XE_GT_SRIOV_STATE_SAVE_DATA_GGTT, XE_GT_SRIOV_STATE_SAVE_DATA_DONE, XE_GT_SRIOV_STATE_SAVE_FAILED, XE_GT_SRIOV_STATE_SAVED, diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.c index 594178fbe36d0..75e965f75f6a7 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c @@ -7,6 +7,9 @@ =20 #include "abi/guc_actions_sriov_abi.h" #include "xe_bo.h" +#include "xe_ggtt.h" +#include "xe_gt.h" +#include "xe_gt_sriov_pf_config.h" #include "xe_gt_sriov_pf_control.h" #include "xe_gt_sriov_pf_helpers.h" #include "xe_gt_sriov_pf_migration.h" @@ -37,6 +40,114 @@ static void pf_dump_mig_data(struct xe_gt *gt, unsigned= int vfid, } } =20 +/** + * xe_gt_sriov_pf_migration_ggtt_size() - Get the size of VF GGTT migratio= n data. + * @gt: the &xe_gt + * @vfid: the VF identifier + * + * This function is for PF only. + * + * Return: size in bytes or a negative error code on failure. + */ +ssize_t xe_gt_sriov_pf_migration_ggtt_size(struct xe_gt *gt, unsigned int = vfid) +{ + if (!xe_gt_is_main_type(gt)) + return 0; + + return xe_ggtt_pte_size(gt->tile->mem.ggtt, xe_gt_sriov_pf_config_get_ggt= t(gt, vfid)); +} + +static int pf_save_vf_ggtt_mig_data(struct xe_gt *gt, unsigned int vfid) +{ + struct xe_sriov_migration_data *data; + size_t size; + int ret; + + size =3D xe_gt_sriov_pf_migration_ggtt_size(gt, vfid); + if (size =3D=3D 0) + return 0; + + data =3D xe_sriov_migration_data_alloc(gt_to_xe(gt)); + if (!data) + return -ENOMEM; + + ret =3D xe_sriov_migration_data_init(data, gt->tile->id, gt->info.id, + XE_SRIOV_MIGRATION_DATA_TYPE_GGTT, 0, size); + if (ret) + goto fail; + + ret =3D xe_gt_sriov_pf_config_ggtt_save(gt, vfid, data->vaddr, size); + if (ret) + goto fail; + + pf_dump_mig_data(gt, vfid, data); + + ret =3D xe_gt_sriov_pf_migration_save_produce(gt, vfid, data); + if (ret) + goto fail; + + return 0; + +fail: + xe_sriov_migration_data_free(data); + xe_gt_sriov_err(gt, "Failed to save VF%u GGTT data (%pe)\n", vfid, ERR_PT= R(ret)); + return ret; +} + +static int pf_restore_vf_ggtt_mig_data(struct xe_gt *gt, unsigned int vfid, + struct xe_sriov_migration_data *data) +{ + int ret; + + pf_dump_mig_data(gt, vfid, data); + + ret =3D xe_gt_sriov_pf_config_ggtt_restore(gt, vfid, data->vaddr, data->s= ize); + if (ret) { + xe_gt_sriov_err(gt, "Failed to restore VF%u GGTT data (%pe)\n", + vfid, ERR_PTR(ret)); + return ret; + } + + return 0; +} + +/** + * xe_gt_sriov_pf_migration_ggtt_save() - Save VF GGTT migration data. + * @gt: the &xe_gt + * @vfid: the VF identifier (can't be 0) + * + * This function is for PF only. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_gt_sriov_pf_migration_ggtt_save(struct xe_gt *gt, unsigned int vfid) +{ + xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); + xe_gt_assert(gt, vfid !=3D PFID); + xe_gt_assert(gt, vfid <=3D xe_sriov_pf_get_totalvfs(gt_to_xe(gt))); + + return pf_save_vf_ggtt_mig_data(gt, vfid); +} + +/** + * xe_gt_sriov_pf_migration_ggtt_restore() - Restore VF GGTT migration dat= a. + * @gt: the &xe_gt + * @vfid: the VF identifier (can't be 0) + * + * This function is for PF only. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_gt_sriov_pf_migration_ggtt_restore(struct xe_gt *gt, unsigned int v= fid, + struct xe_sriov_migration_data *data) +{ + xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); + xe_gt_assert(gt, vfid !=3D PFID); + xe_gt_assert(gt, vfid <=3D xe_sriov_pf_get_totalvfs(gt_to_xe(gt))); + + return pf_restore_vf_ggtt_mig_data(gt, vfid, data); +} + /* Return: number of dwords saved/restored/required or a negative error co= de on failure */ static int guc_action_vf_save_restore(struct xe_guc *guc, u32 vfid, u32 op= code, u64 addr, u32 ndwords) @@ -290,6 +401,13 @@ ssize_t xe_gt_sriov_pf_migration_size(struct xe_gt *gt= , unsigned int vfid) size +=3D sizeof(struct xe_sriov_pf_migration_hdr); total +=3D size; =20 + size =3D xe_gt_sriov_pf_migration_ggtt_size(gt, vfid); + if (size < 0) + return size; + else if (size > 0) + size +=3D sizeof(struct xe_sriov_pf_migration_hdr); + total +=3D size; + return total; } =20 diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.h index b3c18e369df79..09abdd9e82e10 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h @@ -19,6 +19,10 @@ ssize_t xe_gt_sriov_pf_migration_guc_size(struct xe_gt *= gt, unsigned int vfid); int xe_gt_sriov_pf_migration_guc_save(struct xe_gt *gt, unsigned int vfid); int xe_gt_sriov_pf_migration_guc_restore(struct xe_gt *gt, unsigned int vf= id, struct xe_sriov_migration_data *data); +ssize_t xe_gt_sriov_pf_migration_ggtt_size(struct xe_gt *gt, unsigned int = vfid); +int xe_gt_sriov_pf_migration_ggtt_save(struct xe_gt *gt, unsigned int vfid= ); +int xe_gt_sriov_pf_migration_ggtt_restore(struct xe_gt *gt, unsigned int v= fid, + struct xe_sriov_migration_data *data); =20 ssize_t xe_gt_sriov_pf_migration_size(struct xe_gt *gt, unsigned int vfid); =20 --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B9DF72F83C2; Tue, 21 Oct 2025 22:43:37 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=192.198.163.8 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086619; cv=fail; b=fHtCKY0MoHWoI4zCUhqDkxXRcmLIKoiKW7Y04tHm5QVzbKH6MWWfGTCYvVxgbSC/7+FZzNjH0J/jj8RTjQgFrIjCYJtK08JT98l+uUVX6vQvLDFqBfEvN4Y4aP2bMy3vVxcJ7AparfokvA3NMapz1/tIgt7+pfvmHJENxm99QbU= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086619; c=relaxed/simple; bh=26mwwelTWd8lJtfys+Vzcu4o4OpVPbHEnBl7KcRtV6A=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=DtM3EeJnJvMl5uXwkgsGd7s3mKXS4SwlHcobTCHGdKmjLoZ2B7+RI7LNGEnxWJG5gQ2ifoyg8KcN1XK2E6FrqBcX6PreqHRcahWBkomkIr7dB63A6hKnZOIh9SKKL2Yyz+uGHdji2Buxr52LsxXSJozS+TXfrenh9y618iRzkH0= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=QNtMCbSu; arc=fail smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="QNtMCbSu" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086618; x=1792622618; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=26mwwelTWd8lJtfys+Vzcu4o4OpVPbHEnBl7KcRtV6A=; b=QNtMCbSuQTPZoTsBoJZDLlxIGx4TDhSBtmnlcOBPWPXpV/qX0tUpH9QP 0I1MNKTZHSiowlYVJcZeEVM8H6XqYofLG2DIwGy2AH23Gx1z6dSAGAtpr EEjKzp3tll71KuhkOhoJdirH3VXEjAZfQURVtzn+KOQ2BRtBDg4QnvAQK RoF0sGHRqrprqtjtG+GFb8TR/OBRw+p7iTbqY8r162hTG2wvGbyiFB836 cKheCyFsgtSogttAHXweJUKhR2L42avs5BNWwYa3Y/XCCXeswQ6+mEU5N Y0rQnQ7fFyTQPfrTliW8IyNpoNXrea7f/5rcSXZ2y7RzHiIvodJMTy9e/ Q==; X-CSE-ConnectionGUID: YJ2pvbKrR+C2xVlfJiRCyg== X-CSE-MsgGUID: GDu/TyuVTaGrSixY9/SCKA== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="80848917" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="80848917" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:37 -0700 X-CSE-ConnectionGUID: gX+aJlB3SL2jbyidmrarcw== X-CSE-MsgGUID: NjjFMegxTbqEbK7j5EuJeA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="183644520" Received: from orsmsx901.amr.corp.intel.com ([10.22.229.23]) by fmviesa006.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:37 -0700 Received: from ORSMSX901.amr.corp.intel.com (10.22.229.23) by ORSMSX901.amr.corp.intel.com (10.22.229.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:36 -0700 Received: from ORSEDG903.ED.cps.intel.com (10.7.248.13) by ORSMSX901.amr.corp.intel.com (10.22.229.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:43:36 -0700 Received: from DM5PR21CU001.outbound.protection.outlook.com (52.101.62.23) by edgegateway.intel.com (134.134.137.113) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:36 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=VMeQ43poejNf6yO1TwpI9hWnt6a5J+wr4IGOT/aNA+4Go6pQLgoDk7d1Poa2hLA0UpM6bxAKfrAZIb5leWmv+G/UNsZ0yvGH5Xg42LiyLIMWX7Fbkik38omf1vEDTRBqFT0I6nMocZUDsiO4EFITUh26XDeTaSCL/SZKSQvKzY2p2glY3rffJ2xxzCe3LsAkE23aPhhuklrk+fOnwVxW5K9dqVXrHHiMWl4AJ0uFovxDC0Sh6xX1v1clBocB/kyw5HrObdAYclEmXkNtpl9qaE7ll6bX5WI1IOMZBW9plG1+4Hiu5Ej2WgbR3Xjm7W81o/7BnH0+fmWlkECMaW22iw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=CKulIOM5Mq741cNhxOe0HK9ZUN5oG4HzHTaRspecg3c=; b=ZMibHXyYketfFMgXu4nY11nblNvMUqdkmUeZpY8uuzJKRReMRXZnba7A7DmpTN6FowCyADwDLKx0e2fp+TdoVxdbFx2rRK8j8mbGitcdDg7aPOCceeQsHi3E4hom2w284SKLaigMqwlQ143W/RiBzMgtq59PvO9sWegXI/oxTSZ4OtiUdcgoO36jIMghyRWg3VjTf5LvrhGJgYMQ3Dzx8N83kx8YZGdEWUPPP6/dCx3hEdX8r8vJODrOcp35Iy3lvQ+pAph7e6s2IRK/StgZhx/nKYuPiKHt1lifUcH2jH79AZYcHI4ZpQZ2Ag1FvgwNjiXXv7y29wL6voi0WHoLrQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by DM3PPFF28037229.namprd11.prod.outlook.com (2603:10b6:f:fc00::f5f) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9228.16; Tue, 21 Oct 2025 22:43:34 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:43:34 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 18/26] drm/xe/pf: Add helpers for VF MMIO migration data handling Date: Wed, 22 Oct 2025 00:41:25 +0200 Message-ID: <20251021224133.577765-19-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VI1P190CA0017.EURP190.PROD.OUTLOOK.COM (2603:10a6:802:2b::30) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|DM3PPFF28037229:EE_ X-MS-Office365-Filtering-Correlation-Id: d171fd66-a40a-4342-a45e-08de10f34463 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|7416014|376014|1800799024|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?MWVnUmVGSHpmYUFDbUJjZjA2WVZiNXNOWlFWRnNZbzdWUmlxdU9FcmJIWnJT?= =?utf-8?B?Z2RtNzNML2ptdVlCc2p4aWg5L01ETGV3YWQwcjg4Sjk3NlZYUTBUZnVEWkpr?= =?utf-8?B?ZmtpTmtqS2VjaThHZitMcFNNdTBUck5aMEdiT1RGWjRxdXhramdGQVE1MW10?= =?utf-8?B?UlBtcnE1Y1YwYTU1OEpwMnNTbk96TDh2cUFsUWZ4VDhydmRseDJZNmU5czhm?= =?utf-8?B?N01kKzM2STF1L0dvWjNjcUVKSDBsZURpMk1xRTRnY09Ta1h1NmJWRlZ3cllz?= =?utf-8?B?RUVJeEZxQ2xqL1pWNnhYTWZ3ODFSS0lycnpkSHowT21pdVJaOGk0L3ZGOHlR?= =?utf-8?B?U0Z1OFYySzJPVHZsOTcyRUtxdkFPcUZWZzhqK3MvVlFxb0owQlVobDcrMDIr?= =?utf-8?B?SlZwd0Z6R2wrNWdoeVlaeEIzUGhvYy9tODc3S2J0ZU1QcnUyN1NPQy84eWJM?= =?utf-8?B?MlVlcjhYU0hUM2xHSldGdENzQVhESHllYkdCTFdUN0l4am1HQ28zalhkN29F?= =?utf-8?B?UkFKMGNKL0lIVHR2OTdhTTFmUGIrZUlWTEJuaG5LSHR0Q1pzYUlxNjE1N09s?= =?utf-8?B?eVNBNmVBSjNTMVNibldjTjBoT20rR1lGejFQVjZacUlaL0twY0xGeWc3eHpq?= =?utf-8?B?RGZDRkh2WVBoWHF1RHJCYTZFSXZjdUJJWXdoM1RNanNBTG1XcjdTU3FDUkV6?= =?utf-8?B?UzhnV2RHTDFiWG5BNFkzVi9iM3hiME5Ec2VKcVJ1eXpWTHVsNnNNK1p4ejlP?= =?utf-8?B?TC9QV0dmVEZ4SWlTQWY5Q3IyZ1NHUkFNU0JNVDlHR2I3d2x2QWFQK1BlUVNz?= =?utf-8?B?VVhlZVMvOVFXRk45N1FxWWtYcEorRmsrM1lnMlg3RHhJdnJuV0tzMDlSZENI?= =?utf-8?B?bHBYQXA0MW1zQmhQRkRsODJpdGRRWm5YVU5PTUZiSnQ1cCtSRXNhUisrQnQx?= =?utf-8?B?c0hoN2J4MDVqN1gyUDlnQVI0eFlhVlFydjB2M3hkYVJPS2cwNWFBN2RQdDBD?= =?utf-8?B?RWhKbEFBVTBLNFBTc2p1MWdPMjlEdzFQQjVyamJXaC9mYVJOdktZYjJvSzM2?= =?utf-8?B?bnp0MUVvZ1NKVFF4cytGMTQ2QVdBSkl0NFJ6OTFEUXp1VTl4Y1VmdFlYOEYx?= =?utf-8?B?VUo3bldsd2dXZXlOTmh4NndVTWpKNEVuRUk4VjJ1UG56ZnJaWHlhWHJaVzVt?= =?utf-8?B?aEU1NlFjaG1GdTM5aXhyODVIUUdVMUhxOW1BRmhra1ZSbTZ5ZTVYU00xQStD?= =?utf-8?B?ZUJERlpVUzdaOWlhQ2taRTJFeE1weURVVEV3WEpTUUw2SmFKcjdDeWhHd29O?= =?utf-8?B?WXVQdGZ2UWlZamYweG5VRXMrZUIzMjduR0p2cVFMMG8zYXgxV2w2ZjlXL21P?= =?utf-8?B?MGVGVms3Y1k1ZmgrQjQ4L2lPdGZaSkxBbEppL2xRK1p3ay9rUlF6N2lJVmdu?= =?utf-8?B?YVlVMVNWV3N2T0NOQTRBMmRUb29kVG9oMVl5ZkNKL2ZlTElrcnRRUzdsZStW?= =?utf-8?B?bGtHRDFRdi9BajJZMzZJM3lnZWVZT0pTaHZncjFvVDRkbGVkSEFaNm9GUDB3?= =?utf-8?B?djZnL3RzSXB3RXBHcVFXL3BWalMvbUlkUGVvN2ZSRmtWSzF1d1RtZ0paaXdY?= =?utf-8?B?YXBQV1RRUGtuWlJLVGZOMTZKQ3krdUEvVmVmcUd4MkpCUStERVhyclRQN3Bl?= =?utf-8?B?WlFhS2NLOUVBeFpyaGo4NTgxVUlGZWQ5QVBRZkg2YldBQlpHc0xzWVBsQ1ps?= =?utf-8?B?VzZIcElYNy9DNjZyVGhITEZQY3FUVEtnNXEzTWV4RDE5MU1RZjN1Q1hyT0VC?= =?utf-8?B?NXNGczVKb3RjdWl1eFZld2tSZ1lYSjhlRDRQbktJYmhRdEdxNHptcnI5cy9X?= =?utf-8?B?MUJoWXkvUURkSFBORTd6M0pyUlpGSTBoVnR0QWh4dFJFTlJ2UVZwb3R4LzNk?= =?utf-8?B?eUc2ZUQ3VCtQekFMKysxdU94dVJBdm8xeGc5MUswdk9HcTIvckFaMDlVQmg2?= =?utf-8?Q?PaKmekXaS0xb2rAqu/dxtXWYsgoHIQ=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(7416014)(376014)(1800799024)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?bUJML2lGSlRBVU42MTJCT0NaWnF5di9ZYm1sUkZscTU1cXRBNDdFWCtieHho?= =?utf-8?B?OUM3czUwMmttcDNFYkVCR0dpU2VHMVlrdnNndEtZZW9Nbk1Ia1VqWi9NYmh4?= =?utf-8?B?RGFxM3RQRnJZeDlYRDdVY0JYTm9JK2tmTmpUWHdZVzlHL1cyYVU3UVV3M2V3?= =?utf-8?B?bmd0YVh5Ung4T3VQVVdwVnFJS25JU1lYbXVxTTZWNjl3ZGVHU3AzZVNVSmFO?= =?utf-8?B?em9uNEI4RWJreFd5eHBzWHQxNXo5bVNIRStMY1BIQnFwblZMWWt6ZXk2aHlF?= =?utf-8?B?L1JRMk5nbk90RmV5OEMrYlFWc0JGekFBV01OeUJ1V2JUVm41MVk0eWE0ekti?= =?utf-8?B?Z09RRFNlL1g1NHVBQUFabHo2aEkvUXVkdDM1NldHQVJHN3NERFRoekpDckdH?= =?utf-8?B?aktnLzBKUTkzUmFYY0pPN0V6NFpJcTAwVzJYU1ZzRkk4Y0w2U3FsUThBVDhp?= =?utf-8?B?dE5QUFU2bWtkMVFaN24ydkw3Y01QOW9WdkJ2YVJjb1Bad0YrYmRqNDJ2WVlr?= =?utf-8?B?NlIyUmZpeEd3MEE1djhCcW1MOE52eEIrTVFtazhBcUJQU0llU2NsRFFoOWNS?= =?utf-8?B?eThIYVRHWDNLdklpN3lxZzJQOHhUSVAyR0FUN1ZFbXhRWElXVXpQa1I5Q1p0?= =?utf-8?B?STB4VDZycUVPcGlMbWRpdFh5c09lVkNYbjBVRjY1aG54MENvMFlLZURDQkFn?= =?utf-8?B?ZmZTVm5vU1hsVk45MFVMcWpPLzh5Wjl6QThzeUc0aWlrNS9wUEJCdlBrQUZo?= =?utf-8?B?QkdzK3k3OThtSWVBVjRXNzFONTlOTzFkZ1BpRFNYY09uNFdlcW0xR2NGc3Vo?= =?utf-8?B?bnRvRGNUM2dhaytLUTFrT2JrZWYwSW5WNjNGSHliaklTbXpMVDdLS3F2SGhD?= =?utf-8?B?VWpFT1Z4UElSNE5rZGpIeFBraitkWVBaTm9EMGYzbkhXaU9oZ3lIdWg5NmJI?= =?utf-8?B?OHNqL2pzNmpDTXhFY3BlVUh3RzBITGNSemR0WXJWVmd1OUpwRWFoaGlHZmxL?= =?utf-8?B?Qk1YSjc5UmlLd2JrdTkxN25TZXBZeDA0SnVHdCtySWpyMTJyOHhyaEU5amJB?= =?utf-8?B?b2YwREFpWUUzc3k4TEJHNm5LdUFTRkR4WlhKaXZBK0g1SVVCNGN0QWVSS2sr?= =?utf-8?B?TkJOYXc0WFlSNkZQdWVtd1dMUzdPTzF5NjBBWXlxYXhpaVJJS09ETnN0Q3R1?= =?utf-8?B?RkJaaW5NSm02dHNIWXlTQ051RERZUDZZcUxHcDh5emZqV1hDWCtGRWYzTTZx?= =?utf-8?B?ZDZodWJYcHFPbHFSSm5tY1VRRENNMHFoakJmV3hhVVZOWlovc3VzZjdRTHU0?= =?utf-8?B?UHU0SzVtUDUyODU4aEg5akhULzkyM3NXV1pyc0wzS25kWXJFZGxLK0E5YjhV?= =?utf-8?B?a2pvNXl0V25TbU16WDVWM0Y0Rkd3b3NzdUpPQlBua1I3SjZxc29DT2hWN0U3?= =?utf-8?B?eUp6Uk40bVIraTN4QlN5bWNQU2RxcVlMVkVtM0YvenpkM0E1K0JzaWgvM0sr?= =?utf-8?B?V3FZN1doVSs0R0JLLzc0N1kxNkl0MDJNaUllVk9rQmcxaU4wYnVyalJYZzRG?= =?utf-8?B?N3l6UjJMM3hWYzlIemlVVTZSck40WmMrTGxEYnFJQjQ0dlVNYng3S3BZOUc1?= =?utf-8?B?OEFrZW9nNm5SRk80MWNUc2E4R2FDb1VyYVBPZHhOY29GMFpZUGNHRHpUcjNF?= =?utf-8?B?aUYzMUFGa0pKem44VkZ6cUh2RzBrOXhvSW9tRnFlVkovb2pPVy9RL3RGMDha?= =?utf-8?B?Wkl6d2oxRFBRcGpKdEN5bzdGUjNacS9nc0Vod1d2dDA3YURsWGRyclBCYmxu?= =?utf-8?B?dTFaNFhnNktIbk9qRlZ0ckNBKzZaMWtSTlZPVjI4eHY2Y2tIRDhWZjA4cEcx?= =?utf-8?B?Q0tkdjh5YVRvbU5WZHlRVVV1VCtHc3NxYWFMWERBa25FR0J6WEVkSGkzQWEx?= =?utf-8?B?Z3ByU0N4YUcvcy9ORXQ4SkRFTTZVMW1YYVJUUnhBUzR3bXQ1WVA1aUlRblp5?= =?utf-8?B?QzZOMUZNWXVXNTcxNlRSMkhpZ1hLL1ZuVkxma2p4ekNUTGlVRHFGK1FySG4x?= =?utf-8?B?bFRmSzVzS01YYkh0K20ybzhXcHptd0FRUWUvc0gwTnFMYW9DOGxKRThiR0Fj?= =?utf-8?B?eDJFc0REa2Y1WXZsYXkzV01VaTdWcTVRMW9FVUNBcXdYRHcyaTg5aWsrUHNK?= =?utf-8?B?N0E9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: d171fd66-a40a-4342-a45e-08de10f34463 X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:43:34.4983 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: t6A376BofeU1EidEGjUJoXiFQ4jXB4PhMRcrvz6FX7y2467T2wfGekE3GxeT1/Hes/+RnIJx5jELq7px4hVyyeFlBocvSGOaDobKLiCClxI= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PPFF28037229 X-OriginatorOrg: intel.com In an upcoming change, the VF MMIO migration data will be handled as part of VF control state machine. Add the necessary helpers to allow the migration data transfer to/from the VF MMIO registers. Signed-off-by: Micha=C5=82 Winiarski --- drivers/gpu/drm/xe/xe_gt_sriov_pf.c | 88 +++++++++++++++++++++++++++++ drivers/gpu/drm/xe/xe_gt_sriov_pf.h | 6 ++ 2 files changed, 94 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf.c b/drivers/gpu/drm/xe/xe_gt= _sriov_pf.c index c4dda87b47cc8..31ee86166dfd0 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf.c @@ -194,6 +194,94 @@ static void pf_clear_vf_scratch_regs(struct xe_gt *gt,= unsigned int vfid) } } =20 +/** + * xe_gt_sriov_pf_mmio_vf_size - Get the size of VF MMIO register data. + * @gt: the &xe_gt + * @vfid: VF identifier + * + * Return: size in bytes. + */ +size_t xe_gt_sriov_pf_mmio_vf_size(struct xe_gt *gt, unsigned int vfid) +{ + if (xe_gt_is_media_type(gt)) + return MED_VF_SW_FLAG_COUNT * sizeof(u32); + else + return VF_SW_FLAG_COUNT * sizeof(u32); +} + +/** + * xe_gt_sriov_pf_mmio_vf_save - Save VF MMIO register values to a buffer. + * @gt: the &xe_gt + * @vfid: VF identifier + * @buf: destination buffer + * @size: destination buffer size in bytes + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_gt_sriov_pf_mmio_vf_save(struct xe_gt *gt, unsigned int vfid, void = *buf, size_t size) +{ + u32 stride =3D pf_get_vf_regs_stride(gt_to_xe(gt)); + struct xe_reg scratch; + u32 *regs =3D buf; + int n, count; + + if (size !=3D xe_gt_sriov_pf_mmio_vf_size(gt, vfid)) + return -EINVAL; + + if (xe_gt_is_media_type(gt)) { + count =3D MED_VF_SW_FLAG_COUNT; + for (n =3D 0; n < count; n++) { + scratch =3D xe_reg_vf_to_pf(MED_VF_SW_FLAG(n), vfid, stride); + regs[n] =3D xe_mmio_read32(>->mmio, scratch); + } + } else { + count =3D VF_SW_FLAG_COUNT; + for (n =3D 0; n < count; n++) { + scratch =3D xe_reg_vf_to_pf(VF_SW_FLAG(n), vfid, stride); + regs[n] =3D xe_mmio_read32(>->mmio, scratch); + } + } + + return 0; +} + +/** + * xe_gt_sriov_pf_mmio_vf_restore - Restore VF MMIO register values from a= buffer. + * @gt: the &xe_gt + * @vfid: VF identifier + * @buf: source buffer + * @size: source buffer size in bytes + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_gt_sriov_pf_mmio_vf_restore(struct xe_gt *gt, unsigned int vfid, + const void *buf, size_t size) +{ + u32 stride =3D pf_get_vf_regs_stride(gt_to_xe(gt)); + const u32 *regs =3D buf; + struct xe_reg scratch; + int n, count; + + if (size !=3D xe_gt_sriov_pf_mmio_vf_size(gt, vfid)) + return -EINVAL; + + if (xe_gt_is_media_type(gt)) { + count =3D MED_VF_SW_FLAG_COUNT; + for (n =3D 0; n < count; n++) { + scratch =3D xe_reg_vf_to_pf(MED_VF_SW_FLAG(n), vfid, stride); + xe_mmio_write32(>->mmio, scratch, regs[n]); + } + } else { + count =3D VF_SW_FLAG_COUNT; + for (n =3D 0; n < count; n++) { + scratch =3D xe_reg_vf_to_pf(VF_SW_FLAG(n), vfid, stride); + xe_mmio_write32(>->mmio, scratch, regs[n]); + } + } + + return 0; +} + /** * xe_gt_sriov_pf_sanitize_hw() - Reset hardware state related to a VF. * @gt: the &xe_gt diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf.h b/drivers/gpu/drm/xe/xe_gt= _sriov_pf.h index e7fde3f9937af..7f4f1fda5f77a 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf.h @@ -6,6 +6,8 @@ #ifndef _XE_GT_SRIOV_PF_H_ #define _XE_GT_SRIOV_PF_H_ =20 +#include + struct xe_gt; =20 #ifdef CONFIG_PCI_IOV @@ -16,6 +18,10 @@ void xe_gt_sriov_pf_init_hw(struct xe_gt *gt); void xe_gt_sriov_pf_sanitize_hw(struct xe_gt *gt, unsigned int vfid); void xe_gt_sriov_pf_stop_prepare(struct xe_gt *gt); void xe_gt_sriov_pf_restart(struct xe_gt *gt); +size_t xe_gt_sriov_pf_mmio_vf_size(struct xe_gt *gt, unsigned int vfid); +int xe_gt_sriov_pf_mmio_vf_save(struct xe_gt *gt, unsigned int vfid, void = *buf, size_t size); +int xe_gt_sriov_pf_mmio_vf_restore(struct xe_gt *gt, unsigned int vfid, + const void *buf, size_t size); #else static inline int xe_gt_sriov_pf_init_early(struct xe_gt *gt) { --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.8]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 10C8C2C21D4; Tue, 21 Oct 2025 22:43:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=192.198.163.8 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086630; cv=fail; b=XFzfO9z806Om8Hl7XS4RWLGeWEdXnO0HLdzNFvviNOGO60q7jsXW28JFsbyQuIxQFQobj1PeJ1RSN2jF9fhJkd2qGeFHFVIF0Ta1aFpzzmBceXSzzmaysbULG5ap/418+68g2qkqj0Cp3fkmc3zWIuVngqhfyfiDu887pvnJJZg= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086630; c=relaxed/simple; bh=rqKP7QtDryNlUPDiCynvJey3X0GbPllFVCFgkZvUjzE=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=KLtEk27Qbx+kvGLDrnPX/GN12lEJiSCg6J6TyhIu2Qed8lULVqOxLOFphLAVpzOaE8EoU+Kl3trIrsA4RrKIMQy1bJDVIcddppfJgtXQt8jrJG7cvORGbLvTBMZr4QXoDAsOmUS7DL35pwebpC/OP15z20cZC9tmtHH8lkzy008= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=dn8CBlLf; arc=fail smtp.client-ip=192.198.163.8 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="dn8CBlLf" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086627; x=1792622627; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=rqKP7QtDryNlUPDiCynvJey3X0GbPllFVCFgkZvUjzE=; b=dn8CBlLfce/DYNeD8PoMafe9rTPm422CgO/UoDImPj/Z3zEuqOb3k9mu UsLwRSip5tou7beEKP09aX5WomZD8aO3mbcMr//RD38Klj20tOIFujcOF ZnLrLQ8O80y3f3sw/t/ixXp1pr0WuWZvkkRIQPAjGO56ZPloOB6n+7hIM 4HceltGb70u2SRdbxSZaZBbCaegcmWEN5wP/qZBDTjkcoZ0BnkDgXPXe+ e8cqBOQ7ed1w9SJrRVE831P9EReBmyLR+s+P2MmnM3Oqc8MATVRVXABRI qTmNjDbPj+5NsISMKkXFqWgSUdWric4uLfC9jhIWYYGLAw+0xsbbHDfgQ g==; X-CSE-ConnectionGUID: v4eei1e3SzKoU1s29ngtDQ== X-CSE-MsgGUID: vYULi5NMQ1iKjuWlDP0IaQ== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="80848929" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="80848929" Received: from orviesa008.jf.intel.com ([10.64.159.148]) by fmvoesa102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:46 -0700 X-CSE-ConnectionGUID: sfzUujQ6Q6maY5GRjfhHeA== X-CSE-MsgGUID: HJ/otOkRSE6dkSoQrwAZ4Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="183738809" Received: from orsmsx903.amr.corp.intel.com ([10.22.229.25]) by orviesa008.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:43:46 -0700 Received: from ORSMSX903.amr.corp.intel.com (10.22.229.25) by ORSMSX903.amr.corp.intel.com (10.22.229.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:46 -0700 Received: from ORSEDG902.ED.cps.intel.com (10.7.248.12) by ORSMSX903.amr.corp.intel.com (10.22.229.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:43:46 -0700 Received: from SN4PR0501CU005.outbound.protection.outlook.com (40.93.194.31) by edgegateway.intel.com (134.134.137.112) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:43:45 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=w6Oxle01B+RYtviUP6VaIHVpPVSOW9ZikIgJX/ltXYFiapbU6W7lzY0n0R3maBcjbSkljy2FNlcRRQNNiQhGe4ZdjIG3WXKP9VKSEMkg96lxf7O8vl9WJ7ZAtTB+YVTWycJ2Q9NgeLxqgzOrOuEk5AhPSRUVZH5M5SeIyaBoYNWOXqRN4gcFTyF3mlFjlZAYwEujW124eE64plssQB9gPHnBqZ5Lg/R3oJptIKyR6mgOyrpByxaG5qWLPuRRgtxgMaTuqNtA4FIHo7QVx6LC9ZKayuYgNgpmQkHDiB0BcsG2AisLmwM8qwiOn1jCpRJ58Tv+pH/CtzR0bcjtYDErbA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=wEhfVMhxx8Mzm5lzz+jMe6/H8udtpz+O/d/9Ar1DKCk=; b=qZJAq8ymm5A6tbDYVRKhc0Zw1zGxcG1EbI89wVe8An+n6SNTIxvCm8qn37TsqGcAXXeWvc08KKaFVsrk857FPcMiJWGwTuJ1ROD7T9JNz+xiz3OKgdZ5JnbpLlOyYTHsMdv5ZzhkBFW244OvLv6S/slwtMq1aTZL4jF4POYS+BRJiDDenb25jBV4ITNdPHW+8K8SuX7Uam1pVF6mxID7q1cONKkd5ek7ngiyZYcDHYzw8NN2QUF07+C17RK6w0L94xEcBg+LhClC9ldMTuFvEqQul86LHsX4M9Dwy4Yp+aqx1+baRUBv8spHXMPkfd/+PgK8gjnegt6V+ZAM9liWpA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by DM3PPFF28037229.namprd11.prod.outlook.com (2603:10b6:f:fc00::f5f) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9228.16; Tue, 21 Oct 2025 22:43:39 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:43:39 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 19/26] drm/xe/pf: Handle MMIO migration data as part of PF control Date: Wed, 22 Oct 2025 00:41:26 +0200 Message-ID: <20251021224133.577765-20-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VI1PR0502CA0029.eurprd05.prod.outlook.com (2603:10a6:803:1::42) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|DM3PPFF28037229:EE_ X-MS-Office365-Filtering-Correlation-Id: 92f74794-50f3-4ec3-8884-08de10f34715 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|7416014|376014|1800799024|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?cDFPSHZwMGlTaU53WFhwUlh5VVlDVjBhaTlWaFIzR3kvK0JwcEFaS3hVY3ZM?= =?utf-8?B?VjVZOWtZQmVvQys5aVlmZjNHWjJaN3FycGZhOGlvM2srMVRDbjArbGZxcGJB?= =?utf-8?B?ZC9tS1FzcGticjFCL0NUNkt3WktrWEdPamxEcjk4T0RRdzRaYm9NNHp5V1RV?= =?utf-8?B?ZGxzc1RUYzFWN3hSSjQwcC9kVlNJamNXZEdacG5CVjYwMTlkQmFGSmwrRE55?= =?utf-8?B?NnVaL20vNlRaZlpjaEdyOFQwWnNpSHhjSG5LTHA1aUhSYy9ud3Z0dHBYc0Nq?= =?utf-8?B?RVYxNC80aWwxSjRkV0hMcWxYaTZXZFBRUFZMRWM2NSs2MWpMZjFFR0p4MVpQ?= =?utf-8?B?YjVyTDd3aklRYzk2Sm9xT2ZmcjU2dnhQTXhHV3gwd3grNzZuRzNBbnk3STNt?= =?utf-8?B?bXdxYXdnd09VTmFFaFd3VTJHVEtXcHU0Q20zVmZMenAzaFlrQURNNlZqT24x?= =?utf-8?B?TWtVY1BFZVp6eG8zT0tlQ0lsWWdocW84Y0JZSElYMGpGa1pBQXFwRXdqeHRI?= =?utf-8?B?bG53TUxUMHdsdzJnMkg3aHNVV0dBK0VUV3FkeGVjSzZ6SVpvMjVvWVkyTjU2?= =?utf-8?B?V1FKdWI0eml5dWhId0JJb09jWkFqSVJrdjZDdHR0aE1xL05FTVg0TFQrWkoz?= =?utf-8?B?OW1aQVpmbzI2YTdKMktqVGxhUjR5OEIxbXlYRTZqMzA1SUJ4L3N5Z0hmVkhL?= =?utf-8?B?SHpJakZlNjZrMmpGZ3VOOXZXSWxmTnQrUm04cmcxTERmbjVWOWVGSmoxVWZq?= =?utf-8?B?YWV4ZjZNTklDUGV4c2ZhZ0RnQnN0NzdCUkVCSW84TDRaLzNHdDhxQ291bVFC?= =?utf-8?B?TkpHMCtXd3RyS295SHJVU3hRUWRHN2FMNjVvQWtxWHNseGJDNWJpeko5cGFx?= =?utf-8?B?VzdHYVMxZ243TGEyMGdQSVQwaFo1SXRvR1Y0TDV0bFRZVnVjUDFzMGhMTHlk?= =?utf-8?B?Y0N0c3RYNXRNNDdFeFVsZkJkTEJrbzA2WjBzSGEydCt0VmQ4eHprcGxESEhW?= =?utf-8?B?U09DM0h6b1RiTFNCSEk2NWh2aVFVeFpGbjB3YWJ0SEk1VjFFT2xJakRrNGhH?= =?utf-8?B?UDV0SmZUUy9UdzI1OTZaaTFIUFpwRXNVeFNVekRRR05UYTJtMkxqZGYwY1Nj?= =?utf-8?B?VmthdHdHL2ozTllCLzhXKzgrYmJCRVY4bW9DaDZwa3lWdXdVVVZVZ254WmJo?= =?utf-8?B?R1hvWlVXamxaWWdpdG5Zd3k4VW83anMreWYybFJrRGNFcXdXaHRIZkR5Tzhx?= =?utf-8?B?RkxPUW9JZStaSDZ4dUxBT0Y4bXB0QkhXVkdHMzJ1SmtUajJRWEJjZGlTNW8y?= =?utf-8?B?K3Raa2NjeWNHYytiaENmd1hjamNuR0tuRXptYlhka0RqR0xFUEFhZzlVa3JM?= =?utf-8?B?SklhRCtPNkY4T0xzd1lvTHZud2pINk8ycjI4eDNzcVhVWG1GZ0JRRUJ1ZUdP?= =?utf-8?B?citDRSt0dmhvZ0FSTzdydTA3d2NMTmFoMHA1eEV5WjlVWDh1bDhmTk1wbVRu?= =?utf-8?B?RHdlZ3hWWWZCTXNWZEkrU05NQ1E3R0xGeHpYbzR2Z05ZeFM2V0M3YU9oaSt6?= =?utf-8?B?L28zZjkxL0sxQUhmRTQ5TDQ1NFpyTHRTZzBDMG8raHArejhJWi9wOGVWV21L?= =?utf-8?B?QkxzeFpLMTlTcU5rcysweFl3QmxUNzE0cGRHZ1ZhVVlpVk01cDFEdXJUcWpW?= =?utf-8?B?THd5SlkySXlGdkltRjUxNmRQcVdLSXVCMjJBV04xU1Q4T0JoRW1Hb2FyVStu?= =?utf-8?B?RnJQRlZZanJBRW5UOHhHaVNydXR6WVo4VCs3cGhwU1BjTFR3Z0tyd2RQZ21k?= =?utf-8?B?OWZwK0tDdnExek9CWWVNM0RlNHdtUm5rc2g3eS9ITmxyOWR2QTVZVkJERHZk?= =?utf-8?B?eUl3bXBjOXNNazd2UmlaVWNLVmZ0Z3J0c0V1TFRWMG0xRFdIclhZZ0xXVVRZ?= =?utf-8?B?NDUzYXE5VjhhT2RuT1RUUlA2WXNsci9aUXZnQnhoWG5oOStFelZUc0hadW1Q?= =?utf-8?Q?VfKAPBMzWAyNoi/n7e9XMj0ur+ZTQ4=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(7416014)(376014)(1800799024)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?bEZmMFJQMXNQd3krQXhoUUhwYUY2dWk5YUkrTGtGeEJVTjRkZE1Xb0FPeE1J?= =?utf-8?B?SWwzVFhLTFpzamsyZEJqYUh3TGhTU2xXQ0UrVXVhdDh6Vnp2TnBuTFFqbm5C?= =?utf-8?B?SEo4VXFXb0JLRk9aRmR3RmcwYUttTlRhRnZIc215MnlCeXVGMXUrMTUzazFz?= =?utf-8?B?dHRFb05sb2tDdGNiZEtWektMbDB4amkzWHRuNU9uTVgrWWphTlRtZTZCRWN2?= =?utf-8?B?b3o0T1lCQ3lNcUpqZlpmN054UUdHWnM3N3VabGJ0dk14WnFmYTIxdmFpWU8w?= =?utf-8?B?N1lJYmpMTmxGYW1qU2hSUmRadUtvOEdtU2NVclZrellQbzdTQStHOGMvbTJR?= =?utf-8?B?OWZqVzJoV2M3bEZleEkySkswRWpremFJajl5dGhBYTZPMUlNcWNMM09uU05F?= =?utf-8?B?VHNrd2QyT2p1YnlOZjdQOUd4UUJiTHdFY2hPMWo5RDlBSkhUa0lta2FDY3VG?= =?utf-8?B?SUUwMEduSTFMZCt0SmVBdmxYMkRQZWhUVDkwbFRiampiYVVVYlpmUEFXcFNz?= =?utf-8?B?MitKTGRhZFBuSUdpU1d2TmVGYk15Q3BFS0lvUkNpSEtncG9ta0c5dWd5MHdL?= =?utf-8?B?Tzk0cEdZNGdGZVJZOXRweVQvY21ZVjZtdFNEVWUyNmxJSS9Iem9LZjkzQ0pT?= =?utf-8?B?a01ISnQwZUF0ZVJpWmhqOW5pbmxCVy96anE2ejJ4RmREeTVNaHdhdVdXZnp3?= =?utf-8?B?QUxqMHIySmc2dWFPWGdhT0Vjc1VvTnNzQUpZZkVPcVZvUVBYUk5LUXdxa2tU?= =?utf-8?B?a3lSWnlNbWp6S3pOZHFiajV1cmpyQ3RkM05XUXpwZE9Rcm5ITVpKaUxFTUZX?= =?utf-8?B?UmFhbXV6S0E2SmhMUE9xZSsyU3JHUVd4TWlwQ0p3bnJxNDB5ekEvMThrYmNt?= =?utf-8?B?Ui9OL2pwd3Q2bTVFc2d5ZHZFa2JlbGVXSjRPK0VnakQyWlNNUGQwbXMwSVV6?= =?utf-8?B?aVRDQjlyL0h4aVJQbmQ3bFJKaTBVL01BWkNEOWZ1bFF2dnIxY0h2bmVYcjFx?= =?utf-8?B?Z2tSWGg4bXpneVhCanIrVHVzTkljQlVLRzZEWU1Kbk1QLzU3dFcwTlJ3cUxS?= =?utf-8?B?V05aYkFkYlFLN3JvbEhUam1LVVBLMmxKb3RqOTFTM1ZPa2R0dWhwTzlyOWM1?= =?utf-8?B?WENlOHFGN3VEeGVYZktUVGtaMnlFYjdySG9CemljajducmFsZ29Db1Q4SjZS?= =?utf-8?B?cUdVZkJIZXBCc0w1SldsRlFacVlnSm9kZHNycUxmaEV4Nnd0QXkzU3Y0Si90?= =?utf-8?B?RHVBK2xSKzkvVkl5QXdCRTlBZmcxa0Z3NmtYZ0c0Z3lqbWdMSXc4UGJRU3lY?= =?utf-8?B?K0h2UDFvclluK250b2NMbDZTWERjbDRyNGVITUZpeit1M0tGRGxxRlJWUFFH?= =?utf-8?B?SjF1c1NxUGFYeGNob0tYalRQeThEcElwQzN0dXl0dEpnVnBxcHQvWjdnOEVh?= =?utf-8?B?VHZMZEVXNVFsRkdqQXlMVjN1NHlmSEIxelo0OGdMRmt6Y2xPQnI5OWhXc29W?= =?utf-8?B?WS8xaUp2d3dOYkUzZjhNdXRtejd5R0hmY3ZSREZhOHJKQlpVOFdqNFJ0R3ZH?= =?utf-8?B?eHVzRzlwaitHYW9MWi9OWVZac0tQTmdkVnA1L3RGMWh6TmpwdE5mcEFWWnpM?= =?utf-8?B?dndaaXpnQlM3YzFtekdaQ1Nsa0ZFeUNJTkZ0WDJiNmMrMmt6cWFiNnZDTU9k?= =?utf-8?B?RXZjMzY4aTdTTUFSMEJBc2x2dG5HMXVsY2VzMEtxOXdPQWhIMDV0ZW0yUFNC?= =?utf-8?B?VlNYc2V0cHI2cHRrYng0RUNqdzZCTkNTYzJYV3R5NnJqd0FsVCt1d2w5UWFo?= =?utf-8?B?VjhUVms5TXZUdDlWN1dxUXRWWXh3REZFMWVVVWZVMGlpNitLMmR4QWNMY25y?= =?utf-8?B?VVZjVlI0SHdrcHQ2L0RhNG9IM1E2ZXQvdkcwTjl2djZjb2FxTzdPb3lsWjVs?= =?utf-8?B?bHluVkptQWZ2YURnbjJnYVJhSVEyZ1A0ZTQ4ZFpKcnVLcUFGVk9aY004VWFY?= =?utf-8?B?N2JqMTIwZ09iZDhCbW1oSEh2WFJFc3FiZlVMNVhWYkRXMEVlRzRiUFhJcmMz?= =?utf-8?B?YW1LN0l6VlJlRVZxb2xlNERzMEhES3JWT0M5VGRlY0FkbXlpYkRhRE4yTitp?= =?utf-8?B?djA4Q1I4SGVzOEl2TUNpNFB5TjhDMzlja3ZtQ3M5UFRrODZ2cHNlcE0xZXY3?= =?utf-8?B?R2c9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: 92f74794-50f3-4ec3-8884-08de10f34715 X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:43:39.0209 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: VtUwmGcdXySTuzXCPBZ4jN/FDblxcFxb7/A8qBTvVZqP5JHLMXfO9TIrJ6eMTDUuJZvhlXnKY9p6bn6crs0O4agtbBJ+Ftl6HWER7Ic/X08= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PPFF28037229 X-OriginatorOrg: intel.com Connect the helpers to allow save and restore of MMIO migration data in stop_copy / resume device state. Signed-off-by: Micha=C5=82 Winiarski --- drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 16 +++ .../gpu/drm/xe/xe_gt_sriov_pf_control_types.h | 2 + drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c | 114 ++++++++++++++++++ drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h | 4 + 4 files changed, 136 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c b/drivers/gpu/drm/= xe/xe_gt_sriov_pf_control.c index f5c215fb93c5a..e7156ad3d1839 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c @@ -190,6 +190,7 @@ static const char *control_bit_to_string(enum xe_gt_sri= ov_control_bits bit) CASE2STR(SAVE_WAIT_DATA); CASE2STR(SAVE_DATA_GUC); CASE2STR(SAVE_DATA_GGTT); + CASE2STR(SAVE_DATA_MMIO); CASE2STR(SAVE_DATA_DONE); CASE2STR(SAVE_FAILED); CASE2STR(SAVED); @@ -829,6 +830,7 @@ static void pf_exit_vf_save_wip(struct xe_gt *gt, unsig= ned int vfid) pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_WAIT_DATA); pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_GUC); pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_GGTT); + pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_MMIO); pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_DONE); } } @@ -872,6 +874,17 @@ static int pf_handle_vf_save_data(struct xe_gt *gt, un= signed int vfid) if (ret) return ret; } + + pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_MMIO); + return -EAGAIN; + } + + if (pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_MMIO)) { + xe_gt_assert(gt, xe_gt_sriov_pf_migration_mmio_size(gt, vfid) > 0); + + ret =3D xe_gt_sriov_pf_migration_mmio_save(gt, vfid); + if (ret) + return ret; } =20 return 0; @@ -1081,6 +1094,9 @@ pf_handle_vf_restore_data(struct xe_gt *gt, unsigned = int vfid) case XE_SRIOV_MIGRATION_DATA_TYPE_GGTT: ret =3D xe_gt_sriov_pf_migration_ggtt_restore(gt, vfid, data); break; + case XE_SRIOV_MIGRATION_DATA_TYPE_MMIO: + ret =3D xe_gt_sriov_pf_migration_mmio_restore(gt, vfid, data); + break; case XE_SRIOV_MIGRATION_DATA_TYPE_GUC: ret =3D xe_gt_sriov_pf_migration_guc_restore(gt, vfid, data); break; diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h b/drivers/gp= u/drm/xe/xe_gt_sriov_pf_control_types.h index 1e8fa3f8f9be8..9dfcebd5078ac 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h @@ -35,6 +35,7 @@ * @XE_GT_SRIOV_STATE_SAVE_WAIT_DATA: indicates that PF awaits for space i= n migration data ring. * @XE_GT_SRIOV_STATE_SAVE_DATA_GUC: indicates PF needs to save VF GuC mig= ration data. * @XE_GT_SRIOV_STATE_SAVE_DATA_GGTT: indicates PF needs to save VF GGTT m= igration data. + * @XE_GT_SRIOV_STATE_SAVE_DATA_MMIO: indicates PF needs to save VF MMIO m= igration data. * @XE_GT_SRIOV_STATE_SAVE_DATA_DONE: indicates that all migration data wa= s produced by Xe. * @XE_GT_SRIOV_STATE_SAVE_FAILED: indicates that VF save operation has fa= iled. * @XE_GT_SRIOV_STATE_SAVED: indicates that VF data is saved. @@ -80,6 +81,7 @@ enum xe_gt_sriov_control_bits { XE_GT_SRIOV_STATE_SAVE_WAIT_DATA, XE_GT_SRIOV_STATE_SAVE_DATA_GUC, XE_GT_SRIOV_STATE_SAVE_DATA_GGTT, + XE_GT_SRIOV_STATE_SAVE_DATA_MMIO, XE_GT_SRIOV_STATE_SAVE_DATA_DONE, XE_GT_SRIOV_STATE_SAVE_FAILED, XE_GT_SRIOV_STATE_SAVED, diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.c index 75e965f75f6a7..41335b15ffdbe 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c @@ -9,6 +9,7 @@ #include "xe_bo.h" #include "xe_ggtt.h" #include "xe_gt.h" +#include "xe_gt_sriov_pf.h" #include "xe_gt_sriov_pf_config.h" #include "xe_gt_sriov_pf_control.h" #include "xe_gt_sriov_pf_helpers.h" @@ -378,6 +379,112 @@ int xe_gt_sriov_pf_migration_guc_restore(struct xe_gt= *gt, unsigned int vfid, return pf_restore_vf_guc_state(gt, vfid, data); } =20 +/** + * xe_gt_sriov_pf_migration_mmio_size() - Get the size of VF MMIO migratio= n data. + * @gt: the &xe_gt + * @vfid: the VF identifier + * + * This function is for PF only. + * + * Return: size in bytes or a negative error code on failure. + */ +ssize_t xe_gt_sriov_pf_migration_mmio_size(struct xe_gt *gt, unsigned int = vfid) +{ + return xe_gt_sriov_pf_mmio_vf_size(gt, vfid); +} + +static int pf_save_vf_mmio_mig_data(struct xe_gt *gt, unsigned int vfid) +{ + struct xe_sriov_migration_data *data; + size_t size; + int ret; + + size =3D xe_gt_sriov_pf_migration_mmio_size(gt, vfid); + if (size =3D=3D 0) + return 0; + + data =3D xe_sriov_migration_data_alloc(gt_to_xe(gt)); + if (!data) + return -ENOMEM; + + ret =3D xe_sriov_migration_data_init(data, gt->tile->id, gt->info.id, + XE_SRIOV_MIGRATION_DATA_TYPE_MMIO, 0, size); + if (ret) + goto fail; + + ret =3D xe_gt_sriov_pf_mmio_vf_save(gt, vfid, data->vaddr, size); + if (ret) + goto fail; + + pf_dump_mig_data(gt, vfid, data); + + ret =3D xe_gt_sriov_pf_migration_save_produce(gt, vfid, data); + if (ret) + goto fail; + + return 0; + +fail: + xe_sriov_migration_data_free(data); + xe_gt_sriov_err(gt, "Failed to save VF%u MMIO data (%pe)\n", vfid, ERR_PT= R(ret)); + return ret; +} + +static int pf_restore_vf_mmio_mig_data(struct xe_gt *gt, unsigned int vfid, + struct xe_sriov_migration_data *data) +{ + int ret; + + pf_dump_mig_data(gt, vfid, data); + + ret =3D xe_gt_sriov_pf_mmio_vf_restore(gt, vfid, data->vaddr, data->size); + if (ret) { + xe_gt_sriov_err(gt, "Failed to restore VF%u MMIO data (%pe)\n", + vfid, ERR_PTR(ret)); + + return ret; + } + + return 0; +} + +/** + * xe_gt_sriov_pf_migration_mmio_save() - Save VF MMIO migration data. + * @gt: the &xe_gt + * @vfid: the VF identifier (can't be 0) + * + * This function is for PF only. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_gt_sriov_pf_migration_mmio_save(struct xe_gt *gt, unsigned int vfid) +{ + xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); + xe_gt_assert(gt, vfid !=3D PFID); + xe_gt_assert(gt, vfid <=3D xe_sriov_pf_get_totalvfs(gt_to_xe(gt))); + + return pf_save_vf_mmio_mig_data(gt, vfid); +} + +/** + * xe_gt_sriov_pf_migration_mmio_restore() - Restore VF MMIO migration dat= a. + * @gt: the &xe_gt + * @vfid: the VF identifier (can't be 0) + * + * This function is for PF only. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_gt_sriov_pf_migration_mmio_restore(struct xe_gt *gt, unsigned int v= fid, + struct xe_sriov_migration_data *data) +{ + xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); + xe_gt_assert(gt, vfid !=3D PFID); + xe_gt_assert(gt, vfid <=3D xe_sriov_pf_get_totalvfs(gt_to_xe(gt))); + + return pf_restore_vf_mmio_mig_data(gt, vfid, data); +} + /** * xe_gt_sriov_pf_migration_size() - Total size of migration data from all= components within a GT. * @gt: the &xe_gt @@ -408,6 +515,13 @@ ssize_t xe_gt_sriov_pf_migration_size(struct xe_gt *gt= , unsigned int vfid) size +=3D sizeof(struct xe_sriov_pf_migration_hdr); total +=3D size; =20 + size =3D xe_gt_sriov_pf_migration_mmio_size(gt, vfid); + if (size < 0) + return size; + else if (size > 0) + size +=3D sizeof(struct xe_sriov_pf_migration_hdr); + total +=3D size; + return total; } =20 diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.h index 09abdd9e82e10..24a233c4cd0bb 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h @@ -23,6 +23,10 @@ ssize_t xe_gt_sriov_pf_migration_ggtt_size(struct xe_gt = *gt, unsigned int vfid); int xe_gt_sriov_pf_migration_ggtt_save(struct xe_gt *gt, unsigned int vfid= ); int xe_gt_sriov_pf_migration_ggtt_restore(struct xe_gt *gt, unsigned int v= fid, struct xe_sriov_migration_data *data); +ssize_t xe_gt_sriov_pf_migration_mmio_size(struct xe_gt *gt, unsigned int = vfid); +int xe_gt_sriov_pf_migration_mmio_save(struct xe_gt *gt, unsigned int vfid= ); +int xe_gt_sriov_pf_migration_mmio_restore(struct xe_gt *gt, unsigned int v= fid, + struct xe_sriov_migration_data *data); =20 ssize_t xe_gt_sriov_pf_migration_size(struct xe_gt *gt, unsigned int vfid); =20 --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.13]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 50B252BE653; Tue, 21 Oct 2025 22:44:17 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=198.175.65.13 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086658; cv=fail; b=AzKLyy0VB0JJV2Oeh8B1jtagh/d4P9miyPDFfzx4eW4ZFp4Sp50tEi4pqq8OM7h2/m1OKuJtD+fxFsvNbzuOxMKIAOW8Ha9adNAU2yI2ZIOcG0Mik8pQufrUAIARGsv0BMlFxesep5P7cM1sjrUY2Fp3JCGV74EH/1stVdNz8lg= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086658; c=relaxed/simple; bh=2e2nIcEUOWNb2SWPvXXdfP9AFbHn+pSFABNNeY/rcOI=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=SBatpW9UqfP/QploVh/93fWTgUSyWPmfTv7R02ricS8qntGhRjyRWrgiknEQbOiXaDhonq761GuJ05kjXSd96PDirP4A/tXnDzIhjrCvX3EYVkVPv31W0Wo6ylFXApqCvaTdt8y8h1SxAnOI3e/iywVjZqJTjoSqYKaf26wJJqw= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=KN+binjK; arc=fail smtp.client-ip=198.175.65.13 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="KN+binjK" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086657; x=1792622657; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=2e2nIcEUOWNb2SWPvXXdfP9AFbHn+pSFABNNeY/rcOI=; b=KN+binjKzL/lkktCs3fZ1I6htO2TJRwQGwgKd4zw4XIzsusw1QkjsIMn qbS5LOru8uJrBd+hp2CuEP+v7+vpgwFGNevEJbUb0yY0a1PLqPaZpFhvt nzpSIiPHImMWvx3lE18DQSTNb6GWHGfIjwkm66XFcPGQFZOfENgpdvsCe d+Smiy+QjQ0q6szeI4mlOtuwJdq+n15+Zo9ynwvfIlT7jmxTyWoY02NCA da6/B+H34sf7Rqj/N5/oXjqG8rlS2QFOZDe0okhZHzaUVk/E4rggj+Tgu ENYR3QFHmA673yCekANW+psF6I0tZTcNoCLgTEZySEC9J/zFpJ+lxuaT5 Q==; X-CSE-ConnectionGUID: 9Z/9oYsyRFe97s2L2sa8ig== X-CSE-MsgGUID: 7SOPByycRcejaHUxHqcxWw== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="74344499" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="74344499" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by orvoesa105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:44:17 -0700 X-CSE-ConnectionGUID: 6zhKNlcHRCOsKan9sPS6xg== X-CSE-MsgGUID: ZBZFqYISSLGnM5oWwPJapA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="214345821" Received: from fmsmsx901.amr.corp.intel.com ([10.18.126.90]) by orviesa002.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:44:16 -0700 Received: from FMSMSX901.amr.corp.intel.com (10.18.126.90) by fmsmsx901.amr.corp.intel.com (10.18.126.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:44:16 -0700 Received: from fmsedg902.ED.cps.intel.com (10.1.192.144) by FMSMSX901.amr.corp.intel.com (10.18.126.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:44:16 -0700 Received: from CO1PR03CU002.outbound.protection.outlook.com (52.101.46.67) by edgegateway.intel.com (192.55.55.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:44:15 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=gV5BtupyMmoo4SaF9kRxpFiamfYA2D3bpWRn4jOkzABUgumE0fS7QSQXq+s8EHhyCoA/GDCaxX8KNXETHhK8sNJqAi+Lel6Oi6hgwNoOsZ/xyi3ihO27dvs8JMnPAVNseWODA68+2fO0J+JRlBeHp3BAbYM9XuYROVCBMPDMGNSgfk8PUu1kifjDh0FD9uFiNoLUBWJB5q5zTQdoLdd5fDHIMuH1lQG6LUYyyQ3qYg8LvkdAI15TccnXTcSMHh141PPbAC1fnwDcE1EmvU5MkDtLa/xKr9VniyZLZ4ov4/TcbhDU7PVg1LqXfhYWdIKd78RxvV9XKCFPl+XBy1T7zg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=8F8hpDlliVaQXzLun9jozxyv7S9ZzMioHIw58J2dFi8=; b=SGfBcK3aNu4wuRxlZDksMoC5pH8HTpgQKB2V6ME+4IBwhVTQOxavfdO1dhGt+5Ar0Dt0LF1UtEDLXmZkwHzt4/yFeYkebtEqJkIYYGeqmn/Xce4tiCrOWgBd823WQQV4oL4ySp6JCjJA+bIFcnOfmFij9IKC8uaqZgrqql02P1Nrtg2opbDF+lB4g6X17cRgifS0tP4xpqTb65rRZDJeaPp3yuKhc7LShNL/sD0vJf5TjtgOdXGOBK9h/Y2Wd5GtAjQtda+iZ4xIqFpg/SBE5eHgbe6qDwG8O+7kgvOTexQr3gGvFyLw/23knvaxXLnOu188rbTIjGUWDJ2bZ94Zjw== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by DM3PPFF28037229.namprd11.prod.outlook.com (2603:10b6:f:fc00::f5f) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9228.16; Tue, 21 Oct 2025 22:44:13 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:44:13 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 20/26] drm/xe/pf: Add helper to retrieve VF's LMEM object Date: Wed, 22 Oct 2025 00:41:27 +0200 Message-ID: <20251021224133.577765-21-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VI1PR06CA0220.eurprd06.prod.outlook.com (2603:10a6:802:2c::41) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|DM3PPFF28037229:EE_ X-MS-Office365-Filtering-Correlation-Id: ce2d67c2-201e-4906-b4dd-08de10f35b7e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|7416014|376014|1800799024|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?cnZNc0dFYTNvNVNid2dvdTllcWo2T1NGZUgxMFl0MEVmVjVLU0lHNlhNeFJo?= =?utf-8?B?UlNFNmRXVm02UmY4WXBxbXFHY0ExbmtPU3ozYVhuYVNtRUwxbW42OC9BOWZy?= =?utf-8?B?RlVZY0kzc1lVZlpZc0FEV016Z3FremVNaE9Eajg0bkF4TytNZWRXK3FtUVJW?= =?utf-8?B?OGs1RFhTekFKY2FVRnduRFMzZm5SL0VOdGYzcGQ4OVgzWGJxTUVZSE42bFRu?= =?utf-8?B?TExmYy9iOENpNnRIbXpCdmxPSmpVWXJyUTg0RnlBN1NGbzcyckpVN1hZWXpP?= =?utf-8?B?dzRSWVZsbkJFbXR3cHVsdHBwZUNGOTNXQmpMVzhWaFdQVzdqazRRRy9PTDg0?= =?utf-8?B?WS9LRTRUU2ExM0RMK0VhKzArbHRiS1RNd3hKc3ZValB0Q3FQMVIvNWtuY2Fa?= =?utf-8?B?ZjhYa3BVNlplZ0lIUHBTcE1YWTJRMlhwY3BBcUpTYXpGcEQrWFRFd0d6YkxU?= =?utf-8?B?ZUM1Rzc3aWR5VEtXWFc0aTZsbzg1U0d5cThQNFlZaTdCblloUk13d0IrTjl4?= =?utf-8?B?clpDVXRDSkJYOGZCcGJFUDhRMlFUdjhKS0VnNDRvb05VaUdmSDNSZy82cDE1?= =?utf-8?B?MnhWOCtZZkhTU2FFQTBvYzRpRnMwd0JSUG0xamJuR1NKanlva0hsRGhmeUN2?= =?utf-8?B?SWtoRDVHSElkakp6QWdxWTZncXV3QUgvQjMyL2F3UEYxbUVXS2RqMFZIUHdh?= =?utf-8?B?bThaN3dJaklCMVhUdWZROWhOUFhSQjVuWlVEeGZPZ0hudUlyYkxaTlN5MVUy?= =?utf-8?B?MmxNQWJ6bGs0cXFPN0pUZStCSVhxYmlMU2hPeEg5ZjFkVmZLck14dFFJMTJo?= =?utf-8?B?R0ZDWm5lV2w0U3BKVVp1eWV4S0hHQXdwbXNIdGdjK0diSVY3Z0lKL3RubHdN?= =?utf-8?B?MzJQMng1b3JpM0tpNnVPTUlocFUxaVhkcXNmakE5bmJJNkFmUUNaUlJRcTVl?= =?utf-8?B?NG5HL1RScnVzZWJDUzUwQWRQc295VzNYWmR6K1F6MmVIOXFnRzA4MVFMVzhx?= =?utf-8?B?ZGtFSXdENjduMTVWbWhmTlFoTENZTmlBSVl5M0txeHlpdlJHdlFqQ21zSHM3?= =?utf-8?B?Qzh0bFFrYnhBZDBXVGxwVUVHVmZMYkthV3AyQm14SUJBOHhwRzhsdUdJeVJh?= =?utf-8?B?emwzUWNuWHkyS2NSUGtnWWZqMlVKTVVac0RiSCs3LzlmdXI5N1pJckZQUUc4?= =?utf-8?B?WFZPVzBNSGNGRGJpVUZ5LzdXVlNBSDZYRktsUUFZMFFkNkszSDdFWU5zZzc2?= =?utf-8?B?anQyMnFLamhQUytMYWExUjlNaGgzNDN6dGwzTlZSMG44OUhlT3RCZEIxTyty?= =?utf-8?B?dDBOeE4zblpzRlhBSUVJVDN3RXFZYnNVVm1KUVJaaEJQbC95UUR5Y2lUcTJP?= =?utf-8?B?VEZldEE1WnZxaHlqS3BFU1BsT2VvV2dzLy9jNE1KQXgzVzQzOU96MzRKclFR?= =?utf-8?B?cGg1eEpBUUtTUFZ3VWljampyU2NwZGNjTkd5RmVPQVZyMGJtYnJ3TDE2RXNB?= =?utf-8?B?cjRyMWc1OWNaMjFvRE1WcVBSUUtkano2d2swbjFwU2I5dFlBVGw2RGxNTjNT?= =?utf-8?B?STVERjFuc3FlcFlxa0pRUW9IenRxb2E2SytCMHZRM3ZhWjNCMWZjcHRhS1dx?= =?utf-8?B?ZkM2YXNLZzdzZ2lCSnp3dTh3dGlUTkUxWXNDSnRGZmxCTzl4OHdBb2JGbnpZ?= =?utf-8?B?TkQzd0JVQ05OUWduKzc3WHFHcEh2OUQ2ZkxsVmoyMVZrdGs4ZkQxclIzOFJP?= =?utf-8?B?Y21FY3NJUEp4U2VTOWhITnZSTUZKWjA2ckhkcVNNd0d4Tk5Bd1hid0FsYXdO?= =?utf-8?B?Rjk2MklySU9MSzdXZDAxZjNTN2lvejdSMzBVdDhyWmN1djVKcUY4bzhEaEdM?= =?utf-8?B?VG81MmhDTlh3TDk0WktmcFlaSytzZDVyS2xjcVFmZHRvVEY3OXlKMWlGR2Vk?= =?utf-8?B?ck5SNHFDNnY1RWp0Q24zM0VzN245Q0tsRjFFMmpITjR0dk1RNVgxb2FvdHNl?= =?utf-8?Q?EBkTbxdnMgia7xnQuZFYImFeToVaxI=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(7416014)(376014)(1800799024)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?YkVqdTNXZ09sTkJHQXZKVUhQQlVoSzB2M0RlakRiRE1IZkYxZHNOY1ppd2l6?= =?utf-8?B?OHNUR2E2Yi91all4Q1pQQWF5QkFkWnNaZXlOSGRBbmpLQTZmVnVScXJkMWtB?= =?utf-8?B?Z1R0dkVEdVJ1NG82Ym5ibUt4cmd1QUhOOVpDaGRGNzVFSlNrdndtRXZod20z?= =?utf-8?B?dG1WREljS3o3MFV5bU56V3BQNmc3MUtQZzcvSzYyZEdYS0U0SFVCQVRMTVlE?= =?utf-8?B?SUlLdHVrUDVWWlZiY3E3S3hkanNBcWU5emZ2VkZXeE1vT054NkllY1VQa0Nt?= =?utf-8?B?citZOFNzamc0NWJiVEFFTm15NHRpWlNrZE1PTU9wZFoxcHBxZGVybVVtV2Yw?= =?utf-8?B?Z216dE9PeXZ6SjhGZkZzd2xQeFBhaFNGUmRiZTlWZUcyWUFZTERSdG9Helgv?= =?utf-8?B?YVRMZWp2K2ZWRE4yY0E0SjJrQVI2V1JkTWpDQjJ0WUlsV0VhMzhwOEhGQ3B3?= =?utf-8?B?YWMyOWp3TTMyTDhFT29FN214ZEx2YUlGc0Vzdk1TSlM2MWEya2NBZDlMQ0NV?= =?utf-8?B?b3VidE5ad1Z4NzRmL2pzVmFoYk40Qkp3VXFwcFhBMGkzV3gzMlhBRjJNTlZr?= =?utf-8?B?czEwc0lYRUVQN2Npc1piWDdhR0wzaC95djdsYTUxSGZFSzA5WW9qQVNnS0p2?= =?utf-8?B?R3QvcU9nLzlLQ2ErZUNCR0RVbldBVk14dnR2aXplWHl3VGVDYWdYbFl6ZFZI?= =?utf-8?B?MGhJK08yV29iNERQSUhLYjRzVFErblBkTGthdTBMNkc1dlA1RkZnelE0Yko3?= =?utf-8?B?dFQwTlBXMW9aM2xmTTNhcU9rUTRHYXQ1UHM0N0NSYi9xZ3VNTGI0RnBtQStG?= =?utf-8?B?SW1HNVFKZEtiTVVlNXdrdUx1ajBiZXRLbyt0UmM0RmRuRFZtbytKc0xaK3p1?= =?utf-8?B?WWcvU0N3alJOYWVQMVE3TWlvUFEyYVI0b05DZjQ4UVJiWmJMTVUxTm1MVG5n?= =?utf-8?B?UG5tTGpTUW5JYjVjbVpGOFNVOUpXOHFjakxua0hVcVVEWVBzYm1SZnI1cXpC?= =?utf-8?B?NlVRR3hSRjRzUmVxSHBVTzlCQnNXa0ora0xlKys1NUY4M3ZpT0hIRnVtN09h?= =?utf-8?B?ZHkrZWN6dGRLMHdoOGlRZ2U5MzNTRy9BU1NZK2FGaCtBR2YycWZWY0prWXhU?= =?utf-8?B?RDVDVzVIVjRNU2RodTZUdllReUxEQWZOemRGLzU0TzVzZ3E5NG9hZlN3NjdL?= =?utf-8?B?WTNlSFJVSHphbXc2SDZZMVhaUG1XeXJIcWNZeTYrbzdsUzl4cUhZcnlMWk9u?= =?utf-8?B?ejNwbStCY1lYOHNicUpnMXlxMmhJYklZbDBXMGl0MVlUSWdXa1FZS3JxSExz?= =?utf-8?B?eE9TWXRpVzFySmQvMlV6K2MzRXhWaEdqL3V2L0YyYkI1eld5VWJLbTJ4cGJt?= =?utf-8?B?eGxDWlN5M1dWbG9YRHFudTdZd0xOZlF2VXo5T1hSN0xoNkNhaGtMQzdLQ3Y0?= =?utf-8?B?bUYxY1dwRytHc0hKQ05NOXJlRjNFOGF3d2Y0TElZWklqVUZGNE03aW1Oc01w?= =?utf-8?B?K05sYVJ5OGRoTjd6bzgwSkZMTEJhTWdZcHdocnE2RW9SYTBUTkg3Rk8wWnhz?= =?utf-8?B?emxpTElSRXducUNTbEdNQzhmQjJCTGtpdDdIK1RxUTNvQ001bGNWMXdyaTgv?= =?utf-8?B?a2I1MG9jb1UwWFNkbVpwMEwwS2p5L3Z4UHBZZ2xYeGhSQzJOeXlzbGtsNFda?= =?utf-8?B?YnVrSjBJcWdFKzFPZkpLdjZIdG0xVURFNURscmdsMUF5dDdMSXVZS1hDZDFj?= =?utf-8?B?Wkd0Z215SkVsa2pzQlZsbXF2Mllnd0cxMTZWL1U4QnJQZzMrdjJzYWtXS2FQ?= =?utf-8?B?V3lHMlZNVGFuYlg2c2w3QlZpU0FjNUtXZDVVa1JNTm5LZ1RFK09RWWZzZ3Jq?= =?utf-8?B?MGdXT2xsNzY5eTZHUWp5dTVxNy9kTGRSWGFsWDVCZ2lpQUFTOTJRbUVVbmIz?= =?utf-8?B?WGdzdjFhZlp6WllNeGYyVmxWbDBUWmpqbXAySzNHcEcxdkpjeXh0VHhVRmJF?= =?utf-8?B?Y2ZNWGt5c0cvQ01nTmtXbENzenF1eWluT1NhMXlJQUdtVlArb1lYYU1OVmVB?= =?utf-8?B?NWp4RnFIeUhRTmZEVnlVbmtSeTB0eE1EMlM4RU9wZi9xRTA3c3YxdVY5c25T?= =?utf-8?B?cG1XZHVYeEwybVJxYVlEcVRVOEpqSmVSUHhpMmI0anFndEFTZ09qOS9nZmQ2?= =?utf-8?B?K3c9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: ce2d67c2-201e-4906-b4dd-08de10f35b7e X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:44:13.2801 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: bO0FNDgmEx6m7LdoV/QuGf0zb8a99odrzLapi4QVfB07XmDoRujaMiN9JrvnHlZYhBEM3NJ9r7tsOnqEfkhf/3HkD9S/bRQxt3wG+z5tB74= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PPFF28037229 X-OriginatorOrg: intel.com From: Lukasz Laguna Instead of accessing VF's lmem_obj directly, introduce a helper function to make the access more convenient. Signed-off-by: Lukasz Laguna Signed-off-by: Micha=C5=82 Winiarski Reviewed-by: Michal Wajdeczko --- drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c | 31 ++++++++++++++++++++++ drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h | 1 + 2 files changed, 32 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c b/drivers/gpu/drm/x= e/xe_gt_sriov_pf_config.c index c857879e28fe5..28d648c386487 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.c @@ -1643,6 +1643,37 @@ int xe_gt_sriov_pf_config_bulk_set_lmem(struct xe_gt= *gt, unsigned int vfid, "LMEM", n, err); } =20 +static struct xe_bo *pf_get_vf_config_lmem_obj(struct xe_gt *gt, unsigned = int vfid) +{ + struct xe_gt_sriov_config *config =3D pf_pick_vf_config(gt, vfid); + + return config->lmem_obj; +} + +/** + * xe_gt_sriov_pf_config_get_lmem_obj - Take a reference to the struct &xe= _bo backing VF LMEM. + * @gt: the &xe_gt + * @vfid: the VF identifier + * + * This function can only be called on PF. + * The caller is responsible for calling xe_bo_put() on the returned objec= t. + * + * Return: pointer to struct &xe_bo backing VF LMEM (if any). + */ +struct xe_bo *xe_gt_sriov_pf_config_get_lmem_obj(struct xe_gt *gt, unsigne= d int vfid) +{ + struct xe_bo *lmem_obj; + + xe_gt_assert(gt, vfid); + + mutex_lock(xe_gt_sriov_pf_master_mutex(gt)); + lmem_obj =3D pf_get_vf_config_lmem_obj(gt, vfid); + xe_bo_get(lmem_obj); + mutex_unlock(xe_gt_sriov_pf_master_mutex(gt)); + + return lmem_obj; +} + static u64 pf_query_free_lmem(struct xe_gt *gt) { struct xe_tile *tile =3D gt->tile; diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h b/drivers/gpu/drm/x= e/xe_gt_sriov_pf_config.h index 6916b8f58ebf2..03c5dc0cd5fef 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_config.h @@ -36,6 +36,7 @@ int xe_gt_sriov_pf_config_set_lmem(struct xe_gt *gt, unsi= gned int vfid, u64 size int xe_gt_sriov_pf_config_set_fair_lmem(struct xe_gt *gt, unsigned int vfi= d, unsigned int num_vfs); int xe_gt_sriov_pf_config_bulk_set_lmem(struct xe_gt *gt, unsigned int vfi= d, unsigned int num_vfs, u64 size); +struct xe_bo *xe_gt_sriov_pf_config_get_lmem_obj(struct xe_gt *gt, unsigne= d int vfid); =20 u32 xe_gt_sriov_pf_config_get_exec_quantum(struct xe_gt *gt, unsigned int = vfid); int xe_gt_sriov_pf_config_set_exec_quantum(struct xe_gt *gt, unsigned int = vfid, u32 exec_quantum); --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7E8522BE653; Tue, 21 Oct 2025 22:44:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=192.198.163.11 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086671; cv=fail; b=MTDJUdHQzkqH0Y73IQxLVsJcaGzY/ZZYSt9imUz8ViAWP5Dn/lR7bR3pISIdGNbiUJcvMCoXNWEwS78TsWa+rwnDO91+p+sM9cGd04LDK6F7ATRw/y8UZGMTs7iiq6RNYAdKwtOydXdDVt0Z1ynTfP+ONKQPTST8tbElatWHxFo= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086671; c=relaxed/simple; bh=eI2EbLbhuV6qX5xQh+MEAAj9cYSCEcvnCWaOSs2qqmw=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=ogkYd6t3fWh1eTAKZlycwfu64c+OZ7HWpKgsVYAuegw6/3WfiJEPfP/lNt5JOsQTz2J41G2W2uzkQl7F1V9wDW/Ic/x0DNVtIH5pCFzzZFiyVCOef8+guRNCAOVsGwBcCh9dQM04dEoEIEYHFdZ30su9yV7677DDXlKrHFkqxdw= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=kqJNZGJ5; arc=fail smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="kqJNZGJ5" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086669; x=1792622669; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=eI2EbLbhuV6qX5xQh+MEAAj9cYSCEcvnCWaOSs2qqmw=; b=kqJNZGJ5NyLd1nl4aiuAYnd023onPdMK466ORxzxaKtZWptYBSbxR+sP mz3ZMVJmE25A79u2xHHMs/MScL1+CCxdB8b0k3JFDblEuzgKTsdDyY9mc 9Ft92Cut4t5l2aD/6USNQGsbkc5txPLaPd+um0CnVSXkH/M1A53y+nLjP mKEEyZ+fnDHMEHSkzF3CmmNEf6OUVnC1ilUZ3x/I38DMwMZr68+D2iu4N /9AwERi3oy1isoE5/AkK5T6RJUV7vwXp3ZcYRqDluNhmxxtPhMHSiiznu iKqXhHB5ijWtQav4th62CPntKXdGKQikalEdoj9dfS3WHarkkK4y8uyx6 A==; X-CSE-ConnectionGUID: oqH8WLQfRauNW9tTBYWkTQ== X-CSE-MsgGUID: 7VAzue2SQ+m3GJqRr43lSQ== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="73830950" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="73830950" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:44:28 -0700 X-CSE-ConnectionGUID: PhrhzIiBRLuK+fN/WT/9wg== X-CSE-MsgGUID: v1jlVHX8T/SDF+9LU5Eg6g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="214345850" Received: from fmsmsx901.amr.corp.intel.com ([10.18.126.90]) by orviesa002.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:44:24 -0700 Received: from FMSMSX901.amr.corp.intel.com (10.18.126.90) by fmsmsx901.amr.corp.intel.com (10.18.126.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:44:20 -0700 Received: from fmsedg902.ED.cps.intel.com (10.1.192.144) by FMSMSX901.amr.corp.intel.com (10.18.126.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:44:20 -0700 Received: from PH8PR06CU001.outbound.protection.outlook.com (40.107.209.49) by edgegateway.intel.com (192.55.55.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:44:19 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=VdBE8jWzWp3zFLgOBEXBqa+hw3NtaQgShajDOknzW54DsuzggbE83NDEI4RPgZERTl5EE5dS861/QC822fR7g7kGbDARTtXgjl7Jn0VXPw1YgiJTmSje921pVCkWKqAJaRq4WNqv6nSBADgO9w1spnmjlE904PZonzgi5OousNO6nx1cqjhCc+hRHgDmp29TVsr+PbPhHKlas6fmjR3owR/V0Wtr1rQZ6MxTbsL9s3N+nNTo9vfxUL9UdMgmtjD+kLjHc51ESTAoAOv2cbL2UNkJe46N85epVjndjboFBtyy+bSYh3Nqz3fY9yoyctNrHDJTFk9i9adl6z5Xuj92yg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=TW9NePUO7mkpRHzJnbD6YZw+KAtNXIoGZ/Nk/mmX0Rc=; b=F2gpqmjMVOF54tzrUHJLmrWd49dEcCE1TJ10e3t1OCwHKm/89Rt0G7rRoaeYEK/fEsXs0X4Hb2qDknmuPupveZV9XdBpb4LRNnfFZDkO055wiOqydxjDEx3p3S/Y1mHGUGf1URBX7QbC5q0ci8WQs4O4ZU6mPdG2Fy2DO3cjxUSBDVk4AMGP+GJi06yqnqQr1oVs5wvGl4MlMfbTk58XrsqbyJ+Vwsu6pWCT7S3w0NFZWzT5Ga+oEiEX8OENulQjlrIl83x8Fiq8WGFs3PGjVbrKfpnMLOCF5T9WNpvu/P+tzz6I5L5nAyzkKxahYonZo7LXnewHArK9HHoTli+R5g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by DM3PPFF28037229.namprd11.prod.outlook.com (2603:10b6:f:fc00::f5f) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9228.16; Tue, 21 Oct 2025 22:44:17 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:44:17 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 21/26] drm/xe/migrate: Add function to copy of VRAM data in chunks Date: Wed, 22 Oct 2025 00:41:28 +0200 Message-ID: <20251021224133.577765-22-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: BE1P281CA0237.DEUP281.PROD.OUTLOOK.COM (2603:10a6:b10:8c::8) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|DM3PPFF28037229:EE_ X-MS-Office365-Filtering-Correlation-Id: 719091ff-a1c6-4b3b-092d-08de10f35e1c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|7416014|376014|1800799024|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?Sk9HbTNnQVNic1lKSjR5WXBxb3RqQ3hhcGhGLy96VllQYlJVY25YUHVhTCs0?= =?utf-8?B?WEkxaFJWY1hwdk1CcG5uR01MMUdDd3Z3a1RMZEF3ckx4Y0U5WFB4bExuZFhE?= =?utf-8?B?S0dLN2JvUGtYTmwvVk5yeTRTYTllWHQzMVltL0FwbUtNTzAwdS9hRW1zbTg1?= =?utf-8?B?Q0Vsb1NCaFBWUVk5T2VPeTRqVE5oUTJYUno1NHRNeituODc5YUlYSHFSczQ3?= =?utf-8?B?bXdCZE82S2pMQW1KakhMVmsyTkg1QWZ5VDYyRzFMeUdmVDRtWUlLcTVpdEpK?= =?utf-8?B?RExIaWF3T05TMEJVK0NqL0FYM3FyLzZiVDNZRmZlNkJrU29BZEE4c3lWQi9R?= =?utf-8?B?WkxhMDAxcHFBbUxwL2RZRVBrQStmakRvRXRSSnhlZnJ0VW1ocnVobXdIczIy?= =?utf-8?B?VE1SbGVJYjBOWjh1bW9RaGdXQ3VuQVFZSEx3d0I5OGo0L2NEMVNHT2tqU0Mv?= =?utf-8?B?UURROWpRdlM1aVBBT085L3pUNWMyN3lZV1pYZ1dKQ1NYdkQxeFQyU2ZRMkUr?= =?utf-8?B?dkk3WG8vamF3NTM4K05vYmJ1TEFyRERCc3FpYnJ3YW13V0lmT2thNm5HakNJ?= =?utf-8?B?bDA4UUdJVDVDUjJvZlVoU011N2N0WE13amlBS2hEcS94b3hVbHNEQVVYUWtS?= =?utf-8?B?c1JDc1V4bFVVRHZkb0dFbHk3WDJFUHJzRlkvMGRmVC9CSitBY0hJT0ZLNk5l?= =?utf-8?B?ajN2ZUloemFzMEhVaE9kdGVVSEE0Uy8yOHNmc2FGUWNEcWtueXU3MFVpZXlR?= =?utf-8?B?cGY3Mk1qMFJKZHJIUHRwODhhM2p0d01vUTFPUzVETGtBVFoyNDRYVlRxNW94?= =?utf-8?B?VXhmWXhDcllTaWRENDZQY3JIN1VFcWNKTW0vcHQ3T1ltZENhUjFIYlp4cWxu?= =?utf-8?B?cUZkOGZnYjhQSndsZXNkbHZ5STRNRnpwZU9rWFZyc2JNakx4RlplbUpsZnpO?= =?utf-8?B?aElQUFoxS0ppMHR5eFJUSGZDUEVRcUNnUm5vTzJWUTJtQy9uYmtrWWRVSWdL?= =?utf-8?B?am1tMkJwSDVxRzhuVDFubTM4dUVka2hhdG9nUHlMakNOR2U4RnJDU3lIOUVC?= =?utf-8?B?ZVhBMTlMTHk1Nk9zRElQTGxxTHR4bUpranMxckpKYXUrVUpjcitqTnZBVzNp?= =?utf-8?B?QVRIcTJaSVhZcFBtbGlEWUtUN2NlWWZoQTB0bVNRYUxNNlg3b3E2Q1krQmZ6?= =?utf-8?B?UE05TFlYVmU5QTRXeGN1eWNYeWJ0aWNRcENNMTVEUmFmWU9LUG9ZSGFpWnA0?= =?utf-8?B?TnhIMHIwem05dC9hQ0h5RkhnVlJRTGFsVnZmd05YblE0Y2pub0t6TUFGNmcr?= =?utf-8?B?TmdWemxRWHo0eDVKWmFFNjRRUEtMeUdtdUpTU1Y3eFFsdW9NYk1TWjhrTmFv?= =?utf-8?B?S2g0NERpTHoydTBNNGVKUTVHS0UvdE9CM2NlZFJHc0hleDAyTkJWcW5KVnZq?= =?utf-8?B?MkcrUmsybnhFNGJTTjVQRnVUWHNGbmVXbnhKZ2dySnNESHpsNVRhanBYRlVY?= =?utf-8?B?NFowK2lsVEdYRDN2ZWNWNFV2RFA3M2FnSFFKMzFVZmV0WjV4Myt4REk5aW5n?= =?utf-8?B?S0J1aHo4WnQ1RUx3OTltUllqWlVRYVczTStPWmFiZ1lsaklJd2NqOGl0ZndE?= =?utf-8?B?R2dXWTRsTDZzQWdwb3o4TGRzbHZGeUg0dGN5QzJrZStUUXVQdThIV0ZKUlM5?= =?utf-8?B?SjhIeUI4N2trWVVxZ1FJZlVlTFdJbDFNTDdtSGtWalp4RzU4MTlWSm1HQU5x?= =?utf-8?B?KzFuclZBK2FnNFQwMm1EZThpNUdXeVQzb3lIbkpoQ0lJZ1ovMlVKMW04anF5?= =?utf-8?B?SC8zcEdGTmhrczVwcHlhZmQwWWozOUs2YklPL3BNUVJkdXlCdXJYcFhiaTZ2?= =?utf-8?B?Szd5RGJCUlZ0aDhYTVZ6eVJYb1JkWkZtWTR6dC85NlRqSkd3NVozUWxwZmNF?= =?utf-8?B?Sm52K2VSenh2RWFPZCt6Q2xIUXo4L3B1YTBBT3hBZkJidkpGTFlEaGEva216?= =?utf-8?Q?dzxg9NpwuonzDmWiA6ATX1e7IkEwLI=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(7416014)(376014)(1800799024)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?YU9HUURuRFBxekVUYjlxUUhmWnJ0TTdnSlJpcUZNUUllaUo5U1BXcHcyakN2?= =?utf-8?B?eG1HcWUvVXF0ckNxcmVJS25leEpnUkZzdnloSkpjejZSejY1dk5UdVJlcDVU?= =?utf-8?B?czVkYzhvNHIwSWhMRk5tSmQ5dHFYMmhQc21JYTJtZTBlNXZ0RHBya2xrZnE1?= =?utf-8?B?eWoxSTU5RUZ0YW9IWFFRQzd1T0RtdngrTFNrQi9FRGdCNnpkbWEzeERHZUpL?= =?utf-8?B?SnI2N3owWlFzU3JBcHU0UVRPaXVEWUxhM0tWOGg0LzlRb04yakJqYWV0YXlP?= =?utf-8?B?SE5UcitXSjIxc29uOWMyRFJxVlRLZndzWi8vNitZbG51V01uZzdsdUprRGxG?= =?utf-8?B?c3k3NUxBN2J4TGFMZm92d2M1Y0I0SjhObWxVbWZXL1oyNnFRZ3RSUmxLaG5z?= =?utf-8?B?WmYzODltWkplYi91Z0FyRFVpdmFDRFJYdE1mTkZZak5ZMGt0T2Zxd2hWRFpo?= =?utf-8?B?am5LRnFZWGlnUGkwQ2hFR3NJZWRhWW5ucVN5SlhOL0pQNFBIZm5xNVc2ZWd4?= =?utf-8?B?S3JycEZMVzBTdmVOekZ3QTFIbXVXYW5HRnRNTXJzYVFTNlFkTWdKclV6MUVJ?= =?utf-8?B?aWRVSGpJd09kMEEwckllUndzcXo0cVdLa2xPTzRKRVhySTFhSE0xd29PN0RW?= =?utf-8?B?S3d5RGJrblA5YmhsSTd4aFJXMnQ1M29RK285dTh6UWR0QWFxNkxwa2pjTFdZ?= =?utf-8?B?eFVjMnJDd3BOaEcxM2lObUYySnhDdndSUWd3NnRveklaWlpsQllDY3lWcURs?= =?utf-8?B?eGl2NUdOMXpkYW4yWnJpdVd4V3crSkk0MFkyMWp0Ui9TUWFNOHNpaWtSWXFz?= =?utf-8?B?SWk4aXpDYTREdjNWWHV5UzhYNVpMM2I5czdBL3FGOHZESUpod2RBNGFyZUpD?= =?utf-8?B?UzhNOWRaUCtBOTA1cUxJa3BUOVZIYVFBK1BOZXZzOW1ZNXBRWUxYY250VXVV?= =?utf-8?B?bE5RcERmLzh6MzBjWjF3ZDBTc2JVMlJDZXlLVG1UcGJSdnhES1NoR1YrUTFi?= =?utf-8?B?T2g3cHdHWVlTY2E2RzhnVW4ybXZ3My9ZUUJTUEYyYkkrL096TkRXaExUTFNz?= =?utf-8?B?YXM3WEZuVEFEL2hZTlFMcVhLSkZ6UE9lQW8xWWdZbmRwcXJIZzVoOUhaUUt4?= =?utf-8?B?Z1pBUEkxY2tPQ28wMmQ4ZnArNU41TVpNbDByZHArTXJvTkxRVGhDRG11MXYw?= =?utf-8?B?VCtoVDdrSUlXSEZINzdwMkVDSnM0YTk4aVE1U2E4cFNiUDdHTW9ab2F4SHRG?= =?utf-8?B?bTBJRHBqaS95UW0wVndKd0VXSFJQd1BJOUZoZGJ5V0FPQkV2bEVlSmlxdm9O?= =?utf-8?B?TSt2bUdsR1dwK08xQWtoU0hHS0NvalV4Y2t6SmpGOE81SUgyZ29ieEVIZ2Vx?= =?utf-8?B?aWhERDlZVzZ2UHNFMDNxT3NhRUpSYTdzMXdZd01IVzZ4RFg5MldiK1JMdkZI?= =?utf-8?B?eWRVVHhJNU5ja2lNL0hTK0poVjZ0cVE2djNKRjg4c28xSHJxT1laZWh2V2cw?= =?utf-8?B?VDRMZ0ZPNFJQbUs5OW9wTThPais4RWJZWXFnOVJvbHd5QmwxU0MwSHNkSWNF?= =?utf-8?B?RFFLQzV5VTZ6S085K1BhazRkSlk2UEE4M2pRME5FTmd2cCtxL0tZYVJyNGgw?= =?utf-8?B?M1JpNit4MnBhVkpmRDNyNkVRYzI5UmxQc1RrWUttR3YvNVFjYm9wYnd0eWRP?= =?utf-8?B?NHYyTWRnRjBZallXM28xRDhTQk8xSFBKWXNHQTFidzBJM2Job1RvVWdDZUVj?= =?utf-8?B?MkZic0Nsc0dnNmtqRTlyL1hKUVJFZjVMdGl4aWtrNldZQVVhOVRiakJIUG93?= =?utf-8?B?VzlmUlpOVDA5c05HaFY5QlBCdVl2VTQ3SmNhczh1QnkxN2F1aDIyTXQ5RFpO?= =?utf-8?B?WDAwcGwyaFJwSVBCOW85elMvWnFEblJaYjRyVWw2cTNlcEo0OW5HbVM1bmdt?= =?utf-8?B?SkFNQ21YRDF3K2FFb0hKY0Nyem9LNGloSUJFQ08vWWo3Y0lCOWZHMERRY2xG?= =?utf-8?B?RFBZY1VOSEZ1Uzd6V0pxTU9mWEgvR081enVyVTdqVUFlR29uZDBJZ0tKTkVZ?= =?utf-8?B?Z0VhRGdJUnZXWG9QVUl1VTcwS0VXUWdYUUY1RW5BUlhDOGJSdjROQTRKRFVU?= =?utf-8?B?VXJORU1Qb25haDlYRWdMTVVwY1lHVDhYTXhFTzJDS1ZTSm9DTVJXRlJhUjdv?= =?utf-8?B?UUE9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: 719091ff-a1c6-4b3b-092d-08de10f35e1c X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:44:17.6521 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 2Wl00gyTgZ4SY844bM6ijJGeOyWrC/lw05mf/eqTKI/FtQc7J7C4D5KujCoVWFlDTZ59eBSA4f+ggiySS/n/HZOz7teBc/xlPyxgAky068M= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PPFF28037229 X-OriginatorOrg: intel.com From: Lukasz Laguna Introduce a new function to copy data between VRAM and sysmem objects. The existing xe_migrate_copy() is tailored for eviction and restore operations, which involves additional logic and operates on entire objects. The xe_migrate_vram_copy_chunk() allows copying chunks of data to or from a dedicated buffer object, which is essential in case of VF migration. Signed-off-by: Lukasz Laguna Signed-off-by: Micha=C5=82 Winiarski --- drivers/gpu/drm/xe/xe_migrate.c | 134 ++++++++++++++++++++++++++++++-- drivers/gpu/drm/xe/xe_migrate.h | 8 ++ 2 files changed, 136 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrat= e.c index 3112c966c67d7..d30675707162b 100644 --- a/drivers/gpu/drm/xe/xe_migrate.c +++ b/drivers/gpu/drm/xe/xe_migrate.c @@ -514,7 +514,7 @@ int xe_migrate_init(struct xe_migrate *m) =20 static u64 max_mem_transfer_per_pass(struct xe_device *xe) { - if (!IS_DGFX(xe) && xe_device_has_flat_ccs(xe)) + if ((!IS_DGFX(xe) || IS_SRIOV_PF(xe)) && xe_device_has_flat_ccs(xe)) return MAX_CCS_LIMITED_TRANSFER; =20 return MAX_PREEMPTDISABLE_TRANSFER; @@ -1155,6 +1155,133 @@ struct xe_exec_queue *xe_migrate_exec_queue(struct = xe_migrate *migrate) return migrate->q; } =20 +/** + * xe_migrate_vram_copy_chunk() - Copy a chunk of a VRAM buffer object. + * @vram_bo: The VRAM buffer object. + * @vram_offset: The VRAM offset. + * @sysmem_bo: The sysmem buffer object. + * @sysmem_offset: The sysmem offset. + * @size: The size of VRAM chunk to copy. + * @dir: The direction of the copy operation. + * + * Copies a portion of a buffer object between VRAM and system memory. + * On Xe2 platforms that support flat CCS, VRAM data is decompressed when + * copying to system memory. + * + * Return: Pointer to a dma_fence representing the last copy batch, or + * an error pointer on failure. If there is a failure, any copy operation + * started by the function call has been synced. + */ +struct dma_fence *xe_migrate_vram_copy_chunk(struct xe_bo *vram_bo, u64 vr= am_offset, + struct xe_bo *sysmem_bo, u64 sysmem_offset, + u64 size, enum xe_migrate_copy_dir dir) +{ + struct xe_device *xe =3D xe_bo_device(vram_bo); + struct xe_tile *tile =3D vram_bo->tile; + struct xe_gt *gt =3D tile->primary_gt; + struct xe_migrate *m =3D tile->migrate; + struct dma_fence *fence =3D NULL; + struct ttm_resource *vram =3D vram_bo->ttm.resource; + struct ttm_resource *sysmem =3D sysmem_bo->ttm.resource; + struct xe_res_cursor vram_it, sysmem_it; + u64 vram_L0_ofs, sysmem_L0_ofs; + u32 vram_L0_pt, sysmem_L0_pt; + u64 vram_L0, sysmem_L0; + bool to_sysmem =3D (dir =3D=3D XE_MIGRATE_COPY_TO_SRAM); + bool use_comp_pat =3D to_sysmem && + GRAPHICS_VER(xe) >=3D 20 && xe_device_has_flat_ccs(xe); + int pass =3D 0; + int err; + + xe_assert(xe, IS_ALIGNED(vram_offset | sysmem_offset | size, PAGE_SIZE)); + xe_assert(xe, xe_bo_is_vram(vram_bo)); + xe_assert(xe, !xe_bo_is_vram(sysmem_bo)); + xe_assert(xe, !range_overflows(vram_offset, size, (u64)vram_bo->ttm.base.= size)); + xe_assert(xe, !range_overflows(sysmem_offset, size, (u64)sysmem_bo->ttm.b= ase.size)); + + xe_res_first(vram, vram_offset, size, &vram_it); + xe_res_first_sg(xe_bo_sg(sysmem_bo), sysmem_offset, size, &sysmem_it); + + while (size) { + u32 pte_flags =3D PTE_UPDATE_FLAG_IS_VRAM; + u32 batch_size =3D 2; /* arb_clear() + MI_BATCH_BUFFER_END */ + struct xe_sched_job *job; + struct xe_bb *bb; + u32 update_idx; + bool usm =3D xe->info.has_usm; + u32 avail_pts =3D max_mem_transfer_per_pass(xe) / LEVEL0_PAGE_TABLE_ENCO= DE_SIZE; + + sysmem_L0 =3D xe_migrate_res_sizes(m, &sysmem_it); + vram_L0 =3D min(xe_migrate_res_sizes(m, &vram_it), sysmem_L0); + + drm_dbg(&xe->drm, "Pass %u, size: %llu\n", pass++, vram_L0); + + pte_flags |=3D use_comp_pat ? PTE_UPDATE_FLAG_IS_COMP_PTE : 0; + batch_size +=3D pte_update_size(m, pte_flags, vram, &vram_it, &vram_L0, + &vram_L0_ofs, &vram_L0_pt, 0, 0, avail_pts); + + batch_size +=3D pte_update_size(m, 0, sysmem, &sysmem_it, &vram_L0, &sys= mem_L0_ofs, + &sysmem_L0_pt, 0, avail_pts, avail_pts); + batch_size +=3D EMIT_COPY_DW; + + bb =3D xe_bb_new(gt, batch_size, usm); + if (IS_ERR(bb)) { + err =3D PTR_ERR(bb); + return ERR_PTR(err); + } + + if (xe_migrate_allow_identity(vram_L0, &vram_it)) + xe_res_next(&vram_it, vram_L0); + else + emit_pte(m, bb, vram_L0_pt, true, use_comp_pat, &vram_it, vram_L0, vram= ); + + emit_pte(m, bb, sysmem_L0_pt, false, false, &sysmem_it, vram_L0, sysmem); + + bb->cs[bb->len++] =3D MI_BATCH_BUFFER_END; + update_idx =3D bb->len; + + if (to_sysmem) + emit_copy(gt, bb, vram_L0_ofs, sysmem_L0_ofs, vram_L0, XE_PAGE_SIZE); + else + emit_copy(gt, bb, sysmem_L0_ofs, vram_L0_ofs, vram_L0, XE_PAGE_SIZE); + + job =3D xe_bb_create_migration_job(m->q, bb, xe_migrate_batch_base(m, us= m), + update_idx); + if (IS_ERR(job)) { + err =3D PTR_ERR(job); + goto err; + } + + xe_sched_job_add_migrate_flush(job, MI_INVALIDATE_TLB); + + WARN_ON_ONCE(!dma_resv_test_signaled(vram_bo->ttm.base.resv, + DMA_RESV_USAGE_BOOKKEEP)); + WARN_ON_ONCE(!dma_resv_test_signaled(sysmem_bo->ttm.base.resv, + DMA_RESV_USAGE_BOOKKEEP)); + + mutex_lock(&m->job_mutex); + xe_sched_job_arm(job); + dma_fence_put(fence); + fence =3D dma_fence_get(&job->drm.s_fence->finished); + xe_sched_job_push(job); + + dma_fence_put(m->fence); + m->fence =3D dma_fence_get(fence); + mutex_unlock(&m->job_mutex); + + xe_bb_free(bb, fence); + size -=3D vram_L0; + continue; + +err: + xe_bb_free(bb, NULL); + + return ERR_PTR(err); + } + + return fence; +} + static void emit_clear_link_copy(struct xe_gt *gt, struct xe_bb *bb, u64 s= rc_ofs, u32 size, u32 pitch) { @@ -1852,11 +1979,6 @@ static bool xe_migrate_vram_use_pde(struct drm_pagem= ap_addr *sram_addr, return true; } =20 -enum xe_migrate_copy_dir { - XE_MIGRATE_COPY_TO_VRAM, - XE_MIGRATE_COPY_TO_SRAM, -}; - #define XE_CACHELINE_BYTES 64ull #define XE_CACHELINE_MASK (XE_CACHELINE_BYTES - 1) =20 diff --git a/drivers/gpu/drm/xe/xe_migrate.h b/drivers/gpu/drm/xe/xe_migrat= e.h index 4fad324b62535..d7bcc6ad8464e 100644 --- a/drivers/gpu/drm/xe/xe_migrate.h +++ b/drivers/gpu/drm/xe/xe_migrate.h @@ -28,6 +28,11 @@ struct xe_vma; =20 enum xe_sriov_vf_ccs_rw_ctxs; =20 +enum xe_migrate_copy_dir { + XE_MIGRATE_COPY_TO_VRAM, + XE_MIGRATE_COPY_TO_SRAM, +}; + /** * struct xe_migrate_pt_update_ops - Callbacks for the * xe_migrate_update_pgtables() function. @@ -131,6 +136,9 @@ int xe_migrate_ccs_rw_copy(struct xe_tile *tile, struct= xe_exec_queue *q, =20 struct xe_lrc *xe_migrate_lrc(struct xe_migrate *migrate); struct xe_exec_queue *xe_migrate_exec_queue(struct xe_migrate *migrate); +struct dma_fence *xe_migrate_vram_copy_chunk(struct xe_bo *vram_bo, u64 vr= am_offset, + struct xe_bo *sysmem_bo, u64 sysmem_offset, + u64 size, enum xe_migrate_copy_dir dir); int xe_migrate_access_memory(struct xe_migrate *m, struct xe_bo *bo, unsigned long offset, void *buf, int len, int write); --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 623DC2BEFE7; Tue, 21 Oct 2025 22:44:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=192.198.163.11 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086673; cv=fail; b=sZou/DmK8RbpOSdj81FgdG18n82yzCuFrhvj8Us48Kg+JS5F6lRZUDm5k4y7fDNHk0dOCOIDEKVe/qGVHVPuoBipptzBtC61+o1qRFRCapj95ivai4gEow1C82Alxs37FfZWmiwF75YMcuRO8FaLuGb2SelSSIiQ+2wbiWpugO0= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086673; c=relaxed/simple; bh=7ziXZ5jQipiMs75AbmhEV//3Po2ExXx7nYQzcSvFEmQ=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=T8rdQv5Z/NCkuXBEu+Q5nC/8aPxGuK/3Rv2yyMC8lX6QuEugjQKjKnEzo7mGyF5is4M4ouUh2vEn9XN3luz2QvWrJ8fWxzh0j8jKrzXTZnvCndUFhchL1Ttx0yT8AxwtqazoQGvpFVmneWW0Yigu8uZdSBEY8fXPnMaS5cUuNTw= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=MQQnu1Mt; arc=fail smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="MQQnu1Mt" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086670; x=1792622670; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=7ziXZ5jQipiMs75AbmhEV//3Po2ExXx7nYQzcSvFEmQ=; b=MQQnu1Mty0KO3tky0PJ/xK4kcu+9/hg0euOZlccjkooa+s6pTJoCR2e/ reo1gwVRTirxJbl1+KH/8zoVDk5qQJ0YoTm5fQg+XfVYP38SGR2POlJZo SdewTzIzfOJTJMcZq/TtBpOTLQ63LAfGARhO1MU6HhdjHsP+ZkVbCgIZS bQThHuur0f7YehV96cFTovaShYLQR57RCkO+G2FrcjoVVX0wwFCXNS8dY fxda9eqVn+q7Pk5iG9UD7MaPTZzMtJu02cHfIVJpso04sjjI4352DWupT RXRUbrIKYwFVoLmuWfi95A+az5+LA/GKUJEmjYNyVxh1l0aQFsZtKt9ov g==; X-CSE-ConnectionGUID: h4lHPt9xTomvdmno/BiTcQ== X-CSE-MsgGUID: aCyshPsDRtOXcNo47FRLdA== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="73830951" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="73830951" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:44:28 -0700 X-CSE-ConnectionGUID: 7z2zTJrCQyK+4VvZiJD59A== X-CSE-MsgGUID: rWD2Sx9YSoCl9G/ZYRWheg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="214345854" Received: from fmsmsx901.amr.corp.intel.com ([10.18.126.90]) by orviesa002.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:44:25 -0700 Received: from FMSMSX903.amr.corp.intel.com (10.18.126.92) by fmsmsx901.amr.corp.intel.com (10.18.126.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:44:24 -0700 Received: from fmsedg902.ED.cps.intel.com (10.1.192.144) by FMSMSX903.amr.corp.intel.com (10.18.126.92) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:44:24 -0700 Received: from PH8PR06CU001.outbound.protection.outlook.com (40.107.209.12) by edgegateway.intel.com (192.55.55.82) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:44:24 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=w9BZt+FGjp2/Jtd8Y5TLYpMcsiZQQsBu7KJY04W9+kKk0txtaH6W2d/ru3a+3w6DZXTvjxyqp/ijsxvclbxXfyHyd7bpdfUz9cGMTAFLd7CkpPFQC/qcK7PDGTt3lWwzfQQLDTGD1D3tkeCr0KbgEzcOLJPLHRDo9ogwlL9I3a8KIFqiZvh0TDrfSGSj4HDZc7FVHRXL2lcxKW7Bwsl6bJUjo4lOFxtQ9WLeoSq3vusoJpdjXUJzNxiqy6OURaecO7Xw+1zJyE1HT9Zq1V7SHvCK9l8id6cgFoMwnl/Zg2OBDxgRKBDf0hVSnPs1m39F0zaXD9m5q0xXSr1o09wi1A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=zIcjW54xHAdWPHRQsH/IXcmDtPbJKZWbTFeWgAZLd4Q=; b=AcWggVFfVeCgT0VBVuh/wqoTGCe+mtqLG5C9ul5yOIfdo5jpCmvui3bvVUq6Z0EBD3onIJ8bfGe0ZA/wFmYSje0GjvaokIQr/4upWMrCwArBknG4hBU8G3/2VeuZ+E9Kp/e61Jv9/o5LA4Z/hcR3QAC0PH+gyUftJn4SF3s8vqUa0tSPUbjY4lfGBdw7QGMXYZVyaGPZW2Z6y5+2rA7jqUSKtqSSTXNmqrE89ZAHGixznSQHOjY5WhHSzuClMwgl/leeIomlH3Jf8e6FdYoNNCMV+Mt3rwi+r1dlSesw5JCGCTkLtg9JbtflVB5tRTKXOzwlHujUKxw4Rj93FF9PDg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by DM3PPFF28037229.namprd11.prod.outlook.com (2603:10b6:f:fc00::f5f) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9228.16; Tue, 21 Oct 2025 22:44:22 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:44:22 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 22/26] drm/xe/pf: Handle VRAM migration data as part of PF control Date: Wed, 22 Oct 2025 00:41:29 +0200 Message-ID: <20251021224133.577765-23-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: WA0P291CA0022.POLP291.PROD.OUTLOOK.COM (2603:10a6:1d0:1::22) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|DM3PPFF28037229:EE_ X-MS-Office365-Filtering-Correlation-Id: 28ab3818-199c-466c-947c-08de10f360b3 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|7416014|376014|1800799024|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?UmtlcGNxMTB6SDlpaW52Sm8xeFFVRnJJMlVnS2h5aHN3RXJRdHlkNWNoMktN?= =?utf-8?B?YzVlMm53U1gzeTlsSlZ5YXMwS25LUXNNUTduZmwwblI5Z2FURU9iWDcweElh?= =?utf-8?B?MUc1VWxKLytyVWJSMUYrVkkzQVBHekFhQVpycCtWRTZuMEo0Y1o5NTU2YWx6?= =?utf-8?B?N2xVdXlXSld2ZDRseWo3dFdWc3cxaURpemN1RHNDWmpQWnpGUWdVMHQrTU1L?= =?utf-8?B?ZGdJcXdaa09vV0IrUTNhbGEvemx6bUFBdVpVZ1V3TGV3ai94Z3Blcnl6RGEr?= =?utf-8?B?bU5VbTRJOFhPd2VpSkVvcURPcyt0Rno4STQyZlMyUHVPS3I1SkFmc1hxNk9s?= =?utf-8?B?TFdBbVMrR2lXYXZhTVVIcVJuNjBobWlmbXJqTEorM0hXUERTVjdGYXdDWmVN?= =?utf-8?B?M0JObVdpTVNlS0F3WklDdkxYWUMzeDBENXNkQk5HeElreU5Zc3QwVFBRcEFw?= =?utf-8?B?YUZveXlaTHpwOG9vVTlmdTFXMFdLUXpVWUs1aWRCdnhPK1ZUR0duamxKUXUy?= =?utf-8?B?WUxJaWVLYjFUZjdPcFZUS0dveEVPdzdHeVVtVjRGQW8wK3A5OEhlNGNiby9a?= =?utf-8?B?TjY5YkROR2pZVmg4OUh6djU0QkNUa2FETkJ1SmJ3ZGFFQ2dlVFdOYWpzOTd0?= =?utf-8?B?ckdhSXhVeVBuWEtEa3ZuT21icENUTmw3TlcxYjhzMHRHbzBJMDZJUVJ1Sk5h?= =?utf-8?B?VE9vbFVUVXcrSTVkcGtYUmtwUC9ObUNZSXVleW5HSTFXNFBhbDlvWmhCYytx?= =?utf-8?B?OVVFRzF3SHdnSWRhd2xNdkllcU5ncExCRTRQcy9WUU5CaHRVaXBYZERnOVRS?= =?utf-8?B?U1RiQnRWcC8wWFdDMzg3YWd3WVNXQTJReHpNSDlYcEQ1ZFk1ZXJWUHRsY2Ra?= =?utf-8?B?NitISDlsSEF6dUlwVGZDNCtEOWd6bWZ5VEZmd0dVdDRNR1pWcDlUZ3RtY1g1?= =?utf-8?B?dWlkMUQrZ1JUU2NsU0J2UmNZMW1JOVloWGF6eG13azk4d1E2cXpWOEZQb3Zp?= =?utf-8?B?bnVFUTJRUlVvUFZCTlNYK0RBTHRraStnQ3V1YW9ZVXRvVHdUVlI2blQ3Qnc0?= =?utf-8?B?amN4QTM5TlpzVVpQSlpQdDhDaU9Sck1rUDBxSEUyYmhjS2dvdlpwZ3FuZCt5?= =?utf-8?B?b096OVdodkZSK00yTVpzTUVDMEMrWWJLRzlHN2tHeHBZQVExZmVJZk40V2JO?= =?utf-8?B?RWJYRERMRzBHTHFPQmo2OG5JbE42SGI1VHNNYVZoZm1vUmtVVUcvc0c0OXpx?= =?utf-8?B?dlZxTlcrcG5wRnB6NE45QUdYcmhNZHN2bG1UZFVFWk1VUzNvOTNTclJlWWJV?= =?utf-8?B?eVZndUo2aHRRbll3bDJENTFqNDM2OXJjZ0llaDlXY0tNaE05RS9KNFdRRkNS?= =?utf-8?B?Zms5QWQ0ZkxNVWFlbEk3ZGxkZlBFVVZqSnRMZ3F0cEE0d1ZvdXphM0NEQm5z?= =?utf-8?B?Nys4VlA5aXE3dXBWZi85cytpVGVnVHhhMCtydjY3eDJML2h5eUMxYkw3SUdU?= =?utf-8?B?K3JOelNCUXNDQmJVZ3dPaDhRem9RRVMraEZrK2xPTDJEd1VKZW12V0NYWWlr?= =?utf-8?B?TGFjRW1PNXpzUU1BYU85Z1dNTkcvaFpTNnFnTGxXMkI4MkkxTDNMV001cWVC?= =?utf-8?B?dnNseVp4azY3VW02aHE2ajBweWpMNUY4YjRvN0xzVVBSdTZDN0xhbEVwU1VE?= =?utf-8?B?ZEQ0N1Q0WXVFVCtQRVhGakdQb0wzVERCWUdKb2VOSTFTRzRHdjJ5MWhROUU5?= =?utf-8?B?VUV0WmRsMlJ0MFByQk4reVVnWmFZRnJ1L2dOclhvUjcyTk1ESGJOYVJXTEhy?= =?utf-8?B?S2tPcDIvOVhBVXJYZEk5RmN4Wm8xcEJLQUR0R0JJMFJGdWFRalpFTFE5L0F1?= =?utf-8?B?RXU1NW9ic09JdjBKcXZMS2k5dndQdXdhTFZPc25hUnZtTUhXZDRMaDNrT0Jp?= =?utf-8?B?NWR6eW03OUZocnpISzNNU3JQSkJqNnlVNGpJcFJVcFlPd2xFNXNIZHRsenFS?= =?utf-8?Q?ZmE+mFe0w4LLgxa6cRbGu80vdma5iY=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(7416014)(376014)(1800799024)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?MlFjVXM5YUlZQW9VR2E3dFRYYzg5MVE1ZGNxOXpSV3VPWVh1QXYxZVc4SWdl?= =?utf-8?B?VGtLakJGVjNWdkF1SEN1VFBuNVJkb0ZnejZoODZBV2V3dnFYUllKYWNBdlRz?= =?utf-8?B?R2tiZDVqaHdWbTUyTmtrdUNjcjgwMU9NNnE4YmFBeTlUSmxubkFuRFNjMitw?= =?utf-8?B?ZE10aTNLcGY1Rnd0QWpycUxISW9MNHZzZ0s0dUFhTjJQcGlCeEh5cnRPYW9G?= =?utf-8?B?YXJ5dDV4RDFNYjl6T0ZObThEMVRzS1BoOGJUdnNUVnJOVE1hMTIzMjVweXJS?= =?utf-8?B?R3ZEaEpoYmRDUExzNTlMNFdqdEhyUzQ1VGFpaUMwS2ZYcVBvWU1yL1didkxP?= =?utf-8?B?d3N2RTFwWGJnSmJXTnBoaXlGa0RrZ25FNlcyNU45ZzFzR2xZaFM4ZXBDYzN0?= =?utf-8?B?UGVxcncrV3NPelcvQUovZUVyQWpQTVBEU05FUjNzc2RDOWZhMnlnMmlsVGx0?= =?utf-8?B?eEJobEJBUTdEVXJvRjFrUUsrL2o0ODBnNlkyS2U5TnNpSWpveUg1NFY1WHBw?= =?utf-8?B?VHdGV2ZEZW1RNlArZ3gwOU5wM2RWeXEwL00xd010OXJCRWpsUVp3S2tQcjR1?= =?utf-8?B?N0kxL2ZneWZvbnlzZ2MwQzVYaFZMZWkrZnZnZmRsam5CUURaWGNDVEFta2RO?= =?utf-8?B?TDJ0SnNiZFZMakhPdzVsMjkwLzg4djAvL0NOTVlldk9JV0wxWTdWa2hBN0s0?= =?utf-8?B?VS83S3I1OUZPdkVBYUMwUnF4R256TTdKN1N6S2ZnL21oRzNIY0MwVTdKUDJO?= =?utf-8?B?clFROVR1a3RIM3h6V05ldXU5V2Q3cTRnWDRjaVBramkyMmxCUGFIREpEU2pa?= =?utf-8?B?RlBXengxYTZudmU5UFZaUzl6VXZDVGsvek9IRnc3QWVCZ1VYS3JiSEFteWFL?= =?utf-8?B?OHBBT3lGaWt0YzRLVmwwUG9DNmJoU0ZLa29Qd2puL1NjZE9vUjRSeXZhQWJW?= =?utf-8?B?WTFtTzM5R2c0cEtHRUx3alRCeFdEUTZmcmpmQ2w2ZUZWdm5VSURrSnNOQ3pu?= =?utf-8?B?b3dKd0FkZG5QeEN4TTk4KzRGRlJ6WG1JYUxUSUtoaVY0VUlEMDZJRkFKZVNj?= =?utf-8?B?Ym5JTmYzT3VDVi83bjd2UWhPemN4K3ZFQWIvM1poVm9oeWpvTFp0YnhuK1VB?= =?utf-8?B?L1J6bGt3OHA3RG01ejlRY0V0U2NQMFVtT0lQTGhpUnE1WW45M3FCMTJqNTRZ?= =?utf-8?B?THdxSENjbDRndXNzNjJoYmJZeGN6cVlSNDAwbjdBSW1SQzJSb2Z4UTVKWlV4?= =?utf-8?B?dTFyOVhjeUlVY3prTGlDcnVkQktmbGprODNNNzhhRlliVDdtL01xMkZDREI4?= =?utf-8?B?QTRxL2kvdmZjOGJ4elFUemowbVlVNmZpWVdrQ0lKUFAwQWcxSFdrZVlHN1pV?= =?utf-8?B?UWZPK3NoanlRWWhoZUdYY1lHdGwxWGZGYjgxMWVETnV5UVZSbXF6WXo1VmY4?= =?utf-8?B?OThIUTFZVDRmeWxFTTV4bm1GL1NReHRFU2dyclNmdDF0SDQ5ejRkM1JtbTdC?= =?utf-8?B?K3JrczRpdUY3bXpZQmRoU3piV2JhQ0QrMlg2Mmc0MVh3dW5xcFB6SU1yaFNo?= =?utf-8?B?RzhSWG8vZXRqK0toNlBTeXdUTW1pbWswa3JmcC91SXFic3BGdlNuQUY5UU1W?= =?utf-8?B?SnA4NjBuQWlPSHdpeUhzWXlsYk9saHhvWC9hNzJvL1dkZ2JtNG5kelJYTExF?= =?utf-8?B?ZFZtQlBXMXlHaWt5WkhuSEtWcHRiNWhpMW5raG82YUdPcDFMTUN5RFFqclla?= =?utf-8?B?K0Fwc3FLNnUrRkFwWFpIekJSU29rbnV4VTVveFh0RkdWWk1SNlRDVVNORU5N?= =?utf-8?B?YnI5cE5YMHBUUVhtank3RVRQNlFRUzdQMnBoWWFhRnhKSWMvTXZiVitiWnZv?= =?utf-8?B?U1Jodk1PbFdoWlVKdWJoWXlEL2JPbjliMGxyNnQrcDZweVlXWXhWbE92bjNr?= =?utf-8?B?b2JCWG9oOGR2KzRYTE8vU0lkVTg1Zjd5eTdVZVVFQ3hJK2dyQW9zY3BoaEsy?= =?utf-8?B?NkFuRjI4aFkrenUzRmd6dW4ra0RIM3JTaFMvMWhHRVdmckNwSkgveDF2Wnlh?= =?utf-8?B?dXFQMG52UndpUmlaN09EZTVtRXhmeWNNQzZOTlFaOGw3RmlYRU0yUzlZbTg1?= =?utf-8?B?MlBBcGd3Wlh0RTdveTlWMUt1QWZpVG1oa2s3aUxHekVzQU03QUQ0V2ZDZmsw?= =?utf-8?B?Zmc9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: 28ab3818-199c-466c-947c-08de10f360b3 X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:44:21.9950 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: dXRlsAicdTHVqjHRuU39HVT63WRFqOCiyXhXWv/p7TdBoWdQK7BkCPWjTu9B96Lz+Gt2hSyIbimRdoqkXTvTBWGE9EABn2cOVdG0NCS1SM0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PPFF28037229 X-OriginatorOrg: intel.com Connect the helpers to allow save and restore of VRAM migration data in stop_copy / resume device state. Co-developed-by: Lukasz Laguna Signed-off-by: Lukasz Laguna Signed-off-by: Micha=C5=82 Winiarski --- drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c | 18 ++ .../gpu/drm/xe/xe_gt_sriov_pf_control_types.h | 2 + drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c | 222 ++++++++++++++++++ drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h | 6 + .../drm/xe/xe_gt_sriov_pf_migration_types.h | 3 + drivers/gpu/drm/xe/xe_sriov_pf_control.c | 3 + 6 files changed, 254 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c b/drivers/gpu/drm/= xe/xe_gt_sriov_pf_control.c index e7156ad3d1839..680f2de44144b 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control.c @@ -191,6 +191,7 @@ static const char *control_bit_to_string(enum xe_gt_sri= ov_control_bits bit) CASE2STR(SAVE_DATA_GUC); CASE2STR(SAVE_DATA_GGTT); CASE2STR(SAVE_DATA_MMIO); + CASE2STR(SAVE_DATA_VRAM); CASE2STR(SAVE_DATA_DONE); CASE2STR(SAVE_FAILED); CASE2STR(SAVED); @@ -832,6 +833,7 @@ static void pf_exit_vf_save_wip(struct xe_gt *gt, unsig= ned int vfid) pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_GGTT); pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_MMIO); pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_DONE); + pf_escape_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_VRAM); } } =20 @@ -885,6 +887,19 @@ static int pf_handle_vf_save_data(struct xe_gt *gt, un= signed int vfid) ret =3D xe_gt_sriov_pf_migration_mmio_save(gt, vfid); if (ret) return ret; + + pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_VRAM); + return -EAGAIN; + } + + if (pf_exit_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_VRAM)) { + if (xe_gt_sriov_pf_migration_vram_size(gt, vfid) > 0) { + ret =3D xe_gt_sriov_pf_migration_vram_save(gt, vfid); + if (ret =3D=3D -EAGAIN) + pf_enter_vf_state(gt, vfid, XE_GT_SRIOV_STATE_SAVE_DATA_VRAM); + if (ret) + return ret; + } } =20 return 0; @@ -1100,6 +1115,9 @@ pf_handle_vf_restore_data(struct xe_gt *gt, unsigned = int vfid) case XE_SRIOV_MIGRATION_DATA_TYPE_GUC: ret =3D xe_gt_sriov_pf_migration_guc_restore(gt, vfid, data); break; + case XE_SRIOV_MIGRATION_DATA_TYPE_VRAM: + ret =3D xe_gt_sriov_pf_migration_vram_restore(gt, vfid, data); + break; default: xe_gt_sriov_notice(gt, "Skipping VF%u unknown data type: %d\n", vfid, da= ta->type); break; diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h b/drivers/gp= u/drm/xe/xe_gt_sriov_pf_control_types.h index 9dfcebd5078ac..fba10136f7cc7 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_control_types.h @@ -36,6 +36,7 @@ * @XE_GT_SRIOV_STATE_SAVE_DATA_GUC: indicates PF needs to save VF GuC mig= ration data. * @XE_GT_SRIOV_STATE_SAVE_DATA_GGTT: indicates PF needs to save VF GGTT m= igration data. * @XE_GT_SRIOV_STATE_SAVE_DATA_MMIO: indicates PF needs to save VF MMIO m= igration data. + * @XE_GT_SRIOV_STATE_SAVE_DATA_VRAM: indicates PF needs to save VF VRAM m= igration data. * @XE_GT_SRIOV_STATE_SAVE_DATA_DONE: indicates that all migration data wa= s produced by Xe. * @XE_GT_SRIOV_STATE_SAVE_FAILED: indicates that VF save operation has fa= iled. * @XE_GT_SRIOV_STATE_SAVED: indicates that VF data is saved. @@ -82,6 +83,7 @@ enum xe_gt_sriov_control_bits { XE_GT_SRIOV_STATE_SAVE_DATA_GUC, XE_GT_SRIOV_STATE_SAVE_DATA_GGTT, XE_GT_SRIOV_STATE_SAVE_DATA_MMIO, + XE_GT_SRIOV_STATE_SAVE_DATA_VRAM, XE_GT_SRIOV_STATE_SAVE_DATA_DONE, XE_GT_SRIOV_STATE_SAVE_FAILED, XE_GT_SRIOV_STATE_SAVED, diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.c index 41335b15ffdbe..2c6a86d98ee31 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.c @@ -17,6 +17,7 @@ #include "xe_gt_sriov_printk.h" #include "xe_guc_buf.h" #include "xe_guc_ct.h" +#include "xe_migrate.h" #include "xe_sriov.h" #include "xe_sriov_migration_data.h" #include "xe_sriov_pf_migration.h" @@ -485,6 +486,220 @@ int xe_gt_sriov_pf_migration_mmio_restore(struct xe_g= t *gt, unsigned int vfid, return pf_restore_vf_mmio_mig_data(gt, vfid, data); } =20 +/** + * xe_gt_sriov_pf_migration_vram_size() - Get the size of VF VRAM migratio= n data. + * @gt: the &xe_gt + * @vfid: the VF identifier + * + * This function is for PF only. + * + * Return: size in bytes or a negative error code on failure. + */ +ssize_t xe_gt_sriov_pf_migration_vram_size(struct xe_gt *gt, unsigned int = vfid) +{ + if (gt !=3D xe_root_mmio_gt(gt_to_xe(gt))) + return 0; + + return xe_gt_sriov_pf_config_get_lmem(gt, vfid); +} + +static struct dma_fence *__pf_save_restore_vram(struct xe_gt *gt, unsigned= int vfid, + struct xe_bo *vram, u64 vram_offset, + struct xe_bo *sysmem, u64 sysmem_offset, + size_t size, bool save) +{ + struct dma_fence *ret =3D NULL; + struct drm_exec exec; + int err; + + drm_exec_init(&exec, DRM_EXEC_INTERRUPTIBLE_WAIT, 0); + drm_exec_until_all_locked(&exec) { + err =3D drm_exec_lock_obj(&exec, &vram->ttm.base); + drm_exec_retry_on_contention(&exec); + if (err) { + ret =3D ERR_PTR(err); + goto err; + } + + err =3D drm_exec_lock_obj(&exec, &sysmem->ttm.base); + drm_exec_retry_on_contention(&exec); + if (err) { + ret =3D ERR_PTR(err); + goto err; + } + } + + ret =3D xe_migrate_vram_copy_chunk(vram, vram_offset, sysmem, sysmem_offs= et, size, + save ? XE_MIGRATE_COPY_TO_SRAM : XE_MIGRATE_COPY_TO_VRAM); + +err: + drm_exec_fini(&exec); + + return ret; +} + +static int pf_save_vram_chunk(struct xe_gt *gt, unsigned int vfid, + struct xe_bo *src_vram, u64 src_vram_offset, + size_t size) +{ + struct xe_sriov_migration_data *data; + struct dma_fence *fence; + int ret; + + data =3D xe_sriov_migration_data_alloc(gt_to_xe(gt)); + if (!data) + return -ENOMEM; + + ret =3D xe_sriov_migration_data_init(data, gt->tile->id, gt->info.id, + XE_SRIOV_MIGRATION_DATA_TYPE_VRAM, + src_vram_offset, size); + if (ret) + goto fail; + + fence =3D __pf_save_restore_vram(gt, vfid, + src_vram, src_vram_offset, + data->bo, 0, size, true); + + ret =3D dma_fence_wait_timeout(fence, false, 5 * HZ); + dma_fence_put(fence); + if (!ret) { + ret =3D -ETIME; + goto fail; + } + + pf_dump_mig_data(gt, vfid, data); + + ret =3D xe_gt_sriov_pf_migration_save_produce(gt, vfid, data); + if (ret) + goto fail; + + return 0; + +fail: + xe_sriov_migration_data_free(data); + return ret; +} + +#define VF_VRAM_STATE_CHUNK_MAX_SIZE SZ_512M +static int pf_save_vf_vram_mig_data(struct xe_gt *gt, unsigned int vfid) +{ + struct xe_gt_sriov_migration_data *migration =3D pf_pick_gt_migration(gt,= vfid); + loff_t *offset =3D &migration->vram_save_offset; + struct xe_bo *vram; + size_t vram_size, chunk_size; + int ret; + + vram =3D xe_gt_sriov_pf_config_get_lmem_obj(gt, vfid); + if (!vram) + return -ENXIO; + + vram_size =3D xe_bo_size(vram); + chunk_size =3D min(vram_size - *offset, VF_VRAM_STATE_CHUNK_MAX_SIZE); + + ret =3D pf_save_vram_chunk(gt, vfid, vram, *offset, chunk_size); + if (ret) + goto fail; + + *offset +=3D chunk_size; + + xe_bo_put(vram); + + if (*offset < vram_size) + return -EAGAIN; + + return 0; + +fail: + xe_bo_put(vram); + xe_gt_sriov_err(gt, "Failed to save VF%u VRAM data (%pe)\n", vfid, ERR_PT= R(ret)); + return ret; +} + +static int pf_restore_vf_vram_mig_data(struct xe_gt *gt, unsigned int vfid, + struct xe_sriov_migration_data *data) +{ + u64 end =3D data->hdr.offset + data->hdr.size; + struct dma_fence *fence; + struct xe_bo *vram; + size_t size; + int ret =3D 0; + + vram =3D xe_gt_sriov_pf_config_get_lmem_obj(gt, vfid); + if (!vram) + return -ENXIO; + + size =3D xe_bo_size(vram); + + if (end > size || end < data->hdr.size) { + ret =3D -EINVAL; + goto err; + } + + pf_dump_mig_data(gt, vfid, data); + + fence =3D __pf_save_restore_vram(gt, vfid, vram, data->hdr.offset, + data->bo, 0, data->hdr.size, false); + ret =3D dma_fence_wait_timeout(fence, false, 5 * HZ); + dma_fence_put(fence); + if (!ret) { + ret =3D -ETIME; + goto err; + } + + return 0; +err: + xe_bo_put(vram); + xe_gt_sriov_err(gt, "Failed to restore VF%u VRAM data (%pe)\n", vfid, ERR= _PTR(ret)); + return ret; +} + +/** + * xe_gt_sriov_pf_migration_vram_save() - Save VF VRAM migration data. + * @gt: the &xe_gt + * @vfid: the VF identifier (can't be 0) + * + * This function is for PF only. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_gt_sriov_pf_migration_vram_save(struct xe_gt *gt, unsigned int vfid) +{ + xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); + xe_gt_assert(gt, vfid !=3D PFID); + xe_gt_assert(gt, vfid <=3D xe_sriov_pf_get_totalvfs(gt_to_xe(gt))); + + return pf_save_vf_vram_mig_data(gt, vfid); +} + +/** + * xe_gt_sriov_pf_migration_vram_restore() - Restore VF VRAM migration dat= a. + * @gt: the &xe_gt + * @vfid: the VF identifier (can't be 0) + * + * This function is for PF only. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_gt_sriov_pf_migration_vram_restore(struct xe_gt *gt, unsigned int v= fid, + struct xe_sriov_migration_data *data) +{ + xe_gt_assert(gt, IS_SRIOV_PF(gt_to_xe(gt))); + xe_gt_assert(gt, vfid !=3D PFID); + xe_gt_assert(gt, vfid <=3D xe_sriov_pf_get_totalvfs(gt_to_xe(gt))); + + return pf_restore_vf_vram_mig_data(gt, vfid, data); +} + +/** + * xe_gt_sriov_pf_migration_save_init() - Initialize per-GT migration rela= ted data. + * @gt: the &xe_gt + * @vfid: the VF identifier (can't be 0) + */ +void xe_gt_sriov_pf_migration_save_init(struct xe_gt *gt, unsigned int vfi= d) +{ + pf_pick_gt_migration(gt, vfid)->vram_save_offset =3D 0; +} + /** * xe_gt_sriov_pf_migration_size() - Total size of migration data from all= components within a GT. * @gt: the &xe_gt @@ -522,6 +737,13 @@ ssize_t xe_gt_sriov_pf_migration_size(struct xe_gt *gt= , unsigned int vfid) size +=3D sizeof(struct xe_sriov_pf_migration_hdr); total +=3D size; =20 + size =3D xe_gt_sriov_pf_migration_vram_size(gt, vfid); + if (size < 0) + return size; + else if (size > 0) + size +=3D sizeof(struct xe_sriov_pf_migration_hdr); + total +=3D size; + return total; } =20 diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h b/drivers/gpu/dr= m/xe/xe_gt_sriov_pf_migration.h index 24a233c4cd0bb..ca518eda5429f 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration.h @@ -27,6 +27,12 @@ ssize_t xe_gt_sriov_pf_migration_mmio_size(struct xe_gt = *gt, unsigned int vfid); int xe_gt_sriov_pf_migration_mmio_save(struct xe_gt *gt, unsigned int vfid= ); int xe_gt_sriov_pf_migration_mmio_restore(struct xe_gt *gt, unsigned int v= fid, struct xe_sriov_migration_data *data); +ssize_t xe_gt_sriov_pf_migration_vram_size(struct xe_gt *gt, unsigned int = vfid); +int xe_gt_sriov_pf_migration_vram_save(struct xe_gt *gt, unsigned int vfid= ); +int xe_gt_sriov_pf_migration_vram_restore(struct xe_gt *gt, unsigned int v= fid, + struct xe_sriov_migration_data *data); + +void xe_gt_sriov_pf_migration_save_init(struct xe_gt *gt, unsigned int vfi= d); =20 ssize_t xe_gt_sriov_pf_migration_size(struct xe_gt *gt, unsigned int vfid); =20 diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration_types.h b/drivers/= gpu/drm/xe/xe_gt_sriov_pf_migration_types.h index 75d8b94cbbefb..39a940c9b0a4b 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration_types.h +++ b/drivers/gpu/drm/xe/xe_gt_sriov_pf_migration_types.h @@ -16,6 +16,9 @@ struct xe_gt_sriov_migration_data { /** @ring: queue containing VF save / restore migration data */ struct ptr_ring ring; + + /** @vram_save_offset: offset within VRAM, used for chunked VRAM save */ + loff_t vram_save_offset; }; =20 #endif diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_control.c b/drivers/gpu/drm/xe/= xe_sriov_pf_control.c index c2768848daba1..aac8ecb861545 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_control.c +++ b/drivers/gpu/drm/xe/xe_sriov_pf_control.c @@ -5,6 +5,7 @@ =20 #include "xe_device.h" #include "xe_gt_sriov_pf_control.h" +#include "xe_gt_sriov_pf_migration.h" #include "xe_sriov_migration_data.h" #include "xe_sriov_pf_control.h" #include "xe_sriov_printk.h" @@ -171,6 +172,8 @@ int xe_sriov_pf_control_trigger_save_vf(struct xe_devic= e *xe, unsigned int vfid) return ret; =20 for_each_gt(gt, xe, id) { + xe_gt_sriov_pf_migration_save_init(gt, vfid); + ret =3D xe_gt_sriov_pf_control_trigger_save_vf(gt, vfid); if (ret) return ret; --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C62CD2DFF0D; Tue, 21 Oct 2025 22:44:31 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=192.198.163.11 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086673; cv=fail; b=HDmrGGRyr4oP2Epk8VAwAX/jxQimGJScX3judNKxA91ytqNMQtUQ4EL7jzUPnC9ojUKiXVV25Z0VB0K125rZz2flQ23dD29KtDtdzZxR2ut/cKzT859vM58jQrtaxjkzxPOaYXBhJQFmLzm8743ujo+52NZzNk9whjEflnaDPv0= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086673; c=relaxed/simple; bh=cRTpLDZ1eVS4zp52aU6AfETpHhMBbg5zvTDZkvqkxHY=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=YCNCaPhaWUoyMDFaTY85iGQ75YKNu5HMTHBQiKKlzwh7DaC9IOVWk2+idbfE5BxlgdH+dF1ATl3TcavqAPMCRJUt2tgP154OeUYIyLtJnYIyXnitSMWo9hiNz9H3Bb44fNhYwbeFdrRzxbpeCtG2XueZjFboilml0GFhiPa89Fc= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=IFxjGmDV; arc=fail smtp.client-ip=192.198.163.11 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="IFxjGmDV" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086672; x=1792622672; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=cRTpLDZ1eVS4zp52aU6AfETpHhMBbg5zvTDZkvqkxHY=; b=IFxjGmDVTvMLVWwS5BswJ7dGcsMdeq0sg8Ps0EX4hFMUi+MAmdy/NaSY s5zoUZZVFOzljgs9iENHowefk6c5qf+5DL960DzpNTbgsfDu2RHJQ2c0F lvN7vJqsxL7RJWxNCPUSUPJAjrh1w0CF7shmtFzutnXkJb3WU8AJ9wwNQ 0x2+UTRhEcEmbscR3p5euFc5hmNgt4VEiG10h/0DG+KeO/r3yPdeXov/q MsrXAYYB9AvmuWVWxmMNvKfWqCtI3ZuGE01JYE6OLej0JUYUP8Le0W8Nz Q73VqCU2fSyRLJBBP70Sv/HNuJqrkFYuov5AUnkiZcrH1QN81ZQwKJ6+9 g==; X-CSE-ConnectionGUID: Bx6FLw/5Sui2b1gjC6Ja1g== X-CSE-MsgGUID: /RlRko5QSlKlX4k1+B03kQ== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="73830952" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="73830952" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:44:29 -0700 X-CSE-ConnectionGUID: DToq8d4yT62QA38gkLaw4w== X-CSE-MsgGUID: E3wg9mJ9Rby2oRm3lXMIcQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="214345872" Received: from fmsmsx901.amr.corp.intel.com ([10.18.126.90]) by orviesa002.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:44:29 -0700 Received: from FMSMSX902.amr.corp.intel.com (10.18.126.91) by fmsmsx901.amr.corp.intel.com (10.18.126.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:44:28 -0700 Received: from fmsedg903.ED.cps.intel.com (10.1.192.145) by FMSMSX902.amr.corp.intel.com (10.18.126.91) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:44:29 -0700 Received: from CY7PR03CU001.outbound.protection.outlook.com (40.93.198.22) by edgegateway.intel.com (192.55.55.83) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:44:28 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=He5NAgA7WfsK0jwOr5sqGIg6hFyxqE8fwpsPOmmAPC3Lgjpch5EJ5KaxxBo4GLOB5HHHRYQLPX37p1rTtClS6W6We81V+DMr66W2oShdLt1apZ0W6WguDFusrbapNtao7X5/jivdZgGrp/yKwbGHgH5wK5hgi1+PEnJEBuHvYN6LVJthTJAiN0mfbQ+lh5HX1V2QQGrf1uAbbQSBg69z7Q70WVmQoWaJZsPsjoFKpNxRpxq1meI+7Xt4e6FpuXSyhJTi/KoJL0SF8EjQpFbfJGpGNDt2QYRnSPZnY8121zIJR2ReGfrxX66mE8XKepyBLT2ESb4DmjjWufqe2RLISg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=vdwjkZxdyWSsYJ0eIFMPMthEffuog9/jcSviTtFT+5Y=; b=B2sd6+3eaCURUoj/VchPTv7iaHXH6uhyvsej0lWslJ5gAEuQRpGdUNBVD2A38GTa6vBjcS/HE1rOd4i9tUHkH2PS/KnaG6mBkvtQYRZ+vZG66fcEQCwlmLthG7+97cFtAL4+p9DcUDiaNCmruCFY5oE6VefZ4P8s2Y9BCUf4oo/J4TOODqriFigZg+mFE5Ep6HfAnpkG4clR330JzGCyNXYJMOmH9JOxy5T9Vd4Iti3WK16zVJb+cpovPKfu3GFjco6D/+N1M9CKY+w3Glm8fs4PUPMaCd+NQb2iFRNqo2MFMASl98PXdS8uBLnrm+BaNTGvAH4+wENoUc8qtcJvnQ== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by DM3PPFF28037229.namprd11.prod.outlook.com (2603:10b6:f:fc00::f5f) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9228.16; Tue, 21 Oct 2025 22:44:26 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:44:26 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 23/26] drm/xe/pf: Add wait helper for VF FLR Date: Wed, 22 Oct 2025 00:41:30 +0200 Message-ID: <20251021224133.577765-24-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VI1PR07CA0290.eurprd07.prod.outlook.com (2603:10a6:800:130::18) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|DM3PPFF28037229:EE_ X-MS-Office365-Filtering-Correlation-Id: 33e6f113-0153-4c32-3e79-08de10f36363 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|7416014|376014|1800799024|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?QlpMRmI0Zi91WVUyUHlKL1JBU0ZEenlFbjg1MzY1YytnMytDdUNlRXpXdTQ0?= =?utf-8?B?bWZTaEQxNzRka0NObXNOWFVnUkE5SkUzcjdvRjIvclVkR2pzWFR2Wm9VeFdK?= =?utf-8?B?NUh0akJ6YW5oUWZ3ZkszN2kvZGl3VmhUQ2ZML2VlZ0Fzc2gvUHNkTWhqSVZw?= =?utf-8?B?YWFoNFNVVG5MMjUrT2xCeUdmd1RZV1BucnQ1UWN3a2dKZ3pIRVUwUlVsbGtF?= =?utf-8?B?NkM1dVpGUkpTYXFBbkpGVWhnYUxoRnlrOTZTd3ZjQjBLUW4zcTdycS9HTFNB?= =?utf-8?B?SlNkaHY1Y2ZMY0dtWjJCVmNJTkx4WEZBSlZhcE1BMjc4RFhXa3JqN3p0NGhm?= =?utf-8?B?d0xHbVNtZDBETHRESW0yd3VwSEl2VVRPeEI5ME9QaTk1Z3J1czNFWVFsSEd5?= =?utf-8?B?ckFlYzFTREZyMlRaM01Eb1JSMnlIUFR2STZWbzI1SThmWWJDNDhqcHpvWUVi?= =?utf-8?B?dW16djdacFlLMkZueklqYmFZb0gyRVNuajZ1YmFWVUx6VFNJMml5MysvS0NW?= =?utf-8?B?R2MwWjVrWVJHSVpQSHFGOEdrNHA4bjVkcFdieC9zdHZZdCsrUFpGTExzeDg3?= =?utf-8?B?aFRNYVJieXVIb0RzblhxS01VNXd0dGZxL1Z4QjM2NHZ3UTRBa1pOSDRIaTNj?= =?utf-8?B?UXBSL1IxL241L2U3R2kydE5maWF4MGxUQVJZM1VvdGpGc0pZM0xBWmNyOTNy?= =?utf-8?B?TFpXTzJtcHN5RzVKNjJzeUJ4b1NZcXIvemlqeGw2aGMzNmk1QzJkVXRRMm13?= =?utf-8?B?ZzcvbFZsVjZUQ2x4SmNwN01UWG55enk0ZWJ2RWE4b3dLcmtwWWVTV3F4aUs0?= =?utf-8?B?Rlg1S1VxUkJQbmxoZ2xUcTRZV054eW53OW02VFNJOGNZK3FTNm1PK1M4aTBt?= =?utf-8?B?bWt6d2FWYmZDVDI3c1dRa1VmRUNXZUMvNThIMVgwb0doN1dXYnZvU3JlYzk5?= =?utf-8?B?cm5NNittTVcwNFd4NE4zUkM0ZGpvOXAwM2NMRjFTVmhCRlZOT1NpMmdDelZ0?= =?utf-8?B?RnBpdlljVDAydCtCN05UanYyYm1BbnpaeHpFS0N0K3lkRlVnK2phUWVBRXFl?= =?utf-8?B?TGRxWlBFQ3E0N0NYR2Rnc0NKakgwck1kVWU3OHd5NUpKTlFFcVBhanNwSkda?= =?utf-8?B?UVErUzdCbzhDTCtvQWVSbTFobzVQRFZJcXEwVnR4VzljajEwV01PNk1wQW9n?= =?utf-8?B?Z0o1QXlja0FiVjQydWdVZEt0UForMm9IWlBjZ3dQQmc5TVpkK25mNDM5bURq?= =?utf-8?B?MWpwTHJLcTZMREEvK3VwWTNvZzhaV2NDSmJOUmxtN1U3L1p0S3hub0R5a1RW?= =?utf-8?B?V2QveXV0NElDVkFSQ1AwOFB4N0RHMXZkU29SZ0ltV1R6aytTZVozL2FzczhP?= =?utf-8?B?dmxOU2pZaXdxckhnNURFZDFjSTVraExJTlZ5QUhRb0RYVlk4MERHcWJlNjVR?= =?utf-8?B?MEs3ODQ5SlhyYnlTcHdWYmV3ZXRCK3J2U2hzd1NEY0wrRHpTdkovOHdYa3NK?= =?utf-8?B?eXRTSG1IVzhPTUt6YW1CUk1mZWF0L0xiOW0xNGJTOHlpbStja3JQQUE2K0ha?= =?utf-8?B?MmZWYjdGRWYyL3JkMy9ZeEdzSTZ6ekxqZlhlZ3N3bVI5eWRBTC9KMktQdGND?= =?utf-8?B?NEMrdkhaM2piM0wzWk5qdGozekVyQzIrbkFOcWlMRFhCbHJlR0ZUUi9sbEd1?= =?utf-8?B?SVY5S0ZBSUV1ZjNhcTNab2tKQ3VMeWZUeTFYWjFrMEQwSTFFQTVwRnNsSjlp?= =?utf-8?B?YWt2cFd3c3d5bFptdXlJWU02dEE1WFJZd2t1TnFhQUNpMGplckNOelFkdmE0?= =?utf-8?B?eU1xRmw3QXpLdkxhbWhrN0pTRkdNTTV2eGVkVkpMa3laa0VaSTV2MXE4MmtT?= =?utf-8?B?SUN1MmZBWC9PdDlOUGU4T3ZLKzlNaDdlNlRBV1FJOWJPUkhTR3I3cFpjaFY3?= =?utf-8?B?bHE2Q3ZTUko2d2Q2ak1EZEFKckNXT2NSc1JycWFESVc1dzJTaEltS2YvU1BY?= =?utf-8?Q?23RaC/yVAcn/sGF2NW+MsRfUgI/FPA=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(7416014)(376014)(1800799024)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?ZnlTaG9XZjlkeG5JRUlwa2xIN1FLNmJNc0I5SHNqc1N5a2E4VDlld3d6Q20r?= =?utf-8?B?TzRtYStKUldmQnlFYlZwZ3BuS3BYNXN5QmlMaytUKzBXcEM0MXNqQlJiNnJw?= =?utf-8?B?OXpUaHV1OVlQd0g2VWRYd1M3VmxLSWx1aDljbURSYXlqbVd3K041Z3VLTVZi?= =?utf-8?B?NEhNUm5QRk5sbG1oOHcrbG1JUGxZakc4MzZtVjdmUnRxQW5OejEyZmdBV0V5?= =?utf-8?B?bWVSZzgrcWZ0OVlKT1htdDlwanBMYUlQT0ZRZGN6cXh4ekwwMnBFU1REMlBV?= =?utf-8?B?NlQ4YkVzSVNFUlQyUjYrczErd3lMRERBU05kWlVHOTlSQys5NEZoQWxJR2Y0?= =?utf-8?B?cVI5dmJQckVNTzNzM0pGeFZ5U0E4QldCV1U3SU9uMFM2bGlYMWlFZWZVWGxG?= =?utf-8?B?MXlLcjFqUWswS2k1VXpGMGk4RnlyZEtGSGR1MEdaeG0zYjZ0TXo1bVJWRDg1?= =?utf-8?B?OEV4Vi9EUS9ES1VuK245VEtaamJLMUNFSkxmK2dXdkR3anY5enc4SDJocGxq?= =?utf-8?B?dTZHNFZIK25jcFBsUk5BYTFkeFdpL2w2MHg0R0lNMEQ0Ky91YzJWU0dsQU1R?= =?utf-8?B?aVpNS2ZJT3ZNcnZvTGRFeTFZWkp5ayt3R2lJdGoreG5QcjdrOEZLcnNleWRH?= =?utf-8?B?MjkwWDNTU0hSYlhTaS9hdjBlSHpBN21zTm5jVTczeUQwUStvTFRNZ2t6akJW?= =?utf-8?B?a2NMT3ZDbFp3cWp2ckxTRjFyOGI3a1ZGcXJiSHR4U01mQVZQVGltQVlueDhO?= =?utf-8?B?SmZXUGJBUW13UHc5M2xjV2ZlOXNPbDR1Y2luTnVPNzFqeWFVNWE5RG81MzdP?= =?utf-8?B?ckMrdUR5RjM4UEc2eW9qRkczMW1UN0VweXQ1YVZmV0JTeXJnODhXWXk1L1Iv?= =?utf-8?B?dDhiQTg3cmxwbGdweXlJbWNEV0lTUk5JV2Q1Snh5eXJ2dTd5MHVFTmczNzJB?= =?utf-8?B?V2Z6cHZIWTJNS0RiM3FpMHVJRnJNcUEySW9PS21qNVUxaTVuMmJYSTI5OG5a?= =?utf-8?B?RU50OWVFcGo4bWllcFVwc2wwNTBFTkxNNUFFWlIrRy9sZ2lqTm9UdHJPcFlh?= =?utf-8?B?QStHU25paG53SDJoN2dJTUFCeTE5Tks2N1VkUlhCK3NpQk9IVTlKTkl1a3BL?= =?utf-8?B?ZzltbGNjdTBDTkFldi9jWjNBVmt1R3pYMjI0VUJQRkN0MGlLYTZ1aGNNSjlh?= =?utf-8?B?SmxEbiticnRDMFFQc0JLemsrSktEdFl4NEJISDBzeXV1c3lVdVJWNStuaS9i?= =?utf-8?B?YnUwVlpPbStkc0Z3bzlhaVRnUEUvQmRNN2t1OWdISVJldStMY29CY1VhNjVZ?= =?utf-8?B?c3YyOTNHelRCa2NYeWhOYmk4Vmg0b08xMUVxWmFFSUFxV296YUF0dlY2SmdQ?= =?utf-8?B?ckxhQkhIQlBjVWp1N3c4U2RqcTBOVGZ2TEpxWE11VHY3NmpxMTBZNkdFZklt?= =?utf-8?B?NENxdEYzNkdsaFJFeEVYZlMraDRuVTdqekxHNVdiYjQxeGRMQnZzaUhyZ29C?= =?utf-8?B?Nm5DazdLM3MxZnVkaHV4MU1QZ2NSN01RV3VIQWRZWEI1eE5JRmJjdkFQM0FQ?= =?utf-8?B?OHhYUFMrV1RtL24raWVEQ3I4eWhaV3JWclUrWTFKbDI1Z1VJK1FNYm9IaDRX?= =?utf-8?B?cG9paEMxUHZ5WjExdEdnSzM3OXN4Y1BEbXFwQXJMRzhZT0RFWnFPK2pZWmU2?= =?utf-8?B?SSsvb29JZzZkVUhoSFk3dDdNSmI1OXVGRDNSZXhtZEhvNFNSaVcwak5JUnpz?= =?utf-8?B?WU94Ni83Z2YrTkQ2bThmV0x5eEJ4dUFGRjFxalZ0SHNScXlHTlZvdHRBTU9V?= =?utf-8?B?WTRVd1pFSEZ5QUlsNkUyWGRBbzNVWnJ0eHFBa2RSSDZxZTRLOHlWUXorNkNS?= =?utf-8?B?M3Z1cnNqM1lwalhDTHM2L1dZNGpxd3NycFkxNzQrYTBqK3hMUkRJaGxwdUl0?= =?utf-8?B?VlNMalRkeVNmZHJUUy9xZFZvUzJNL3YrTVJ0L0FldUF6eEdQSVllU1U2dzlN?= =?utf-8?B?TFB5K3FwUHBzWFZyRkg0UDlscFRRd0VLSnVobE4zZm9vcUlhQ3g2VFhBdTRh?= =?utf-8?B?VVVydXpMeG5qckI0WWpBNWswcU41UDI2bTF2TWdKZHRDeHZTQ2dTNG1UQlFQ?= =?utf-8?B?STFkNEcvWjJRTklld0cyVy9mNWhLNzFDdEoybWp5Z21GZVdRQ0FZZWZNOW04?= =?utf-8?B?eUE9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: 33e6f113-0153-4c32-3e79-08de10f36363 X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:44:26.4814 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: jekuk0J5NFc+vmFF8sbbHHRPqxeWBhbtQqMWv3ywpM+mLkcAcRV0fl4gMA0OPwwWcyDqg/iRqYwtVE7GZJHhJX/CiuappZ0/q3eM0k2NnVo= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PPFF28037229 X-OriginatorOrg: intel.com VF FLR requires additional processing done by PF driver. The processing is done after FLR is already finished from PCIe perspective. In order to avoid a scenario where migration state transitions while PF processing is still in progress, additional synchronization point is needed. Add a helper that will be used as part of VF driver struct pci_error_handlers .reset_done() callback. Signed-off-by: Micha=C5=82 Winiarski Reviewed-by: Michal Wajdeczko --- drivers/gpu/drm/xe/xe_sriov_pf_control.c | 24 ++++++++++++++++++++++++ drivers/gpu/drm/xe/xe_sriov_pf_control.h | 1 + 2 files changed, 25 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_control.c b/drivers/gpu/drm/xe/= xe_sriov_pf_control.c index aac8ecb861545..bed488476706d 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_control.c +++ b/drivers/gpu/drm/xe/xe_sriov_pf_control.c @@ -123,6 +123,30 @@ int xe_sriov_pf_control_reset_vf(struct xe_device *xe,= unsigned int vfid) return result; } =20 +/** + * xe_sriov_pf_control_wait_flr() - Wait for a VF reset (FLR) to complete. + * @xe: the &xe_device + * @vfid: the VF identifier + * + * This function is for PF only. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_sriov_pf_control_wait_flr(struct xe_device *xe, unsigned int vfid) +{ + struct xe_gt *gt; + unsigned int id; + int result =3D 0; + int err; + + for_each_gt(gt, xe, id) { + err =3D xe_gt_sriov_pf_control_wait_flr(gt, vfid); + result =3D result ? -EUCLEAN : err; + } + + return result; +} + /** * xe_sriov_pf_control_sync_flr() - Synchronize a VF FLR between all GTs. * @xe: the &xe_device diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_control.h b/drivers/gpu/drm/xe/= xe_sriov_pf_control.h index 30318c1fba34e..ef9f219b21096 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_control.h +++ b/drivers/gpu/drm/xe/xe_sriov_pf_control.h @@ -12,6 +12,7 @@ int xe_sriov_pf_control_pause_vf(struct xe_device *xe, un= signed int vfid); int xe_sriov_pf_control_resume_vf(struct xe_device *xe, unsigned int vfid); int xe_sriov_pf_control_stop_vf(struct xe_device *xe, unsigned int vfid); int xe_sriov_pf_control_reset_vf(struct xe_device *xe, unsigned int vfid); +int xe_sriov_pf_control_wait_flr(struct xe_device *xe, unsigned int vfid); int xe_sriov_pf_control_sync_flr(struct xe_device *xe, unsigned int vfid); int xe_sriov_pf_control_trigger_save_vf(struct xe_device *xe, unsigned int= vfid); int xe_sriov_pf_control_finish_save_vf(struct xe_device *xe, unsigned int = vfid); --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3110A2EA726; Tue, 21 Oct 2025 22:44:34 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=198.175.65.17 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086676; cv=fail; b=Bo7pvzWKILY1ayUQcQl8QsvVKjK8sEvyyT7LJVtjGFybIyfCIC0JF1aPWZ0lnaNTWOMhiPOtvitU8A5iBthDOrwbXZmEpj1WIZZ4xMP/TeBcg9OW8i2WyJFOt/sKfineGfqzylOWssCfZBvrcF2Augr8uHVwKdzyKnj8uj46KRM= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086676; c=relaxed/simple; bh=hi/CJKUTLkLM0LObRwI6n0WFm4zxr7PwmdMtTQR8Mgg=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=s7V9+Y8elBGdZJYSFj1f6ty0l+Q06lg/0topnGc/e2rmkY3P04LKlHdFQsyNOSViY7AWYat+AJJSV8vzHu1tLyI6Baux+XLVLPHik5/slKgys4bq2lYlDVU62p8a8I0wz2xeFBK1hSq1nmUKneGo6QtuXkTk18b+yehEYNf90ms= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=i4w91/cA; arc=fail smtp.client-ip=198.175.65.17 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="i4w91/cA" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086675; x=1792622675; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=hi/CJKUTLkLM0LObRwI6n0WFm4zxr7PwmdMtTQR8Mgg=; b=i4w91/cAsT6WWrxq4vgi7F/4Ct6hyoy8s2J3H4yDKKAXM00v91VVE89V td678qojO/2hY4lWTsLCZTorP52uoet7BB1TfM5/Y3zccdiFieHjVCNGW l8e8eKMlOjhAUWaKLmtFwi+Rf22nsoPocJxEbZCUVnzDZBhLQVBwPWG/S X9MHcboskT/PhorsDZFD8ilnb9qE2+hKQKoNoh0AVWN6hXiXCpYOft2Tj zbmazdLLlonKBXMDoDYj4bwtlmqkb+isgUw3jAldjM1bRcgm76a4BicqA Ate0HappmKs/nvdCp7qbM6ubCnX/RlyLsVR1AS8QM1xZk/0hBQW5yUqzc Q==; X-CSE-ConnectionGUID: l+XPEQudSFuL9vox8m+mtQ== X-CSE-MsgGUID: I/wrEtgnRwSXiRyIQSjSOA== X-IronPort-AV: E=McAfee;i="6800,10657,11531"; a="63146925" X-IronPort-AV: E=Sophos;i="6.17,312,1747724400"; d="scan'208";a="63146925" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:44:34 -0700 X-CSE-ConnectionGUID: Oz662L+fTcqHTPEFvF1d9g== X-CSE-MsgGUID: zbZ90+qzSJqPYK9YcsLOjQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="183410472" Received: from fmsmsx903.amr.corp.intel.com ([10.18.126.92]) by fmviesa007.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:44:33 -0700 Received: from FMSMSX902.amr.corp.intel.com (10.18.126.91) by fmsmsx903.amr.corp.intel.com (10.18.126.92) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:44:33 -0700 Received: from fmsedg901.ED.cps.intel.com (10.1.192.143) by FMSMSX902.amr.corp.intel.com (10.18.126.91) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:44:33 -0700 Received: from PH8PR06CU001.outbound.protection.outlook.com (40.107.209.59) by edgegateway.intel.com (192.55.55.81) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:44:32 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=O/YkjdA/x7XNMMFBPGQ+rHtv6oBXD76OgLTVLodkSU6RGbX9zVn9ZeF5l1JjFJETJW0Xe0h0rp08t5Yi+3DU6SxL4HLDdLD1+M4/IRu5rjAPVG/Hz/Tw0xBbHrJdZ79/ISOz+U0Fc4fuH//PQoYspu3nTJ3Vmfc1REanQe9UxzmLTJsAkIyNw/V45Qh3tLnj0iGFvpJ21v5YyCHrKQgFpRzRYKcAYXH0V/Js9vvAjhpCacTCerF9sZP9KLTl+oneqAnmt8M7zpql3hmYwL+X1nFc0udAi+iNHLJuTwBAmGaXuTHQSVCs64D6/YP8KDHZDdKtMLyoX+vSeojuLWLZhA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=kMEDbKZcqzbL87dAxLN0IdWLK3HRmS7RLOS0wSlhJ8g=; b=AJ7a/I3R+o5egAmDFsPGEq9CxWICmK6E/f1sYTwSL/B3W0b+7G4NNTlLeg8hQ8gnmebAe6bIumZEzn1bbuEmWJU51j44vXGz67HiVEG6n7Pr+QNOEGAOsLRRPudq4uDKoh+WmMSazrqID94nHeiOGfnPPk2whK+vh8C4sXkWB4C+zfA/4cPkitHEuWewBNpoMahIzhe8gGTw2yy3xjNH9K8aKN/pTVREJcAxSdycO7PfYb7rC9BBiHAfMMPyn7ZRuCQ5PjG7suXirSDwCIQ4STGfcG79EFZC6t2rDGE3WXsRocosT7NynDCZrusbFi37GMm8O1BW4QcmrwZJdlwYOA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by DM3PPFF28037229.namprd11.prod.outlook.com (2603:10b6:f:fc00::f5f) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9228.16; Tue, 21 Oct 2025 22:44:30 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:44:30 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 24/26] drm/xe/pf: Enable SR-IOV VF migration for PTL and BMG Date: Wed, 22 Oct 2025 00:41:31 +0200 Message-ID: <20251021224133.577765-25-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: VI1PR07CA0301.eurprd07.prod.outlook.com (2603:10a6:800:130::29) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|DM3PPFF28037229:EE_ X-MS-Office365-Filtering-Correlation-Id: 17bd288e-847e-4ddf-4db1-08de10f365ca X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|7416014|376014|1800799024|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?MjQzRWdiUlZ2dk5EWDZ2QldjWS9qenZmQnRZa0RnZ3ZjSE85enJaQUUydFJh?= =?utf-8?B?c0hmWDZwT2tncllwQlg3U0RMTmw0dEhoVkdvQ1d3OWN6d1FFbG9qandrcmtN?= =?utf-8?B?UFIrbWtwUnFZNzV4YVdmWlhRQXFhendhV3JubjZTVlUvMWk2VDJadjRxc2Jk?= =?utf-8?B?eU5qOFN1ZXhuYzZGUUhDeVpFdW5hL0VueGMzTEk3Y1IvTXRqSW93WVMzdEQ0?= =?utf-8?B?QXRWRWVDU2ZKcThNOW5iSWJJMmNLSloyYUh0ZWloQUlDb3ZGWkQycEtJOWhv?= =?utf-8?B?ZFZZc3RNU08vN2FhMWZJU0VaVXgwVGVZV0RZcXZGbXZsU3hUZG1NK2lvbm9O?= =?utf-8?B?RGE1VUpDOXYrWDRjQUpmMVRzdDh2MTUwOTBzZW11MkFZSkpUNGZBYW9UTDBU?= =?utf-8?B?MEpneitZa0dWcEMvVG50MTNFUXl3MHFBVDZnSUIwanJaVGxWQUxSRXJ6VUhD?= =?utf-8?B?dVd6THRlc05NbnhBUm42SGpzOTNqQkRFZk4vNXRKWnFIVHlqa2ZHY0U4Qk1s?= =?utf-8?B?VnY2ZXVPekV1M3BnZE1tUnhPZTlPNmZKZGYzN0pZRHE2dUhuVDJVUlkyT1Mv?= =?utf-8?B?ejNFUktJUHNWS1VSeVVRQWNha3A0TXhJQVNlZnlHY1QxazJteVQ3NlZ6SkJi?= =?utf-8?B?WjQ1eTY2RGs1UTJGUm5Yd2NYVXArd0dBdnZMa1U0My9ONGViWE9td1VRMlIr?= =?utf-8?B?RkQxSjk3dzlsTVArNCtkRnpIMFdyd2RUa1hiTGhmUUpDTVZib0F4VG10V2pS?= =?utf-8?B?Ym12ZVVvdTdwTW5tUDFsZzI5dzlwS2REM3VTTUVPM0pQcCs3ZWVXTG9ab0tW?= =?utf-8?B?QnR6ejdLSUVBdEs3cWRkaHk0eHdBZkNEQ0pMYlNOR3VTUzBSM3V3L01zc3My?= =?utf-8?B?Z1Q2UFdsMEI4SWRMdW5UNW1KZHZRbWF1bzdtSFNRamY3VUpMeFlzT0ZsNUsx?= =?utf-8?B?MVEzajdGWWFkTjU2RVJCcWFPZmhrKzJzdkJKNVhpNXh4RGE4d3BsTENQbUhW?= =?utf-8?B?Y3M1OUJPQlpNd2tYd3E2L2FoTFlyQ3BuT2dnei9BdWJtZnM0cVd0Kzg5cDRn?= =?utf-8?B?ZUdpeFNpdHpZYndOU0swbTdJbng2VERrZTZLYncrQlExR2N2b0tSaWZXU0FI?= =?utf-8?B?b3JnOGZVNklQaE9NTVZ1NzZ4bmlaZGxPOGw0ZmRPYndkUzloQUFMY2pwMTk2?= =?utf-8?B?NDdKTXI4czQ5MkMyL0VUZ3g4c1dzTTRnbTNsSjVqK2x5L2Vhc1FyYWsrdEZr?= =?utf-8?B?clRud0hWaHBoRmc5T1lva0VCZWhMN0kwQnloc0RYTGhjLzYwbGxmS0JXM2l3?= =?utf-8?B?dFVuRHpOazR4c29HcElTaFZmaEk2YVJqUnNocHJLenRJdWJKaGZaUnYwVzlV?= =?utf-8?B?Ukg4WFErWHlaVSs0WDNRQ0ZSeUxpQWx5cWV5WnBJZWlIYkxHMGhaQnNyZjFy?= =?utf-8?B?bTZEZmFoVldRSmluSEVaakd4REwvTFE2c2tETkZuS1dSNTV4ZlA2dGdmSTFw?= =?utf-8?B?OVVPWGZOTUNCRnczOWUvWXJkM2FjZk83eC9pZmNCeU52LzQvVDRnbVhtaHJw?= =?utf-8?B?VVFoRjQyQVVtRXlQNkZyUUJqQVJyWEI3bUt1MVJxdU4yZkdXSUNpTG0xUlUz?= =?utf-8?B?aTVCWjZQQlZJZjN2WHVaY2VrVklsWENLc2wrd0NuaW1ya3lqbEI1SFlQdHk0?= =?utf-8?B?c1BMMTZZQzIwaXloeStPQkd5Rmc2c3ZxMnlBbjJwZWZrOHZHTExrUUhnd3Jt?= =?utf-8?B?U25PdkhFZHJadVM3K29Mb2hPZDIySTlkZm1jWkRSMWpRSTdJWEgrcC9EZGpj?= =?utf-8?B?cWRqWmt0eVd6bFdYOS9GOG1pT2kxR1RURk1pRFBDRERYTkdnNTJuQUwxYWRQ?= =?utf-8?B?WlpOeUsySUR3ZVQxcS9CVkY1U2JWaEpRQjVqd1pMcEhnQTc0SnBYZ2I1Nk03?= =?utf-8?B?dS8wQ3gxUmZPR081MDN5UVduUmFKVFhKakdkK1pSNFRocDVCUnB6b3c0QjN4?= =?utf-8?Q?0XJ3BL0T69ZQCIdx9YuxlwjTQ4FYWY=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(7416014)(376014)(1800799024)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?ZWRPdkxhRjdqQkxPWFZaME9LcmVBZ2taZ0VLcWEzcjdNUnJhQjlLcERKOVJD?= =?utf-8?B?dUVMdnRmVE9HWllCK3VBcHFlK2NkQnQ5TGNLbU9uMXhvMncwMXQ5SUJmVW5D?= =?utf-8?B?LzQ1UGpDMGRta3JvV3FiRWNEQlJrZFRNb0dJYWc2RHlQRW0ybFVyeHVUSXNy?= =?utf-8?B?dFAxWDQ3OS9TclM2RGh4U3FheTNERmoydUpDd2VVMkJIRmhSeWlOTG5UVWF5?= =?utf-8?B?bi9aZ2FZeWhFdVh0L2lJRHFaL09OTDZ4K1N2alkxdlpTUXplL2RwZ2pieGhP?= =?utf-8?B?QzBUYzBNU0NnWjFqU2xTREMwbDNrdVVqWTcrdWdMYzRDeTJKUDRibVljR0xr?= =?utf-8?B?QkxWQnJ3Z2RXWTZORHgzRi96bWQ5bVFCL1VzY2pId0YzMThJSW0yMmNkNjJL?= =?utf-8?B?cHdMWDE3KzZaakJvSFJvbVpsNGNzWkp6VUgvQ2ZUSDBDdXR1UElMZkxySDcz?= =?utf-8?B?Tnk1ZlBZZUd5R3JRR21DMjVOK1M5M1h2bXNqK05XaXJGN25GQmRrdiszR0V0?= =?utf-8?B?bmZOZVJZUWttUnErY3VTOTZjMUgvVGtWNzJmRFdOcjJNQXN2cXkwNVNGWVJF?= =?utf-8?B?ZFJUOGZKYkYzeE9nZHNZUklLQkFuMXNnSDBDRVJFNUlUaGV6ZGJGR2hyMFds?= =?utf-8?B?Z3JJWWRBUUZOS2JEc1ZFVGhBTlg4ZFROanF2VkhZV29sdnZZRW83dW9YbVVO?= =?utf-8?B?UjNwdmxzTkRWdktYNlhUSlIyQXdXN1I0N1o1eXhlT2NuSHJJZk0rQWV5L3ZE?= =?utf-8?B?em5MWUk1M3lwdlIvandkK1BoMHRTR1JncUdTOGNqUklMc2pIc2dXa0hZUmxo?= =?utf-8?B?OEtJdk0zanBsdzNuaGZMUVJkaHNEZEpZS1NJeDkvd21OdlN5c28weFJKdlFC?= =?utf-8?B?NFhjQ2hvaE9Udlo4WmxpNlZkVnFjMVN5cHZrZ0xDT2hEV0kvM3dKQ0JwQy94?= =?utf-8?B?MG1kdHh2Sk44Uk8vT0QxZkovTXN3S1l6SDlkR0hDRGs1L0dLdVUrakY3elJS?= =?utf-8?B?RkJEeDlhZHJTazZ3NWl5RnFIREQ5THh5YTN2dit5VUlnZGxIZEhwNFhldmph?= =?utf-8?B?T2ZhcFRNMHZUWjMzRUJQcmQ2WjBIV2JlcDJQN1RNSEt0aWJzb0NPd3YvdThj?= =?utf-8?B?Z05PQUcveDdCbFJteDQzM1ErRkYwUjdQSzNzNFF0MjVieHcxSml5aHRrbWlD?= =?utf-8?B?OGZUckc4OEtVbElKS3RUTHd5bmEzN2R0TUlDdVFFci81M3dBa0Rkb1hOQzVm?= =?utf-8?B?eTV3c0tOT2FpUlI1YlBTdlk5VnlMTWQrME9wSkpFUXdBWEJ3TlNpTHpNS2hv?= =?utf-8?B?dVRLU1FKaFRBQUdoeEFkY1hMV2t4MUJhWDlKQlFXYjBSUmlTd3lFb05CT0Ur?= =?utf-8?B?eU9PTkQ2blBXU2k5Ukh3QUxLbEVnMjlMa3NWZVVJRjZtcFdXVWlETlFrRHZE?= =?utf-8?B?NFVtQXhEWko5NUNiL2tqSGxuYkE3Vysvd0JxUU5PUk5QUm1mVGlwQzFFeHFC?= =?utf-8?B?YkpoVzVUeGdWZUd1S2gvT0xFSGRTbkZjQXdSNm1JL3JFeUdVZkQrTXFFMWo2?= =?utf-8?B?bGZJdHJaWW9veW9CM3cxUUxycG1yV0J6cEM2RWFXVTQ2Y1hrdkt5L1lmWS96?= =?utf-8?B?WGtrMlQrQmVRZncvdjQxakRGdWpXQVA2SDFVeVRnZTFQOXVod0ttUEhPZndB?= =?utf-8?B?ank3bUlVV3E5T20wWi9CZ2gyWTgrdU45cmZTRDBEM3crS0FPa0tVOVdnOWpu?= =?utf-8?B?N3BFalZhTnpMK0hYdmRBOEdkaUFyaTFMRy8vaW5SYVZmaGx1Z2xzd2JmYW9O?= =?utf-8?B?ZU5wM01yZkpSSDRvdGp3TmdGamRodDdHYU5WbUJwb1J2cGptQWtYNm51ZDQx?= =?utf-8?B?SWJjL2F3c0dHSFUwRituQUQzY0VSdWdDdHJqVkx4Rmd0TWJBRGNlYlJ1M0hh?= =?utf-8?B?TDRxUHZUZ3FGVXRnOVFkdllud0hEVHFBL1lUcGZXZmdTb2VKL1ZDNnV6OUVL?= =?utf-8?B?UzRBcXpNRHlOeDE5Mm1UM2k4OTc2M1NybzVJZjVMWGMrUjFCM205RTh5Nkkv?= =?utf-8?B?ME5lakdDQllRNWtUZHpmLytSeXJIZDhyaktmSk45RG1YQmZPbFJqSjlyR2w3?= =?utf-8?B?bjhISTc1VUNaTk11Kzk2ZVhGSk9Md0JZcXJUMGI3cU1nNDBjb2VGZDhHbk9C?= =?utf-8?B?b1E9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: 17bd288e-847e-4ddf-4db1-08de10f365ca X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:44:30.6665 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: +PyScBYnmX74f4qt3Kp3x1ZIyfc3fcTixo0re2FJXd4V+pCBuLgPyDrf4kMzWc7nIEFRK5Pg606bFxESrwETTKh3nDySJUUHy4jKLQk+/wc= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PPFF28037229 X-OriginatorOrg: intel.com All of the necessary building blocks are now in place for PTL and BMG to support SR-IOV VF migration. Enable the feature without the need to pass feature enabling debug flags for those platforms. Signed-off-by: Micha=C5=82 Winiarski --- drivers/gpu/drm/xe/xe_device.h | 5 +++++ drivers/gpu/drm/xe/xe_device_types.h | 2 ++ drivers/gpu/drm/xe/xe_pci.c | 8 ++++++-- drivers/gpu/drm/xe/xe_pci_types.h | 1 + drivers/gpu/drm/xe/xe_sriov_pf_migration.c | 4 +++- 5 files changed, 17 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_device.h b/drivers/gpu/drm/xe/xe_device.h index 32cc6323b7f64..0c4404c78227c 100644 --- a/drivers/gpu/drm/xe/xe_device.h +++ b/drivers/gpu/drm/xe/xe_device.h @@ -152,6 +152,11 @@ static inline bool xe_device_has_sriov(struct xe_devic= e *xe) return xe->info.has_sriov; } =20 +static inline bool xe_device_has_sriov_vf_migration(struct xe_device *xe) +{ + return xe->info.has_sriov_vf_migration; +} + static inline bool xe_device_has_msix(struct xe_device *xe) { return xe->irq.msix.nvec > 0; diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_d= evice_types.h index 02c04ad7296e4..8973e17b9a359 100644 --- a/drivers/gpu/drm/xe/xe_device_types.h +++ b/drivers/gpu/drm/xe/xe_device_types.h @@ -311,6 +311,8 @@ struct xe_device { u8 has_range_tlb_inval:1; /** @info.has_sriov: Supports SR-IOV */ u8 has_sriov:1; + /** @info.has_sriov_vf_migration: Supports SR-IOV VF migration */ + u8 has_sriov_vf_migration:1; /** @info.has_usm: Device has unified shared memory support */ u8 has_usm:1; /** @info.has_64bit_timestamp: Device supports 64-bit timestamps */ diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c index c3136141a9536..d4f9ee9d020b2 100644 --- a/drivers/gpu/drm/xe/xe_pci.c +++ b/drivers/gpu/drm/xe/xe_pci.c @@ -362,6 +362,7 @@ static const struct xe_device_desc bmg_desc =3D { .has_heci_cscfi =3D 1, .has_late_bind =3D true, .has_sriov =3D true, + .has_sriov_vf_migration =3D true, .max_gt_per_tile =3D 2, .needs_scratch =3D true, .subplatforms =3D (const struct xe_subplatform_desc[]) { @@ -378,6 +379,7 @@ static const struct xe_device_desc ptl_desc =3D { .has_display =3D true, .has_flat_ccs =3D 1, .has_sriov =3D true, + .has_sriov_vf_migration =3D true, .max_gt_per_tile =3D 2, .needs_scratch =3D true, .needs_shared_vf_gt_wq =3D true, @@ -657,6 +659,7 @@ static int xe_info_init_early(struct xe_device *xe, xe->info.has_pxp =3D desc->has_pxp; xe->info.has_sriov =3D xe_configfs_primary_gt_allowed(to_pci_dev(xe->drm.= dev)) && desc->has_sriov; + xe->info.has_sriov_vf_migration =3D desc->has_sriov_vf_migration; xe->info.skip_guc_pc =3D desc->skip_guc_pc; xe->info.skip_mtcfg =3D desc->skip_mtcfg; xe->info.skip_pcode =3D desc->skip_pcode; @@ -1020,9 +1023,10 @@ static int xe_pci_probe(struct pci_dev *pdev, const = struct pci_device_id *ent) xe_step_name(xe->info.step.media), xe_step_name(xe->info.step.basedie)); =20 - drm_dbg(&xe->drm, "SR-IOV support: %s (mode: %s)\n", + drm_dbg(&xe->drm, "SR-IOV support: %s (mode: %s) (VF migration: %s)\n", str_yes_no(xe_device_has_sriov(xe)), - xe_sriov_mode_to_string(xe_device_sriov_mode(xe))); + xe_sriov_mode_to_string(xe_device_sriov_mode(xe)), + str_yes_no(xe_device_has_sriov_vf_migration(xe))); =20 err =3D xe_pm_init_early(xe); if (err) diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_= types.h index a4451bdc79fb3..40f158b3ac890 100644 --- a/drivers/gpu/drm/xe/xe_pci_types.h +++ b/drivers/gpu/drm/xe/xe_pci_types.h @@ -48,6 +48,7 @@ struct xe_device_desc { u8 has_mbx_power_limits:1; u8 has_pxp:1; u8 has_sriov:1; + u8 has_sriov_vf_migration:1; u8 needs_scratch:1; u8 skip_guc_pc:1; u8 skip_mtcfg:1; diff --git a/drivers/gpu/drm/xe/xe_sriov_pf_migration.c b/drivers/gpu/drm/x= e/xe_sriov_pf_migration.c index 88babec9c893e..a6cf3b57edba1 100644 --- a/drivers/gpu/drm/xe/xe_sriov_pf_migration.c +++ b/drivers/gpu/drm/xe/xe_sriov_pf_migration.c @@ -50,7 +50,9 @@ bool xe_sriov_pf_migration_supported(struct xe_device *xe) =20 static bool pf_check_migration_support(struct xe_device *xe) { - /* XXX: for now this is for feature enabling only */ + if (xe_device_has_sriov_vf_migration(xe)) + return true; + return IS_ENABLED(CONFIG_DRM_XE_DEBUG); } =20 --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.21]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 847EE3019AD; Tue, 21 Oct 2025 22:44:38 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=198.175.65.21 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086683; cv=fail; b=PlYOkF/w+95w2+xBUo4tzrg5AaJ9sFyiXmW6600Y+GLD7iHVrMtB8lqhIC3rjC0SDNCuyG1Cs3dt9V0zvK5UXInmNUdSMJfXMC39yF68lzQyWlovM2TwY9WIKClofMQuEGVqc359ZknRc30gG6nXgoJPu75BBrPYwuBSAM5lrqc= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086683; c=relaxed/simple; bh=Zt9w8Ks0MiMzY3yLjKIqgK6igZomHP7FAX2v6vELY/4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=u+WUS3zBkGPxQ8e83YUKhIdCKIZ1Ddt8LY4wCCUMr5lavGDUUl8tm0FxFk8fXkPRnhKhSKLteQAhXPdBgyFuUdHdY9qYJJXoLP0stXo1sqRhfE/nBTqsUoB/zQaDDfmyMnQCASh+BtveZLhYXsDmtKQ1eUE8XoeQjg3TpRdgWDM= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=OHNUklT2; arc=fail smtp.client-ip=198.175.65.21 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="OHNUklT2" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086680; x=1792622680; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=Zt9w8Ks0MiMzY3yLjKIqgK6igZomHP7FAX2v6vELY/4=; b=OHNUklT2CZnRhI5hKQL8WQEfGlMtD2VBnf/MVP3aNoEtb1iBe+6PvV0n AcjoXgOI7rWl8mnP+Fii8K5Va1wmOGHxV+lDFj0/kpTnjgpvTNAqggRvr iKIsgxD4uEU0cO6vZ/4KXW4r6Bh0UYFZsusJxasP6ZO7rWSs7A0NbET6D SGMWjAwZrV6kNHXcFYSXruVQD6j3q5882+iQ739p2Xe5VGq2wA9i0yGNb IlcA7vaTcxI7hrlyy9VReZv2C65+iHjEV2puYsYCPJikXndaWstKh/2ip dR3XEy6g8ZbbxwzBhlGTCgZmgQAfUa/MOo+eHhtVuVzzcCkPVKUIbCTW6 w==; X-CSE-ConnectionGUID: s/Zv+mlQT2GEEi6sJEtiTQ== X-CSE-MsgGUID: CA8/fAexQcqj/+3fEPFltw== X-IronPort-AV: E=McAfee;i="6800,10657,11531"; a="63128822" X-IronPort-AV: E=Sophos;i="6.17,312,1747724400"; d="scan'208";a="63128822" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by orvoesa113.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:44:38 -0700 X-CSE-ConnectionGUID: lnPs5sdOSIm81fmPa7IX8A== X-CSE-MsgGUID: S042ZRE2TfapxKwxkVN6+g== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="214345881" Received: from fmsmsx901.amr.corp.intel.com ([10.18.126.90]) by orviesa002.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:44:37 -0700 Received: from FMSMSX902.amr.corp.intel.com (10.18.126.91) by fmsmsx901.amr.corp.intel.com (10.18.126.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:44:37 -0700 Received: from fmsedg903.ED.cps.intel.com (10.1.192.145) by FMSMSX902.amr.corp.intel.com (10.18.126.91) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:44:37 -0700 Received: from CY7PR03CU001.outbound.protection.outlook.com (40.93.198.40) by edgegateway.intel.com (192.55.55.83) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:44:36 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=A0z+TmXqD6b4YnI5DltBWtY/kXDJynQ6R7zbOs3Iw1q2QdSsfxFMFBlapO7RIFLoSzrLD98jeAa9knL87oJZ9BbNQ4VOrj51rEZBG0TsJ3a+TWqN4+O0Orkj6JB2jAn2RaPmrf3NAZwqHTH7qJhjka1Oa+ySE26U+lTCV5bNmAscCk99ZufsfHCUpIABL7L1XO8TudBkaXvX3HW6NaixM08WgSt/7cDHM1Y7FFHTuDf6W1yAMYLbgs1HzvnciPOdmCiw2OTGjqI8td4jpgYw93mVeV+27+FNJqWLqOYe5VjNOvZ6LAxQhAGkl8rbG/Ccy584nZXddI1sxKvXeab1JA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=jaD1CFdLzRkCtfQcsLU1gLDkWmKYfOqk/ZRme1pjjJk=; b=bjEalYzNR6gpRd6Y85awBJTJeTKX13eYVkYbGbVDApoJKkyBJ+oOyocYsORZpAibdVt7bAt0CpaIbqkIMjRK62hEVnIIb0TTr6dBhHL7TY1s6W2aDD+6mPFjjwYu0lyn4dTtcLfixULWc47rMW4ovwGvvCzPKC/CQOqvO3lHuoxOswjhGPy/XbkT66zXz51l4NL3Jnb6lP6Lb2NtP3RI2bHVIdQwEgllNk/nB9gatcYbqlbf44x6tl2BAeuqtNswDlyWWhzpMNV04SGVJPCSlFRRxHk3Vl/NzgXYWq9JnDWH4mWTywO540UoTOM6bhwNiWarzIRU+RNL1Cy3ug3vcg== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by DM3PPFF28037229.namprd11.prod.outlook.com (2603:10b6:f:fc00::f5f) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9228.16; Tue, 21 Oct 2025 22:44:34 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:44:34 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 25/26] drm/xe/pf: Export helpers for VFIO Date: Wed, 22 Oct 2025 00:41:32 +0200 Message-ID: <20251021224133.577765-26-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: WA2P291CA0022.POLP291.PROD.OUTLOOK.COM (2603:10a6:1d0:1e::24) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|DM3PPFF28037229:EE_ X-MS-Office365-Filtering-Correlation-Id: 1663d28d-f201-4bca-053e-08de10f3684f X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|7416014|376014|1800799024|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?aDhYZDMyWXp5bjZTVmU0OUZGY0ozcTJhUm9BWlRQZURTM1pwQ0hJZmJiTDB3?= =?utf-8?B?eVV3WWlxNmtHdlRIOXRnTDUwUDZ3NHNJbGF3VGdmOVJoek1sbkU1VE0vN0k2?= =?utf-8?B?YjIwcW40akoxNytRdERjcWRvcm9zMFZWbzlON3JiRjVaQUljMkFkbS9seThL?= =?utf-8?B?ZEorSDhyTTlzY3NuMGtBOGx4TXpybWF1eWRyaGNxajFlQy82dHQ1Z3pkd1FF?= =?utf-8?B?R2R0WDVOdGQxMi9hTFZDM2hOT0ljYi94Wm1YUk0rL09jOTZpSis0TnhkREx6?= =?utf-8?B?SUNzNFJONy8rbm9QVDlyT1JyNm1sTVJvZU1vOHRpTnh1czlWcTBxTWNHUkNR?= =?utf-8?B?TTZtWFR0Ni84bi9ZeGhzQjIrWWYwQ3Z0ZWowS2ExUkpqZ1p2ckNTSnlHYWtO?= =?utf-8?B?QzA4Ym91N2pZOGxLc01tR2E2QlZEa3labUJ3aTR3S3BHb2Yxbzcva0lsMmts?= =?utf-8?B?L1h3RUptRW5KMm1RM3NyR1NadnJucC9rU0RmZS9MdWt0NGxWSXdhK0FXUXRn?= =?utf-8?B?cy9jTTMwdWRCam1WQUV1Yk11dkQwUTBVeEx1MWdvdjUxQ2xBeHQxQUdtQXR6?= =?utf-8?B?TWpGSEhRT084YXpGaG9teGFsc3FTb0QrWUQ3ZHRKQ3NGR0Q1Z0tLaFlGbnFZ?= =?utf-8?B?c1UwQ1oyZ0xZZzZvU2k2bGF1YkVhNnJEQ242bThnbU11R2ZzbHpkYzV0ZHVs?= =?utf-8?B?Z2dlY2YxVmVQZ05iVzdNT05WNEFWdzNkTFdGSytjWU9mYk1oNVB3UWxhbkVx?= =?utf-8?B?NnIyWmdYU1Mxb213dEpMN1lQU25HcSt1UGNjZFZ0N0hHTlJBbEoxNGhJVU9k?= =?utf-8?B?a281T1k4VVhNWjZCOTRIWUEyUHNVbEZEdTRiakhuMHVWN0svNzFRclRtdS95?= =?utf-8?B?cVNJYldkN1JKQjltTjJQbEFJS2FxNHk1TXJvRkNNcURkQ0hHbW1IR080OWNm?= =?utf-8?B?TlNYMHIzU21Pc2RydnkvWmxlM0xQOTFkeU84TWFzaWxvM0s1aGZId3BWaVRh?= =?utf-8?B?emNRT0lTVW9aQzVUSEZrdFJOanE4aCszNCtRZ1ZWZnhZQXRjMi9Fb3AyWWp6?= =?utf-8?B?Mys3LzFqd2x6TGI5dElsV1daczM4bUpwRjNMSjZNMFlxQUVaSC94WmJNMUNt?= =?utf-8?B?Yk81aGJYTzNtUG40bFljRFNQZVVNS3BuM3U1N2t6T3A1N2UxRmI1dms3bTdh?= =?utf-8?B?YS83Nis3T1k3WTRUMDRtY2lqUmxSb0RVSGpPNjZuNmdBeHY2ZC8vRWdjeTdD?= =?utf-8?B?K2kvdmtsaGpJN3UvZzFoVkxZcFZ3K3BOYnR0TGIxYjAxRnNWbFlhLzJmOWQ2?= =?utf-8?B?K0Mwa2lZZGNUZU5IdUo3N0lnWlU4MnRnWE8vbjE1SUMyaEp2allyQjJ2QnA3?= =?utf-8?B?K1greVVoeGcyMVJMeDkxY1IyMWVpOHQ5TUdGR3FjbHdzVmR1U3djS3VKZnZW?= =?utf-8?B?ZXRoL016WEhiMG1pbXdDT0JZdG5UTGhVdDRQK2JNRU53QjZDTmYzdlFhRng2?= =?utf-8?B?bjhZYVN4NU95b3RSclRLSG54RUNVUUN6cC9aMXlHOXd1UVJFbVFrM1RoeUp3?= =?utf-8?B?KzlBcjM1Z2ZPd1VweG05NFN2MWZrdnUzWWl2WTBRc2pUdjZ1dWNMR05jV25D?= =?utf-8?B?b3N0MkhsdEhPYURnekl5dUZWZHVoQ0xJdU50aHhWMStaRTQySnkwZ2dYNjl0?= =?utf-8?B?d0dUNkVINjM4bkNpZWxOamlwY1BneElIZERMSVk4MnlkZy9PaGxCU1V6VmZ3?= =?utf-8?B?dzE4bHpLWEswQ2tkTU1LRmhGOUFvVWhFbUtMc3BaUFhSNW8rK2RFeHRmcmtt?= =?utf-8?B?bWQ2Rzl3YUdkVEx4RjJUVVJLeTFkM3U1QkVlayt4MUNCVGh1a0xDejZKOUYw?= =?utf-8?B?ZERVNWk3SzQ2eXFZUk9WR0Z6M0tvekhwZld1Zi9mWlBlcEtEUHV1a2crUG4x?= =?utf-8?B?bnBFbUg5V2ZjMXI4ZEJ2aVNoMVJIejUvbW5SVThka0RPalRubnFJdnNUcDdj?= =?utf-8?Q?/0Tv6ziDt6idqrfz6kf8W1+rU+9ZrE=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(7416014)(376014)(1800799024)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?bW9abUplVjVGenFTSXZFcGJOUWhNVkNoeU9hVW9uSnhReFJKZ241dHB3c3hB?= =?utf-8?B?OXRjSEdOWEw0djR4NUFGRlRrcE9EMXQySGpLYUttRGU4SkVrZHZLcWhHK3Ay?= =?utf-8?B?d25jTUQxTVB1WWNmcldXSm0yVkdnaHlzV3ZFMmEwR1ZRZEFCT2EzOUUrYUxl?= =?utf-8?B?b0dZWlJxUDJxM3dnSDVTZ2NjUkhvMmllVSt6cUUvVmNSbHVYMEoxOG8rbUdB?= =?utf-8?B?aWgxTk5nVzFkdGhhdC8za0x0a05abUkzOEl0eWxWZXFtZlREYkhDMVZmeWF2?= =?utf-8?B?Qzd5TFJBblFkQWF1SGt5dmgwVHJlODVEaSt0N2J0QnMrbHhSN1p3eUZyeTN4?= =?utf-8?B?MFY5TEMxOUx3RTRuMnozYW5ZYks4R08yWVAyaEw2cS9ROER5cEdGaXZMcGVT?= =?utf-8?B?bUVGQ2VLbGZ1M0l2L050cTBRbTFJQ0J1bTdaSlZodHlvWnB1ZWxBQTNLRnZ4?= =?utf-8?B?SVJhVFZWQUdGMlJrZnhHOWNJNFN5VGlYdWdvbFFYTk54SUY2c09yQVJnZFFn?= =?utf-8?B?OThHc2pLSmlZbGcwbFp4dmdYT2diVi9qSElDaGJwZlk3VUdmN2huMGVUOEly?= =?utf-8?B?aENHVVJIYkc1dSs1Ry9FZUpCUkF5MVlRVHdacWowSTRWcFhmU1dUK2tISVE1?= =?utf-8?B?aVFXL0pacDRBbTg3VlB1NWd0OUtZcmlJL1FuZGZIb1p1eitRKzFLakE4N3FS?= =?utf-8?B?NUMvd3hDTlF3K1B5cHRJaXA0aDlZbWJmdENJTlRmaFU2Q09aTWdsM25seSta?= =?utf-8?B?NFhWN3dZeEhkUTgrWXloMUE0TFMwRENNZ3luVWwxWFVvRS9zZndjd2NNek1C?= =?utf-8?B?Q2E1TXFjWFhrTG5OOW1UNm9mZmg0cFJNU0U3SWM3bHZFWTh2TllOUjV4bG94?= =?utf-8?B?NzVDU04yK1JUUmh5U0l3QVJQUUszV0pQeFdrc0NTWFpRL0dGSmxoL1JZSTVO?= =?utf-8?B?bHUwSXZjV0V0bGFJSGUyc2QrM1NqbFZrNWpkb0pQbng5bkY4RkNpWEU2dC9k?= =?utf-8?B?Q0VjTldLVXU3UjhqYjAwTkVzOXhWcDROZnN3UVN6ZkVvT21pdkJKUk03N2NB?= =?utf-8?B?RGl6UmhRTWdJRlNZQXZyS1NqYzROVUl2UDIvN2tMY3NydkZDWndiUjk1UmRk?= =?utf-8?B?eEZxUHB6QS8xOC9USmg2SFN3ZTBVdTl0akhRL3VKVlFQbS9ISHZTVTFVMnpE?= =?utf-8?B?cjdUWHhNUFRCUW5XNGlxWjhxYlRCbDB3WXBreDkyOFhIVEZkdFFMdjFkWnFh?= =?utf-8?B?c0JxbXh6OU9CQ3ZMeWlmMmxvSG9NaTFLeWkycjlOUmlBQ0FqRjlaMGNweklj?= =?utf-8?B?ZmZLUThqb2xZVlB6eDl1SXFkUEgzQjdycUprWTBOWEIzMHlIaWpydkp3bE5i?= =?utf-8?B?WmE2aGtpekZjZ2VPYTQrWnJxRi9CU1R2ck5NcXovcVBXWXZGSzdYUFREMXg5?= =?utf-8?B?bVVld0tMKzB5R0JRNzJXcGpUdytZbDlqTGNqYThCS215dm9haHk3am1mNjc0?= =?utf-8?B?OVRUUDFodTg3UFdVeGMrSXFXMWNqdmppaXJpa2lERUxER0E1NTFpQm85MnNU?= =?utf-8?B?ZkNaNUdXSDRmQXF5SElBYzVmbjA5SzJlVWwyZ1AwSU51YlltaGtHWTZLVDFT?= =?utf-8?B?aDVvT1IyNWE1NW1iSkJJTHdVY0NGSzFseWgwN0s4b0RaNnlVSFlyVTBqRDZC?= =?utf-8?B?b2FiMm1IaXAzZld1R25La1NXVGZjWUNnVmJmeTNLSmU1SjcwRGNkZk1XeEFn?= =?utf-8?B?TXRNQVY1MHBwNS9xQkZhQ29nQUZtbjJQN1FSbmd5YS9qZHJIM3RrR0dKaEtF?= =?utf-8?B?UUtLc3lXTVRIeW8xNlkvUXVSYlhvUkp2bW1aRjhzRmprL2ZSbkN5UzZlM2Fl?= =?utf-8?B?ejJrQ1M3NXJ6djkwU3ZZdHJzcGF5c0hrSTRWSkx1MEEwMW93cHBLUmlDb0hu?= =?utf-8?B?NHl3NGF2T1hJa3krcTdsbzZ4Q0dUOHlZVmQyZDVBWDFyaXJHdUR5UTVKZnYr?= =?utf-8?B?bnhYL1ZZSmpYOGtuU3o3UU1md1U4UEhxdnUwL2JaTFpNbEFYb2J2d3NhQVha?= =?utf-8?B?UUtTVWtMVVhBVUZyTDBaK1ZldTZ5eExBbmovU2xQR1Fzb1p1dWdOQWdCeFFs?= =?utf-8?B?cjVYalZ4MXp0SWFVMnVQbTMwcDh4N0lBVTd0RVBvdXkzM1hvZnpNYkhOOXli?= =?utf-8?B?R2c9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: 1663d28d-f201-4bca-053e-08de10f3684f X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:44:34.7836 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: PpXCkHQeN7qPpJQWWeGGZLvJAw8qufSn7pXiHBhYAYOsSztACD3u61ktjksJafS8hCLcFT8rTP4bxfHtF4U9stBBx/ZNIKfqQPATG+1FwtY= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PPFF28037229 X-OriginatorOrg: intel.com Vendor-specific VFIO driver for Xe will implement VF migration. Export everything that's needed for migration ops. Signed-off-by: Micha=C5=82 Winiarski --- drivers/gpu/drm/xe/Makefile | 2 + drivers/gpu/drm/xe/xe_sriov_vfio.c | 296 +++++++++++++++++++++++++++++ include/drm/intel/xe_sriov_vfio.h | 28 +++ 3 files changed, 326 insertions(+) create mode 100644 drivers/gpu/drm/xe/xe_sriov_vfio.c create mode 100644 include/drm/intel/xe_sriov_vfio.h diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile index 3d72db9e528e4..de3778f51ce7e 100644 --- a/drivers/gpu/drm/xe/Makefile +++ b/drivers/gpu/drm/xe/Makefile @@ -182,6 +182,8 @@ xe-$(CONFIG_PCI_IOV) +=3D \ xe_sriov_pf_service.o \ xe_tile_sriov_pf_debugfs.o =20 +xe-$(CONFIG_XE_VFIO_PCI) +=3D xe_sriov_vfio.o + # include helpers for tests even when XE is built-in ifdef CONFIG_DRM_XE_KUNIT_TEST xe-y +=3D tests/xe_kunit_helpers.o diff --git a/drivers/gpu/drm/xe/xe_sriov_vfio.c b/drivers/gpu/drm/xe/xe_sri= ov_vfio.c new file mode 100644 index 0000000000000..4f2a7c2b5d61c --- /dev/null +++ b/drivers/gpu/drm/xe/xe_sriov_vfio.c @@ -0,0 +1,296 @@ +// SPDX-License-Identifier: MIT +/* + * Copyright =C2=A9 2025 Intel Corporation + */ + +#include + +#include "xe_pm.h" +#include "xe_sriov.h" +#include "xe_sriov_migration_data.h" +#include "xe_sriov_pf_control.h" +#include "xe_sriov_pf_helpers.h" +#include "xe_sriov_pf_migration.h" +#include "xe_sriov_types.h" + +/** + * xe_sriov_vfio_migration_supported() - Check if migration is supported. + * @pdev: the PF &pci_dev device + * + * Return: true if migration is supported, false otherwise. + */ +bool xe_sriov_vfio_migration_supported(struct pci_dev *pdev) +{ + struct xe_device *xe =3D pci_get_drvdata(pdev); + + if (!IS_SRIOV_PF(xe)) + return -ENODEV; + + return xe_sriov_pf_migration_supported(xe); +} +EXPORT_SYMBOL_FOR_MODULES(xe_sriov_vfio_migration_supported, "xe-vfio-pci"= ); + +/** + * xe_sriov_vfio_wait_flr_done() - Wait for VF FLR completion. + * @pdev: the PF &pci_dev device + * @vfid: the VF identifier (can't be 0) + * + * This function will wait until VF FLR is processed by PF on all tiles (or + * until timeout occurs). + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_sriov_vfio_wait_flr_done(struct pci_dev *pdev, unsigned int vfid) +{ + struct xe_device *xe =3D pci_get_drvdata(pdev); + + if (!IS_SRIOV_PF(xe)) + return -ENODEV; + + if (vfid =3D=3D PFID || vfid > xe_sriov_pf_get_totalvfs(xe)) + return -EINVAL; + + xe_assert(xe, !xe_pm_runtime_suspended(xe)); + + return xe_sriov_pf_control_wait_flr(xe, vfid); +} +EXPORT_SYMBOL_FOR_MODULES(xe_sriov_vfio_wait_flr_done, "xe-vfio-pci"); + +/** + * xe_sriov_vfio_stop() - Stop VF. + * @pdev: the PF &pci_dev device + * @vfid: the VF identifier (can't be 0) + * + * This function will pause VF on all tiles/GTs. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_sriov_vfio_stop(struct pci_dev *pdev, unsigned int vfid) +{ + struct xe_device *xe =3D pci_get_drvdata(pdev); + + if (!IS_SRIOV_PF(xe)) + return -ENODEV; + + if (vfid =3D=3D PFID || vfid > xe_sriov_pf_get_totalvfs(xe)) + return -EINVAL; + + xe_assert(xe, !xe_pm_runtime_suspended(xe)); + + return xe_sriov_pf_control_pause_vf(xe, vfid); +} +EXPORT_SYMBOL_FOR_MODULES(xe_sriov_vfio_stop, "xe-vfio-pci"); + +/** + * xe_sriov_vfio_run() - Run VF. + * @pdev: the PF &pci_dev device + * @vfid: the VF identifier (can't be 0) + * + * This function will resume VF on all tiles. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_sriov_vfio_run(struct pci_dev *pdev, unsigned int vfid) +{ + struct xe_device *xe =3D pci_get_drvdata(pdev); + + if (!IS_SRIOV_PF(xe)) + return -ENODEV; + + if (vfid =3D=3D PFID || vfid > xe_sriov_pf_get_totalvfs(xe)) + return -EINVAL; + + xe_assert(xe, !xe_pm_runtime_suspended(xe)); + + return xe_sriov_pf_control_resume_vf(xe, vfid); +} +EXPORT_SYMBOL_FOR_MODULES(xe_sriov_vfio_run, "xe-vfio-pci"); + +/** + * xe_sriov_vfio_stop_copy_enter() - Initiate a VF device migration data s= ave. + * @pdev: the PF &pci_dev device + * @vfid: the VF identifier (can't be 0) + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_sriov_vfio_stop_copy_enter(struct pci_dev *pdev, unsigned int vfid) +{ + struct xe_device *xe =3D pci_get_drvdata(pdev); + + if (!IS_SRIOV_PF(xe)) + return -ENODEV; + + if (vfid =3D=3D PFID || vfid > xe_sriov_pf_get_totalvfs(xe)) + return -EINVAL; + + xe_assert(xe, !xe_pm_runtime_suspended(xe)); + + return xe_sriov_pf_control_trigger_save_vf(xe, vfid); +} +EXPORT_SYMBOL_FOR_MODULES(xe_sriov_vfio_stop_copy_enter, "xe-vfio-pci"); + +/** + * xe_sriov_vfio_stop_copy_exit() - Finish a VF device migration data save. + * @pdev: the PF &pci_dev device + * @vfid: the VF identifier (can't be 0) + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_sriov_vfio_stop_copy_exit(struct pci_dev *pdev, unsigned int vfid) +{ + struct xe_device *xe =3D pci_get_drvdata(pdev); + + if (!IS_SRIOV_PF(xe)) + return -ENODEV; + + if (vfid =3D=3D PFID || vfid > xe_sriov_pf_get_totalvfs(xe)) + return -EINVAL; + + xe_assert(xe, !xe_pm_runtime_suspended(xe)); + + return xe_sriov_pf_control_finish_save_vf(xe, vfid); +} +EXPORT_SYMBOL_FOR_MODULES(xe_sriov_vfio_stop_copy_exit, "xe-vfio-pci"); + +/** + * xe_sriov_vfio_resume_enter() - Initiate a VF device migration data rest= ore. + * @pdev: the PF &pci_dev device + * @vfid: the VF identifier (can't be 0) + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_sriov_vfio_resume_enter(struct pci_dev *pdev, unsigned int vfid) +{ + struct xe_device *xe =3D pci_get_drvdata(pdev); + + if (!IS_SRIOV_PF(xe)) + return -ENODEV; + + if (vfid =3D=3D PFID || vfid > xe_sriov_pf_get_totalvfs(xe)) + return -EINVAL; + + xe_assert(xe, !xe_pm_runtime_suspended(xe)); + + return xe_sriov_pf_control_trigger_restore_vf(xe, vfid); +} +EXPORT_SYMBOL_FOR_MODULES(xe_sriov_vfio_resume_enter, "xe-vfio-pci"); + +/** + * xe_sriov_vfio_resume_exit() - Finish a VF device migration data restore. + * @pdev: the PF &pci_dev device + * @vfid: the VF identifier (can't be 0) + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_sriov_vfio_resume_exit(struct pci_dev *pdev, unsigned int vfid) +{ + struct xe_device *xe =3D pci_get_drvdata(pdev); + + if (!IS_SRIOV_PF(xe)) + return -ENODEV; + + if (vfid =3D=3D PFID || vfid > xe_sriov_pf_get_totalvfs(xe)) + return -EINVAL; + + xe_assert(xe, !xe_pm_runtime_suspended(xe)); + + return xe_sriov_pf_control_finish_restore_vf(xe, vfid); +} +EXPORT_SYMBOL_FOR_MODULES(xe_sriov_vfio_resume_exit, "xe-vfio-pci"); + +/** + * xe_sriov_vfio_error() - Move VF device to error state. + * @pdev: the PF &pci_dev device + * @vfid: the VF identifier (can't be 0) + * + * Reset is needed to move it out of error state. + * + * Return: 0 on success or a negative error code on failure. + */ +int xe_sriov_vfio_error(struct pci_dev *pdev, unsigned int vfid) +{ + struct xe_device *xe =3D pci_get_drvdata(pdev); + + if (!IS_SRIOV_PF(xe)) + return -ENODEV; + + if (vfid =3D=3D PFID || vfid > xe_sriov_pf_get_totalvfs(xe)) + return -EINVAL; + + xe_assert(xe, !xe_pm_runtime_suspended(xe)); + + return xe_sriov_pf_control_stop_vf(xe, vfid); +} +EXPORT_SYMBOL_FOR_MODULES(xe_sriov_vfio_error, "xe-vfio-pci"); + +/** + * xe_sriov_vfio_data_read() - Read migration data from the VF device. + * @pdev: the PF &pci_dev device + * @vfid: the VF identifier (can't be 0) + * @buf: start address of userspace buffer + * @len: requested read size from userspace + * + * Return: number of bytes that has been successfully read, + * 0 if no more migration data is available, -errno on failure. + */ +ssize_t xe_sriov_vfio_data_read(struct pci_dev *pdev, unsigned int vfid, + char __user *buf, size_t len) +{ + struct xe_device *xe =3D pci_get_drvdata(pdev); + + if (!IS_SRIOV_PF(xe)) + return -ENODEV; + + if (vfid =3D=3D PFID || vfid > xe_sriov_pf_get_totalvfs(xe)) + return -EINVAL; + + return xe_sriov_migration_data_read(xe, vfid, buf, len); +} +EXPORT_SYMBOL_FOR_MODULES(xe_sriov_vfio_data_read, "xe-vfio-pci"); + +/** + * xe_sriov_vfio_data_write() - Write migration data to the VF device. + * @pdev: the PF &pci_dev device + * @vfid: the VF identifier (can't be 0) + * @buf: start address of userspace buffer + * @len: requested write size from userspace + * + * Return: number of bytes that has been successfully written, -errno on f= ailure. + */ +ssize_t xe_sriov_vfio_data_write(struct pci_dev *pdev, unsigned int vfid, + const char __user *buf, size_t len) +{ + struct xe_device *xe =3D pci_get_drvdata(pdev); + + if (!IS_SRIOV_PF(xe)) + return -ENODEV; + + if (vfid =3D=3D PFID || vfid > xe_sriov_pf_get_totalvfs(xe)) + return -EINVAL; + + return xe_sriov_migration_data_write(xe, vfid, buf, len); +} +EXPORT_SYMBOL_FOR_MODULES(xe_sriov_vfio_data_write, "xe-vfio-pci"); + +/** + * xe_sriov_vfio_stop_copy_size() - Get a size estimate of VF device migra= tion data. + * @pdev: the PF &pci_dev device + * @vfid: the VF identifier (can't be 0) + * + * Return: migration data size in bytes or a negative error code on failur= e. + */ +ssize_t xe_sriov_vfio_stop_copy_size(struct pci_dev *pdev, unsigned int vf= id) +{ + struct xe_device *xe =3D pci_get_drvdata(pdev); + + if (!IS_SRIOV_PF(xe)) + return -ENODEV; + + if (vfid =3D=3D PFID || vfid > xe_sriov_pf_get_totalvfs(xe)) + return -EINVAL; + + xe_assert(xe, !xe_pm_runtime_suspended(xe)); + + return xe_sriov_pf_migration_size(xe, vfid); +} +EXPORT_SYMBOL_FOR_MODULES(xe_sriov_vfio_stop_copy_size, "xe-vfio-pci"); diff --git a/include/drm/intel/xe_sriov_vfio.h b/include/drm/intel/xe_sriov= _vfio.h new file mode 100644 index 0000000000000..cf4ef7a1cfbbe --- /dev/null +++ b/include/drm/intel/xe_sriov_vfio.h @@ -0,0 +1,28 @@ +/* SPDX-License-Identifier: MIT */ +/* + * Copyright =C2=A9 2025 Intel Corporation + */ + +#ifndef _XE_SRIOV_VFIO_H_ +#define _XE_SRIOV_VFIO_H_ + +#include + +struct pci_dev; + +bool xe_sriov_vfio_migration_supported(struct pci_dev *pdev); +int xe_sriov_vfio_wait_flr_done(struct pci_dev *pdev, unsigned int vfid); +int xe_sriov_vfio_stop(struct pci_dev *pdev, unsigned int vfid); +int xe_sriov_vfio_run(struct pci_dev *pdev, unsigned int vfid); +int xe_sriov_vfio_stop_copy_enter(struct pci_dev *pdev, unsigned int vfid); +int xe_sriov_vfio_stop_copy_exit(struct pci_dev *pdev, unsigned int vfid); +int xe_sriov_vfio_resume_enter(struct pci_dev *pdev, unsigned int vfid); +int xe_sriov_vfio_resume_exit(struct pci_dev *pdev, unsigned int vfid); +int xe_sriov_vfio_error(struct pci_dev *pdev, unsigned int vfid); +ssize_t xe_sriov_vfio_data_read(struct pci_dev *pdev, unsigned int vfid, + char __user *buf, size_t len); +ssize_t xe_sriov_vfio_data_write(struct pci_dev *pdev, unsigned int vfid, + const char __user *buf, size_t len); +ssize_t xe_sriov_vfio_stop_copy_size(struct pci_dev *pdev, unsigned int vf= id); + +#endif --=20 2.50.1 From nobody Sun Feb 8 12:20:03 2026 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.12]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 64A0730EF96; Tue, 21 Oct 2025 22:44:43 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=198.175.65.12 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086686; cv=fail; b=KHeOjJ+lEkwTzSwcvt7tlzR07LzTbpfbEj31EFc+DwFVtajzw2gxxhsjK6IdRQZTDBreIIVyJUWlgSIdHLGoFdzSbmMsGXa3gFQkdpr2bgRPY2sbCQD2xPcZpsQYv5F8rzQNpmDkxlITJp/yLjYp29K020FMWLjRaxmqsXB6WgY= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761086686; c=relaxed/simple; bh=QpJ02nPRkuQsfUqAEgTWX8xhHsaQnLJIZMujVqWZtB4=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: Content-Type:MIME-Version; b=TqzB9aBGo0z2bOWQhDlo9YFS6lS1x2i7M2f3AbdOGkconnqwwy4ARNvxibWdrkq9UR19wSPCZ+wBCClgL2QUHfvbyzwxDMykr4Zmx5Htgea8mpa/aJcrendnNs8nGRZl0C90NhRN1UWzrGAMnhJFMVPqJ+Pf/UtWab5uOwIMrv0= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=CvojnWFc; arc=fail smtp.client-ip=198.175.65.12 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="CvojnWFc" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761086683; x=1792622683; h=from:to:cc:subject:date:message-id:in-reply-to: references:content-transfer-encoding:mime-version; bh=QpJ02nPRkuQsfUqAEgTWX8xhHsaQnLJIZMujVqWZtB4=; b=CvojnWFckdcX2/QBDt9fn1Qvfg02vXedcjn3yBLQlCRfwb/QGM8iGd5s pRpXG7qk5s8ZWN2QlrMpXH1RvFCCKV8SaNV6Kum2cgOELI+ync12Pkc7b AwZC6j+/7zZGAuTRVawVbUqpGWYta5fTMwAV0woRukhXrDFbL2UnHqdxk gpLNcVXXzNwNOwRV5MgVhd26kWDKypNJQRfdQ2TOdmZ90DFZX+0dkvZ0s MaAh2BAweMxwdHncvt+eE6aA7lqb3/qg2FqeCfb5xsykUUxrqxOzpoxwG Y23qOV1olrSjaEYDp5o7HQJbOtGCtQyWyrK/IB5h7QhyWAf22NsOZ2tTt w==; X-CSE-ConnectionGUID: xK71G4quRcW/ap4lG4Z/MA== X-CSE-MsgGUID: BipgCiW9SoKk2xHk0Yz7OQ== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="74663076" X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="74663076" Received: from orviesa002.jf.intel.com ([10.64.159.142]) by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:44:43 -0700 X-CSE-ConnectionGUID: b7IjFgepSa212U7bHJz/XQ== X-CSE-MsgGUID: xxQ3hGb3R4+/YLcLLjUGag== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,246,1754982000"; d="scan'208";a="214345894" Received: from fmsmsx901.amr.corp.intel.com ([10.18.126.90]) by orviesa002.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 Oct 2025 15:44:42 -0700 Received: from FMSMSX902.amr.corp.intel.com (10.18.126.91) by fmsmsx901.amr.corp.intel.com (10.18.126.90) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:44:40 -0700 Received: from fmsedg903.ED.cps.intel.com (10.1.192.145) by FMSMSX902.amr.corp.intel.com (10.18.126.91) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27 via Frontend Transport; Tue, 21 Oct 2025 15:44:40 -0700 Received: from CY7PR03CU001.outbound.protection.outlook.com (40.93.198.47) by edgegateway.intel.com (192.55.55.83) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.27; Tue, 21 Oct 2025 15:44:40 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=hA3LTXPTmRbL3o8Uwzp/bCx7Qs7qEhjNFEcRhwAHUKby24NaUR/sjfdWi/Nc+0ZFLsjqUFXv/4VYGR5qeWYN7AQHWoW8Yq1p+WJsNHUZEjbEXK3Xckox7OU5z2nOh6QnBI9F0H37Debdnwj0OKt8yYe/K/EVo3UyPur59Lj2X8I56sF6cUuMKRF6uXShis/ejrb/VwAdIY4SA/XCv8eXlk8KUL5Lv3oiRzGi7ocxlQ4nQJOJ2ZmVHODHMKhvGbc1gYn6b1wKsEeMWRbTfPjzRm/zjv+jMV0Gxg+sk3T0xuIxVyp8xPjpc+BE9r+owVHozySBoXJ0W3t9IZf2W+sZ+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=60dPgpZru0+LUY1WeOWqA8y0IuDlABPCdiZ07C3ivtU=; b=Gr3/OrRjyEGH3MpthTQNA6hnz9m+UWtrs7tNBnDOb9mPSMDVKDUhx/YA923WECpRhcztNygztLT27Z6YdM/kNNaWCrV2zZMOdte/PDmhbLQhY8Mf+85usPUYZHpB7Y3DmjwgnG5EakZeJ+R43XFlC0fOowzQ4qRyR0tVC8mzmK1C41g6faIs4WHDTDKa0mAw1WkjC7PO4hXVZt91yxRdFpCxq0kKFmZAe7OUAouhrgjgfOnWABUPyU1PyQM7YCXanEyYjfvvMvMuGCsUUIusLT/iMvbGOb8sJ+9yeaChboaS2+beePmOoN4pYKxwI7gmCZLygPdTvavoHik18P5+MA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=intel.com; dmarc=pass action=none header.from=intel.com; dkim=pass header.d=intel.com; arc=none Authentication-Results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=intel.com; Received: from DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) by DM3PPFF28037229.namprd11.prod.outlook.com (2603:10b6:f:fc00::f5f) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9228.16; Tue, 21 Oct 2025 22:44:39 +0000 Received: from DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39]) by DM4PR11MB5373.namprd11.prod.outlook.com ([fe80::927a:9c08:26f7:5b39%5]) with mapi id 15.20.9253.011; Tue, 21 Oct 2025 22:44:38 +0000 From: =?UTF-8?q?Micha=C5=82=20Winiarski?= To: Alex Williamson , Lucas De Marchi , =?UTF-8?q?Thomas=20Hellstr=C3=B6m?= , Rodrigo Vivi , Jason Gunthorpe , Yishai Hadas , Kevin Tian , , , , Matthew Brost , Michal Wajdeczko CC: , Jani Nikula , Joonas Lahtinen , Tvrtko Ursulin , David Airlie , Simona Vetter , "Lukasz Laguna" , =?UTF-8?q?Micha=C5=82=20Winiarski?= Subject: [PATCH v2 26/26] vfio/xe: Add vendor-specific vfio_pci driver for Intel graphics Date: Wed, 22 Oct 2025 00:41:33 +0200 Message-ID: <20251021224133.577765-27-michal.winiarski@intel.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20251021224133.577765-1-michal.winiarski@intel.com> References: <20251021224133.577765-1-michal.winiarski@intel.com> Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-ClientProxiedBy: WA2P291CA0034.POLP291.PROD.OUTLOOK.COM (2603:10a6:1d0:1f::7) To DM4PR11MB5373.namprd11.prod.outlook.com (2603:10b6:5:394::7) Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM4PR11MB5373:EE_|DM3PPFF28037229:EE_ X-MS-Office365-Filtering-Correlation-Id: 8a5edefc-1d69-4d5e-05a5-08de10f36aaa X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|366016|7416014|376014|1800799024|921020; X-Microsoft-Antispam-Message-Info: =?utf-8?B?a0ZWTk5DeDhCTWhxTmRYZ0U0TXFlUzNmSlNKclRxRnIvdlN5ajVoMU9oU3lI?= =?utf-8?B?dFJwRzdWdThZOGlTYW1YSlNrc29YY0E4Tm1xZytpWDQ1WEV5UzdtZEZyOTB3?= =?utf-8?B?TUpvN0xkV3F4M2lHVVlvUkhJLzlYVHk2UmVyWHduMGJjc1kzdFBMSE9ONENo?= =?utf-8?B?bmVCSmxBYTZDd29FQUhOUlJZS0lRM2tDRlhPRVNYSVYzZXFVc0NvdDk4cjVU?= =?utf-8?B?eGdKVDI2bnpYNnRDSlZKZWtOR1l6OXdCL2JpTE8zQyt6dDN4MXU3NkZTZmh0?= =?utf-8?B?QXVDMnFoVGtQQVlRblJXRTlDbDJZOHM2cGxqdHVjcEoyUWhSUDFIN1dkVk4x?= =?utf-8?B?clBkZXZZZW1jNGJWYk5Dd1hycVpIWnI4dVBsZVNMUnYvUFRuNFNlczY3bU40?= =?utf-8?B?bXp2QU5YeENSYWVDanYwVHZtaC8vbWhmMjBnZXBVQjkwWmFNODNVZ2RzY0I5?= =?utf-8?B?M0RESE1CaFlPcnhBeUUzbVVLYWIvQ0xReDM1M1NuZVhlMlJDVG1CSXdYS2VD?= =?utf-8?B?MkJTNjlTV3p3MFNXTzRRdnRZOXJpV2RuMG9LWVpuWmJBQjc4WHlub0tQRWtv?= =?utf-8?B?S3NWY2RFV3ZydEpkekdzVDR0NzU0U1dPZXFDREZpWjQ5V3pMV3F3SnB6d29m?= =?utf-8?B?ZHhKbTV4WHBJRUt2dnJkbVN5cllSbjFvWnh0YzBtekhpOFZqWWVzcWlaRUor?= =?utf-8?B?MVUwdWR4MU5LVzJNcDlGTVRYb0s2cHo5RlFseVdXZnlKQ1QyVFduZDEwYVNU?= =?utf-8?B?MjdQMlp5YnBaZHhLR1ZtVnZxaEJXaWs1VDZwSml2VEd6Wnh6cWEwRHpWME5p?= =?utf-8?B?S0dpc1lBdkVQZGpsYkhQM0ZmWE5HRW9KYlRPQzd4Q1hlNjdoSlZnZFUyUVhH?= =?utf-8?B?U2JvdDJBREEvMG9DMHhVS1JaSmtweVhWUHFMMmpCM0dkRWlWcFFtMGQrRGJu?= =?utf-8?B?Q212cWhhOHBzUmhWVm9mYW5jNWcvRFgzdjNxczk5MWpVaUMyQUZXcDhKNC9T?= =?utf-8?B?b1AwNjZ4Z1JvdnBSUjVhZlNwSzdXUEw4S2dxd3RqUU5LKzd6UDlweGl2TGdv?= =?utf-8?B?aDl0T2kxT2g1T21McUVNeUgzSC9YajB4UStNaGZxczhDMUxoVkw5cEZyc1Zk?= =?utf-8?B?MWtWbkh0K0N5MmxTS1Bzc1Zxb2JuTHIvQ0tGbWRwTlVHbVRYZ25yWm9NRGFV?= =?utf-8?B?ZDg2eXdSV2lVdWZmNmFCREZWdllPV1BBNFFRMjZqS05VK0ZzTXFRWFFYZGVP?= =?utf-8?B?U0QzVTBrcnhxei9Yd0oySk94dXZVTHRvanRnMDBDQkFJTWVWTS9PUmdwM25w?= =?utf-8?B?OStLRjlWS1RGYndPVmJRbGU2d01iWnpwdVFYMWN4b1k3ZWZwWlVPTmNBeHFL?= =?utf-8?B?dFVXK0dTVUJKYk9pWGlLSStNTjJZdzVibEJLbjI1NG1NME1xcG9EbHNXazRW?= =?utf-8?B?dzY4bU83Vmh6amQvLytNc0JNd0gyZUtWRkszejhTUXpZUGVMOVlTNnY1VEM5?= =?utf-8?B?azd5VkxYM1o5TmI4N1NCUG00S0JGZi9SZmFZZjMwWHdKZWJRbjh6b0Y3a3R4?= =?utf-8?B?NmhqRDBCek05endPWGVrQ1l1UEdUQ3k0T0IrdEpIaE5WUEk4RzJjbFBBZ0lU?= =?utf-8?B?QnJWVXdoZk9ZRmZ4WVJWVTB0TS8wcStjaVlMczZkaDg5dXVOa0FCaG8vWHdQ?= =?utf-8?B?aHh0Y0RWa0dQRytIMHlacjB0empUTktWN1FTaWdLVUwxMk9yOEQ5M3JVZDRn?= =?utf-8?B?R3JWS2dkNThNYlZ2NUFZSTVjY3VVNmRrVzdQOTh6SDBrKzBYSldjd25vOFkw?= =?utf-8?B?ZTl3MWtVMWdreFlUMTNPUG5LaE12ZUM5YXpmQ1FRWG5mSytzNXB1a3J2d04z?= =?utf-8?B?NTR3ZXozU2g5RXZqUHpvZUc1VFMzRzJ1SzN0ZmxrU1VFNGRLQksrYS9qSVp4?= =?utf-8?B?SkdoQnFhR1YvbGY2UFNDQmU5eDM0czNObkNPWnp6WG00MVRreUhibWZ1VmpB?= =?utf-8?Q?OmJuYBmCnaYzxRA2qTN4VK/5oD+8Hc=3D?= X-Forefront-Antispam-Report: CIP:255.255.255.255;CTRY:;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:DM4PR11MB5373.namprd11.prod.outlook.com;PTR:;CAT:NONE;SFS:(13230040)(366016)(7416014)(376014)(1800799024)(921020);DIR:OUT;SFP:1101; X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: =?utf-8?B?MlFsNU9lVitxVDAzNjFzckxsNnJQemdkVFVnSXJnVnRnVFlETXRucG4xbzRX?= =?utf-8?B?bDl5QzNRbGFZdlBNbG5BVEJXWTZmK2I1YXB4ODl5Uk90cjdwbmpvM2x1UG5p?= =?utf-8?B?RmNXbWE1dTIrQ1FuMmQrN2RXVHVDenZaRGxDWW1ZcjB3eWFlbDNCaWlUM1FB?= =?utf-8?B?MzNEZWNWV0lkb1RaZGtCRmZSbUpHbGZGNGg3ZzdSNjdqcU1rU0JDSUFHbVB5?= =?utf-8?B?NXNNMkV2UzF1Y3hQbUExeTd3QlZ1MjhRU0dQaWpBWURJVGZ6N2dodWtBT1ht?= =?utf-8?B?eWdZOUNsaGNTM25RUGtBQklOemR4V2JhdmJHKytnbTd4NWxTajloOVBYUXBH?= =?utf-8?B?VTB4aUl6U1JLaXVPNGtZREQyb2JUZkpoOGNsaE4wUkVVQ2RzL29LZWJJVTNP?= =?utf-8?B?WFY5K3ROUzlDdVFBV2ZvMnUyZDhweU96QVpKd1RCa2lzUit2cUl6c3l3Vklr?= =?utf-8?B?c1J4YzQrKzcyVkVTTDk5UFFWd1NlQ3hTNjFyclBWYS8xemtiZEdRRXZaaDFC?= =?utf-8?B?YlowazJUbkFzckgvUTE5WVFJcEdTVDZyNG5OWVVzZkJSSlJyWVU0VkVKSDJF?= =?utf-8?B?QUxBdlAzRm83RzlEN0djVDQ3Nms4cHJvUk41dy9DcjBrWEhsdFErb0thSldU?= =?utf-8?B?ekREQk14YWFoM0dEYzRCaitJQnBxbE42RGNXYmFHTWZLelh4NDFaSlArd0VH?= =?utf-8?B?aTQ1aXZzN2JkOFJhazgwSlBNV0I0dzhEaHVxNGQ3YzZDcllGRkJQR05lVzJN?= =?utf-8?B?eUpBN0tCaEFaWUZLUzByYXdsMC9EeDNXUDhodFJGb1R6UlJqREltWkdWczYr?= =?utf-8?B?Ym5CZlZIc1EwRTUvUUVEQjJ0YnpQbVJ2elNQY2luUUhQT0RsWkRTT3EzQjZa?= =?utf-8?B?elBRalBsaGs3Q0Y0UmdTWWxIRWs5M0hGUHhaNU1PTjBGSUZJSGhLZjV5OW8r?= =?utf-8?B?Y1JlWWRBZDUxTjVmOFA3QjBMOW9VV05LNkgyQVcyek1GZzB4OXJPZXVGL1hX?= =?utf-8?B?eWtEQ0tCbnNyUzNBSnNUWGhTRzF2NEd2QUp4b3dOR3Urb05ZV25lZmVyVW5T?= =?utf-8?B?R1MwTklrb1lKZ0dCaEVuamdGckx2bTNOUHdMOVN1WkdxWlBnUlJvb2ljSkpw?= =?utf-8?B?cW1HWm9QS0tDQTc5YVViODFEUGUxNHMxcXVCSjhTVEJjbzhmRjRLZzhwSVJy?= =?utf-8?B?ZVYzemxnRUcvODR2ZDhxVXV3OUFXREptdkhqVnZNS2F0ejcrQ0RlQlZSNUI5?= =?utf-8?B?MWUwRXZrS1I1SjRHMVErVVF5TFg5djBON0V3eUhaV081M1BFQzF0a21nOVJ3?= =?utf-8?B?Y3hYVUJHQXhHZDhOODEzd0l3ZFdGNXR4azk0eW53WW1pdmo0QWdZL2hTU095?= =?utf-8?B?ZUFZMit1dUE5VUo4UWl1a1R3Tkc1TUVRUXhTRnh6SkozZVZVQU91eXFLbXNh?= =?utf-8?B?d3NzeGUwRmNVaElPWWswcDlDT3lqK042aXlxWkgzanhMMTVwOEJZWWl4ckVz?= =?utf-8?B?S09zZTlDMEY2OHVTZkJaRi95d3M1clcyYm5QZGMrOGlzK3ZJVmpDcy9DTjRl?= =?utf-8?B?VWdJOW1PeWphMFF3dGtEajJYZVUyS2dicW1mRkZrQ1JsYWFDTTlndmkrZUpY?= =?utf-8?B?dDJCU3pKNEFhdlY5TnFLSEFQNW9VMHpQQi9XVlpuLzJXeElhMFBqNWVmWGVs?= =?utf-8?B?cmFBNCtveVhraGNxVjUvMW5mNWdHcG9LTkZUNzRHT3dNTlNqYmVjOUdIeFJB?= =?utf-8?B?VTVBeFA2Ly8vb0RtZ05yeFBNaW4razRqMjAxRXVFV0tQT291TkhoeHMxYzR5?= =?utf-8?B?UXN6dFlzak8rMk9BSWdaTHlyZ2NQK3ZGcmlJOGtYZEErb0ZEY0NTK2pESHU5?= =?utf-8?B?TkRwS2UzYk4xRGFjbmZ5WnBKc0tsRm94RkNRTGhyUUxoYVRBeE82U1VsSW5U?= =?utf-8?B?c0pTY1NtdjkraUV2bXFLd3N6TzRZK2hpTnhUTjY1WmNYL3ZzZlBwYm5PK1Vi?= =?utf-8?B?cW1BVHdLdUhlMmpKbHIreHl1Y0RDbEhJcmZRVGJ4RUp5VlRkeU9leW1lWkox?= =?utf-8?B?TnBBTHpNc2pCdU83VUVBR3ZmZEhOS0hKZnBLSW03NWVWYVFDNDNRNEh0MFg2?= =?utf-8?B?Uy91SGRzQWpsS3JkdHJ3SC9PQXFPb3pQK3pRUlVZU2FIbGRvT2FEb2pveUpF?= =?utf-8?B?emc9PQ==?= X-MS-Exchange-CrossTenant-Network-Message-Id: 8a5edefc-1d69-4d5e-05a5-08de10f36aaa X-MS-Exchange-CrossTenant-AuthSource: DM4PR11MB5373.namprd11.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 22:44:38.8380 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 46c98d88-e344-4ed4-8496-4ed7712e255d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: dfm2KRkUi1jGsOIxxNMckfXNZYfNLcNHUhFytEYAuvkqAWedfHQohPt+hqk4D+G4akzRSLXf1HUDbmIG/FLXSScJNa+N5dg6rjVs2S5LUjw= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM3PPFF28037229 X-OriginatorOrg: intel.com In addition to generic VFIO PCI functionality, the driver implements VFIO migration uAPI, allowing userspace to enable migration for Intel Graphics SR-IOV Virtual Functions. The driver binds to VF device, and uses API exposed by Xe driver bound to PF device to control VF device state and transfer the migration data. Signed-off-by: Micha=C5=82 Winiarski --- MAINTAINERS | 7 + drivers/vfio/pci/Kconfig | 2 + drivers/vfio/pci/Makefile | 2 + drivers/vfio/pci/xe/Kconfig | 12 + drivers/vfio/pci/xe/Makefile | 3 + drivers/vfio/pci/xe/main.c | 470 +++++++++++++++++++++++++++++++++++ 6 files changed, 496 insertions(+) create mode 100644 drivers/vfio/pci/xe/Kconfig create mode 100644 drivers/vfio/pci/xe/Makefile create mode 100644 drivers/vfio/pci/xe/main.c diff --git a/MAINTAINERS b/MAINTAINERS index 096fcca26dc76..255fcb01c98e1 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -26976,6 +26976,13 @@ L: virtualization@lists.linux.dev S: Maintained F: drivers/vfio/pci/virtio =20 +VFIO XE PCI DRIVER +M: Micha=C5=82 Winiarski +L: kvm@vger.kernel.org +L: intel-xe@lists.freedesktop.org +S: Supported +F: drivers/vfio/pci/xe + VGA_SWITCHEROO R: Lukas Wunner S: Maintained diff --git a/drivers/vfio/pci/Kconfig b/drivers/vfio/pci/Kconfig index 2b0172f546652..c100f0ab87f2d 100644 --- a/drivers/vfio/pci/Kconfig +++ b/drivers/vfio/pci/Kconfig @@ -67,4 +67,6 @@ source "drivers/vfio/pci/nvgrace-gpu/Kconfig" =20 source "drivers/vfio/pci/qat/Kconfig" =20 +source "drivers/vfio/pci/xe/Kconfig" + endmenu diff --git a/drivers/vfio/pci/Makefile b/drivers/vfio/pci/Makefile index cf00c0a7e55c8..f5d46aa9347b9 100644 --- a/drivers/vfio/pci/Makefile +++ b/drivers/vfio/pci/Makefile @@ -19,3 +19,5 @@ obj-$(CONFIG_VIRTIO_VFIO_PCI) +=3D virtio/ obj-$(CONFIG_NVGRACE_GPU_VFIO_PCI) +=3D nvgrace-gpu/ =20 obj-$(CONFIG_QAT_VFIO_PCI) +=3D qat/ + +obj-$(CONFIG_XE_VFIO_PCI) +=3D xe/ diff --git a/drivers/vfio/pci/xe/Kconfig b/drivers/vfio/pci/xe/Kconfig new file mode 100644 index 0000000000000..787be88268685 --- /dev/null +++ b/drivers/vfio/pci/xe/Kconfig @@ -0,0 +1,12 @@ +# SPDX-License-Identifier: GPL-2.0-only +config XE_VFIO_PCI + tristate "VFIO support for Intel Graphics" + depends on DRM_XE + select VFIO_PCI_CORE + help + This option enables vendor-specific VFIO driver for Intel Graphics. + In addition to generic VFIO PCI functionality, it implements VFIO + migration uAPI allowing userspace to enable migration for + Intel Graphics SR-IOV Virtual Functions supported by the Xe driver. + + If you don't know what to do here, say N. diff --git a/drivers/vfio/pci/xe/Makefile b/drivers/vfio/pci/xe/Makefile new file mode 100644 index 0000000000000..13aa0fd192cd4 --- /dev/null +++ b/drivers/vfio/pci/xe/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0-only +obj-$(CONFIG_XE_VFIO_PCI) +=3D xe-vfio-pci.o +xe-vfio-pci-y :=3D main.o diff --git a/drivers/vfio/pci/xe/main.c b/drivers/vfio/pci/xe/main.c new file mode 100644 index 0000000000000..bea992cdee6b0 --- /dev/null +++ b/drivers/vfio/pci/xe/main.c @@ -0,0 +1,470 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright =C2=A9 2025 Intel Corporation + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + +/** + * struct xe_vfio_pci_migration_file - file used for reading / writing mig= ration data + */ +struct xe_vfio_pci_migration_file { + /** @filp: pointer to underlying &struct file */ + struct file *filp; + /** @lock: serializes accesses to migration data */ + struct mutex lock; + /** @xe_vdev: backpointer to &struct xe_vfio_pci_core_device */ + struct xe_vfio_pci_core_device *xe_vdev; +}; + +/** + * struct xe_vfio_pci_core_device - xe-specific vfio_pci_core_device + * + * Top level structure of xe_vfio_pci. + */ +struct xe_vfio_pci_core_device { + /** @core_device: vendor-agnostic VFIO device */ + struct vfio_pci_core_device core_device; + + /** @mig_state: current device migration state */ + enum vfio_device_mig_state mig_state; + + /** @vfid: VF number used by PF, xe uses 1-based indexing for vfid */ + unsigned int vfid; + + /** @pf: pointer to driver_private of physical function */ + struct pci_dev *pf; + + /** @fd: &struct xe_vfio_pci_migration_file for userspace to read/write m= igration data */ + struct xe_vfio_pci_migration_file *fd; +}; + +#define xe_vdev_to_dev(xe_vdev) (&(xe_vdev)->core_device.pdev->dev) +#define xe_vdev_to_pdev(xe_vdev) ((xe_vdev)->core_device.pdev) + +static void xe_vfio_pci_disable_file(struct xe_vfio_pci_migration_file *mi= gf) +{ + struct xe_vfio_pci_core_device *xe_vdev =3D migf->xe_vdev; + + mutex_lock(&migf->lock); + xe_vdev->fd =3D NULL; + mutex_unlock(&migf->lock); +} + +static void xe_vfio_pci_reset(struct xe_vfio_pci_core_device *xe_vdev) +{ + if (xe_vdev->fd) + xe_vfio_pci_disable_file(xe_vdev->fd); + + xe_vdev->mig_state =3D VFIO_DEVICE_STATE_RUNNING; +} + +static void xe_vfio_pci_reset_done(struct pci_dev *pdev) +{ + struct xe_vfio_pci_core_device *xe_vdev =3D pci_get_drvdata(pdev); + int ret; + + ret =3D xe_sriov_vfio_wait_flr_done(xe_vdev->pf, xe_vdev->vfid); + if (ret) + dev_err(&pdev->dev, "Failed to wait for FLR: %d\n", ret); + + xe_vfio_pci_reset(xe_vdev); +} + +static const struct pci_error_handlers xe_vfio_pci_err_handlers =3D { + .reset_done =3D xe_vfio_pci_reset_done, +}; + +static int xe_vfio_pci_open_device(struct vfio_device *core_vdev) +{ + struct xe_vfio_pci_core_device *xe_vdev =3D + container_of(core_vdev, struct xe_vfio_pci_core_device, core_device.vdev= ); + struct vfio_pci_core_device *vdev =3D &xe_vdev->core_device; + int ret; + + ret =3D vfio_pci_core_enable(vdev); + if (ret) + return ret; + + vfio_pci_core_finish_enable(vdev); + + return 0; +} + +static int xe_vfio_pci_release_file(struct inode *inode, struct file *filp) +{ + struct xe_vfio_pci_migration_file *migf =3D filp->private_data; + + xe_vfio_pci_disable_file(migf); + mutex_destroy(&migf->lock); + kfree(migf); + + return 0; +} + +static ssize_t xe_vfio_pci_save_read(struct file *filp, char __user *buf, = size_t len, loff_t *pos) +{ + struct xe_vfio_pci_migration_file *migf =3D filp->private_data; + ssize_t ret; + + if (pos) + return -ESPIPE; + + mutex_lock(&migf->lock); + ret =3D xe_sriov_vfio_data_read(migf->xe_vdev->pf, migf->xe_vdev->vfid, b= uf, len); + mutex_unlock(&migf->lock); + + return ret; +} + +static const struct file_operations xe_vfio_pci_save_fops =3D { + .owner =3D THIS_MODULE, + .read =3D xe_vfio_pci_save_read, + .release =3D xe_vfio_pci_release_file, + .llseek =3D noop_llseek, +}; + +static ssize_t xe_vfio_pci_resume_write(struct file *filp, const char __us= er *buf, + size_t len, loff_t *pos) +{ + struct xe_vfio_pci_migration_file *migf =3D filp->private_data; + ssize_t ret; + + if (pos) + return -ESPIPE; + + mutex_lock(&migf->lock); + ret =3D xe_sriov_vfio_data_write(migf->xe_vdev->pf, migf->xe_vdev->vfid, = buf, len); + mutex_unlock(&migf->lock); + + return ret; +} + +static const struct file_operations xe_vfio_pci_resume_fops =3D { + .owner =3D THIS_MODULE, + .write =3D xe_vfio_pci_resume_write, + .release =3D xe_vfio_pci_release_file, + .llseek =3D noop_llseek, +}; + +static const char *vfio_dev_state_str(u32 state) +{ + switch (state) { + case VFIO_DEVICE_STATE_RUNNING: return "running"; + case VFIO_DEVICE_STATE_RUNNING_P2P: return "running_p2p"; + case VFIO_DEVICE_STATE_STOP_COPY: return "stopcopy"; + case VFIO_DEVICE_STATE_STOP: return "stop"; + case VFIO_DEVICE_STATE_RESUMING: return "resuming"; + case VFIO_DEVICE_STATE_ERROR: return "error"; + default: return ""; + } +} + +enum xe_vfio_pci_file_type { + XE_VFIO_FILE_SAVE =3D 0, + XE_VFIO_FILE_RESUME, +}; + +static struct xe_vfio_pci_migration_file * +xe_vfio_pci_alloc_file(struct xe_vfio_pci_core_device *xe_vdev, + enum xe_vfio_pci_file_type type) +{ + struct xe_vfio_pci_migration_file *migf; + const struct file_operations *fops; + int flags; + + migf =3D kzalloc(sizeof(*migf), GFP_KERNEL); + if (!migf) + return ERR_PTR(-ENOMEM); + + fops =3D type =3D=3D XE_VFIO_FILE_SAVE ? &xe_vfio_pci_save_fops : &xe_vfi= o_pci_resume_fops; + flags =3D type =3D=3D XE_VFIO_FILE_SAVE ? O_RDONLY : O_WRONLY; + migf->filp =3D anon_inode_getfile("xe_vfio_mig", fops, migf, flags); + if (IS_ERR(migf->filp)) { + kfree(migf); + return ERR_CAST(migf->filp); + } + + mutex_init(&migf->lock); + migf->xe_vdev =3D xe_vdev; + xe_vdev->fd =3D migf; + + stream_open(migf->filp->f_inode, migf->filp); + + return migf; +} + +static struct file * +xe_vfio_set_state(struct xe_vfio_pci_core_device *xe_vdev, u32 new) +{ + u32 cur =3D xe_vdev->mig_state; + int ret; + + dev_dbg(xe_vdev_to_dev(xe_vdev), + "state: %s->%s\n", vfio_dev_state_str(cur), vfio_dev_state_str(new)); + + /* + * "STOP" handling is reused for "RUNNING_P2P", as the device doesn't hav= e the capability to + * selectively block p2p DMA transfers. + * The device is not processing new workload requests when the VF is stop= ped, and both + * memory and MMIO communication channels are transferred to destination = (where processing + * will be resumed). + */ + if ((cur =3D=3D VFIO_DEVICE_STATE_RUNNING && new =3D=3D VFIO_DEVICE_STATE= _STOP) || + (cur =3D=3D VFIO_DEVICE_STATE_RUNNING && new =3D=3D VFIO_DEVICE_STATE= _RUNNING_P2P)) { + ret =3D xe_sriov_vfio_stop(xe_vdev->pf, xe_vdev->vfid); + if (ret) + goto err; + + return NULL; + } + + if ((cur =3D=3D VFIO_DEVICE_STATE_RUNNING_P2P && new =3D=3D VFIO_DEVICE_S= TATE_STOP) || + (cur =3D=3D VFIO_DEVICE_STATE_STOP && new =3D=3D VFIO_DEVICE_STATE_RU= NNING_P2P)) + return NULL; + + if ((cur =3D=3D VFIO_DEVICE_STATE_STOP && new =3D=3D VFIO_DEVICE_STATE_RU= NNING) || + (cur =3D=3D VFIO_DEVICE_STATE_RUNNING_P2P && new =3D=3D VFIO_DEVICE_S= TATE_RUNNING)) { + ret =3D xe_sriov_vfio_run(xe_vdev->pf, xe_vdev->vfid); + if (ret) + goto err; + + return NULL; + } + + if (cur =3D=3D VFIO_DEVICE_STATE_STOP && new =3D=3D VFIO_DEVICE_STATE_STO= P_COPY) { + struct xe_vfio_pci_migration_file *migf; + + migf =3D xe_vfio_pci_alloc_file(xe_vdev, XE_VFIO_FILE_SAVE); + if (IS_ERR(migf)) { + ret =3D PTR_ERR(migf); + goto err; + } + + ret =3D xe_sriov_vfio_stop_copy_enter(xe_vdev->pf, xe_vdev->vfid); + if (ret) { + fput(migf->filp); + goto err; + } + + return migf->filp; + } + + if ((cur =3D=3D VFIO_DEVICE_STATE_STOP_COPY && new =3D=3D VFIO_DEVICE_STA= TE_STOP)) { + if (xe_vdev->fd) + xe_vfio_pci_disable_file(xe_vdev->fd); + + xe_sriov_vfio_stop_copy_exit(xe_vdev->pf, xe_vdev->vfid); + + return NULL; + } + + if (cur =3D=3D VFIO_DEVICE_STATE_STOP && new =3D=3D VFIO_DEVICE_STATE_RES= UMING) { + struct xe_vfio_pci_migration_file *migf; + + migf =3D xe_vfio_pci_alloc_file(xe_vdev, XE_VFIO_FILE_RESUME); + if (IS_ERR(migf)) { + ret =3D PTR_ERR(migf); + goto err; + } + + ret =3D xe_sriov_vfio_resume_enter(xe_vdev->pf, xe_vdev->vfid); + if (ret) { + fput(migf->filp); + goto err; + } + + return migf->filp; + } + + if (cur =3D=3D VFIO_DEVICE_STATE_RESUMING && new =3D=3D VFIO_DEVICE_STATE= _STOP) { + if (xe_vdev->fd) + xe_vfio_pci_disable_file(xe_vdev->fd); + + xe_sriov_vfio_resume_exit(xe_vdev->pf, xe_vdev->vfid); + + return NULL; + } + + if (new =3D=3D VFIO_DEVICE_STATE_ERROR) + xe_sriov_vfio_error(xe_vdev->pf, xe_vdev->vfid); + + WARN(true, "Unknown state transition %d->%d", cur, new); + return ERR_PTR(-EINVAL); + +err: + dev_dbg(xe_vdev_to_dev(xe_vdev), + "Failed to transition state: %s->%s err=3D%d\n", + vfio_dev_state_str(cur), vfio_dev_state_str(new), ret); + return ERR_PTR(ret); +} + +static struct file * +xe_vfio_pci_set_device_state(struct vfio_device *core_vdev, + enum vfio_device_mig_state new_state) +{ + struct xe_vfio_pci_core_device *xe_vdev =3D + container_of(core_vdev, struct xe_vfio_pci_core_device, core_device.vdev= ); + enum vfio_device_mig_state next_state; + struct file *f =3D NULL; + int ret; + + while (new_state !=3D xe_vdev->mig_state) { + ret =3D vfio_mig_get_next_state(core_vdev, xe_vdev->mig_state, + new_state, &next_state); + if (ret) { + f =3D ERR_PTR(ret); + break; + } + f =3D xe_vfio_set_state(xe_vdev, next_state); + if (IS_ERR(f)) + break; + + xe_vdev->mig_state =3D next_state; + + /* Multiple state transitions with non-NULL file in the middle */ + if (f && new_state !=3D xe_vdev->mig_state) { + fput(f); + f =3D ERR_PTR(-EINVAL); + break; + } + } + + return f; +} + +static int xe_vfio_pci_get_device_state(struct vfio_device *core_vdev, + enum vfio_device_mig_state *curr_state) +{ + struct xe_vfio_pci_core_device *xe_vdev =3D + container_of(core_vdev, struct xe_vfio_pci_core_device, core_device.vdev= ); + + *curr_state =3D xe_vdev->mig_state; + + return 0; +} + +static int xe_vfio_pci_get_data_size(struct vfio_device *vdev, + unsigned long *stop_copy_length) +{ + struct xe_vfio_pci_core_device *xe_vdev =3D + container_of(vdev, struct xe_vfio_pci_core_device, core_device.vdev); + + *stop_copy_length =3D xe_sriov_vfio_stop_copy_size(xe_vdev->pf, xe_vdev->= vfid); + + return 0; +} + +static const struct vfio_migration_ops xe_vfio_pci_migration_ops =3D { + .migration_set_state =3D xe_vfio_pci_set_device_state, + .migration_get_state =3D xe_vfio_pci_get_device_state, + .migration_get_data_size =3D xe_vfio_pci_get_data_size, +}; + +static void xe_vfio_pci_migration_init(struct vfio_device *core_vdev) +{ + struct xe_vfio_pci_core_device *xe_vdev =3D + container_of(core_vdev, struct xe_vfio_pci_core_device, core_device.vdev= ); + struct pci_dev *pdev =3D to_pci_dev(core_vdev->dev); + + if (!xe_sriov_vfio_migration_supported(pdev->physfn)) + return; + + /* vfid starts from 1 for xe */ + xe_vdev->vfid =3D pci_iov_vf_id(pdev) + 1; + xe_vdev->pf =3D pdev->physfn; + + core_vdev->migration_flags =3D VFIO_MIGRATION_STOP_COPY | VFIO_MIGRATION_= P2P; + core_vdev->mig_ops =3D &xe_vfio_pci_migration_ops; +} + +static int xe_vfio_pci_init_dev(struct vfio_device *core_vdev) +{ + struct pci_dev *pdev =3D to_pci_dev(core_vdev->dev); + + if (pdev->is_virtfn && strcmp(pdev->physfn->dev.driver->name, "xe") =3D= =3D 0) + xe_vfio_pci_migration_init(core_vdev); + + return vfio_pci_core_init_dev(core_vdev); +} + +static const struct vfio_device_ops xe_vfio_pci_ops =3D { + .name =3D "xe-vfio-pci", + .init =3D xe_vfio_pci_init_dev, + .release =3D vfio_pci_core_release_dev, + .open_device =3D xe_vfio_pci_open_device, + .close_device =3D vfio_pci_core_close_device, + .ioctl =3D vfio_pci_core_ioctl, + .device_feature =3D vfio_pci_core_ioctl_feature, + .read =3D vfio_pci_core_read, + .write =3D vfio_pci_core_write, + .mmap =3D vfio_pci_core_mmap, + .request =3D vfio_pci_core_request, + .match =3D vfio_pci_core_match, + .match_token_uuid =3D vfio_pci_core_match_token_uuid, + .bind_iommufd =3D vfio_iommufd_physical_bind, + .unbind_iommufd =3D vfio_iommufd_physical_unbind, + .attach_ioas =3D vfio_iommufd_physical_attach_ioas, + .detach_ioas =3D vfio_iommufd_physical_detach_ioas, +}; + +static int xe_vfio_pci_probe(struct pci_dev *pdev, const struct pci_device= _id *id) +{ + struct xe_vfio_pci_core_device *xe_vdev; + int ret; + + xe_vdev =3D vfio_alloc_device(xe_vfio_pci_core_device, core_device.vdev, = &pdev->dev, + &xe_vfio_pci_ops); + if (IS_ERR(xe_vdev)) + return PTR_ERR(xe_vdev); + + dev_set_drvdata(&pdev->dev, &xe_vdev->core_device); + + ret =3D vfio_pci_core_register_device(&xe_vdev->core_device); + if (ret) { + vfio_put_device(&xe_vdev->core_device.vdev); + return ret; + } + + return 0; +} + +static void xe_vfio_pci_remove(struct pci_dev *pdev) +{ + struct xe_vfio_pci_core_device *xe_vdev =3D pci_get_drvdata(pdev); + + vfio_pci_core_unregister_device(&xe_vdev->core_device); + vfio_put_device(&xe_vdev->core_device.vdev); +} + +static const struct pci_device_id xe_vfio_pci_table[] =3D { + { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID), + .class =3D PCI_BASE_CLASS_DISPLAY << 16, .class_mask =3D 0xff << 16, + .override_only =3D PCI_ID_F_VFIO_DRIVER_OVERRIDE }, + {} +}; +MODULE_DEVICE_TABLE(pci, xe_vfio_pci_table); + +static struct pci_driver xe_vfio_pci_driver =3D { + .name =3D "xe-vfio-pci", + .id_table =3D xe_vfio_pci_table, + .probe =3D xe_vfio_pci_probe, + .remove =3D xe_vfio_pci_remove, + .err_handler =3D &xe_vfio_pci_err_handlers, + .driver_managed_dma =3D true, +}; +module_pci_driver(xe_vfio_pci_driver); + +MODULE_LICENSE("GPL"); +MODULE_AUTHOR("Intel Corporation"); +MODULE_DESCRIPTION("VFIO PCI driver with migration support for Intel Graph= ics"); --=20 2.50.1