From nobody Sat Oct 25 06:10:07 2025 Received: from relmlie5.idc.renesas.com (relmlor1.renesas.com [210.160.252.171]) by smtp.subspace.kernel.org (Postfix) with ESMTP id E1EA432ABC3; Tue, 21 Oct 2025 17:53:26 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=210.160.252.171 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761069209; cv=none; b=n+FiDdHarMJIZVual8pUImFQbujoBgrTAEWkHCfODcXXqQTICg98DBFLzacjr7kr4KnMRt11T33cxPERbTARsMlCsufF89NnFxcCQd3L0Plc7H5ua6LV0cEuY6hL3zi4L4NJWy/t5kF21HuyufVVaqROn2LqEfeZMQQVOKbOlmE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761069209; c=relaxed/simple; bh=XNA3PKWXAOYrucIpQ8jnBG2ndM1C/fGhGH7iNSCD3I0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MuDltiAJRK2cul+iSdQHrN87b/P9rOOu3ggjDlWXg12+DPIwrW7tjZU2l7fOsZtMMCFyOeOgiRk1iHuF5hk9Liv0SaWp93VW9QRK6driEFzdyLeuZ2WN73M+I7VVMSj/vnMATVCZ1jBJPE1F316LsfPjiqNmMMvqgRg1g4cYOUk= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com; spf=pass smtp.mailfrom=renesas.com; arc=none smtp.client-ip=210.160.252.171 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=renesas.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=renesas.com X-CSE-ConnectionGUID: RlbIIbAbSZ2PnmaEHOR+9Q== X-CSE-MsgGUID: rEp2UhnGS8aCozCobihrHA== Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 22 Oct 2025 02:53:21 +0900 Received: from vm01.adwin.renesas.com (unknown [10.226.92.145]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 896914031C11; Wed, 22 Oct 2025 02:53:17 +0900 (JST) From: Ovidiu Panait To: biju.das.jz@bp.renesas.com, geert+renesas@glider.be, magnus.damm@gmail.com, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, mturquette@baylibre.com, sboyd@kernel.org Cc: linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH 1/4] clk: versaclock3: Remove unused SE2 clock select macro Date: Tue, 21 Oct 2025 17:53:08 +0000 Message-ID: <20251021175311.19611-2-ovidiu.panait.rb@renesas.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251021175311.19611-1-ovidiu.panait.rb@renesas.com> References: <20251021175311.19611-1-ovidiu.panait.rb@renesas.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The VC3_SE2_CTRL_REG0_SE2_CLK_SEL macro is no longer used since commit ae6040cd7c7f8 ("clk: versaclock3: Prepare for the addition of 5L35023 device"), which switched SE2 clock select handling to use variant-specific OF data (se2_clk_sel_msk). Signed-off-by: Ovidiu Panait --- drivers/clk/clk-versaclock3.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/clk/clk-versaclock3.c b/drivers/clk/clk-versaclock3.c index 1849863dbd67..f387cdb12f48 100644 --- a/drivers/clk/clk-versaclock3.c +++ b/drivers/clk/clk-versaclock3.c @@ -61,7 +61,6 @@ #define VC3_OUTPUT_CTR_DIV4_SRC_SEL BIT(3) =20 #define VC3_SE2_CTRL_REG0 0x1f -#define VC3_SE2_CTRL_REG0_SE2_CLK_SEL BIT(6) =20 #define VC3_SE3_DIFF1_CTRL_REG 0x21 #define VC3_SE3_DIFF1_CTRL_REG_SE3_CLK_SEL BIT(6) --=20 2.51.0