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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Oct 2025 01:44:57.3366 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: c167d304-260c-42f9-c737-08de104370c1 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[satlexmb07.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BN3PEPF0000B074.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: SA3PR12MB9225 Content-Type: text/plain; charset="utf-8" The nested domain is allocated with IOMMU_DOMAIN_NESTED type to store stage-1 translation (i.e. GVA->GPA). This includes the GCR3 root pointer table along with guest page tables. The struct iommu_hwpt_amd_guest contains this information, and is passed from user-space as a parameter of the struct iommu_ops.domain_alloc_nested(). Reviewed-by: Nicolin Chen Reviewed-by: Jason Gunthorpe Signed-off-by: Suravee Suthikulpanit --- drivers/iommu/amd/Makefile | 2 +- drivers/iommu/amd/amd_iommu.h | 4 + drivers/iommu/amd/amd_iommu_types.h | 14 ++++ drivers/iommu/amd/nested.c | 111 ++++++++++++++++++++++++++++ 4 files changed, 130 insertions(+), 1 deletion(-) create mode 100644 drivers/iommu/amd/nested.c diff --git a/drivers/iommu/amd/Makefile b/drivers/iommu/amd/Makefile index 5ae46d99a45b..afa12ca2110e 100644 --- a/drivers/iommu/amd/Makefile +++ b/drivers/iommu/amd/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only obj-y +=3D iommu.o init.o quirks.o io_pgtable.o io_pgtable_v2.o ppr.o pasi= d.o -obj-$(CONFIG_AMD_IOMMU_IOMMUFD) +=3D iommufd.o +obj-$(CONFIG_AMD_IOMMU_IOMMUFD) +=3D iommufd.o nested.o obj-$(CONFIG_AMD_IOMMU_DEBUGFS) +=3D debugfs.o diff --git a/drivers/iommu/amd/amd_iommu.h b/drivers/iommu/amd/amd_iommu.h index d533bb8851ea..3730d8bbe6dc 100644 --- a/drivers/iommu/amd/amd_iommu.h +++ b/drivers/iommu/amd/amd_iommu.h @@ -202,4 +202,8 @@ amd_iommu_make_clear_dte(struct iommu_dev_data *dev_dat= a, struct dev_table_entry new->data128[1] =3D 0; } =20 +/* NESTED */ +struct iommu_domain * +amd_iommu_alloc_domain_nested(struct iommufd_viommu *viommu, u32 flags, + const struct iommu_user_data *user_data); #endif /* AMD_IOMMU_H */ diff --git a/drivers/iommu/amd/amd_iommu_types.h b/drivers/iommu/amd/amd_io= mmu_types.h index a0c7e7329233..e0f0cd3d34f2 100644 --- a/drivers/iommu/amd/amd_iommu_types.h +++ b/drivers/iommu/amd/amd_iommu_types.h @@ -21,6 +21,8 @@ #include #include =20 +#include + /* * Maximum number of IOMMUs supported */ @@ -417,6 +419,8 @@ #define DTE_FLAG_V BIT_ULL(0) #define DTE_FLAG_TV BIT_ULL(1) #define DTE_FLAG_HAD (3ULL << 7) +#define DTE_MODE_MASK GENMASK_ULL(11, 9) +#define DTE_HOST_TRP GENMASK_ULL(51, 12) #define DTE_FLAG_GIOV BIT_ULL(54) #define DTE_FLAG_GV BIT_ULL(55) #define DTE_GLX GENMASK_ULL(57, 56) @@ -592,6 +596,16 @@ struct amd_iommu_viommu { struct protection_domain *parent; /* nest parent domain for this viommu */ }; =20 +/* + * Nested domain is specifically used for nested translation + */ +struct nested_domain { + struct iommu_domain domain; /* generic domain handle used by iommu core c= ode */ + u16 gdom_id; /* domain ID from gDTE */ + struct iommu_hwpt_amd_guest gdte; /* Guest vIOMMU DTE */ + struct amd_iommu_viommu *viommu; /* AMD hw-viommu this nested domain bel= ong to */ +}; + /* * This structure contains generic data for IOMMU protection domains * independent of their use. diff --git a/drivers/iommu/amd/nested.c b/drivers/iommu/amd/nested.c new file mode 100644 index 000000000000..e7b6f69a9d0c --- /dev/null +++ b/drivers/iommu/amd/nested.c @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2025 Advanced Micro Devices, Inc. + */ + +#define dev_fmt(fmt) "AMD-Vi: " fmt + +#include +#include + +#include "amd_iommu.h" + +static const struct iommu_domain_ops nested_domain_ops; + +static inline struct nested_domain *to_ndomain(struct iommu_domain *dom) +{ + return container_of(dom, struct nested_domain, domain); +} + +/* + * Validate guest DTE to make sure that configuration for host (v1) + * and guest (v2) page tables are valid when allocating nested domain. + */ +static int validate_gdte_nested(struct iommu_hwpt_amd_guest *gdte) +{ + u32 gpt_level =3D FIELD_GET(DTE_GPT_LEVEL_MASK, gdte->dte[2]); + + /* Must be zero: Mode, Host-TPR */ + if (FIELD_GET(DTE_MODE_MASK, gdte->dte[0]) !=3D 0 || + FIELD_GET(DTE_HOST_TRP, gdte->dte[0]) !=3D 0) + return -EINVAL; + + /* Must be non-zero: V, GIOV, GV, GCR3 TRP */ + if (FIELD_GET(DTE_FLAG_V, gdte->dte[0]) =3D=3D 0 || + FIELD_GET(DTE_FLAG_GIOV, gdte->dte[0]) =3D=3D 0 || + FIELD_GET(DTE_FLAG_GV, gdte->dte[0]) =3D=3D 0 || + (FIELD_GET(DTE_GCR3_14_12, gdte->dte[0]) =3D=3D 0 && + FIELD_GET(DTE_GCR3_30_15, gdte->dte[1]) =3D=3D 0 && + FIELD_GET(DTE_GCR3_51_31, gdte->dte[1]) =3D=3D 0)) + return -EINVAL; + + /* Valid Guest Paging Mode values are 0 and 1 */ + if (gpt_level !=3D 0 && gpt_level !=3D 1) + return -EINVAL; + + /* GLX =3D 3 is reserved */ + if (FIELD_GET(DTE_GLX, gdte->dte[0]) =3D=3D 3) + return -EINVAL; + + /* + * We need to check host capability before setting + * the Guest Paging Mode + */ + if (gpt_level =3D=3D GUEST_PGTABLE_5_LEVEL && + amd_iommu_gpt_level < PAGE_MODE_5_LEVEL) + return -EOPNOTSUPP; + + return 0; +} + +/* + * This function is assigned to struct iommufd_viommu_ops.alloc_domain_nes= ted() + * during the call to struct iommu_ops.viommu_init(). + */ +struct iommu_domain * +amd_iommu_alloc_domain_nested(struct iommufd_viommu *viommu, u32 flags, + const struct iommu_user_data *user_data) +{ + int ret; + struct nested_domain *ndom; + struct amd_iommu_viommu *aviommu =3D container_of(viommu, struct amd_iomm= u_viommu, core); + + if (user_data->type !=3D IOMMU_HWPT_DATA_AMD_GUEST) + return ERR_PTR(-EOPNOTSUPP); + + ndom =3D kzalloc(sizeof(*ndom), GFP_KERNEL); + if (!ndom) + return ERR_PTR(-ENOMEM); + + ret =3D iommu_copy_struct_from_user(&ndom->gdte, user_data, + IOMMU_HWPT_DATA_AMD_GUEST, + dte); + if (ret) + goto out_err; + + ret =3D validate_gdte_nested(&ndom->gdte); + if (ret) + goto out_err; + + ndom->gdom_id =3D FIELD_GET(DTE_DOMID_MASK, ndom->gdte.dte[1]); + ndom->domain.ops =3D &nested_domain_ops; + ndom->domain.type =3D IOMMU_DOMAIN_NESTED; + ndom->viommu =3D aviommu; + + return &ndom->domain; +out_err: + kfree(ndom); + return ERR_PTR(ret); +} + +static void nested_domain_free(struct iommu_domain *dom) +{ + struct nested_domain *ndom =3D to_ndomain(dom); + + kfree(ndom); +} + +static const struct iommu_domain_ops nested_domain_ops =3D { + .free =3D nested_domain_free, +}; + --=20 2.34.1