From nobody Sun Feb 8 20:52:11 2026 Received: from TWMBX01.aspeed.com (mail.aspeedtech.com [211.20.114.72]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B5EC321CC47; Tue, 21 Oct 2025 01:35:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=211.20.114.72 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761010560; cv=none; b=M5dHX8EzFTTpzcLhL1d4bDGmEmEWH/srdasMhO5PvM05qDpUe0nc3xYd83ay245MbT66XPaZZxf5qB3tz8qfTwqjJSp3uObVOjjClJxts1ER1EcErmJsfMevN/VaXSY5Gw+gSKhl/sEzW+8LNyMW1pyzolefYFdscmpR57Dq1+I= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1761010560; c=relaxed/simple; bh=H8X+AgNi19HcEJY0bUrJfQFS0jiMoo6CRRhi7igVsWI=; h=From:To:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=d+XakheRjXntqmQTsWMgnh9OCSn6zcX1zcT+QPE6YVH73witVdPNEc7BpasY1H3lE+QIry8gEHTSjQDjVCjOC3zNDJoNyJNn8pN2kWZLEH2mhFn9wdx4mqQ12N+Jonh/l+4IVyJnLngDGyB5L7JJApsAkACuOW4qBLR0EGzxf5o= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com; spf=pass smtp.mailfrom=aspeedtech.com; arc=none smtp.client-ip=211.20.114.72 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=aspeedtech.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=aspeedtech.com Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Tue, 21 Oct 2025 09:35:48 +0800 Received: from twmbx02.aspeed.com (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Tue, 21 Oct 2025 09:35:48 +0800 From: Ryan Chen To: , , , , , , , , , , , , , , , , , Subject: [PATCH v20 1/4] dt-bindings: i2c: Split AST2600 binding into a new YAML Date: Tue, 21 Oct 2025 09:35:45 +0800 Message-ID: <20251021013548.2375190-2-ryan_chen@aspeedtech.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251021013548.2375190-1-ryan_chen@aspeedtech.com> References: <20251021013548.2375190-1-ryan_chen@aspeedtech.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" The AST2600 I2C controller is a new hardware design compared to the I2C controllers in previous ASPEED SoCs (e.g., AST2400, AST2500). It introduces new features such as: - A redesigned register layout - Separation between controller and target mode registers - Transfer mode selection (byte, buffer, DMA) - Support for a shared global register block for configuration Due to these fundamental differences, maintaining a separate devicetree binding file for AST2600 helps to clearly distinguish the hardware capabilities and configuration options from the older controllers. Signed-off-by: Ryan Chen --- .../devicetree/bindings/i2c/aspeed,i2c.yaml | 3 +- .../devicetree/bindings/i2c/ast2600-i2c.yaml | 66 +++++++++++++++++++ 2 files changed, 67 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/i2c/ast2600-i2c.yaml diff --git a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml b/Docume= ntation/devicetree/bindings/i2c/aspeed,i2c.yaml index 5b9bd2feda3b..d4e4f412feba 100644 --- a/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/i2c/aspeed,i2c.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# =20 -title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs +title: ASPEED I2C on the AST24XX, AST25XX SoCs =20 maintainers: - Rayn Chen @@ -17,7 +17,6 @@ properties: enum: - aspeed,ast2400-i2c-bus - aspeed,ast2500-i2c-bus - - aspeed,ast2600-i2c-bus =20 reg: minItems: 1 diff --git a/Documentation/devicetree/bindings/i2c/ast2600-i2c.yaml b/Docum= entation/devicetree/bindings/i2c/ast2600-i2c.yaml new file mode 100644 index 000000000000..6ddcec5decdc --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/ast2600-i2c.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/ast2600-i2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ASPEED I2C on the AST26XX SoCs + +maintainers: + - Ryan Chen + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + enum: + - aspeed,ast2600-i2c-bus + + reg: + minItems: 1 + items: + - description: address offset and range of bus + - description: address offset and range of bus buffer + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + description: + root clock of bus, should reference the APB + clock in the second cell + + resets: + maxItems: 1 + + bus-frequency: + minimum: 500 + maximum: 4000000 + default: 100000 + description: frequency of the bus clock in Hz defaults to 100 kHz when= not + specified + +required: + - reg + - compatible + - clocks + - resets + +unevaluatedProperties: false + +examples: + - | + #include + i2c@40 { + #address-cells =3D <1>; + #size-cells =3D <0>; + compatible =3D "aspeed,ast2600-i2c-bus"; + reg =3D <0x40 0x40>; + clocks =3D <&syscon ASPEED_CLK_APB>; + resets =3D <&syscon ASPEED_RESET_I2C>; + bus-frequency =3D <100000>; + interrupts =3D <0>; + interrupt-parent =3D <&i2c_ic>; + }; --=20 2.34.1