From nobody Sat Feb 7 23:23:09 2026 Received: from mx0b-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F26312C11C5; Mon, 20 Oct 2025 19:02:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.163.158.5 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760986934; cv=none; b=QJVDuAJ1zoj5Jm6KEgVeCkdxoSp0eLPPrZGTt+psxQkt2Jt/jHak5mCB7ogdNi9vmruSKic0/Z3spvRyuZbKSCKWgCyc++H2VDhnKCeTXEwuDm32iSh5QOrxNM8ZO8D60dAaKfFxLDUMaokoNHktzVOGQXlYKji1JotoN/ehFwU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760986934; c=relaxed/simple; bh=cnc5hRkXUmMzOETcq1VMwyak2D+gw4yevf64NgjFnn0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=PRNC5a+NeFhXdcX7mboUL9ZgORKt/XEy31eG1givK3lgTW7R291TUQho2drtod+K8hvuYPbCG+eKbUIPFO4SMsvx2o+85U6fjYcpjvAc8TzWAqkDoiKOtTe21GhXJu2MQgq6grRuBY5H6pbiI7bI/1C4qiymrYsyP7XBKLX3z2s= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.ibm.com; spf=pass smtp.mailfrom=linux.ibm.com; dkim=pass (2048-bit key) header.d=ibm.com header.i=@ibm.com header.b=NqnUGszh; arc=none smtp.client-ip=148.163.158.5 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.ibm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.ibm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ibm.com header.i=@ibm.com header.b="NqnUGszh" Received: from pps.filterd (m0360072.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 59KDOeYY004702; Mon, 20 Oct 2025 19:02:08 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=FYUBZ9TiUvXt0GRbI snbFOUxr8hsRX5GriV4e+8yR8k=; b=NqnUGszhNXoCYov30yeRrIhXQwmPNASS0 oK/zaOdRNMv3L5wMTl/dEfy9fPdRrzt+KaHnhvIb0/iJ53VHLx5Rae0d5uyXoqju 36FpS84wP6G/TO52QbShe5x3ECabAql4REb9pwKTB3NZSCXBTCGzydaUkjZfESsW RkqLHMXCb0QTG7zhHssZDUzdEEOaOkOn50CmTxOYndRfl69PgrI6OzP2ttqBt0a+ R/0rPr+zaSfmA/4ghN4E160VtMXR+Ih7fMlGvNI5TITHfAVeCl+yOPSaGpchvYKp i6Ssrky5Syrq3EH5UnHxbS1sfe8P6Gu17TvdfCnD7LFOqHaY8Dy1Q== Received: from ppma11.dal12v.mail.ibm.com (db.9e.1632.ip4.static.sl-reverse.com [50.22.158.219]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 49v31c239q-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 20 Oct 2025 19:02:08 +0000 (GMT) Received: from pps.filterd (ppma11.dal12v.mail.ibm.com [127.0.0.1]) by ppma11.dal12v.mail.ibm.com (8.18.1.2/8.18.1.2) with ESMTP id 59KFZ9i8011053; Mon, 20 Oct 2025 19:02:07 GMT Received: from smtprelay01.wdc07v.mail.ibm.com ([172.16.1.68]) by ppma11.dal12v.mail.ibm.com (PPS) with ESMTPS id 49vqx0xwk0-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 20 Oct 2025 19:02:07 +0000 Received: from smtpav03.dal12v.mail.ibm.com (smtpav03.dal12v.mail.ibm.com [10.241.53.102]) by smtprelay01.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 59KJ25Dv48365944 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 20 Oct 2025 19:02:05 GMT Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 6456F5805A; Mon, 20 Oct 2025 19:02:05 +0000 (GMT) Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A3BDF58060; Mon, 20 Oct 2025 19:02:04 +0000 (GMT) Received: from IBM-D32RQW3.ibm.com (unknown [9.61.240.93]) by smtpav03.dal12v.mail.ibm.com (Postfix) with ESMTP; Mon, 20 Oct 2025 19:02:04 +0000 (GMT) From: Farhan Ali To: linux-s390@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Cc: helgaas@kernel.org, stable@vger.kernel.org, alifm@linux.ibm.com, schnelle@linux.ibm.com, mjrosato@linux.ibm.com, Benjamin Block Subject: [PATCH v1 1/3] PCI: Allow per function PCI slots Date: Mon, 20 Oct 2025 12:01:58 -0700 Message-ID: <20251020190200.1365-2-alifm@linux.ibm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251020190200.1365-1-alifm@linux.ibm.com> References: <20251020190200.1365-1-alifm@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: ixeYz5UtFFuc_ou0jAQQH7_FsCDay-eP X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDE4MDAyMiBTYWx0ZWRfXyOlRsn5S5Kgj Qpa4DNX1ufcEw/BlnkvWOs094bgAdIWLNol8Y2BtmWsjupi8j62EzB+sloKw2X5U9e87273lVhV lydDn44v3akAoCRKXFpvMYvK3l1KPkBN1E2iFlhtmg1fmy1iwgesrJ8ZJzcE1jH0Toxj8MOZJBe TnuAiXv/O7JlaF2lk2mXZ07YTIRsAWfdAj31lDRD+z6yvZaTEpKay+kXcWSkWuuV4pAB7erca/C bSxE1G3+DbRSDgbtS8WcB83gY1GmMOWtPk/Lve0D7LPKuWhvM5h5Y9V2GPzg3MrXhhe4fCOcYmV kn2jsoe0DgTvIgnlHPjXuuDkHAJ9BhyF6PB1n4gpZi8WxFjv6HzqsGl5NNFJtgan0qEnP7whQG9 699ma9VVDEFctoztkksW19RLOdummg== X-Proofpoint-GUID: ixeYz5UtFFuc_ou0jAQQH7_FsCDay-eP X-Authority-Analysis: v=2.4 cv=SKNPlevH c=1 sm=1 tr=0 ts=68f68730 cx=c_pps a=aDMHemPKRhS1OARIsFnwRA==:117 a=aDMHemPKRhS1OARIsFnwRA==:17 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VwQbUJbxAAAA:8 a=VnNF1IyMAAAA:8 a=K-1LnuYzVcpd1HOvht4A:9 a=cPQSjfK2_nFv0Q5t_7PE:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-20_05,2025-10-13_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 malwarescore=0 suspectscore=0 clxscore=1015 priorityscore=1501 spamscore=0 impostorscore=0 bulkscore=0 lowpriorityscore=0 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510180022 Content-Type: text/plain; charset="utf-8" On s390 systems, which use a machine level hypervisor, PCI devices are always accessed through a form of PCI pass-through which fundamentally operates on a per PCI function granularity. This is also reflected in the s390 PCI hotplug driver which creates hotplug slots for individual PCI functions. Its reset_slot() function, which is a wrapper for zpci_hot_reset_device(), thus also resets individual functions. Currently, the kernel's PCI_SLOT() macro assigns the same pci_slot object to multifunction devices. This approach worked fine on s390 systems that only exposed virtual functions as individual PCI domains to the operating system. Since commit 44510d6fa0c0 ("s390/pci: Handling multifunctions") s390 supports exposing the topology of multifunction PCI devices by grouping them in a shared PCI domain. When attempting to reset a function through the hotplug driver, the shared slot assignment causes the wrong function to be reset instead of the intended one. It also leaks memory as we do create a pci_slot object for the function, but don't correctly free it in pci_slot_release(). Add a flag for struct pci_slot to allow per function PCI slots for functions managed through a hypervisor, which exposes individual PCI functions while retaining the topology. Fixes: 44510d6fa0c0 ("s390/pci: Handling multifunctions") Cc: stable@vger.kernel.org Suggested-by: Niklas Schnelle Reviewed-by: Benjamin Block Signed-off-by: Farhan Ali --- drivers/pci/hotplug/s390_pci_hpc.c | 10 ++++++++-- drivers/pci/pci.c | 5 +++-- drivers/pci/slot.c | 14 +++++++++++--- include/linux/pci.h | 1 + 4 files changed, 23 insertions(+), 7 deletions(-) diff --git a/drivers/pci/hotplug/s390_pci_hpc.c b/drivers/pci/hotplug/s390_= pci_hpc.c index d9996516f49e..8b547de464bf 100644 --- a/drivers/pci/hotplug/s390_pci_hpc.c +++ b/drivers/pci/hotplug/s390_pci_hpc.c @@ -126,14 +126,20 @@ static const struct hotplug_slot_ops s390_hotplug_slo= t_ops =3D { =20 int zpci_init_slot(struct zpci_dev *zdev) { + int ret; char name[SLOT_NAME_SIZE]; struct zpci_bus *zbus =3D zdev->zbus; =20 zdev->hotplug_slot.ops =3D &s390_hotplug_slot_ops; =20 snprintf(name, SLOT_NAME_SIZE, "%08x", zdev->fid); - return pci_hp_register(&zdev->hotplug_slot, zbus->bus, - zdev->devfn, name); + ret =3D pci_hp_register(&zdev->hotplug_slot, zbus->bus, + zdev->devfn, name); + if (ret) + return ret; + + zdev->hotplug_slot.pci_slot->per_func_slot =3D 1; + return 0; } =20 void zpci_exit_slot(struct zpci_dev *zdev) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index b14dd064006c..36ee38e0d817 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -4980,8 +4980,9 @@ static int pci_reset_hotplug_slot(struct hotplug_slot= *hotplug, bool probe) =20 static int pci_dev_reset_slot_function(struct pci_dev *dev, bool probe) { - if (dev->multifunction || dev->subordinate || !dev->slot || - dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET) + if (dev->subordinate || !dev->slot || + dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET || + (dev->multifunction && !dev->slot->per_func_slot)) return -ENOTTY; =20 return pci_reset_hotplug_slot(dev->slot->hotplug, probe); diff --git a/drivers/pci/slot.c b/drivers/pci/slot.c index 50fb3eb595fe..51ee59e14393 100644 --- a/drivers/pci/slot.c +++ b/drivers/pci/slot.c @@ -63,6 +63,14 @@ static ssize_t cur_speed_read_file(struct pci_slot *slot= , char *buf) return bus_speed_read(slot->bus->cur_bus_speed, buf); } =20 +static bool pci_dev_matches_slot(struct pci_dev *dev, struct pci_slot *slo= t) +{ + if (slot->per_func_slot) + return dev->devfn =3D=3D slot->number; + + return PCI_SLOT(dev->devfn) =3D=3D slot->number; +} + static void pci_slot_release(struct kobject *kobj) { struct pci_dev *dev; @@ -73,7 +81,7 @@ static void pci_slot_release(struct kobject *kobj) =20 down_read(&pci_bus_sem); list_for_each_entry(dev, &slot->bus->devices, bus_list) - if (PCI_SLOT(dev->devfn) =3D=3D slot->number) + if (pci_dev_matches_slot(dev, slot)) dev->slot =3D NULL; up_read(&pci_bus_sem); =20 @@ -166,7 +174,7 @@ void pci_dev_assign_slot(struct pci_dev *dev) =20 mutex_lock(&pci_slot_mutex); list_for_each_entry(slot, &dev->bus->slots, list) - if (PCI_SLOT(dev->devfn) =3D=3D slot->number) + if (pci_dev_matches_slot(dev, slot)) dev->slot =3D slot; mutex_unlock(&pci_slot_mutex); } @@ -285,7 +293,7 @@ struct pci_slot *pci_create_slot(struct pci_bus *parent= , int slot_nr, =20 down_read(&pci_bus_sem); list_for_each_entry(dev, &parent->devices, bus_list) - if (PCI_SLOT(dev->devfn) =3D=3D slot_nr) + if (pci_dev_matches_slot(dev, slot)) dev->slot =3D slot; up_read(&pci_bus_sem); =20 diff --git a/include/linux/pci.h b/include/linux/pci.h index d1fdf81fbe1e..6ad194597ab5 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -78,6 +78,7 @@ struct pci_slot { struct list_head list; /* Node in list of slots */ struct hotplug_slot *hotplug; /* Hotplug info (move here) */ unsigned char number; /* PCI_SLOT(pci_dev->devfn) */ + unsigned int per_func_slot:1; /* Allow per function slot */ struct kobject kobj; }; =20 --=20 2.43.0 From nobody Sat Feb 7 23:23:09 2026 Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 94750261B9E; Mon, 20 Oct 2025 19:02:11 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.163.156.1 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760986933; cv=none; b=PC7oXVvSmHltsyHDtB8grVeKjmzgIfjhlgtg4tlyNBU5KlFfV622Xatvc//5tjvxP98i4KAe0KGxdbnla5OUYua7x1s7CcsKu0oBpLJLVYQ76yCOAr/hW2SsskA+VxVdN3lfarVMFr+p/8lliS+vbjHPTtaJFbZQgdn+XnUIXJA= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760986933; c=relaxed/simple; bh=BTaf2JeikokcnZN/DcMJvPwDGGebUQjBL9CjUvtWROY=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=b+VOdOqwv7Yv8w6RzsynQqvv4uieOm9VP0YzMspxhZ0CbLcViXsymHRYYSCtblbECijm0AVOubR8JlBHbjuWe7Y/q+PpGVxYaHoNraQpu2e8C86EqXutIYs4gI0m8Rod66Y1o9jDS+8heaOp32UcCehzX3i0slKY5qzgEHLe2fE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.ibm.com; spf=pass smtp.mailfrom=linux.ibm.com; dkim=pass (2048-bit key) header.d=ibm.com header.i=@ibm.com header.b=oFU0rGqJ; arc=none smtp.client-ip=148.163.156.1 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.ibm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.ibm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ibm.com header.i=@ibm.com header.b="oFU0rGqJ" Received: from pps.filterd (m0353729.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 59KGYVTs027635; Mon, 20 Oct 2025 19:02:09 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=EnCSOFCChDHKwtLNy shGpOKoUJ0zJMwgZ3OIo6E5RHk=; b=oFU0rGqJ9aHpYCPFLvxuNCwvSG5xRvmUM NprsChdCwajWMZNjMXOytw1kGQDzL5EWLFAZAG9TAx2AyEqwORWweIkErXryk/wh /x23GswmGK1ONB5ji0BU1a5BBfe8gAJ3ULVbqImE++csghNNdL8qCyrELYA83Gej SOBKqECtrVQojBsTv47UsssxyN/CGyXfiyibzHpAV66ClWernl68nq1jqBalf/qN kpRVe1J4qSzR1X2Y9Y1Jjed1dmP09Ui4IROSxnYzFPSyfvt0M/11sJPR8EPOhWXP XE/ZifPGGSEDmmT69Zmgk4xGvNw/dz2ZjhSo7WSRhspqqh7LSYGmQ== Received: from ppma23.wdc07v.mail.ibm.com (5d.69.3da9.ip4.static.sl-reverse.com [169.61.105.93]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 49v33f36gv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 20 Oct 2025 19:02:08 +0000 (GMT) Received: from pps.filterd (ppma23.wdc07v.mail.ibm.com [127.0.0.1]) by ppma23.wdc07v.mail.ibm.com (8.18.1.2/8.18.1.2) with ESMTP id 59KIbsn7024677; Mon, 20 Oct 2025 19:02:07 GMT Received: from smtprelay06.wdc07v.mail.ibm.com ([172.16.1.73]) by ppma23.wdc07v.mail.ibm.com (PPS) with ESMTPS id 49vpqjq4jg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 20 Oct 2025 19:02:07 +0000 Received: from smtpav03.dal12v.mail.ibm.com (smtpav03.dal12v.mail.ibm.com [10.241.53.102]) by smtprelay06.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 59KJ263x7209564 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 20 Oct 2025 19:02:06 GMT Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 29A5858060; Mon, 20 Oct 2025 19:02:06 +0000 (GMT) Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 80EA858068; Mon, 20 Oct 2025 19:02:05 +0000 (GMT) Received: from IBM-D32RQW3.ibm.com (unknown [9.61.240.93]) by smtpav03.dal12v.mail.ibm.com (Postfix) with ESMTP; Mon, 20 Oct 2025 19:02:05 +0000 (GMT) From: Farhan Ali To: linux-s390@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Cc: helgaas@kernel.org, stable@vger.kernel.org, alifm@linux.ibm.com, schnelle@linux.ibm.com, mjrosato@linux.ibm.com Subject: [PATCH v1 2/3] s390/pci: Add architecture specific resource/bus address translation Date: Mon, 20 Oct 2025 12:01:59 -0700 Message-ID: <20251020190200.1365-3-alifm@linux.ibm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251020190200.1365-1-alifm@linux.ibm.com> References: <20251020190200.1365-1-alifm@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Authority-Analysis: v=2.4 cv=FMYWBuos c=1 sm=1 tr=0 ts=68f68730 cx=c_pps a=3Bg1Hr4SwmMryq2xdFQyZA==:117 a=3Bg1Hr4SwmMryq2xdFQyZA==:17 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VnNF1IyMAAAA:8 a=yYx7OUe3D3zVL1aRsq0A:9 a=cPQSjfK2_nFv0Q5t_7PE:22 X-Proofpoint-GUID: 3d5M2-QNCCegtw7o-pFeuM4h8SOyvYl9 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDE4MDAyMiBTYWx0ZWRfX/qVGm0fpqf7j A/bi3XRz6dcWrCyZu2DGvUbH4ok5wKQRF27rKgL6nO+WtAxAwwd1IijZ5dWiHkbzzfAcsSBsrw2 Chj0g4FA2J0r+/cEKBQSgxaUAttRjhMPqLHi3LBEwbVZKwS610+o5dUY/7McQKbLeBFPle3IPxw YO4dNfWGICIkc/mzYdmutLSDpZB0+WPLK2j3DPWAUMUGoUWjRcxUZ3N2rzzAkNFEFuj+rbiJq/G 46F4aVpKVO9a8n4AeDVikItvhvDvp84DhE2YNP+WtEt2Q2XrlC09eVjof/KdTc6UYjwesXT1D+Q kzaFkL3yGAOO2OJ7cK3xJTj2ABunEZZKHrpLJ/ro8bKy8aCDzMXjdvQvEvEINcNfz5O+lYgROUI LsZcuTra6D9ny72iPTPHRRPxHtxvVw== X-Proofpoint-ORIG-GUID: 3d5M2-QNCCegtw7o-pFeuM4h8SOyvYl9 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-20_05,2025-10-13_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 impostorscore=0 priorityscore=1501 adultscore=0 bulkscore=0 lowpriorityscore=0 suspectscore=0 phishscore=0 spamscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510180022 Content-Type: text/plain; charset="utf-8" On s390 today we overwrite the PCI BAR resource address to either an artificial cookie address or MIO address. However this address is different from the bus address of the BARs programmed by firmware. The artificial cookie address was created to index into an array of function handles (zpci_iomap_start). The MIO (mapped I/O) addresses are provided by firmware but maybe different from the bus address. This creates an issue when trying to convert the BAR resource address to bus address using the generic pcibios_resource_to_bus(). Implement an architecture specific pcibios_resource_to_bus() function to correctly translate PCI BAR resource addresses to bus addresses for s390. Similarly add architecture specific pcibios_bus_to_resource function to do the reverse translation. Reviewed-by: Niklas Schnelle Signed-off-by: Farhan Ali --- arch/s390/pci/pci.c | 74 +++++++++++++++++++++++++++++++++++++++ drivers/pci/host-bridge.c | 4 +-- 2 files changed, 76 insertions(+), 2 deletions(-) diff --git a/arch/s390/pci/pci.c b/arch/s390/pci/pci.c index c82c577db2bc..cacad02b2b7f 100644 --- a/arch/s390/pci/pci.c +++ b/arch/s390/pci/pci.c @@ -264,6 +264,80 @@ resource_size_t pcibios_align_resource(void *data, con= st struct resource *res, return 0; } =20 +void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *r= egion, + struct resource *res) +{ + struct zpci_bus *zbus =3D bus->sysdata; + struct zpci_bar_struct *zbar; + struct zpci_dev *zdev; + + region->start =3D res->start; + region->end =3D res->end; + + for (int i =3D 0; i < ZPCI_FUNCTIONS_PER_BUS; i++) { + int j =3D 0; + + zbar =3D NULL; + zdev =3D zbus->function[i]; + if (!zdev) + continue; + + for (j =3D 0; j < PCI_STD_NUM_BARS; j++) { + if (zdev->bars[j].res->start =3D=3D res->start && + zdev->bars[j].res->end =3D=3D res->end && + res->flags & IORESOURCE_MEM) { + zbar =3D &zdev->bars[j]; + break; + } + } + + if (zbar) { + /* only MMIO is supported */ + region->start =3D zbar->val & PCI_BASE_ADDRESS_MEM_MASK; + if (zbar->val & PCI_BASE_ADDRESS_MEM_TYPE_64) + region->start |=3D (u64)zdev->bars[j + 1].val << 32; + + region->end =3D region->start + (1UL << zbar->size) - 1; + return; + } + } +} + +void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res, + struct pci_bus_region *region) +{ + struct zpci_bus *zbus =3D bus->sysdata; + struct zpci_dev *zdev; + resource_size_t start, end; + + res->start =3D region->start; + res->end =3D region->end; + + for (int i =3D 0; i < ZPCI_FUNCTIONS_PER_BUS; i++) { + zdev =3D zbus->function[i]; + if (!zdev || !zdev->has_resources) + continue; + + for (int j =3D 0; j < PCI_STD_NUM_BARS; j++) { + if (!zdev->bars[j].size) + continue; + + /* only MMIO is supported */ + start =3D zdev->bars[j].val & PCI_BASE_ADDRESS_MEM_MASK; + if (zdev->bars[j].val & PCI_BASE_ADDRESS_MEM_TYPE_64) + start |=3D (u64)zdev->bars[j + 1].val << 32; + + end =3D start + (1UL << zdev->bars[j].size) - 1; + + if (start =3D=3D region->start && end =3D=3D region->end) { + res->start =3D zdev->bars[j].res->start; + res->end =3D zdev->bars[j].res->end; + return; + } + } + } +} + void __iomem *ioremap_prot(phys_addr_t phys_addr, size_t size, pgprot_t prot) { diff --git a/drivers/pci/host-bridge.c b/drivers/pci/host-bridge.c index afa50b446567..56d62afb3afe 100644 --- a/drivers/pci/host-bridge.c +++ b/drivers/pci/host-bridge.c @@ -48,7 +48,7 @@ void pci_set_host_bridge_release(struct pci_host_bridge *= bridge, } EXPORT_SYMBOL_GPL(pci_set_host_bridge_release); =20 -void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *r= egion, +void __weak pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_re= gion *region, struct resource *res) { struct pci_host_bridge *bridge =3D pci_find_host_bridge(bus); @@ -73,7 +73,7 @@ static bool region_contains(struct pci_bus_region *region= 1, return region1->start <=3D region2->start && region1->end >=3D region2->e= nd; } =20 -void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res, +void __weak pcibios_bus_to_resource(struct pci_bus *bus, struct resource *= res, struct pci_bus_region *region) { struct pci_host_bridge *bridge =3D pci_find_host_bridge(bus); --=20 2.43.0 From nobody Sat Feb 7 23:23:09 2026 Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 6763F2C3263; Mon, 20 Oct 2025 19:02:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=148.163.156.1 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760986934; cv=none; b=DQMRGsKXFIJs0fVapvV1bxih+frUQC+U+RnjqOcNLZ4w1Kx3FAgp3Qt9ODp6D+xrigrF3V/gTvtEr7iWNObto6Y0kDwEM2l2tjA3lOC79Sr4TEO4iEeK/GaFt0ZQYjHLm3ycA3PwzwpDRNJx2WUsy48SQwSgSipTEdq5RFROhVs= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760986934; c=relaxed/simple; bh=RAkfZavbVQz3RjrGM3h/OdmlKiaMVacYknRSi2XnjBA=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=cqHBzF4LfYxqeofsF7JNPOywLX5JeOCiymdWezlpwGxrgnhOVZzKZNCck9h4wsw58/RcC1OO11OaUz+5C2tXqO0MjJD6kJIMx+S52I+YMIVpWObUf8MIJl7XJC8cB5zdMyMoZVg+GNhUBZHNodUta95Ylh07ouSLggltFif/d6k= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.ibm.com; spf=pass smtp.mailfrom=linux.ibm.com; dkim=pass (2048-bit key) header.d=ibm.com header.i=@ibm.com header.b=eRfVBzZe; arc=none smtp.client-ip=148.163.156.1 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.ibm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.ibm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=ibm.com header.i=@ibm.com header.b="eRfVBzZe" Received: from pps.filterd (m0356517.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 59KI4Vgt015154; Mon, 20 Oct 2025 19:02:09 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc :content-transfer-encoding:date:from:in-reply-to:message-id :mime-version:references:subject:to; s=pp1; bh=KI5KeH/8aCFRqOxsy zr0zWF6mhlA9JIUp+28TM2Fup0=; b=eRfVBzZeEe6xCm5CmEyUu31TSAPKwkyi1 5yQZcy/YlIg4RTfYD99RCi9DU1y9nHVGdWW3tbJlpYd9DTRlb92f0RHmnBGMcUn+ UABPXXecoR7O8djJuT9ukng4UnuRHVFyPl3AqJE24JblX5Cl/KjCiYk5l6GvsRkT aj32twZ0hlIWB25AYB4DuAf3TyIWK79KXSp9j10e4+5R1pFhx4EYR1mdiNCtzR75 ikZAc3vzCsyPQ1DTYnOSQM6ZSl7bNV/ICrE42xLq3DQHzwQ1vBkqntCJ/NtyFd1O lWFtJrznz1CvP0imC3XTjGSL4YxTLkaL1XOF+3nVCZKeKl73adClQ== Received: from ppma23.wdc07v.mail.ibm.com (5d.69.3da9.ip4.static.sl-reverse.com [169.61.105.93]) by mx0a-001b2d01.pphosted.com (PPS) with ESMTPS id 49v31ru6vg-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 20 Oct 2025 19:02:09 +0000 (GMT) Received: from pps.filterd (ppma23.wdc07v.mail.ibm.com [127.0.0.1]) by ppma23.wdc07v.mail.ibm.com (8.18.1.2/8.18.1.2) with ESMTP id 59KIbsn8024677; Mon, 20 Oct 2025 19:02:08 GMT Received: from smtprelay06.wdc07v.mail.ibm.com ([172.16.1.73]) by ppma23.wdc07v.mail.ibm.com (PPS) with ESMTPS id 49vpqjq4jj-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 20 Oct 2025 19:02:08 +0000 Received: from smtpav03.dal12v.mail.ibm.com (smtpav03.dal12v.mail.ibm.com [10.241.53.102]) by smtprelay06.wdc07v.mail.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id 59KJ27Bn27656760 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Mon, 20 Oct 2025 19:02:07 GMT Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E28E05806A; Mon, 20 Oct 2025 19:02:06 +0000 (GMT) Received: from smtpav03.dal12v.mail.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 48D7A58063; Mon, 20 Oct 2025 19:02:06 +0000 (GMT) Received: from IBM-D32RQW3.ibm.com (unknown [9.61.240.93]) by smtpav03.dal12v.mail.ibm.com (Postfix) with ESMTP; Mon, 20 Oct 2025 19:02:06 +0000 (GMT) From: Farhan Ali To: linux-s390@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Cc: helgaas@kernel.org, stable@vger.kernel.org, alifm@linux.ibm.com, schnelle@linux.ibm.com, mjrosato@linux.ibm.com Subject: [PATCH v1 3/3] s390/pci: Restore IRQ unconditionally for the zPCI device Date: Mon, 20 Oct 2025 12:02:00 -0700 Message-ID: <20251020190200.1365-4-alifm@linux.ibm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20251020190200.1365-1-alifm@linux.ibm.com> References: <20251020190200.1365-1-alifm@linux.ibm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: OTwNhHTSlwaWyS7xNyvu-wpy8feH7ewL X-Proofpoint-GUID: OTwNhHTSlwaWyS7xNyvu-wpy8feH7ewL X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDE4MDAyMiBTYWx0ZWRfX8Dx8UMGPDSOJ yCE1qOwJGd72j+mQawiqYaJ7ioSR8inBAU/+cVHoH0nWE2lpv5dOWpEop7G86YEI74ytQ7Y/xwM /72srEBRszmiMM/78NZT4pNFruHIJp7itKZN87lf1u/A9PErQmR49+EEpxkY1Ou1GToWpsJcjmC +Dj7Si6EPihZz+CJIIUtvfXLkZiWI83GGYwulkzH7vR2Vs6jCV/1ucJCuyUP7uSX7pLOUKRbQdJ 6nOblPToIIwr+e8rbE1kccPNNzsTxQHYuyvO4Eq/zeGd14GeFJLeBDSRK9uUrsyDbCr5f+qTQlj y4oJrJvFnu0iR7N32xZgSMWygKfzUarr4IfVo5NTFY3X0Ft+b4OC4tUy8CozlY2L6qZyUBXqL8C hCI3ibExuLtd/Crf8TDe3d81J/jtAQ== X-Authority-Analysis: v=2.4 cv=IJYPywvG c=1 sm=1 tr=0 ts=68f68731 cx=c_pps a=3Bg1Hr4SwmMryq2xdFQyZA==:117 a=3Bg1Hr4SwmMryq2xdFQyZA==:17 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=VnNF1IyMAAAA:8 a=ove13Onh8FEOJJhcmoIA:9 a=cPQSjfK2_nFv0Q5t_7PE:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-20_05,2025-10-13_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 lowpriorityscore=0 clxscore=1015 suspectscore=0 spamscore=0 bulkscore=0 adultscore=0 impostorscore=0 malwarescore=0 priorityscore=1501 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510180022 Content-Type: text/plain; charset="utf-8" Commit c1e18c17bda6 ("s390/pci: add zpci_set_irq()/zpci_clear_irq()"), introduced the zpci_set_irq() and zpci_clear_irq(), to be used while resetting a zPCI device. Commit da995d538d3a ("s390/pci: implement reset_slot for hotplug slot"), mentions zpci_clear_irq() being called in the path for zpci_hot_reset_devic= e(). But that is not the case anymore and these functions are not called outside of this file. Instead zpci_hot_reset_device() relies on zpci_disable_device() also clearing the IRQs, but misses to reset the zdev->irqs_registered flag. However after a CLP disable/enable reset, the device's IRQ are unregistered, but the flag zdev->irq_registered does not get cleared. It creates an inconsistent state and so arch_restore_msi_irqs() doesn't correctly restore the device's IRQ. This becomes a problem when a PCI driver tries to restore the state of the device through pci_restore_state(). Restore IRQ unconditionally for the device and remove the irq_registered flag as its redundant. Reviewed-by: Niklas Schnelle Signed-off-by: Farhan Ali Reviewed-by: Matthew Rosato --- arch/s390/include/asm/pci.h | 1 - arch/s390/pci/pci_irq.c | 9 +-------- 2 files changed, 1 insertion(+), 9 deletions(-) diff --git a/arch/s390/include/asm/pci.h b/arch/s390/include/asm/pci.h index 6890925d5587..a32f465ecf73 100644 --- a/arch/s390/include/asm/pci.h +++ b/arch/s390/include/asm/pci.h @@ -145,7 +145,6 @@ struct zpci_dev { u8 has_resources : 1; u8 is_physfn : 1; u8 util_str_avail : 1; - u8 irqs_registered : 1; u8 tid_avail : 1; u8 rtr_avail : 1; /* Relaxed translation allowed */ unsigned int devfn; /* DEVFN part of the RID*/ diff --git a/arch/s390/pci/pci_irq.c b/arch/s390/pci/pci_irq.c index 84482a921332..e73be96ce5fe 100644 --- a/arch/s390/pci/pci_irq.c +++ b/arch/s390/pci/pci_irq.c @@ -107,9 +107,6 @@ static int zpci_set_irq(struct zpci_dev *zdev) else rc =3D zpci_set_airq(zdev); =20 - if (!rc) - zdev->irqs_registered =3D 1; - return rc; } =20 @@ -123,9 +120,6 @@ static int zpci_clear_irq(struct zpci_dev *zdev) else rc =3D zpci_clear_airq(zdev); =20 - if (!rc) - zdev->irqs_registered =3D 0; - return rc; } =20 @@ -427,8 +421,7 @@ bool arch_restore_msi_irqs(struct pci_dev *pdev) { struct zpci_dev *zdev =3D to_zpci(pdev); =20 - if (!zdev->irqs_registered) - zpci_set_irq(zdev); + zpci_set_irq(zdev); return true; } =20 --=20 2.43.0