From nobody Sun Feb 8 04:34:02 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E26EA2EB866; Mon, 20 Oct 2025 08:25:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760948758; cv=none; b=JR9chtq3fBbP/fn0xxu0kju0w18MFUDp9T7x7OmHlodADoWRgIyOs/D6Os8VhDKXhAvDewQPwiewGLyWDZsWh5n0h31YQWFBRemi/j3TjVgws8V4cdD45/cjHDl4vSzHNB/h3VaMUOrafxEuVSGRwcPRE/dkQHe9NOy09HL/RaU= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760948758; c=relaxed/simple; bh=sAgwcNFc2AId1oo1XXYtDpMKpVhBMVzmc5VdQ3ghmVI=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=XA37qOSBPkiSidWXrJ/PWBdEczulK6Jxp36kaAFLb/Drt5mFBmC5VLfB55ckqnGTE9UtFbsQOhNEfRBE49vUjenypC+/C4O5tD+Qyqtdxfgn4YFgnEpIHLO/BaGJHe6yeUjogCLZEJ/cvh7JRQl1OTA3fJj7vVydh6iQCLStttg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=k9it5ZHm; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="k9it5ZHm" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=supjnpNMV7Z5sSchIbn6T4QPTuHy+8pmLkLub0pKm28=; b=k9it5ZHmjQwVid1an6ahRrTmbB tXvMQ06DehkUHQfFj+NpQ8prsIUcj1UdWUBkn4iMq3dvox0qyBVuVCpkMruHeKJrPqqM4nLg6tcxe MAexHvCXbT2VZFtq12VlLW4uqaldMiGuIr1/ugPSaimeco4aHh3YE40jXO3PQGwvOG+q9uJccVHFx +F46v+YbnD0GqhRMKhLel95ohkc8Ml/AXhTyUSUtsIbPoSmjwrnCImWFbq5hNhA1dGj72dEb/zXnO 1HsMPiZVsGwcMP+NXQp1TSY3T41RDm60gydq7deZmJNRtQQajw+4D+hjJDEInq0kor4QMm4heKFEo toaWAhKA==; Received: from [141.76.253.240] (helo=phil.eduroam.local) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1vAlCy-00078O-30; Mon, 20 Oct 2025 10:25:36 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, quentin.schulz@cherry.de, andy.yan@rock-chips.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, cn.liweihao@gmail.com, Heiko Stuebner Subject: [PATCH 1/9] dt-bindings: display: rockchip: dw-hdmi: Add compatible for RK3368 HDMI Date: Mon, 20 Oct 2025 10:25:00 +0200 Message-ID: <20251020082508.3636511-2-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20251020082508.3636511-1-heiko@sntech.de> References: <20251020082508.3636511-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Heiko Stuebner Define a new compatible for RK3368 HDMI. The RK3368 HDMI also uses a PHY internal in the controller, so works similar to other controllers, with the exception that the RK3368 only has one VOP, so there is no source selection needed. Signed-off-by: Heiko Stuebner Acked-by: Conor Dooley --- .../devicetree/bindings/display/rockchip/rockchip,dw-hdmi.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw= -hdmi.yaml b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw= -hdmi.yaml index 9d096856a79a..29716764413a 100644 --- a/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.y= aml +++ b/Documentation/devicetree/bindings/display/rockchip/rockchip,dw-hdmi.y= aml @@ -23,6 +23,7 @@ properties: - rockchip,rk3228-dw-hdmi - rockchip,rk3288-dw-hdmi - rockchip,rk3328-dw-hdmi + - rockchip,rk3368-dw-hdmi - rockchip,rk3399-dw-hdmi - rockchip,rk3568-dw-hdmi =20 --=20 2.47.2 From nobody Sun Feb 8 04:34:02 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E26532EA752; Mon, 20 Oct 2025 08:25:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760948757; cv=none; b=ubCItEjYrgiYtruq7dxnnHfCT3us5Znb9YNbwpxJ2gb9UWY2LWP3c6jrC4oagg3aewPfqLiUt2oynH6m8OQyTqvsbG0blaTZMKyrYDVAM4pbvc2TXiwFXONxnSHsTkXOBpxTKcJ6sJJ0MMcvVjjX4FQo/36xyF09GHKJ55smDAg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760948757; c=relaxed/simple; bh=rZhKAyiqSuSxCrlr7TE4Ukg9BFQY9d1O007hPrVAGlc=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=ERnuJIk+W/BKCbm7/bv9iW7falgkdyDDy5Ld5aYWB/pTJxipbd4cMVpTx3KIFTOSA15fvTAmNQnz9seNFJw5IFNbb7oSHrHxfymJitCHjprDShNsDkBly3fzpf4utat/LFLeQzWZygRz9yj8IiBKXg+2DM1VnK9MV0kGTaNRur0= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=v2x/H7jj; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="v2x/H7jj" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=Yj6MA66tzVBn+KRYXc/UT/sYW9ZjhkSRMZ8pqWy1J7g=; b=v2x/H7jjQM2bM50tAt6guxmne9 3RK9T2Rp+ZjfBlQNhgis87jMVhX25x4gHOUTVHfePIjXqEfsS4SRzYGz3kYSzYzeSWbeGsPHmsbFE QQX60MsGnpDvBcgDf3SVjv8d1d5yQ2FCwsolFl5yNqZN6jgAbnJHJWJoeTdMmyLbUGWJMVaFd3u+A jG2bwh9VpTt3EMzFxgNOJgvXD08GuCM4wp64KueWM90+7WNMSQBOfeVXww+e+Rv676rupj8g+Y5jb fY8z6sE5jVmTwHDMIxRw/+5d7+kmZq1Kjfhgeciai5BRqCraZrA8yhQ1qAyfhC31+jLkbZ3AmAZ0z wJ1BOxAg==; Received: from [141.76.253.240] (helo=phil.eduroam.local) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1vAlCy-00078O-Ha; Mon, 20 Oct 2025 10:25:36 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, quentin.schulz@cherry.de, andy.yan@rock-chips.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, cn.liweihao@gmail.com, Heiko Stuebner Subject: [PATCH 2/9] drm/rockchip: hdmi: add RK3368 controller variant Date: Mon, 20 Oct 2025 10:25:01 +0200 Message-ID: <20251020082508.3636511-3-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20251020082508.3636511-1-heiko@sntech.de> References: <20251020082508.3636511-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Heiko Stuebner The RK3368 has only one VOP, so there is no source selection happening and the controller uses an internal phy for the HDMI output. Signed-off-by: Heiko Stuebner --- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/= rockchip/dw_hdmi-rockchip.c index 7b613997bb50..95ff3fce97a3 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -467,6 +467,19 @@ static const struct dw_hdmi_plat_data rk3328_hdmi_drv_= data =3D { .use_drm_infoframe =3D true, }; =20 +static struct rockchip_hdmi_chip_data rk3368_chip_data =3D { + .lcdsel_grf_reg =3D -1, +}; + +static const struct dw_hdmi_plat_data rk3368_hdmi_drv_data =3D { + .mode_valid =3D dw_hdmi_rockchip_mode_valid, + .mpll_cfg =3D rockchip_mpll_cfg, + .cur_ctr =3D rockchip_cur_ctr, + .phy_config =3D rockchip_phy_config, + .phy_data =3D &rk3368_chip_data, + .use_drm_infoframe =3D true, +}; + static struct rockchip_hdmi_chip_data rk3399_chip_data =3D { .lcdsel_grf_reg =3D RK3399_GRF_SOC_CON20, .lcdsel_big =3D FIELD_PREP_WM16_CONST(RK3399_HDMI_LCDC_SEL, 0), @@ -507,6 +520,9 @@ static const struct of_device_id dw_hdmi_rockchip_dt_id= s[] =3D { { .compatible =3D "rockchip,rk3328-dw-hdmi", .data =3D &rk3328_hdmi_drv_data }, + { .compatible =3D "rockchip,rk3368-dw-hdmi", + .data =3D &rk3368_hdmi_drv_data + }, { .compatible =3D "rockchip,rk3399-dw-hdmi", .data =3D &rk3399_hdmi_drv_data }, --=20 2.47.2 From nobody Sun Feb 8 04:34:02 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0CD0A2EBB83; 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Mon, 20 Oct 2025 10:25:36 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, quentin.schulz@cherry.de, andy.yan@rock-chips.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, cn.liweihao@gmail.com, Heiko Stuebner Subject: [PATCH 3/9] soc: rockchip: grf: Add select correct PWM implementation on RK3368 Date: Mon, 20 Oct 2025 10:25:02 +0200 Message-ID: <20251020082508.3636511-4-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20251020082508.3636511-1-heiko@sntech.de> References: <20251020082508.3636511-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Heiko Stuebner Similar to the RK3288, the RK3368 has two different implementations of the PWM block inside the soc - the newer one that we have a driver for and that is used on every soc and a previous variant that was likely left as a fallback if the new one creates problems. The devicetree already is set up for the new variant, so make sure we actually use it - similar to the RK3288. Signed-off-by: Heiko Stuebner --- drivers/soc/rockchip/grf.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/soc/rockchip/grf.c b/drivers/soc/rockchip/grf.c index 344870da7675..963cdea01ce7 100644 --- a/drivers/soc/rockchip/grf.c +++ b/drivers/soc/rockchip/grf.c @@ -91,6 +91,7 @@ static const struct rockchip_grf_info rk3328_grf __initco= nst =3D { =20 static const struct rockchip_grf_value rk3368_defaults[] __initconst =3D { { "jtag switching", RK3368_GRF_SOC_CON15, FIELD_PREP_WM16_CONST(BIT(13), = 0) }, + { "pwm select", RK3368_GRF_SOC_CON15, FIELD_PREP_WM16_CONST(BIT(12), 1) }, }; =20 static const struct rockchip_grf_info rk3368_grf __initconst =3D { --=20 2.47.2 From nobody Sun Feb 8 04:34:02 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E27502EBB80; Mon, 20 Oct 2025 08:25:55 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760948757; cv=none; b=sWBmv9N4pD6N9ItmWre18TghfVYCBp5pxzRYyZK6AOaZ/7ztAw4c792An8s2bskkuOGCHPgSHiWrgCLtuiyZ2MqtdUkmgqn+9b2ItHTkLOFivG/uiAcwSdWlF5l4c1OOQkE8oUK666w23nv58FI0uoOK4N/yvp2QxbdTpmvQF/E= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760948757; c=relaxed/simple; bh=8ulyx0+RM3z/QL2q66jui3FXZ/82ad4gLMet0dogxGw=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=JcakMJFlCJDykhE9JQDx6eaQP++B0SlJveN09r/Qp/0hPziCgjfWd29zreE4ZZZzDq6N8VIO80MmOH5C83uT8NTjrGpMdU/I1cmckahAW27WXiP4ugr0SFDrUB6ch3nSR92mm56VPdoHKSimnFHP3eVTpMWhLITUUJhhurVVRkg= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=DtpxN1Pl; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="DtpxN1Pl" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=pOUvvxU2BJaHxDxHIo4De4OqXEVjTkBaEpIseudvhGs=; b=DtpxN1PlWm09zUHWBVJ/Gg5IPU PSGk1BUw4cEaCdaqGuDI8L+X6H1LWC8MhNZcTnLUXKyiRAHisS7294+McAYXLj3+JQjoF7LViXtDk BMAwd3d9G9P1RwNIhMFqoFMNE8rNgc2XKoX3VEyhvlFJrG3bqaq6phrvxcZ+FmPHFJXwf9eGQBec+ vuomOk/nTgNdAV6KYi5UJOvewVTgqnUoVjODjCKgHDEgRxH9mroI0NRSAelfA4KC/pSdubIxi+tAc N1FGbLFz6MM7OmJvXfXSeCniDfK7mcrzgXjNNvEBF9aFtnmGL31iEtxJqIOpM2mlxCraK6GO9Wf6G TqtmiJew==; Received: from [141.76.253.240] (helo=phil.eduroam.local) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1vAlCz-00078O-AA; Mon, 20 Oct 2025 10:25:37 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, quentin.schulz@cherry.de, andy.yan@rock-chips.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, cn.liweihao@gmail.com, Heiko Stuebner Subject: [PATCH 4/9] arm64: dts: rockchip: Add power-domain to RK3368 DSI controller Date: Mon, 20 Oct 2025 10:25:03 +0200 Message-ID: <20251020082508.3636511-5-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20251020082508.3636511-1-heiko@sntech.de> References: <20251020082508.3636511-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Heiko Stuebner The DSI controller is also part of the VIO power-domain and it definitly needs to be on when accessing it to no cause SError faults, so add the power-domain property to it. Fixes: 5023d0cd6183 ("arm64: dts: rockchip: Add DSI for RK3368") Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3368.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts= /rockchip/rk3368.dtsi index 8f0216203241..5b2cbb3003b6 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -896,6 +896,7 @@ mipi_dsi: dsi@ff960000 { clock-names =3D "pclk"; phys =3D <&dphy>; phy-names =3D "dphy"; + power-domains =3D <&power RK3368_PD_VIO>; resets =3D <&cru SRST_MIPIDSI0>; reset-names =3D "apb"; rockchip,grf =3D <&grf>; --=20 2.47.2 From nobody Sun Feb 8 04:34:02 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 64BF01DF26E; Mon, 20 Oct 2025 08:25:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760948760; cv=none; b=sjJl0XTskStGMd+XkLmqRm0LwocS+1k9UqUlLe2jsXdZTky/0W1ONzqwNAMjqa6RD/zfXb0xpfuLeatSSyYLfSF8oCK5Q7J2gQtv3RhgDdO013Q1aopvmNyzCMNdof7t/Tk8a11dlTWts0omz3k9CDHzLH03/7pvJJKBBYacTPE= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760948760; c=relaxed/simple; bh=R70wZXJ8F0/cNojCyOImKR8Y/E8ke+fHcCkZQxYzEjo=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=czl7z65eKGwTvDyeh8LCwyXJHJB3RTOTxmqH7EJH2xjNkAdk6GPHXwa1pr1W7lCZ4QsMILV4AEDU4Yk3/DYib0KzkZSTZ5hlKHEnvMRrs7zIxxoe93OcEyWsGqiV3EtdFyj5NFjOjFcOeSx/ZrOYepPn8zQwrZJbyqfxoHkLmhw= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=dUgmxZbi; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="dUgmxZbi" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=vq+OLT6kQHBvZ3SWUmco3TCZbL/ngmeaaecxDEGXCME=; b=dUgmxZbiqZHYh6tpf3bP0/hewn qeEKPW/M+nVRk/aIuwlPJJ/6PLzWNlu52tkPtPMR+Uzdk9raOyXp7k9GdHPfu/TNRRoNFj/AstiDV rKFBJc1Y1ie8TBCGMgi6UdRB7ghCr2Qr6l0Ue66Mg1GehcRkFsG8K7KV8HR98U0ARbqEJJNLF23fI VXphZOBD0mKl7VHJPA2Tg1EVHnxJCqiwEo2KxU4SFgOlsp123cRSChTGdV1qyW2Q73+fylfd1ccMj TZkJLdy/9I45+QCj8ZYSGu6ylz3WkZj829rZI4OV/PBO4Zudr+MIdXUX0i7lE7PwhaNUm3xzq3BWU iWfbYNfg==; Received: from [141.76.253.240] (helo=phil.eduroam.local) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1vAlCz-00078O-MZ; Mon, 20 Oct 2025 10:25:37 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, quentin.schulz@cherry.de, andy.yan@rock-chips.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, cn.liweihao@gmail.com, Heiko Stuebner Subject: [PATCH 5/9] arm64: dts: rockchip: Add power-domain to RK3368 VOP controller Date: Mon, 20 Oct 2025 10:25:04 +0200 Message-ID: <20251020082508.3636511-6-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20251020082508.3636511-1-heiko@sntech.de> References: <20251020082508.3636511-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Heiko Stuebner The VOP is also part of the VIO power-domain and it definitly needs to be on when accessing it to no cause SError faults, so add the power-domain property to it. Fixes: ef06b5ddee1e ("arm64: dts: rockchip: Add display subsystem for RK336= 8") Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3368.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts= /rockchip/rk3368.dtsi index 5b2cbb3003b6..ce4b112b082b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -862,6 +862,7 @@ vop: vop@ff930000 { clocks =3D <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>; clock-names =3D "aclk_vop", "dclk_vop", "hclk_vop"; iommus =3D <&vop_mmu>; + power-domains =3D <&power RK3368_PD_VIO>; resets =3D <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC= 0_DCLK>; reset-names =3D "axi", "ahb", "dclk"; status =3D "disabled"; --=20 2.47.2 From nobody Sun Feb 8 04:34:02 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 64E552EBB9E; Mon, 20 Oct 2025 08:25:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760948759; cv=none; b=ojcYs882ev8H7WNks0yNk+/XNrAl0GtldbQaoIBfMaRdEldJEXP0KtY6Qvuz4o2c11uNFDxreOwDnFeaHuXWsoOcrx+gfCMXvDaFS9w3p0ch/BddgpWrjkK1bN24hx+Uefxns+5uXpzKLCnfc3O2Zcbqe4MHLSgjhJXVBCp/564= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760948759; c=relaxed/simple; bh=DnjYBrCTXYxa6ddCVHjY1tjnjTmi2iefm4PG9Y+fhB0=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=CB8/KbnXd2lbth6oadf48kgtHK+GeLR2jRTXTYn+s5O7G+AAJqWOdxQpqrxihXxt+z5g4dXYbaVhHD1EXuNRGW9QRxqXVz8jnu+NHjAFme5oU1uuO7F9YZDtPmOAtSQK94zHJDcflKw4MZ9cHi1l2W18UCmsKkh26HeUmQUHfJQ= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=OnR1WhTL; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="OnR1WhTL" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=zD1i5hY8aJGQC31SLVZPrEE7DjpJ9widgoJsqpszpfI=; b=OnR1WhTLsmdP/YviSTC3RUvI1P 9XF91ESj+STDF3GHeVMC5gLQPQ4Q017qjzFJT6nvIduGvq+5WdxkAMR9BQHa5MOVqmC/0wBfbs3rb DfTs821JoN3FB8hWmyKS6v/SnYDWhYq8h2S2vQjN4Xj3QvWRGBPcrjvUd32CkXrvsInhq8lRik8on VzJiFWiMjLFEnMSBNVHMz9R3LSbn1BBk6NFzx3nA01xRDhkj1MNK461LnJ4rMWbxullc9Q0UUqXTW WH6vo5tTf3BShr/ZOSY2/oQPT0+hYg3KOk2hqr1BArsvHbpe+C6lMyI6dSyD+F3K2WwWFEaZ/eMsz A9vaWdfA==; Received: from [141.76.253.240] (helo=phil.eduroam.local) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1vAlD0-00078O-3D; Mon, 20 Oct 2025 10:25:38 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, quentin.schulz@cherry.de, andy.yan@rock-chips.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, cn.liweihao@gmail.com, Heiko Stuebner Subject: [PATCH 6/9] arm64: dts: rockchip: Use phandle for i2c_lvds_blc on rk3368-lion haikou Date: Mon, 20 Oct 2025 10:25:05 +0200 Message-ID: <20251020082508.3636511-7-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20251020082508.3636511-1-heiko@sntech.de> References: <20251020082508.3636511-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Heiko Stuebner i2c@0 on i2cmux2 does already have a phandle i2c_lvds_blc defined. Use this one instead of replicating the hirarchy again, as this might result in strange errors if the lion dtsi is change at some point in the future. Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3368-lion-haikou.dts | 18 ++++++++---------- 1 file changed, 8 insertions(+), 10 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts b/arch/arm= 64/boot/dts/rockchip/rk3368-lion-haikou.dts index ab70ee5f561a..abd1af97456a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts +++ b/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts @@ -18,16 +18,6 @@ chosen { stdout-path =3D "serial0:115200n8"; }; =20 - i2cmux2 { - i2c@0 { - eeprom: eeprom@50 { - compatible =3D "atmel,24c01"; - pagesize =3D <8>; - reg =3D <0x50>; - }; - }; - }; - leds { pinctrl-0 =3D <&module_led_pins>, <&sd_card_led_pin>; =20 @@ -68,6 +58,14 @@ vcc5v0_otg: regulator-vcc5v0-otg { }; }; =20 +&i2c_lvds_blc { + eeprom: eeprom@50 { + compatible =3D "atmel,24c01"; + pagesize =3D <8>; + reg =3D <0x50>; + }; +}; + &sdmmc { bus-width =3D <4>; cap-mmc-highspeed; --=20 2.47.2 From nobody Sun Feb 8 04:34:02 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 64C672EBB8F; Mon, 20 Oct 2025 08:25:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760948759; cv=none; b=j5axD+gvElY9xBP6mQTaFL7EBXAWteAJIa8H1G9H0mbAzfoZO7wVye8enz/uHBlq4ZDRgGStYtE/05ERIYIe1fs/f5dJPq23X3qBD9UE4iWXNdKj4XqQ4HAtTFGvbRnqY7ZZGpkhpEJ/rotkYwQZJhCy+Ysj86tAz2mm+Bb1iE0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760948759; c=relaxed/simple; bh=R9rUbcIB2q9tGvW8Mqxi8UD0XDoYO5zF6LlMrQfKBdg=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=MnOt5GdhzU6lOfOeWDvKoDwzTL97ppGWjws0vrVbELM873isu10eevXydSh8xhM5HxpnQfdergCreDK6/ZI/Ywgp2VVjyAOvZE9FoO9N0si9xGH0WJSaq5bDuaGvbWVHN7EIgJ41zd+ElhJjSyOsqm5agy+lz8Kt8Un8pwgj6mM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=0xEykeNU; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="0xEykeNU" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=z62Mgu+xiqkq1oFmKOzlCDXsOLsmTSYpn7SJ2PjkVXI=; b=0xEykeNUAlhlZYnBbS5HBkSZ+q sKcc2FKNH8uK+tKOugvviiwfaU+ObaveVGqRMZkXj0pZ/KLLPIzLoZxoGunkuZ2pXIi/rPLfXq4Tx NLAiBIzG3ktQli4doLSz/UuVT6djPwnq7xngDu0ncMW/ax4Un1BEp/pJPK+j0GQZWmf6AqnOZW+mq YuHJ/JgrM0soN4dPeNd4n0FqGn3U3V8Qw8Ach7N7YlgjyA8xyqeBtQb2sMQCBQsPiCKBphS+/Dbrs T2XcF7DKw8nS2XARH9A2x8b7NN2nndvYo7oLM4BAUfZoP5/5aII/+N00pIhHYb4fnnhX1aIN3y0d5 JGVkq9dQ==; Received: from [141.76.253.240] (helo=phil.eduroam.local) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1vAlD0-00078O-GG; Mon, 20 Oct 2025 10:25:38 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, quentin.schulz@cherry.de, andy.yan@rock-chips.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, cn.liweihao@gmail.com, Heiko Stuebner Subject: [PATCH 7/9] arm64: dts: rockchip: Add HDMI node to RK3368 Date: Mon, 20 Oct 2025 10:25:06 +0200 Message-ID: <20251020082508.3636511-8-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20251020082508.3636511-1-heiko@sntech.de> References: <20251020082508.3636511-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Heiko Stuebner Add the hdmi controller node to the main soc devicetree and hook it into the vop. Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3368.dtsi | 43 ++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts= /rockchip/rk3368.dtsi index ce4b112b082b..892d35242259 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -875,6 +875,11 @@ vop_out_dsi: endpoint@0 { reg =3D <0>; remote-endpoint =3D <&dsi_in_vop>; }; + + vop_out_hdmi: endpoint@1 { + reg =3D <1>; + remote-endpoint =3D <&hdmi_in_vop>; + }; }; }; =20 @@ -933,6 +938,37 @@ dphy: phy@ff968000 { status =3D "disabled"; }; =20 + hdmi: hdmi@ff980000 { + compatible =3D "rockchip,rk3368-dw-hdmi"; + reg =3D <0x0 0xff980000 0x0 0x20000>; + interrupts =3D ; + clocks =3D <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>, <&cru SCLK_HDMI= _CEC>; + clock-names =3D "iahb", "isfr", "cec"; + pinctrl-names =3D "default"; + pinctrl-0 =3D <&hdmi_i2c_xfer>; + power-domains =3D <&power RK3368_PD_VIO>; + reg-io-width =3D <4>; + rockchip,grf =3D <&grf>; + status =3D "disabled"; + + ports { + #address-cells =3D <1>; + #size-cells =3D <0>; + + hdmi_in: port@0 { + reg =3D <0>; + + hdmi_in_vop: endpoint { + remote-endpoint =3D <&vop_out_hdmi>; + }; + }; + + hdmi_out: port@1 { + reg =3D <1>; + }; + }; + }; + hevc_mmu: iommu@ff9a0440 { compatible =3D "rockchip,iommu"; reg =3D <0x0 0xff9a0440 0x0 0x40>, @@ -1196,6 +1232,13 @@ rmii_pins: rmii-pins { }; }; =20 + hdmi { + hdmi_i2c_xfer: hdmi-i2c-xfer { + rockchip,pins =3D <3 RK_PD2 1 &pcfg_pull_none>, + <3 RK_PD3 1 &pcfg_pull_none>; + }; + }; + i2c0 { i2c0_xfer: i2c0-xfer { rockchip,pins =3D <0 RK_PA6 1 &pcfg_pull_none>, --=20 2.47.2 From nobody Sun Feb 8 04:34:02 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 7B3152EBDD0; Mon, 20 Oct 2025 08:25:57 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; 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Mon, 20 Oct 2025 10:25:39 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, quentin.schulz@cherry.de, andy.yan@rock-chips.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, cn.liweihao@gmail.com, Heiko Stuebner Subject: [PATCH 8/9] arm64: dts: rockchip: Enable HDMI output on RK3368-Lion-Haikou Date: Mon, 20 Oct 2025 10:25:07 +0200 Message-ID: <20251020082508.3636511-9-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20251020082508.3636511-1-heiko@sntech.de> References: <20251020082508.3636511-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Heiko Stuebner Enable the VOP and HDMI controller on the Lion-Haikou board. Signed-off-by: Heiko Stuebner --- .../boot/dts/rockchip/rk3368-lion-haikou.dts | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts b/arch/arm= 64/boot/dts/rockchip/rk3368-lion-haikou.dts index abd1af97456a..a8eb4e9c2778 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts +++ b/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts @@ -58,6 +58,16 @@ vcc5v0_otg: regulator-vcc5v0-otg { }; }; =20 +&display_subsystem { + status =3D "okay"; +}; + +&hdmi { + avdd-0v9-supply =3D <&vdd10_video>; + avdd-1v8-supply =3D <&vcc18_video>; + status =3D "okay"; +}; + &i2c_lvds_blc { eeprom: eeprom@50 { compatible =3D "atmel,24c01"; @@ -101,6 +111,14 @@ &uart1 { status =3D "disabled"; }; =20 +&vop { + status =3D "okay"; +}; + +&vop_mmu { + status =3D "okay"; +}; + &pinctrl { pinctrl-names =3D "default"; pinctrl-0 =3D <&haikou_pin_hog>; --=20 2.47.2 From nobody Sun Feb 8 04:34:02 2026 Received: from gloria.sntech.de (gloria.sntech.de [185.11.138.130]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 5920D2EC572; Mon, 20 Oct 2025 08:25:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.11.138.130 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760948760; cv=none; b=j4imeXrstqA52G3eYNY7r/stMmXUYachNuSOB0esrPHiiZaa2IKyNJAforGuT/GIkyJhm+r1AoeDzLgMBEw26lXJDImmv7JSMrxcGB5Y/1EByrpIt3P6KnveuhxrKBJtefB0kgKn/7+4OWxUlHvrC2bFTef/lRemzBCz2s5VoOQ= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760948760; c=relaxed/simple; bh=YjVPqwonj1/rJ828kwmhAUxbBCmMqwjbewzqyVCGYiM=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=mkmiz2VFgS7aQZ0V0v9dtHS/7gjPC3gJ+iqF8REj3v6N+ipPbVZAmeBalsE5wPUYTc4RDlJGvoBt6vTJfwF6VvVpzCWU4ZUjsCOiT/XWhcnxmvxhI4bXU0btN4RfbG6jatstZpN9xl5LWSXznTLrnDjAV/R0yIR5q/Ds1sd+fak= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de; spf=pass smtp.mailfrom=sntech.de; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b=uJ0NS90q; arc=none smtp.client-ip=185.11.138.130 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=sntech.de Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=sntech.de Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=sntech.de header.i=@sntech.de header.b="uJ0NS90q" DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=sntech.de; s=gloria202408; h=Content-Transfer-Encoding:MIME-Version:References: In-Reply-To:Message-ID:Date:Subject:Cc:To:From:Reply-To:Content-Type; bh=OUNye3HxeUTkEv5mR8T9fjHeXru/yz+Ueb4MLuCjw/U=; b=uJ0NS90qAeRIuV60Ug3l7xCaO6 ijGqU1EpezwgohAaaQut95MGseHCZemODeI/8TqqxOJ0QD6GghgnHSCJRKZC8uMcEH+z0Qi8APWS9 qaQsYWIl7w4p3EFlfcGiCdN6njsFYOhKcBthrT1x0IeI6Es09jDKY3e9uurynct+Crvkv3pJe9Lat nvifc1C92NPsxkkpsu0PbEDbYavdl+5uAcYACPCsMNIZpFqBdS9UFaQe34Tjx1855o6UyluvZOAjf rzC9Tu0L+zvowxoj/LnbMLS4HXkOs4th+gOIih4of7JwDrp+h/PwwdSXac67/ohl+bzbetgkinAxV UhycNN2Q==; Received: from [141.76.253.240] (helo=phil.eduroam.local) by gloria.sntech.de with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.94.2) (envelope-from ) id 1vAlD1-00078O-GE; Mon, 20 Oct 2025 10:25:39 +0200 From: Heiko Stuebner To: heiko@sntech.de Cc: maarten.lankhorst@linux.intel.com, mripard@kernel.org, tzimmermann@suse.de, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, quentin.schulz@cherry.de, andy.yan@rock-chips.com, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, cn.liweihao@gmail.com, Heiko Stuebner Subject: [PATCH 9/9] arm64: dts: rockchip: Add the Video-Demo overlay for Lion Haikou Date: Mon, 20 Oct 2025 10:25:08 +0200 Message-ID: <20251020082508.3636511-10-heiko@sntech.de> X-Mailer: git-send-email 2.47.2 In-Reply-To: <20251020082508.3636511-1-heiko@sntech.de> References: <20251020082508.3636511-1-heiko@sntech.de> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Heiko Stuebner The video-demo adapter also works on the Lion SoM when running on a Haikou baseboard, so add an overlay for it. Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/Makefile | 5 + .../rk3368-lion-haikou-video-demo.dtso | 174 ++++++++++++++++++ 2 files changed, 179 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rk3368-lion-haikou-video-d= emo.dtso diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/ro= ckchip/Makefile index ad684e3831bc..494fdd685a5c 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -42,6 +42,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3368-evb-act8846.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3368-geekbox.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3368-lba3368.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3368-lion-haikou.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3368-lion-haikou-video-demo.dtbo dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3368-orion-r68-meta.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3368-px5-evb.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3368-r88.dtb @@ -231,6 +232,10 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D px30-ringneck-haikou-= haikou-video-demo.dtb px30-ringneck-haikou-haikou-video-demo-dtbs :=3D px30-ringneck-haikou.dtb \ px30-ringneck-haikou-video-demo.dtbo =20 +dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3368-lion-haikou-haikou-video-demo.dtb +rk3368-lion-haikou-haikou-video-demo-dtbs :=3D rk3368-lion-haikou.dtb \ + rk3368-lion-haikou-video-demo.dtbo + dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3399-puma-haikou-haikou-video-demo.dtb rk3399-puma-haikou-haikou-video-demo-dtbs :=3D rk3399-puma-haikou.dtb \ rk3399-puma-haikou-video-demo.dtbo diff --git a/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou-video-demo.dts= o b/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou-video-demo.dtso new file mode 100644 index 000000000000..e7767c008144 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3368-lion-haikou-video-demo.dtso @@ -0,0 +1,174 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2025 Cherry Embedded Solutions GmbH + * + * DEVKIT ADDON CAM-TS-A01 + * https://embedded.cherry.de/product/development-kit/ + * + * DT-overlay for the camera / DSI demo appliance for Haikou boards. + * In the flavour for use with a Puma system-on-module. + */ + +/dts-v1/; +/plugin/; + +#include +#include +#include +#include +#include + +&{/} { + backlight: backlight { + compatible =3D "pwm-backlight"; + power-supply =3D <&dc_12v>; + pwms =3D <&pwm1 0 25000 0>; + }; + + cam_afvdd_2v8: regulator-cam-afvdd-2v8 { + compatible =3D "regulator-fixed"; + gpio =3D <&pca9670 2 GPIO_ACTIVE_LOW>; + regulator-max-microvolt =3D <2800000>; + regulator-min-microvolt =3D <2800000>; + regulator-name =3D "cam-afvdd-2v8"; + vin-supply =3D <&vcc2v8_video>; + }; + + cam_avdd_2v8: regulator-cam-avdd-2v8 { + compatible =3D "regulator-fixed"; + gpio =3D <&pca9670 4 GPIO_ACTIVE_LOW>; + regulator-max-microvolt =3D <2800000>; + regulator-min-microvolt =3D <2800000>; + regulator-name =3D "cam-avdd-2v8"; + vin-supply =3D <&vcc2v8_video>; + }; + + cam_dovdd_1v8: regulator-cam-dovdd-1v8 { + compatible =3D "regulator-fixed"; + gpio =3D <&pca9670 3 GPIO_ACTIVE_LOW>; + regulator-max-microvolt =3D <1800000>; + regulator-min-microvolt =3D <1800000>; + regulator-name =3D "cam-dovdd-1v8"; + vin-supply =3D <&vcc1v8_video>; + }; + + cam_dvdd_1v2: regulator-cam-dvdd-1v2 { + compatible =3D "regulator-fixed"; + enable-active-high; + gpio =3D <&pca9670 5 GPIO_ACTIVE_HIGH>; + regulator-max-microvolt =3D <1200000>; + regulator-min-microvolt =3D <1200000>; + regulator-name =3D "cam-dvdd-1v2"; + vin-supply =3D <&vcc3v3_baseboard>; + }; + + vcc1v8_video: regulator-vcc1v8-video { + compatible =3D "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <1800000>; + regulator-min-microvolt =3D <1800000>; + regulator-name =3D "vcc1v8-video"; + vin-supply =3D <&vcc3v3_baseboard>; + }; + + vcc2v8_video: regulator-vcc2v8-video { + compatible =3D "regulator-fixed"; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt =3D <2800000>; + regulator-min-microvolt =3D <2800000>; + regulator-name =3D "vcc2v8-video"; + vin-supply =3D <&vcc3v3_baseboard>; + }; + + video-adapter-leds { + compatible =3D "gpio-leds"; + + video-adapter-led { + color =3D ; + gpios =3D <&pca9670 7 GPIO_ACTIVE_HIGH>; + label =3D "video-adapter-led"; + linux,default-trigger =3D "none"; + }; + }; +}; + +&dphy { + status =3D "okay"; +}; + +&i2c_gp2 { + #address-cells =3D <1>; + #size-cells =3D <0>; + /* OV5675, GT911, DW9714 are limited to 400KHz */ + clock-frequency =3D <400000>; + + touchscreen@14 { + compatible =3D "goodix,gt911"; + reg =3D <0x14>; + interrupt-parent =3D <&gpio1>; + interrupts =3D ; + irq-gpios =3D <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; + pinctrl-0 =3D <&touch_int>; + pinctrl-names =3D "default"; + reset-gpios =3D <&pca9670 1 GPIO_ACTIVE_HIGH>; + AVDD28-supply =3D <&vcc2v8_video>; + VDDIO-supply =3D <&vcc3v3_baseboard>; + }; + + pca9670: gpio@27 { + compatible =3D "nxp,pca9670"; + reg =3D <0x27>; + gpio-controller; + #gpio-cells =3D <2>; + pinctrl-0 =3D <&pca9670_resetn>; + pinctrl-names =3D "default"; + reset-gpios =3D <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>; + }; +}; + +&mipi_dsi { + #address-cells =3D <1>; + #size-cells =3D <0>; + status =3D "okay"; + + panel@0 { + compatible =3D "leadtek,ltk050h3148w"; + reg =3D <0>; + backlight =3D <&backlight>; + iovcc-supply =3D <&vcc1v8_video>; + reset-gpios =3D <&pca9670 0 GPIO_ACTIVE_LOW>; + vci-supply =3D <&vcc2v8_video>; + + port { + mipi_in_panel: endpoint { + remote-endpoint =3D <&mipi_out_panel>; + }; + }; + }; +}; + +&mipi_out { + mipi_out_panel: endpoint { + remote-endpoint =3D <&mipi_in_panel>; + }; +}; + +&pinctrl { + pca9670 { + pca9670_resetn: pca9670-resetn { + rockchip,pins =3D <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + touch { + touch_int: touch-int { + rockchip,pins =3D <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pwm1 { + status =3D "okay"; +}; \ No newline at end of file --=20 2.47.2