From nobody Wed Feb 11 02:13:32 2026 Received: from mail-pl1-f175.google.com (mail-pl1-f175.google.com [209.85.214.175]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 86907334C32 for ; Mon, 20 Oct 2025 20:22:58 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.214.175 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760991780; cv=none; b=ji8mPv3fBaArFCvrpmncuJpu5h6V5DXJetezX7gfjxkNTfCnnRwrvOSifCgHDtP3sW54sFtInUpK+YTSfy8P9wKujsB55U4AMCfF0DojVvAl9cuV0B8EgWOnkx1j7+6PCOx155CnAwbPscMeMsALDleTc6Ko4zME7een//tuhGk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760991780; c=relaxed/simple; bh=vcSFEpMi188ecJ1a+8U/vzSq8fWrIzbce5udSf1uoe0=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=F/x1fi+J/FThEZ3LsyM8TrO3P0jiWdQSgEmSMGlcqi3Euo2dDd88Wyc1Y6I5i2UtenTHlEuMMfbTxOV8hoyJ3nYQGJuZeGSpKSkSpFw4pBvCu6gO2CT0BJoQ6tx188MkRU1dop9pL/tOEDYwkgLHJqU1l9xSnOU+RA4LtTu3md4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rivosinc.com; spf=pass smtp.mailfrom=rivosinc.com; dkim=pass (2048-bit key) header.d=rivosinc.com header.i=@rivosinc.com header.b=XxfPOI9M; arc=none smtp.client-ip=209.85.214.175 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rivosinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=rivosinc.com header.i=@rivosinc.com header.b="XxfPOI9M" Received: by mail-pl1-f175.google.com with SMTP id d9443c01a7336-27ee41e0798so76139135ad.1 for ; Mon, 20 Oct 2025 13:22:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=rivosinc.com; s=google; t=1760991778; x=1761596578; darn=vger.kernel.org; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=kF1sb2xLtNJ95mXf4y9UUDJse6Qaa7/WyS6RZ/Me9sw=; b=XxfPOI9MJN9UY5fGh9Plxv9DBnD9x2MFUTfZdD99FqYhOvM4c6YwKrC50tnyoiiQnF uu3BYqEnGp+8VZrD8pAgZ7/odUIiExkeqc+4d77bQCsGh3A1pp5tGGgpihjqmIEaA6wt T4DPcWEaURvmzXQzw4bDq3nr4NiFR7txr/Bjp3exjCxlc7Hbv6GUrQCo7rBdsb/89m+6 hcrxSGXwklbqzNg4mMjHoz86RLvVPvJ/3jzS+yMNJ2uMqsJRKhPOnVRHkArpdoFY5Sz2 8UzziOQlkg1lK+kT4V+gbxVzv2h0G5rQBo7fp3Yl3lksoaw4MAyvrrCxJEiJ7suj7DLT DxSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760991778; x=1761596578; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=kF1sb2xLtNJ95mXf4y9UUDJse6Qaa7/WyS6RZ/Me9sw=; b=i86ZkCnZOgvlYyFyxJJVV/W59zinmNSxY1BOKFAOVl2yP4Op6smSmAXiAH14ZkqM1L w2PtnZtZZtY5dN4xF7gXZG4q5JqtjVfJKel1zvkMMkkq7IwquEiTskA97BljKqJZkUiu r96dalr+PbfcjXKr6umBjOoJ1c0Fp67niSqCfu+tyiN8HnQlsEXhNDyqXjzxokiin5DU FJ8p9CTybEZU+2svJyfQeqjSkZY43rXYE2WvbJ+X1EEf7b/FvX/la6n39ubYW25WLLEm OkXG7csOosOj3fF1LQWBTK5Y7bg5Asg8loKR3xWzdXVQkH2hB9THLg+KBWY3380P93dR 33Ag== X-Gm-Message-State: AOJu0YzMs2zoO+ss5koOKNK8aRQdY7Wl0h+nVtOYySzdLHzkG2Dmed6e tFJ6tsfboYJm1RlR3/yBzKHwRStE6G1rXu+IuE6UmAdZ/6oxyJ7y6YFq923zmh5rKGc= X-Gm-Gg: ASbGncty79WvX8Kqmo7EHuWo4qSP6u58c/RWPb1n9d4ixLhXKFoHSHh3GCjoEeocgpu ALsLDC0+tHbUtf5aWXGGw1lrf/OVKbET+hrWxpmvfaSGlYzXKWUn7I7JCxT1S61q5pTXGBxZBX+ EvXit9L5dnMZ9r6cf4kT/Gq09k2g31fvffrWh97bcZneDINzhpfW7aDyQ2n2sfO53p6t6n+vCOn hPZ868KbF/WZFY/qiATN3PkusPLlkEndKzzIXilO6w0B8wj/LYhx+Ke7JZnAIS19iVM+uFm069M jiGTXWKZHoEEQ7VLr2GtweRWDaxYkg6BDcx4mTaMsqrbEQPamSCWht5kYFiJbfFaajcbHBJM3+s jQDNZBxAuZe3LGIdVu4ZQcqr/GMDD+GQfvVdXNy10UVaYezbFSymoemfJybgYgNadC6bm6QYq23 2JNkoZG1adXg== X-Google-Smtp-Source: AGHT+IFjI+Eo/gAZahP1YhdcXcRCsIf19VRdgdLmzm3oNcVwOeVwlLY6tG5kcvmHgKRdDvnCUjEyIA== X-Received: by 2002:a17:903:98f:b0:277:3488:787e with SMTP id d9443c01a7336-290c9cf8e7fmr180686115ad.12.1760991777715; Mon, 20 Oct 2025 13:22:57 -0700 (PDT) Received: from debug.ba.rivosinc.com ([64.71.180.162]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b6a766745dasm8443240a12.14.2025.10.20.13.22.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Oct 2025 13:22:57 -0700 (PDT) From: Deepak Gupta Date: Mon, 20 Oct 2025 13:22:38 -0700 Subject: [PATCH v22 09/28] riscv/mm: write protect and shadow stack Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251020-v5_user_cfi_series-v22-9-66732256ad8f@rivosinc.com> References: <20251020-v5_user_cfi_series-v22-0-66732256ad8f@rivosinc.com> In-Reply-To: <20251020-v5_user_cfi_series-v22-0-66732256ad8f@rivosinc.com> To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , Dave Hansen , x86@kernel.org, "H. Peter Anvin" , Andrew Morton , "Liam R. Howlett" , Vlastimil Babka , Lorenzo Stoakes , Paul Walmsley , Palmer Dabbelt , Albert Ou , Conor Dooley , Rob Herring , Krzysztof Kozlowski , Arnd Bergmann , Christian Brauner , Peter Zijlstra , Oleg Nesterov , Eric Biederman , Kees Cook , Jonathan Corbet , Shuah Khan , Jann Horn , Conor Dooley , Miguel Ojeda , Alex Gaynor , Boqun Feng , Gary Guo , =?utf-8?q?Bj=C3=B6rn_Roy_Baron?= , Andreas Hindborg , Alice Ryhl , Trevor Gross , Benno Lossin Cc: linux-kernel@vger.kernel.org, linux-fsdevel@vger.kernel.org, linux-mm@kvack.org, linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-arch@vger.kernel.org, linux-doc@vger.kernel.org, linux-kselftest@vger.kernel.org, alistair.francis@wdc.com, richard.henderson@linaro.org, jim.shu@sifive.com, andybnac@gmail.com, kito.cheng@sifive.com, charlie@rivosinc.com, atishp@rivosinc.com, evan@rivosinc.com, cleger@rivosinc.com, alexghiti@rivosinc.com, samitolvanen@google.com, broonie@kernel.org, rick.p.edgecombe@intel.com, rust-for-linux@vger.kernel.org, Zong Li , Deepak Gupta X-Mailer: b4 0.13.0 `fork` implements copy on write (COW) by making pages readonly in child and parent both. ptep_set_wrprotect and pte_wrprotect clears _PAGE_WRITE in PTE. Assumption is that page is readable and on fault copy on write happens. To implement COW on shadow stack pages, clearing up W bit makes them XWR = =3D 000. This will result in wrong PTE setting which says no perms but V=3D1 and PFN field pointing to final page. Instead desired behavior is to turn it into a readable page, take an access (load/store) fault on sspush/sspop (shadow stack) and then perform COW on such pages. This way regular reads would still be allowed and not lead to COW maintaining current behavior of COW on non-shadow stack but writeable memory. On the other hand it doesn't interfere with existing COW for read-write memory. Assumption is always that _PAGE_READ must have been set and thus setting _PAGE_READ is harmless. Reviewed-by: Alexandre Ghiti Reviewed-by: Zong Li Signed-off-by: Deepak Gupta --- arch/riscv/include/asm/pgtable.h | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/riscv/include/asm/pgtable.h b/arch/riscv/include/asm/pgta= ble.h index b03e8f85221f..df4a04b64944 100644 --- a/arch/riscv/include/asm/pgtable.h +++ b/arch/riscv/include/asm/pgtable.h @@ -415,7 +415,7 @@ static inline int pte_special(pte_t pte) =20 static inline pte_t pte_wrprotect(pte_t pte) { - return __pte(pte_val(pte) & ~(_PAGE_WRITE)); + return __pte((pte_val(pte) & ~(_PAGE_WRITE)) | (_PAGE_READ)); } =20 /* static inline pte_t pte_mkread(pte_t pte) */ @@ -611,7 +611,15 @@ static inline pte_t ptep_get_and_clear(struct mm_struc= t *mm, static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep) { - atomic_long_and(~(unsigned long)_PAGE_WRITE, (atomic_long_t *)ptep); + pte_t read_pte =3D READ_ONCE(*ptep); + /* + * ptep_set_wrprotect can be called for shadow stack ranges too. + * shadow stack memory is XWR =3D 010 and thus clearing _PAGE_WRITE will = lead to + * encoding 000b which is wrong encoding with V =3D 1. This should lead t= o page fault + * but we dont want this wrong configuration to be set in page tables. + */ + atomic_long_set((atomic_long_t *)ptep, + ((pte_val(read_pte) & ~(unsigned long)_PAGE_WRITE) | _PAGE_READ)); } =20 #define __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH --=20 2.45.0