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[103.229.16.4]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-7a22ff34b8bsm7421705b3a.22.2025.10.20.00.12.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Oct 2025 00:12:36 -0700 (PDT) From: Yingchao Deng Date: Mon, 20 Oct 2025 15:12:00 +0800 Subject: [PATCH v5 1/2] coresight: cti: Convert trigger usage fields to dynamic bitmaps and arrays Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251020-extended_cti-v5-1-6f193da2d467@oss.qualcomm.com> References: <20251020-extended_cti-v5-0-6f193da2d467@oss.qualcomm.com> In-Reply-To: <20251020-extended_cti-v5-0-6f193da2d467@oss.qualcomm.com> To: Suzuki K Poulose , Mike Leach , James Clark , Alexander Shishkin Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Tingwei Zhang , quic_yingdeng@quicinc.com, Jinlong Mao , Yingchao Deng X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=ed25519-sha256; t=1760944348; l=11022; i=yingchao.deng@oss.qualcomm.com; s=20250721; h=from:subject:message-id; bh=I7qG9i4AzCKwppd/fhlD4h5td/0pETSBGvoJB8csxL4=; b=kYrfn+Tnqrcel/UQ/i+k5uW13SCgJBPw0RvrkzP/KKCiV8MaHlCbUPvp7SXWBycEof6dh7CSL YUvcXpeg3oMCIuIJZnwUIKMRkBZlYtF6QztP5qqyP9QZLSrGpDN6Itt X-Developer-Key: i=yingchao.deng@oss.qualcomm.com; a=ed25519; pk=1zkrZnKgKCu3VxiiiGfzpW3KL9RNP/qun1frl0ozUIc= X-Proofpoint-ORIG-GUID: YvPtIqHA9CMpPlW4jNdpxevmXN3hcUdF X-Proofpoint-GUID: YvPtIqHA9CMpPlW4jNdpxevmXN3hcUdF X-Authority-Analysis: v=2.4 cv=f+5FxeyM c=1 sm=1 tr=0 ts=68f5e0e6 cx=c_pps a=rz3CxIlbcmazkYymdCej/Q==:117 a=nuhDOHQX5FNHPW3J6Bj6AA==:17 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=qBB9sKLMsZVO1SgW7bQA:9 a=QEXdDO2ut3YA:10 a=bFCP_H2QrGi7Okbo017w:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDE4MDAyMyBTYWx0ZWRfX9p6UEXRmyNh8 2Iaj+a2cn6Cz/bzylfAudF0IdXuNT3KIOl1/9IUuaM0rmaqApoXpHaHDVUfSXmlOTvZnfkA84jZ dCtROIyVCR3tATdQX6tgpqu1vodUXzp5toYpXCFv6n4G+4+Gz3dDjutxvYBTGSvjj4gdosUAvP4 +KHkcILftL+De22GbdLcnfk3mEgTIZJM2Hl1UDvA2Qj/HnZkA3SCwF7IbsCkFvziMMIWOyDg/dD 3S0ImovuzNaxtBhrBqT0m2jnF0z0y/Y8nk/D8Kx9Gi42cr1eS40h1HZPDfAXeer0PqF1z9v+6Gs M1z8XO0sJz4utDdJ+a4h0vGAHYD5TUIUgH/HM0R/++mSrxFSmQBvHMKWIgpJXIzbXIag0M8laIF zZNpSeArqYbrZTl3D3ft99DvYO2+ng== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-20_02,2025-10-13_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 priorityscore=1501 impostorscore=0 suspectscore=0 adultscore=0 phishscore=0 bulkscore=0 clxscore=1015 spamscore=0 malwarescore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510180023 Replace the fixed-size u32 fields in the cti_config and cti_trig_grp structure with dynamically allocated bitmaps and arrays. This allows memory to be allocated based on the actual number of triggers during probe time, reducing memory footprint and improving scalability for platforms with varying trigger counts. Additionally, repack struct cti_config to reduce its size from 80 bytes to 72 bytes. Signed-off-by: Yingchao Deng Reviewed-by: Mike Leach --- drivers/hwtracing/coresight/coresight-cti-core.c | 58 ++++++++++++++++--= ---- .../hwtracing/coresight/coresight-cti-platform.c | 16 +++--- drivers/hwtracing/coresight/coresight-cti-sysfs.c | 10 ++-- drivers/hwtracing/coresight/coresight-cti.h | 17 ++++--- 4 files changed, 65 insertions(+), 36 deletions(-) diff --git a/drivers/hwtracing/coresight/coresight-cti-core.c b/drivers/hwt= racing/coresight/coresight-cti-core.c index 8fb30dd73fd2..8c9cec832898 100644 --- a/drivers/hwtracing/coresight/coresight-cti-core.c +++ b/drivers/hwtracing/coresight/coresight-cti-core.c @@ -214,8 +214,8 @@ void cti_write_intack(struct device *dev, u32 ackval) /* DEVID[19:16] - number of CTM channels */ #define CTI_DEVID_CTMCHANNELS(devid_val) ((int) BMVAL(devid_val, 16, 19)) =20 -static void cti_set_default_config(struct device *dev, - struct cti_drvdata *drvdata) +static int cti_set_default_config(struct device *dev, + struct cti_drvdata *drvdata) { struct cti_config *config =3D &drvdata->config; u32 devid; @@ -234,12 +234,33 @@ static void cti_set_default_config(struct device *dev, config->nr_trig_max =3D CTIINOUTEN_MAX; } =20 + config->trig_in_use =3D devm_bitmap_zalloc(dev, config->nr_trig_max, GFP_= KERNEL); + if (!config->trig_in_use) + return -ENOMEM; + + config->trig_out_use =3D devm_bitmap_zalloc(dev, config->nr_trig_max, GFP= _KERNEL); + if (!config->trig_out_use) + return -ENOMEM; + + config->trig_out_filter =3D devm_bitmap_zalloc(dev, config->nr_trig_max, = GFP_KERNEL); + if (!config->trig_out_filter) + return -ENOMEM; + + config->ctiinen =3D devm_kcalloc(dev, config->nr_trig_max, sizeof(u32), G= FP_KERNEL); + if (!config->ctiinen) + return -ENOMEM; + + config->ctiouten =3D devm_kcalloc(dev, config->nr_trig_max, sizeof(u32), = GFP_KERNEL); + if (!config->ctiouten) + return -ENOMEM; + config->nr_ctm_channels =3D CTI_DEVID_CTMCHANNELS(devid); =20 /* Most regs default to 0 as zalloc'ed except...*/ config->trig_filter_enable =3D true; config->ctigate =3D GENMASK(config->nr_ctm_channels - 1, 0); config->enable_req_count =3D 0; + return 0; } =20 /* @@ -270,8 +291,10 @@ int cti_add_connection_entry(struct device *dev, struc= t cti_drvdata *drvdata, cti_dev->nr_trig_con++; =20 /* add connection usage bit info to overall info */ - drvdata->config.trig_in_use |=3D tc->con_in->used_mask; - drvdata->config.trig_out_use |=3D tc->con_out->used_mask; + bitmap_or(drvdata->config.trig_in_use, drvdata->config.trig_in_use, + tc->con_in->used_mask, drvdata->config.nr_trig_max); + bitmap_or(drvdata->config.trig_out_use, drvdata->config.trig_out_use, + tc->con_out->used_mask, drvdata->config.nr_trig_max); =20 return 0; } @@ -293,12 +316,20 @@ struct cti_trig_con *cti_allocate_trig_con(struct dev= ice *dev, int in_sigs, if (!in) return NULL; =20 + in->used_mask =3D devm_bitmap_alloc(dev, in_sigs, GFP_KERNEL); + if (!in->used_mask) + return NULL; + out =3D devm_kzalloc(dev, offsetof(struct cti_trig_grp, sig_types[out_sigs]), GFP_KERNEL); if (!out) return NULL; =20 + out->used_mask =3D devm_bitmap_alloc(dev, out_sigs, GFP_KERNEL); + if (!out->used_mask) + return NULL; + tc->con_in =3D in; tc->con_out =3D out; tc->con_in->nr_sigs =3D in_sigs; @@ -314,7 +345,6 @@ int cti_add_default_connection(struct device *dev, stru= ct cti_drvdata *drvdata) { int ret =3D 0; int n_trigs =3D drvdata->config.nr_trig_max; - u32 n_trig_mask =3D GENMASK(n_trigs - 1, 0); struct cti_trig_con *tc =3D NULL; =20 /* @@ -325,8 +355,9 @@ int cti_add_default_connection(struct device *dev, stru= ct cti_drvdata *drvdata) if (!tc) return -ENOMEM; =20 - tc->con_in->used_mask =3D n_trig_mask; - tc->con_out->used_mask =3D n_trig_mask; + bitmap_fill(tc->con_in->used_mask, n_trigs); + bitmap_fill(tc->con_out->used_mask, n_trigs); + ret =3D cti_add_connection_entry(dev, drvdata, tc, NULL, "default"); return ret; } @@ -339,7 +370,6 @@ int cti_channel_trig_op(struct device *dev, enum cti_ch= an_op op, { struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct cti_config *config =3D &drvdata->config; - u32 trig_bitmask; u32 chan_bitmask; u32 reg_value; int reg_offset; @@ -349,18 +379,16 @@ int cti_channel_trig_op(struct device *dev, enum cti_= chan_op op, (trigger_idx >=3D config->nr_trig_max)) return -EINVAL; =20 - trig_bitmask =3D BIT(trigger_idx); - /* ensure registered triggers and not out filtered */ if (direction =3D=3D CTI_TRIG_IN) { - if (!(trig_bitmask & config->trig_in_use)) + if (!(test_bit(trigger_idx, config->trig_in_use))) return -EINVAL; } else { - if (!(trig_bitmask & config->trig_out_use)) + if (!(test_bit(trigger_idx, config->trig_out_use))) return -EINVAL; =20 if ((config->trig_filter_enable) && - (config->trig_out_filter & trig_bitmask)) + test_bit(trigger_idx, config->trig_out_filter)) return -EINVAL; } =20 @@ -891,7 +919,9 @@ static int cti_probe(struct amba_device *adev, const st= ruct amba_id *id) raw_spin_lock_init(&drvdata->spinlock); =20 /* initialise CTI driver config values */ - cti_set_default_config(dev, drvdata); + ret =3D cti_set_default_config(dev, drvdata); + if (ret) + return ret; =20 pdata =3D coresight_cti_get_platform_data(dev); if (IS_ERR(pdata)) { diff --git a/drivers/hwtracing/coresight/coresight-cti-platform.c b/drivers= /hwtracing/coresight/coresight-cti-platform.c index d0ae10bf6128..4bef860a0484 100644 --- a/drivers/hwtracing/coresight/coresight-cti-platform.c +++ b/drivers/hwtracing/coresight/coresight-cti-platform.c @@ -136,8 +136,8 @@ static int cti_plat_create_v8_etm_connection(struct dev= ice *dev, goto create_v8_etm_out; =20 /* build connection data */ - tc->con_in->used_mask =3D 0xF0; /* sigs <4,5,6,7> */ - tc->con_out->used_mask =3D 0xF0; /* sigs <4,5,6,7> */ + bitmap_set(tc->con_in->used_mask, 4, 4); /* sigs <4,5,6,7> */ + bitmap_set(tc->con_out->used_mask, 4, 4); /* sigs <4,5,6,7> */ =20 /* * The EXTOUT type signals from the ETM are connected to a set of input @@ -194,10 +194,10 @@ static int cti_plat_create_v8_connections(struct devi= ce *dev, goto of_create_v8_out; =20 /* Set the v8 PE CTI connection data */ - tc->con_in->used_mask =3D 0x3; /* sigs <0 1> */ + bitmap_set(tc->con_in->used_mask, 0, 2); /* sigs <0 1> */ tc->con_in->sig_types[0] =3D PE_DBGTRIGGER; tc->con_in->sig_types[1] =3D PE_PMUIRQ; - tc->con_out->used_mask =3D 0x7; /* sigs <0 1 2 > */ + bitmap_set(tc->con_out->used_mask, 0, 3); /* sigs <0 1 2 > */ tc->con_out->sig_types[0] =3D PE_EDBGREQ; tc->con_out->sig_types[1] =3D PE_DBGRESTART; tc->con_out->sig_types[2] =3D PE_CTIIRQ; @@ -213,7 +213,7 @@ static int cti_plat_create_v8_connections(struct device= *dev, goto of_create_v8_out; =20 /* filter pe_edbgreq - PE trigout sig <0> */ - drvdata->config.trig_out_filter |=3D 0x1; + set_bit(0, drvdata->config.trig_out_filter); =20 of_create_v8_out: return ret; @@ -257,7 +257,7 @@ static int cti_plat_read_trig_group(struct cti_trig_grp= *tgrp, if (!err) { /* set the signal usage mask */ for (idx =3D 0; idx < tgrp->nr_sigs; idx++) - tgrp->used_mask |=3D BIT(values[idx]); + set_bit(values[idx], tgrp->used_mask); } =20 kfree(values); @@ -331,7 +331,9 @@ static int cti_plat_process_filter_sigs(struct cti_drvd= ata *drvdata, =20 err =3D cti_plat_read_trig_group(tg, fwnode, CTI_DT_FILTER_OUT_SIGS); if (!err) - drvdata->config.trig_out_filter |=3D tg->used_mask; + bitmap_or(drvdata->config.trig_out_filter, + drvdata->config.trig_out_filter, + tg->used_mask, drvdata->config.nr_trig_max); =20 kfree(tg); return err; diff --git a/drivers/hwtracing/coresight/coresight-cti-sysfs.c b/drivers/hw= tracing/coresight/coresight-cti-sysfs.c index 572b80ee96fb..a9df77215141 100644 --- a/drivers/hwtracing/coresight/coresight-cti-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-cti-sysfs.c @@ -711,10 +711,8 @@ static ssize_t trigout_filtered_show(struct device *de= v, struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct cti_config *cfg =3D &drvdata->config; int size =3D 0, nr_trig_max =3D cfg->nr_trig_max; - unsigned long mask =3D cfg->trig_out_filter; =20 - if (mask) - size =3D bitmap_print_to_pagebuf(true, buf, &mask, nr_trig_max); + size =3D bitmap_print_to_pagebuf(true, buf, cfg->trig_out_filter, nr_trig= _max); return size; } static DEVICE_ATTR_RO(trigout_filtered); @@ -926,9 +924,8 @@ static ssize_t trigin_sig_show(struct device *dev, struct cti_trig_con *con =3D (struct cti_trig_con *)ext_attr->var; struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct cti_config *cfg =3D &drvdata->config; - unsigned long mask =3D con->con_in->used_mask; =20 - return bitmap_print_to_pagebuf(true, buf, &mask, cfg->nr_trig_max); + return bitmap_print_to_pagebuf(true, buf, con->con_in->used_mask, cfg->nr= _trig_max); } =20 static ssize_t trigout_sig_show(struct device *dev, @@ -940,9 +937,8 @@ static ssize_t trigout_sig_show(struct device *dev, struct cti_trig_con *con =3D (struct cti_trig_con *)ext_attr->var; struct cti_drvdata *drvdata =3D dev_get_drvdata(dev->parent); struct cti_config *cfg =3D &drvdata->config; - unsigned long mask =3D con->con_out->used_mask; =20 - return bitmap_print_to_pagebuf(true, buf, &mask, cfg->nr_trig_max); + return bitmap_print_to_pagebuf(true, buf, con->con_out->used_mask, cfg->n= r_trig_max); } =20 /* convert a sig type id to a name */ diff --git a/drivers/hwtracing/coresight/coresight-cti.h b/drivers/hwtracin= g/coresight/coresight-cti.h index 8362a47c939c..0bd71407ef34 100644 --- a/drivers/hwtracing/coresight/coresight-cti.h +++ b/drivers/hwtracing/coresight/coresight-cti.h @@ -68,7 +68,7 @@ struct fwnode_handle; */ struct cti_trig_grp { int nr_sigs; - u32 used_mask; + unsigned long *used_mask; int sig_types[]; }; =20 @@ -146,20 +146,21 @@ struct cti_config { bool hw_enabled; bool hw_powered; =20 - /* registered triggers and filtering */ - u32 trig_in_use; - u32 trig_out_use; - u32 trig_out_filter; bool trig_filter_enable; u8 xtrig_rchan_sel; =20 /* cti cross trig programmable regs */ - u32 ctiappset; u8 ctiinout_sel; - u32 ctiinen[CTIINOUTEN_MAX]; - u32 ctiouten[CTIINOUTEN_MAX]; + u32 ctiappset; u32 ctigate; u32 asicctl; + u32 *ctiinen; + u32 *ctiouten; + + /* registered triggers and filtering */ + unsigned long *trig_in_use; + unsigned long *trig_out_use; + unsigned long *trig_out_filter; }; =20 /** --=20 2.43.0