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charset="utf-8" Consistently use INTx, as in the description of IrqType::Intx, to refer to the four legacy PCI interrupts, INTA#, INTB#, INTC#, and INTD#. Link: https://lore.kernel.org/rust-for-linux/20251015230209.GA960343@bhelga= as/ Link: https://github.com/Rust-for-Linux/linux/issues/1196 Suggested-by: Bjorn Helgaas Signed-off-by: Peter Colberg --- rust/kernel/pci.rs | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/rust/kernel/pci.rs b/rust/kernel/pci.rs index d91ec9f008ae..18f9b92a745e 100644 --- a/rust/kernel/pci.rs +++ b/rust/kernel/pci.rs @@ -56,7 +56,7 @@ const fn as_raw(self) -> u32 { pub struct IrqTypes(u32); =20 impl IrqTypes { - /// Create a set containing all IRQ types (MSI-X, MSI, and Legacy). + /// Create a set containing all IRQ types (MSI-X, MSI, and INTx). pub const fn all() -> Self { Self(bindings::PCI_IRQ_ALL_TYPES) } @@ -66,7 +66,7 @@ pub const fn all() -> Self { /// # Examples /// /// ```ignore - /// // Create a set with only MSI and MSI-X (no legacy interrupts). + /// // Create a set with only MSI and MSI-X (no INTx interrupts). /// let msi_only =3D IrqTypes::default() /// .with(IrqType::Msi) /// .with(IrqType::MsiX); @@ -722,9 +722,9 @@ pub fn request_threaded_irq<'a, T: crate::irq::Threaded= Handler + 'static>( /// Allocate IRQ vectors for this PCI device with automatic cleanup. /// /// Allocates between `min_vecs` and `max_vecs` interrupt vectors for = the device. - /// The allocation will use MSI-X, MSI, or legacy interrupts based on = the `irq_types` + /// The allocation will use MSI-X, MSI, or INTx interrupts based on th= e `irq_types` /// parameter and hardware capabilities. When multiple types are speci= fied, the kernel - /// will try them in order of preference: MSI-X first, then MSI, then = legacy interrupts. + /// will try them in order of preference: MSI-X first, then MSI, then = INTx interrupts. /// /// The allocated vectors are automatically freed when the device is u= nbound, using the /// devres (device resource management) system. @@ -748,7 +748,7 @@ pub fn request_threaded_irq<'a, T: crate::irq::Threaded= Handler + 'static>( /// // Allocate using any available interrupt type in the order mentio= ned above. /// let vectors =3D dev.alloc_irq_vectors(1, 32, pci::IrqTypes::all())= ?; /// - /// // Allocate MSI or MSI-X only (no legacy interrupts). + /// // Allocate MSI or MSI-X only (no INTx interrupts). /// let msi_only =3D pci::IrqTypes::default() /// .with(pci::IrqType::Msi) /// .with(pci::IrqType::MsiX); --=20 2.51.0 From nobody Sat Feb 7 09:42:36 2026 Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 9F27421772A for ; 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charset="utf-8" Consistently refer to PCI base address register as PCI BAR. Fix spelling mistake "Mapps" -> "Maps". Link: https://lore.kernel.org/rust-for-linux/20251015225827.GA960157@bhelga= as/ Link: https://github.com/Rust-for-Linux/linux/issues/1196 Suggested-by: Bjorn Helgaas Signed-off-by: Peter Colberg --- rust/kernel/pci.rs | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/rust/kernel/pci.rs b/rust/kernel/pci.rs index 18f9b92a745e..747a0487d1e5 100644 --- a/rust/kernel/pci.rs +++ b/rust/kernel/pci.rs @@ -363,7 +363,7 @@ pub struct Device( /// # Invariants /// /// `Bar` always holds an `IoRaw` inststance that holds a valid pointer to= the start of the I/O -/// memory mapped PCI bar and its size. +/// memory mapped PCI BAR and its size. pub struct Bar { pdev: ARef, io: IoRaw, @@ -423,7 +423,7 @@ fn new(pdev: &Device, num: u32, name: &CStr) -> Result<= Self> { =20 /// # Safety /// - /// `ioptr` must be a valid pointer to the memory mapped PCI bar numbe= r `num`. + /// `ioptr` must be a valid pointer to the memory mapped PCI BAR numbe= r `num`. unsafe fn do_release(pdev: &Device, ioptr: usize, num: i32) { // SAFETY: // `pdev` is valid by the invariants of `Device`. @@ -537,7 +537,7 @@ pub fn subsystem_device_id(&self) -> u16 { unsafe { (*self.as_raw()).subsystem_device } } =20 - /// Returns the start of the given PCI bar resource. + /// Returns the start of the given PCI BAR resource. pub fn resource_start(&self, bar: u32) -> Result { if !Bar::index_is_valid(bar) { return Err(EINVAL); @@ -549,7 +549,7 @@ pub fn resource_start(&self, bar: u32) -> Result { Ok(unsafe { bindings::pci_resource_start(self.as_raw(), bar.try_in= to()?) }) } =20 - /// Returns the size of the given PCI bar resource. + /// Returns the size of the given PCI BAR resource. pub fn resource_len(&self, bar: u32) -> Result { if !Bar::index_is_valid(bar) { return Err(EINVAL); @@ -656,7 +656,7 @@ fn drop(&mut self) { } =20 impl Device { - /// Mapps an entire PCI-BAR after performing a region-request on it. I= /O operation bound checks + /// Maps an entire PCI BAR after performing a region-request on it. I/= O operation bound checks /// can be performed on compile time for offsets (plus the requested t= ype size) < SIZE. pub fn iomap_region_sized<'a, const SIZE: usize>( &'a self, @@ -666,7 +666,7 @@ pub fn iomap_region_sized<'a, const SIZE: usize>( Devres::new(self.as_ref(), Bar::::new(self, bar, name)) } =20 - /// Mapps an entire PCI-BAR after performing a region-request on it. + /// Maps an entire PCI BAR after performing a region-request on it. pub fn iomap_region<'a>( &'a self, bar: u32, --=20 2.51.0