From nobody Sun Feb 8 04:33:58 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C843622F74D for ; Sun, 19 Oct 2025 07:57:00 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760860622; cv=none; b=W56jWeVd5rnjP0ulgUQdfGkaokLPIwH5qOuNXfPL/dQZMdbuRTWYQWFhiMd/7GKapVx0MfX8AB6sDDWzqE87DheK9piaM0PAY+fJRorkf8tdAbn3u44daTB7QnVFhSoJVnwXrgQM1nVvwkSelIwenEY60Y/lwz3UAbrgmLlpu74= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760860622; c=relaxed/simple; bh=ldL9oE1EfZtAElQ9+XdqptYGe8dQAepD7NU7eZWefTg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OaB2Lhe6rLDyGLgNWKIJDs0xyKUj9vKqAxuc9kuWfXGYoHLZUmHjqDZ637QxI1CR90Xe2a/N0yDbUrTEoI+jUbvHppVt62Q+TCy9lv/Zldoev2C/PyObHZ+IsCO1j8y/ETp2JDe1jHoKdd7gpWgH67nqFhWDoRqFV/CQHCrQuaE= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=TSHWvnFy; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="TSHWvnFy" Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 59J6gN2f002342 for ; Sun, 19 Oct 2025 07:57:00 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 9sFi95zbIL6V8R4aDxrgHCEKkWfw05sk4v9zJGzSxic=; b=TSHWvnFy6bucr1QB hv73IVe1GeodSDe7CwOBz7zhb8R2pq6fDsLaPb65l83rApoGsZg+temsxMr/YNO4 5KeyXWSBr6eV2B+zbUf7EyyzStWrmUtpm15gEcF9+l+D8ETisqEAwPvx1lyOElZk Rk5kd5MWv1xzqPO3ltkoeNoz1r6M6hRXMTlI/0t31kUBbSjiXWoNDRDsmly9ORmJ dlIJCIaWc8SQvcbDff1tDWmjrxA4Rg/G8zVrUMkEkyHRTvx+CMWtQasgJPGvMJxh oDbhUlMv6I3e8jo8P9TXl0ZL2BDJrH0EbxZGCXWDDObbjofDj2HnzC15VBp3Y/hh j7Jtsw== Received: from mail-qv1-f70.google.com (mail-qv1-f70.google.com [209.85.219.70]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 49v42k1vu1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Sun, 19 Oct 2025 07:56:59 +0000 (GMT) Received: by mail-qv1-f70.google.com with SMTP id 6a1803df08f44-87c247591ddso83697856d6.1 for ; Sun, 19 Oct 2025 00:56:59 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760860618; x=1761465418; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9sFi95zbIL6V8R4aDxrgHCEKkWfw05sk4v9zJGzSxic=; b=a6AEUjlbS5QirQ+wZUE452xxgY6fKSVgXOFSt56N1Zs2H9CAaUW/lMGr211ZjYlfbN R1TjXvQLkZrpIuvgWgvzu8LOnqtq9gkPdtuFJsDKmfLOdXEtGr+1YRka+JIlP2+iFX2C xdAQMoXTMFTIt2a1IipOI/G0m189yecZOma3tgq16eVAXN0MvoE3eesvabJa5g4DNgvp /gnYEYEOSyyxEclMnuJtcvM5N5Vst74Bm+ClypB9yTPt+L3VLG39Mjmj1nr4pNpWDcmB flaoNt4hLhBnSMMVUcsM3TyIFNFAwmTunyqyfM1NOhPoEwDfpEDMm+L1U/5+/12fSKYS tsUw== X-Forwarded-Encrypted: i=1; AJvYcCXaPDa7EoT9tF9bKlzm65jDD5z8wg5r1QGuMvr9yAxFkngULADWTRAEpROZjtC1O05nJZPKjvYJ2g2PrVI=@vger.kernel.org X-Gm-Message-State: AOJu0YyQKWM90DbIsgbnAMDMTE9VqDCgGY4zFEs3UzmL+mNO80VBD+LI jNOxfbegdNKxt1kqfsVP0KaXVNhKQeydOBwfzWktUltfVuJ9NSr9OVB/fnvCZSE3484u3ICgK/o TZkrw/nWJ4Df9rGP84NsYFp721G6fXZRWrOY8JcNB2EP3qngyMZ4PkcEI7d8cvfTiTlQ= X-Gm-Gg: ASbGncu5XeGE8g7esUVtzgKgunYO/7eGf2ulhw7FGy3m4kcslzONEBBwOVUSUM5GJ2U hLuQq7rvEHkHYhimS9oVTJlgyWe2heegknZrgx3nL+xIPEaHAV3jHg6hTJUd1kU+qOEanSH8VW2 VDdgv0bC0aL+nV9nDWUNyHElczzbQMiU7sjKO9FYnU49IyRrEnvN60aOkK/o5C3hZlcRMqTYDle EP2iOFleGCvinQhz4dW0VWXrLD98g7Cx2/2m998k1v/yO6XNNDz9hFtlpvmgvbIubQjCNI3m1lB /wBLu9M0vV4FKEA80dLJLOhBXgaBnor/kHDzgeKMwFld0jFDp1GVzF4Rku7Df9ajT7hxI9quVCt X5U0+Rvqm8ZTG88yupitMGoQzFhXQblwTLlu427ucEQqQ+c7s+fCZFEnZDhjmSL73TB5Kml2AGG ZnDoSSRd9y2sY= X-Received: by 2002:a05:622a:1492:b0:4e8:9704:7c83 with SMTP id d75a77b69052e-4e89d1fb9eemr122031021cf.14.1760860618378; Sun, 19 Oct 2025 00:56:58 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHoUwsBVTbVSq1ZnvMoPl2qAM7/2X/maYXG5jy1Td8s9rFPfC/tSWqOtBZjW+m2yGB/AZOm5Q== X-Received: by 2002:a05:622a:1492:b0:4e8:9704:7c83 with SMTP id d75a77b69052e-4e89d1fb9eemr122030851cf.14.1760860617914; Sun, 19 Oct 2025 00:56:57 -0700 (PDT) Received: from umbar.lan (2001-14ba-a0c3-3a00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a0c3:3a00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-591deeaf4cesm1357027e87.30.2025.10.19.00.56.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Oct 2025 00:56:56 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 19 Oct 2025 10:56:48 +0300 Subject: [PATCH v4 1/6] media: iris: turn platform caps into constants Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251019-iris-sc7280-v4-1-ee6dcee6e741@oss.qualcomm.com> References: <20251019-iris-sc7280-v4-0-ee6dcee6e741@oss.qualcomm.com> In-Reply-To: <20251019-iris-sc7280-v4-0-ee6dcee6e741@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Konrad Dybcio Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Bryan O'Donoghue X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=5023; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=ldL9oE1EfZtAElQ9+XdqptYGe8dQAepD7NU7eZWefTg=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBo9JnDV5rfPEOB0okpTrdiYR93+p6wO1DWKasqW GNAHOYCHh+JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCaPSZwwAKCRCLPIo+Aiko 1XqJB/9W//9yBpFWe/ZIXG8wk2DcbmLXxa0NJyrEJgNgABKUgBI5lf26RUARp7o/p+1MSHy203A +dXdANWjHQahHq2FGsdzvX3e/TPN6RzJmP6tIfpfVtKRtp0181MXvaHtLi43yLMeVBKhfDMK6FK vJshOiGUPNHt0z+QnOhlMvLSp02dzS29VWKwZsTVAp0RGN5bxTezxHVnRVARrDZ62b3af5984/B h1M315dTdKbl+o4XaooJZ/zQdMtPlhI2ZgtXbJxWXVz45HNFSwc8JXKNLV4iygkklKtxNORrX+T hufpbB9E13yV07xEfi3sgajB8fwXQcvjAh8yVsRQZ2fV7P3N X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-GUID: wFmae6ifWRaD-QtXY1jBBH08Ccs0_mlz X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDE4MDAzMSBTYWx0ZWRfX4oYFHXGz+di3 VQFTW/BpFE2zV9PPNRLQVFbtMz9sr7s1Am9JSnrPnFnNj6D+9IISKcZ04tc9RJ4MXkUHKRAYmPF ci8TDFHa6xm5ha8tmpFeW6kv6uN6spr/qKkTuhWHSTl0W+Gp6+S3BYn4I20pHTl1THpefrzIhUe N3S643rjbSQMANpMn+SCUd9V+izmN2rIUZgABrGQlp3vXhqoOG/IYZMy48lFOhTP2HThIPyyBqO 1m3vnHC3T+paeDOPkKGXyy7VjJsSEBQFsWObiqK/e3nBKIoFrl7qh5wnC7s59+kSdrxygeACucX bq8nivhYOpKhdDPepJfUp5cThDVvwEBqfRK//AeKovxy4u7ep163C5T9o2eGF3hSPktVLjxQfQI cIX0Jc+ox7B//93Ply4hLi1Bp802gA== X-Authority-Analysis: v=2.4 cv=QYNrf8bv c=1 sm=1 tr=0 ts=68f499cb cx=c_pps a=oc9J++0uMp73DTRD5QyR2A==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=4lT8O_Qwe5KXetiC_XUA:9 a=QEXdDO2ut3YA:10 a=iYH6xdkBrDN1Jqds4HTS:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: wFmae6ifWRaD-QtXY1jBBH08Ccs0_mlz X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-19_03,2025-10-13_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 phishscore=0 malwarescore=0 clxscore=1015 impostorscore=0 spamscore=0 bulkscore=0 suspectscore=0 adultscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510180031 Make all struct platform_inst_fw_cap instances constant, they are not modified at runtime. Reviewed-by: Bryan O'Donoghue Reviewed-by: Dikshita Agarwal Reviewed-by: Vikash Garodia Signed-off-by: Dmitry Baryshkov --- drivers/media/platform/qcom/iris/iris_ctrls.c | 2 +- drivers/media/platform/qcom/iris/iris_platform_common.h | 4 ++-- drivers/media/platform/qcom/iris/iris_platform_gen2.c | 4 ++-- drivers/media/platform/qcom/iris/iris_platform_qcs8300.h | 4 ++-- drivers/media/platform/qcom/iris/iris_platform_sm8250.c | 4 ++-- 5 files changed, 9 insertions(+), 9 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.c b/drivers/media/= platform/qcom/iris/iris_ctrls.c index 754a5ad718bc37630bb861012301df7a2e7342a1..9da050aa1f7ce8152dfa46a706e= 2c27adfb5d6ce 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.c +++ b/drivers/media/platform/qcom/iris/iris_ctrls.c @@ -301,7 +301,7 @@ int iris_ctrls_init(struct iris_inst *inst) =20 void iris_session_init_caps(struct iris_core *core) { - struct platform_inst_fw_cap *caps; + const struct platform_inst_fw_cap *caps; u32 i, num_cap, cap_id; =20 caps =3D core->iris_platform_data->inst_fw_caps_dec; diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index 58d05e0a112eed25faea027a34c719c89d6c3897..17ed86bf78bb3b0bc3f0862253f= ba6505ac3d164 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -215,9 +215,9 @@ struct iris_platform_data { const char *fwname; u32 pas_id; struct platform_inst_caps *inst_caps; - struct platform_inst_fw_cap *inst_fw_caps_dec; + const struct platform_inst_fw_cap *inst_fw_caps_dec; u32 inst_fw_caps_dec_size; - struct platform_inst_fw_cap *inst_fw_caps_enc; + const struct platform_inst_fw_cap *inst_fw_caps_enc; u32 inst_fw_caps_enc_size; struct tz_cp_config *tz_cp_config_data; u32 core_arch; diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/driver= s/media/platform/qcom/iris/iris_platform_gen2.c index 36d69cc73986b74534a2912524c8553970fd862e..cbf38e13f89e5c4c46e759fbb86= 777854d751552 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -19,7 +19,7 @@ #define VIDEO_ARCH_LX 1 #define BITRATE_MAX 245000000 =20 -static struct platform_inst_fw_cap inst_fw_cap_sm8550_dec[] =3D { +static const struct platform_inst_fw_cap inst_fw_cap_sm8550_dec[] =3D { { .cap_id =3D PROFILE_H264, .min =3D V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, @@ -203,7 +203,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_d= ec[] =3D { }, }; =20 -static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] =3D { +static const struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] =3D { { .cap_id =3D PROFILE_H264, .min =3D V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, diff --git a/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h b/dri= vers/media/platform/qcom/iris/iris_platform_qcs8300.h index 35ea0efade73caa687d300779c5b1dc3b17a0128..87517361a1cf4b6fe53b8a14831= 88670df52c7e7 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h +++ b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h @@ -5,7 +5,7 @@ =20 #define BITRATE_MAX 245000000 =20 -static struct platform_inst_fw_cap inst_fw_cap_qcs8300_dec[] =3D { +static const struct platform_inst_fw_cap inst_fw_cap_qcs8300_dec[] =3D { { .cap_id =3D PROFILE_H264, .min =3D V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, @@ -189,7 +189,7 @@ static struct platform_inst_fw_cap inst_fw_cap_qcs8300_= dec[] =3D { }, }; =20 -static struct platform_inst_fw_cap inst_fw_cap_qcs8300_enc[] =3D { +static const struct platform_inst_fw_cap inst_fw_cap_qcs8300_enc[] =3D { { .cap_id =3D PROFILE_H264, .min =3D V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8250.c b/driv= ers/media/platform/qcom/iris/iris_platform_sm8250.c index 16486284f8acccf6a95a27f6003e885226e28f4d..e29cba993fde922b579eb7e5a59= ae34bb46f9f0f 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_sm8250.c +++ b/drivers/media/platform/qcom/iris/iris_platform_sm8250.c @@ -17,7 +17,7 @@ #define BITRATE_PEAK_DEFAULT (BITRATE_DEFAULT * 2) #define BITRATE_STEP 100 =20 -static struct platform_inst_fw_cap inst_fw_cap_sm8250_dec[] =3D { +static const struct platform_inst_fw_cap inst_fw_cap_sm8250_dec[] =3D { { .cap_id =3D PIPE, .min =3D PIPE_1, @@ -38,7 +38,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8250_dec= [] =3D { }, }; =20 -static struct platform_inst_fw_cap inst_fw_cap_sm8250_enc[] =3D { +static const struct platform_inst_fw_cap inst_fw_cap_sm8250_enc[] =3D { { .cap_id =3D STAGE, .min =3D STAGE_1, --=20 2.47.3 From nobody Sun Feb 8 04:33:58 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C854E23371B for ; Sun, 19 Oct 2025 07:57:02 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760860624; cv=none; b=cqb/FYGdimbo8v+at2ddbYPPBoi5kREgqkHOPTwQVMGsUud29EQU3fqJHSLdz8X2fZHV8gG52Rgt7MnF88cisOHTUyOktz1JOHY9RQ6eUfupfqYc/UkJd3njqo5NKrXE8sYny9bh5DoCNjB6SRJMIO3B+Q5Y47+LgqCi9qb0s0A= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760860624; c=relaxed/simple; bh=QlGdzJciH1h4gz5Q1SzqSd8IKkSpeYMEZtL7i2pFW/A=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=dP1Z/rOX+NVSivtBEfKIj2tbonsd7SmYrXhuPOsFGl+fqXIVL52xqfkQ9ZE+FYFlmiGPC09dCGBnzd5k6VX/EYTdteQCLI7hiUGvQYb1hsO7hTVnf2d2Jb6a1NRopZLmtLep3H8km38qxal1Et7LM+WJKZRslbmlyMMFolqgmKU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=eYD1yL3y; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="eYD1yL3y" Received: from pps.filterd (m0279862.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 59J3NVR3003367 for ; Sun, 19 Oct 2025 07:57:02 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= p9c7rVUQ+8XQDwfJNgLXJyZIItXH+75/qbByZsGVfLU=; b=eYD1yL3yeg0p1FPL QHVsiuOImEeGI2T+ihBXdOEdMWtNNlVDg6iS+DDbp18wBQQUtbrbtUTHf5x5+LJY MxKa0meoG2iu+WrfXVF0rmOFZZpTsTeI/EF6UrsM7MKrZXsAA82XOBAq1QcrMS9s t0OZwu0DJ3L+CMU8u/tb4WJA/pPShu6MpbTQs5MyyxLBpyjZ9rsPqXbKazYUHvSc Qs9K43gN3JQEQi5/ux1yY3mzwfKOykjJnzbK6X6AFR9A0m18u34LcVpFg5dNZKN4 fQPk1+kQyHbNjudmZdDB0nqYN6VKOYE7bpwPJigv94ZW8++jlKC046qhVajkjfwV xJuRWA== Received: from mail-qv1-f71.google.com (mail-qv1-f71.google.com [209.85.219.71]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 49v3nf9xdu-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Sun, 19 Oct 2025 07:57:02 +0000 (GMT) Received: by mail-qv1-f71.google.com with SMTP id 6a1803df08f44-87c1558a74aso168733506d6.2 for ; Sun, 19 Oct 2025 00:57:01 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760860620; x=1761465420; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=p9c7rVUQ+8XQDwfJNgLXJyZIItXH+75/qbByZsGVfLU=; b=h7l9zuCaP2JCzFvQjnUhJLLBMW2iggyDm9noHc9Bm5NTqb7Pchl/UUprkvBSAZnXBJ AmXUGSB/0wzUYNP+tqkLWjxbp3QTShOtH6+JSQuvA45ZevC24oQs6JJw2y+qrau3W7ey AqeIB09hg8nCAo9wvGc1qSluaYeeL+NAnWypvVLy3ixnIP407kaB8w4A31lVrRR0R7wY ii9PEqOyxTVFuuupl9MRuLkJTmBT09qOpB1X8xbzDf7QjXlLYmULWbOiS8JFyah38vk2 qBowtzWBysJYmccLoVnjmYJWfiQcaZUIr8a67k8GqJTuuqy2+aG5JU96AntezUuzCx2Q PKCw== X-Forwarded-Encrypted: i=1; AJvYcCVgKTvhPNjGxjprEOH75Drj158C7cHClTJrv0+dVbn7X46LE1OK6AWT+2QgDgoUzbvOiHd60FGiYAQFQhk=@vger.kernel.org X-Gm-Message-State: AOJu0Yxp7LXAGUbQGdfbXYPAQih3VBkaY39gNdDX+3pttBnEx9VazaTL cDmrAgIQcFh8eh5ZtCehITiWZA2tUrEYpIpvCs2axY5VLTk6dtdXYRv1V+HF1adQaWigz/rF2TG sjlmafM2LPpMv6oNWRT0mIapzRQVd/7rgCZKttI04QdF5O5DER+7yTpvYcXABUapKG1pm8JeQha 0= X-Gm-Gg: ASbGncuTSSkZDfaO2mSTSRSa9cO2Qr7SgGsUO/1Zk/JuY8a34m8Inh3tvUySwu2jKD6 XlpFT6maOMXRuzjRjEXKwS45pvLS6TYWTg8ZKEcqQpafLjTfYtT375mfZ7lduIAOsKaWqenXMjd GBA5D1F3ZxCacZYKgVTbbDiLBEULFl7gN8jKNXv7EjgCcpswGEylvH4x+LpmIxlDvMeNWnsKH3P bzw7Cpur9sMJLb3hrtwncM+0F/JyT93AreVI6N4B1SWaMMJyYMk2qjtDchUbJA1rnLczgEifXyn 3lYFUZKxNmElmz1ABK1qTc0+zOKBkbDxAhwn/qdk7XSoG8/DNiXh+ufFTe5Lh6AVxMOiXm33D7K rCNk/ybHHzquKwCcM6V7kOXBDKZYThbySZmfoVwMgiXCnl/mg+7wNYjObDJ8gDFifWGVuzRT3qM iEdUCykTSWD58= X-Received: by 2002:a05:622a:11c6:b0:4e8:9c58:3283 with SMTP id d75a77b69052e-4e89d2976d2mr149921651cf.33.1760860620471; Sun, 19 Oct 2025 00:57:00 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFBT/JGLHhnA0pOKRiG1vcO25nwlo8WWyYXAEig0c5KOlC4TxFjLNtH3p4yEXMlLHugw2n/WQ== X-Received: by 2002:a05:622a:11c6:b0:4e8:9c58:3283 with SMTP id d75a77b69052e-4e89d2976d2mr149921491cf.33.1760860620046; Sun, 19 Oct 2025 00:57:00 -0700 (PDT) Received: from umbar.lan (2001-14ba-a0c3-3a00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a0c3:3a00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-591deeaf4cesm1357027e87.30.2025.10.19.00.56.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Oct 2025 00:56:58 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 19 Oct 2025 10:56:49 +0300 Subject: [PATCH v4 2/6] media: iris: turn platform data into constants Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251019-iris-sc7280-v4-2-ee6dcee6e741@oss.qualcomm.com> References: <20251019-iris-sc7280-v4-0-ee6dcee6e741@oss.qualcomm.com> In-Reply-To: <20251019-iris-sc7280-v4-0-ee6dcee6e741@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Konrad Dybcio Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Bryan O'Donoghue X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4328; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=QlGdzJciH1h4gz5Q1SzqSd8IKkSpeYMEZtL7i2pFW/A=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBo9JnDFE1Kbou+2TUTGrtA4wh8atM7aEdFOLKXd UaBUgXEBi+JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCaPSZwwAKCRCLPIo+Aiko 1YBPB/4rCALg7iHH73KsSaCsSpsxPyN3NVo105FoTcDHiHe41tCxf+mTxb9yBZdC7BM1lu+xFxF 1t2leMeL8woyXZJCccmKfWf342dinXfqBYzqVazjz7zHWzWB49FcuZkZRZR19pettzSEamWIiH9 8a21yS3fVkrhVXQPf+3cpurKai832ATFs83Fi8MHqi7eFhkE4QG+4HV+jpLjri4wJR1/FQgajeq T1MYNWT34zP6LN+wH7Pof2yuNmR4fssTRaNhMepScYlO5K0f64gUMupVTldg+C6lHHuwfCwrxqP g1JonHNwl/VyLFSpiMwWj3na8NHWAJXt1zRBMsIJVyl9E+1p X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-ORIG-GUID: 8xw1tBiC0hcDlCbXNP5syByY0b-Ue_zz X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDE4MDAyNyBTYWx0ZWRfX7L6xV2zZNIH+ aJvSBplbvAvDVGTehWeZbUR9FDgVJebDBQggHfwrrPaDf6j/Sp2ibhnMqDTjRuFkXv1AyoTICVL yWrho7btBz/SHIS12U0bsybcgQ88C3w5o8wZCNrP95MHBpgWLwgJxu7zHiXqhqhNmmqCBy2y0Mp aY8506v9Hx+7i8I3kGhj/GjZRvdHkHGlhK1Xpci72hLweaGoUqHfdoseeHoh4tAjUz4Q2EOVXsn MFWoTN6DvIBpX1JRhIOkwmZVJHTVvdtw5sFS/NxHjjz7kP4bUa7xqNrQc7hu3MVipEryK7MJ5jK cdANo+1W7oMGRyGZtbxQn+BKSwlrmMkHK74LTOw88Yj+KnedMWzGe3F6J325V0AV+UVAINrYWce 00GE8TdSzeFPNDEXdJDQ2oxtW0TtrA== X-Proofpoint-GUID: 8xw1tBiC0hcDlCbXNP5syByY0b-Ue_zz X-Authority-Analysis: v=2.4 cv=EYjFgfmC c=1 sm=1 tr=0 ts=68f499ce cx=c_pps a=UgVkIMxJMSkC9lv97toC5g==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=KKAkSRfTAAAA:8 a=EUspDBNiAAAA:8 a=vHBkZ3WG4vhFy3QD8MgA:9 a=QEXdDO2ut3YA:10 a=1HOtulTD9v-eNWfpl4qZ:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-19_03,2025-10-13_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 clxscore=1015 spamscore=0 malwarescore=0 lowpriorityscore=0 priorityscore=1501 impostorscore=0 phishscore=0 adultscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510180027 Make all struct iris_platform_data instances constant, they are not modified at runtime. Reviewed-by: Bryan O'Donoghue Reviewed-by: Dikshita Agarwal Reviewed-by: Vikash Garodia Signed-off-by: Dmitry Baryshkov --- drivers/media/platform/qcom/iris/iris_platform_common.h | 10 +++++----- drivers/media/platform/qcom/iris/iris_platform_gen2.c | 8 ++++---- drivers/media/platform/qcom/iris/iris_platform_sm8250.c | 2 +- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index 17ed86bf78bb3b0bc3f0862253fba6505ac3d164..5ffc1874e8c6362b1c650e912c2= 30e9c4e3bd160 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -41,11 +41,11 @@ enum pipe_type { PIPE_4 =3D 4, }; =20 -extern struct iris_platform_data qcs8300_data; -extern struct iris_platform_data sm8250_data; -extern struct iris_platform_data sm8550_data; -extern struct iris_platform_data sm8650_data; -extern struct iris_platform_data sm8750_data; +extern const struct iris_platform_data qcs8300_data; +extern const struct iris_platform_data sm8250_data; +extern const struct iris_platform_data sm8550_data; +extern const struct iris_platform_data sm8650_data; +extern const struct iris_platform_data sm8750_data; =20 enum platform_clk_type { IRIS_AXI_CLK, /* AXI0 in case of platforms with multiple AXI clocks */ diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/driver= s/media/platform/qcom/iris/iris_platform_gen2.c index cbf38e13f89e5c4c46e759fbb86777854d751552..b444e816355624bca8248cce9da= 7adcd7caf6c5b 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -737,7 +737,7 @@ static const u32 sm8550_enc_op_int_buf_tbl[] =3D { BUF_SCRATCH_2, }; =20 -struct iris_platform_data sm8550_data =3D { +const struct iris_platform_data sm8550_data =3D { .get_instance =3D iris_hfi_gen2_get_instance, .init_hfi_command_ops =3D iris_hfi_gen2_command_ops_init, .init_hfi_response_ops =3D iris_hfi_gen2_response_ops_init, @@ -827,7 +827,7 @@ struct iris_platform_data sm8550_data =3D { * - controller_rst_tbl to sm8650_controller_reset_table * - fwname to "qcom/vpu/vpu33_p4.mbn" */ -struct iris_platform_data sm8650_data =3D { +const struct iris_platform_data sm8650_data =3D { .get_instance =3D iris_hfi_gen2_get_instance, .init_hfi_command_ops =3D iris_hfi_gen2_command_ops_init, .init_hfi_response_ops =3D iris_hfi_gen2_response_ops_init, @@ -912,7 +912,7 @@ struct iris_platform_data sm8650_data =3D { .enc_op_int_buf_tbl_size =3D ARRAY_SIZE(sm8550_enc_op_int_buf_tbl), }; =20 -struct iris_platform_data sm8750_data =3D { +const struct iris_platform_data sm8750_data =3D { .get_instance =3D iris_hfi_gen2_get_instance, .init_hfi_command_ops =3D iris_hfi_gen2_command_ops_init, .init_hfi_response_ops =3D iris_hfi_gen2_response_ops_init, @@ -998,7 +998,7 @@ struct iris_platform_data sm8750_data =3D { * - inst_caps to platform_inst_cap_qcs8300 * - inst_fw_caps to inst_fw_cap_qcs8300 */ -struct iris_platform_data qcs8300_data =3D { +const struct iris_platform_data qcs8300_data =3D { .get_instance =3D iris_hfi_gen2_get_instance, .init_hfi_command_ops =3D iris_hfi_gen2_command_ops_init, .init_hfi_response_ops =3D iris_hfi_gen2_response_ops_init, diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8250.c b/driv= ers/media/platform/qcom/iris/iris_platform_sm8250.c index e29cba993fde922b579eb7e5a59ae34bb46f9f0f..66a5bdd24d8a0e98b0554a01943= 8bf4caa1dc43c 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_sm8250.c +++ b/drivers/media/platform/qcom/iris/iris_platform_sm8250.c @@ -314,7 +314,7 @@ static const u32 sm8250_enc_ip_int_buf_tbl[] =3D { BUF_SCRATCH_2, }; =20 -struct iris_platform_data sm8250_data =3D { +const struct iris_platform_data sm8250_data =3D { .get_instance =3D iris_hfi_gen1_get_instance, .init_hfi_command_ops =3D &iris_hfi_gen1_command_ops_init, .init_hfi_response_ops =3D iris_hfi_gen1_response_ops_init, --=20 2.47.3 From nobody Sun Feb 8 04:33:58 2026 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E711E239570 for ; Sun, 19 Oct 2025 07:57:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.168.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760860627; cv=none; b=O5pNa759HOlQ20q8P2dSUe5E5GQQCDEYs8USYyNgKATtCfrdsU9nnhNezUa3wefF6Kda8Vji2mB8d+9pT/6Snou5IQLjEAHv8HMJWYzZFFufSI2a0FOwTKctii/oJeZtWJAzmXSlO/FWHeFk9KlrCxoEw5+aLpys/rgaJepU4LY= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760860627; c=relaxed/simple; bh=Atjm+XHNGwWlt44E5yZ6mg80bcKOc+FDvJDQ7swz1Rg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=FTeWReHm1PFxy8YR8U8gGZYA8BTmrm5cy81AURd4mDnXpgsjPaCsJZvzNw6RER8nEKibWcsGqGKnv8rqFbbxHFhESYP5vjAbvp5lZH0OkyU/XYQ8h9I77eUr5IZWZ7eLu+VTaRgFhetZUCL47SVQEeIjUIMpYCbycopqxe2Zcoc= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=YzTlae+i; arc=none smtp.client-ip=205.220.168.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="YzTlae+i" Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 59J7BlKg004615 for ; Sun, 19 Oct 2025 07:57:05 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= 9Fu670GvHNT2WXsqNJpnsGu9vVym3c6SzGf47wM07ZY=; b=YzTlae+ieNk6n/nh DkTm1QhgWKkoLCtEWlpLJoR5W69/zQIylYjbPoOfTvwNa4xma2JMAipzizQ2/oH2 J8YurKdOZeEe+sa+RqAnuvsd3WI90E84aNoZV8ksSwEo1LygjdNW+I/joXKczJm6 yfx/UIGO7EX3YqMl9qdEp/LKHNiYDh/AiQBf5nCVmIW2dXPkPxvCppgTtxIvhbEM BPRcEe9vGMcyrzmbGTbURyOGTTWCAsRFXeJSuUyvZZhEjJfKwRP8cBza0CKV0MqT H4912tGppT8IEQPsZiD58+mtTSaqRyOnjyjLM4GgTNO6aLeP9UDAFvTeBoxQfdbr nuPZ4Q== Received: from mail-qv1-f72.google.com (mail-qv1-f72.google.com [209.85.219.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 49v4699wsp-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Sun, 19 Oct 2025 07:57:05 +0000 (GMT) Received: by mail-qv1-f72.google.com with SMTP id 6a1803df08f44-87c6f88fda2so68674826d6.1 for ; Sun, 19 Oct 2025 00:57:05 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760860624; x=1761465424; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=9Fu670GvHNT2WXsqNJpnsGu9vVym3c6SzGf47wM07ZY=; b=WM9SjilNHgP5TV+VviWTR8816HbOnAQvXhEzN6P2W+X7BpSldtLHtLOVc9Tqorse1S VZXrPyCqwRN3/QT0Wr70cpr3To5/IpTqSsXLyDotFofHk63rkES/qmta0WMvoG0ArbBu H2dUZHF0FI/pKUJ4m77fkIy26cnTM5X/AN2JuBu6h79XF2qmnPeKGT8RqwFoFeMRaany sSp3AldmI6CNYBcS6VUMGsd89m63fQspeezMNu1JJqYWZTzPZ7AwtB3lcWy2OQymBkMc EmQpM6P0bMdpkCFI4Mc/G3PyuuBiRfuEgBqHuhT5bE+Rg5cdxIRZ+JcYJVRyrT7jRrkK XH6A== X-Forwarded-Encrypted: i=1; AJvYcCVFZJMAU/jyT+8hS+MJupxbg8AHeDSJah0xnyYEi1orybsAvWSs+/zDqYz83cVJK7XHRq18kw0MWQLuvyc=@vger.kernel.org X-Gm-Message-State: AOJu0YwwRYMRFVUb27Xye2BmJDIfIjOnJ+t/xNUd7Woz8LA6xwKR+ymx QZznUoUjVBpoUh/3fioz7SKYugcIKQDe65/QbfPQ/M4K2YVMx79z3mCsBbLITUwTIAkiFrn8Vib sgGkNW7EPDXpabIeq3OE1Dpj+PLOLgZnr6d5Mz0xVbnVbIaTwUYfnBU5lKd3IwrpmB90= X-Gm-Gg: ASbGncsGXSubmdfna97uCSAcpUOGLBZ/NmiNOxkd4lps54G9HqHXkBC4jk/J3WLUX15 V9y8ql9XHDz01gwCKhft/Zk3KYbc+TLU8qGyxKsgPX4mtvyuTaZeiBdHIbidi3R1CR1ZXT7XiOj veNuOtw9ZsDAuWCghrNHN0jUdcGvsbUUpHYK2dzOxbYyUvOVX3GVJMkwe7eughPs4zdre4kzadI qccvX317Ht8UQm8h9sqa9v2n50qa1sdPJAggM/QNIMz5cprDEcjW6ALYaXQQZ9cq5w280g7VWwa El1TRMRl2LVJB5ULvilYQ1ngxHiw7WDpJUsK+OjbmBMLkL8CYVMlKvOrh5Tmh+Am7ZtO2UdeR+j 0YiXPRZ0tzdwI+3gfNlYgcjawa+b8GNXiBPltKJusx53OW5TNPvg+tEv2ejam9ZbERv7vfbJFB8 vaW426GlXHJ28= X-Received: by 2002:ac8:570e:0:b0:4b7:aa52:a713 with SMTP id d75a77b69052e-4e89ce272c2mr113568321cf.14.1760860623751; Sun, 19 Oct 2025 00:57:03 -0700 (PDT) X-Google-Smtp-Source: AGHT+IFYIX8HnoNRNsNTUPJy9qliriEOtYSyAWKLSWKH9m6fAORmGFE1IA1RdNxHFemEpqsQIBGOSg== X-Received: by 2002:ac8:570e:0:b0:4b7:aa52:a713 with SMTP id d75a77b69052e-4e89ce272c2mr113568191cf.14.1760860623303; Sun, 19 Oct 2025 00:57:03 -0700 (PDT) Received: from umbar.lan (2001-14ba-a0c3-3a00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a0c3:3a00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-591deeaf4cesm1357027e87.30.2025.10.19.00.57.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Oct 2025 00:57:01 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 19 Oct 2025 10:56:50 +0300 Subject: [PATCH v4 3/6] media: iris: stop encoding PIPE value into fw_caps Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251019-iris-sc7280-v4-3-ee6dcee6e741@oss.qualcomm.com> References: <20251019-iris-sc7280-v4-0-ee6dcee6e741@oss.qualcomm.com> In-Reply-To: <20251019-iris-sc7280-v4-0-ee6dcee6e741@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Konrad Dybcio Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=4207; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=Atjm+XHNGwWlt44E5yZ6mg80bcKOc+FDvJDQ7swz1Rg=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBo9JnElNBvi+z68uVL7uf1R/LYeQKwrNjbrEMnl pq88uY0Mj2JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCaPSZxAAKCRCLPIo+Aiko 1WUnCACxXK3iSU2+JXZTFO2Xmm38cxCeFB0t1R870vTxUQay9M8Y8d4tlHMjj+54INLRcTJwfKD Ba9TnxpwmBAZXXShoKJsiWJi4VGrkHT6dxuN0uOWueL60n11ZNrCQzWxt/31vo921nZ02H1TF06 zvyBwCMphuBw4UUTa9y0/IwStDCzID2QZHTxeSNG+N+2d5v/zMiBn1gy/XbtOHxvUjmQaW+egqj vFRBcBndVQJoEN/Z6e7E2IRdNEMiCU/ZEnW8crXYpNbQms+S1aKDoIJuVac1m9wOEIRVZaUSvYu kQLMr7UlhdxlYyycJK/vHpkzQS1dJq6EsH5SvBo3w6Jdgbus X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-ORIG-GUID: GJG1P0gPWapPQH7ScPmh92Frm9a4esyQ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDE4MDAzMiBTYWx0ZWRfX0kdgS+rDRYfR el9WE1nwyT1nId/4YAh2crXBjwhRTj2sUoazfR/d5c+j1IItT52uiOO3wQWUMQ5JmOFo3lDHnX3 umAvR/M+5/5p3MVeUr54f+orkn4E3IsBNAY3Hiqmg3Ne1VrW413AMW2WESV01RNnNi0LEwARD1M 4C8Ykgu4h6Pd3ruGBRE3DMmOb5/TutElE3Lkt4FZ6l6Cve6zeEKz8SGo/DUMuM8NlXcA/+TWn8S LbYTaxNtIA6eCOmkii1kvBvmUP6P/4SmZPX0Z3rirABWzs39v3h2LXFm6txjR5Zfi05Bveunb0H itpEOnqKNAlsUXQwscPElWLL5Rvg/oo1+9AAEzbsHq8IsKAg/Fq9tOGEVYaEG257ydz7Mg6Z1dk ix7yx7xD23USBPBNKkTf6ga2kUW45A== X-Authority-Analysis: v=2.4 cv=U8qfzOru c=1 sm=1 tr=0 ts=68f499d1 cx=c_pps a=7E5Bxpl4vBhpaufnMqZlrw==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=UBAHcYp1M5YLSaqwDvUA:9 a=QEXdDO2ut3YA:10 a=pJ04lnu7RYOZP9TFuWaZ:22 X-Proofpoint-GUID: GJG1P0gPWapPQH7ScPmh92Frm9a4esyQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-19_03,2025-10-13_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 impostorscore=0 adultscore=0 bulkscore=0 malwarescore=0 priorityscore=1501 spamscore=0 clxscore=1015 lowpriorityscore=0 phishscore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510180032 The value of the PIPE property depends on the number of pipes available on the platform and is frequently the only difference between several fw_caps. In order to reduce duplciation, use num_vpp_pipe from the iris_platform_data rather than hardcoding the value into the fw_cap. Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- drivers/media/platform/qcom/iris/iris_ctrls.c | 16 ++++++++++++= +--- drivers/media/platform/qcom/iris/iris_platform_gen2.c | 3 +-- drivers/media/platform/qcom/iris/iris_platform_qcs8300.h | 3 +-- drivers/media/platform/qcom/iris/iris_platform_sm8250.c | 3 +-- 4 files changed, 16 insertions(+), 9 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_ctrls.c b/drivers/media/= platform/qcom/iris/iris_ctrls.c index 9da050aa1f7ce8152dfa46a706e2c27adfb5d6ce..c0b3a09ad3e3dfb0a47e3603a80= 89cf61390fda8 100644 --- a/drivers/media/platform/qcom/iris/iris_ctrls.c +++ b/drivers/media/platform/qcom/iris/iris_ctrls.c @@ -313,13 +313,23 @@ void iris_session_init_caps(struct iris_core *core) continue; =20 core->inst_fw_caps_dec[cap_id].cap_id =3D caps[i].cap_id; - core->inst_fw_caps_dec[cap_id].min =3D caps[i].min; - core->inst_fw_caps_dec[cap_id].max =3D caps[i].max; core->inst_fw_caps_dec[cap_id].step_or_mask =3D caps[i].step_or_mask; - core->inst_fw_caps_dec[cap_id].value =3D caps[i].value; core->inst_fw_caps_dec[cap_id].flags =3D caps[i].flags; core->inst_fw_caps_dec[cap_id].hfi_id =3D caps[i].hfi_id; core->inst_fw_caps_dec[cap_id].set =3D caps[i].set; + + if (cap_id =3D=3D PIPE) { + core->inst_fw_caps_dec[cap_id].value =3D + core->iris_platform_data->num_vpp_pipe; + core->inst_fw_caps_dec[cap_id].min =3D + core->iris_platform_data->num_vpp_pipe; + core->inst_fw_caps_dec[cap_id].max =3D + core->iris_platform_data->num_vpp_pipe; + } else { + core->inst_fw_caps_dec[cap_id].min =3D caps[i].min; + core->inst_fw_caps_dec[cap_id].max =3D caps[i].max; + core->inst_fw_caps_dec[cap_id].value =3D caps[i].value; + } } =20 caps =3D core->iris_platform_data->inst_fw_caps_enc; diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/driver= s/media/platform/qcom/iris/iris_platform_gen2.c index b444e816355624bca8248cce9da7adcd7caf6c5b..03ce5c259c8491ae6882128795d= 18569baea6241 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -161,9 +161,8 @@ static const struct platform_inst_fw_cap inst_fw_cap_sm= 8550_dec[] =3D { { .cap_id =3D PIPE, .min =3D PIPE_1, - .max =3D PIPE_4, + /* .max, .min and .value are set via platform data */ .step_or_mask =3D 1, - .value =3D PIPE_4, .hfi_id =3D HFI_PROP_PIPE, .set =3D iris_set_pipe, }, diff --git a/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h b/dri= vers/media/platform/qcom/iris/iris_platform_qcs8300.h index 87517361a1cf4b6fe53b8a1483188670df52c7e7..310c48958018ae724d01c87e797= 7096cd86e1bfd 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h +++ b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h @@ -147,9 +147,8 @@ static const struct platform_inst_fw_cap inst_fw_cap_qc= s8300_dec[] =3D { { .cap_id =3D PIPE, .min =3D PIPE_1, - .max =3D PIPE_2, + /* .max, .min and .value are set via platform data */ .step_or_mask =3D 1, - .value =3D PIPE_2, .hfi_id =3D HFI_PROP_PIPE, .set =3D iris_set_pipe, }, diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8250.c b/driv= ers/media/platform/qcom/iris/iris_platform_sm8250.c index 66a5bdd24d8a0e98b0554a019438bf4caa1dc43c..9cb9ddc86ad73daf75383b3253e= 851394235093d 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_sm8250.c +++ b/drivers/media/platform/qcom/iris/iris_platform_sm8250.c @@ -21,9 +21,8 @@ static const struct platform_inst_fw_cap inst_fw_cap_sm82= 50_dec[] =3D { { .cap_id =3D PIPE, .min =3D PIPE_1, - .max =3D PIPE_4, + /* .max, .min and .value are set via platform data */ .step_or_mask =3D 1, - .value =3D PIPE_4, .hfi_id =3D HFI_PROPERTY_PARAM_WORK_ROUTE, .set =3D iris_set_pipe, }, --=20 2.47.3 From nobody Sun Feb 8 04:33:58 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 718A422FDE6 for ; Sun, 19 Oct 2025 07:57:08 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760860630; cv=none; b=mkGXYreicSlOWzfjRg54J1utZhiogM7N0GnuDvbq1mmssvlh9kAMDl0q3nXaxfgMt9UmixzXMikl0gMbrg6tM0RRNE3kRAtBhjO+7xjH5K7SmGgZSiv+oq0G4ozdQ896vk9LJLRT7xxMQyIGXMxs/ahmQiUf34AA6C+bNKuZcmo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760860630; c=relaxed/simple; bh=MpJAMVxdHplh5I0DSEkx3gDzRHpMmHV3aDbkDKBkLpE=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=nwCo3aE368nexM4c+QCopKgJhfAiiMFwBRE8NeXn0SnT/Yk/PnCQnTdYwv8ylyZUISBQxkow8qRY1IDnEtyzZf+0WQ+foZtzCuLiW9cqbMaK5zqiiPiRf1hj+wk/JHpe+PscAeciK8gqp18vhmKlI0Ynm7gQf+VhUJ2iLgab6Z4= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=iHWJ6NYt; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="iHWJ6NYt" Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 59J5QIfa021065 for ; Sun, 19 Oct 2025 07:57:07 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= GTS5hLn33TGPMNVs3mVW9jG9g5BRYx8J8zCnbeHFDVU=; b=iHWJ6NYtsbsVflEA uJYoJTZCNWawTJyHx+wWoaYWgoBOnVRIeIB+cw7wu4E2qW2+6am8AyhGNDsUkHOa EO/96HLPdwCOLE7vzhzpV/OmH3DJY91k/Wg1b7QpF2a23RbjKgkDpat+hCqV5LME B83+lRfk8UN0CvQQ7dyeOD9dUWemB/5zqtpos3m1hduY5kJxRRUwZxEH7C4Ttiwq UJAMEkGmeOAPSI4HC2t4myIJyZXySpTfkv3Nw1sGayIFp8K9rSDKkBHB9z+brgGs S07qdXqc6OqqFFYlPPhKJiQnJwVYTe+s/Varh/Q8ZgX+eKTX/RMpK1HiDLpnJFGo ufCMPA== Received: from mail-qk1-f198.google.com (mail-qk1-f198.google.com [209.85.222.198]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 49v39820w1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Sun, 19 Oct 2025 07:57:07 +0000 (GMT) Received: by mail-qk1-f198.google.com with SMTP id af79cd13be357-88e2656b196so795343785a.2 for ; Sun, 19 Oct 2025 00:57:07 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760860626; x=1761465426; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=GTS5hLn33TGPMNVs3mVW9jG9g5BRYx8J8zCnbeHFDVU=; b=p6DqMoRrlFMuibrj1dd3OBqHyxJWkWdcHB2UZt7dgxtXVDgJqGdDqEorP4BwHjIaup w/0WczQoSAqw9/BHzRKvbmg6WuJ1w5/khJwUtdQhQcC92kzBLPrS/ksVVGtMZJffXYZ0 AjUS5TWjW0Xb0VlWzAqEad+830MJFlvas9bz+uBJIyCq61OTqpMv2/oU/mS7ddURb5Gf AkD7uHMxXkvYesJhVvViAvRMEKqu6uwisAV2GHft+9whFtd5txjWlBNDar3dESFLrqTR ccgekQE8wvrrC2fGGiHscsrDJf70fcoVEnbrN3X25XEbawJSaf/bcdLG6qgaWQa5g4L5 QiyQ== X-Forwarded-Encrypted: i=1; AJvYcCW9LKQDj0Jz/91j3uGMLSir/6tCsv3WOALO1p4La8xNvqeLwYc9l7U2/xO7NbwSNFH/p6B1qnOmQc6rbcE=@vger.kernel.org X-Gm-Message-State: AOJu0YyH0IfdXZV3EqHxPZ30u6yRu/Dv2gbauv67QsR5+/KxKXibGaLt J1cU+XFEbcwwOMWyaNF5Fuw/MNXBjDz+di0wBtCvuw+rraEt8X5IfoZvkr1KwyZX1cnh7XIJizO 2QuFiwV+oCW+o465baUqU0iRYpAXcYKSUpCxt4oecCUSOBwnHs6wBJItH6JIvUT1RkyE= X-Gm-Gg: ASbGncv1NbA43twN59KV5w+r8pueYTp2tfYUIvLjmdxczahmCXmBQPDZvtzts3RcMR3 enZKuW69+Gp1nK8hMFjEk877hk2ANi+Uzv4CjqOuxDk/6jHXfmotpncWmPqOswO7xNSBKSytpJE leNd3+XuAHS0ji9NVPrCC8qjIli0juik1NLiynqetohSSqc2kFY/VRf1lINvue/VHNIYcDXpA/h KvBsMYF4V38IG0nQhjMCn/EZUob595I/aR1+J5GnsLQTXG7CiinADtJiqOavwzV2E4eyE7OruA7 ynetCDiA6fJRmtAVmIjm8z7MyS1sTBOOiDMsdXdT5TuTOnirDIq+Ax2Q5bBrD7I+lgoFxeJOlHp fD9WAPP8aAWVuhwxX+NTIKXkU9B5aEt0hItNVKKamo1LZn/Rkro2b1+lAnYwSLvmj3i5cFE+3ii lOoxDDNIwynXg= X-Received: by 2002:ac8:7d56:0:b0:4e8:b9fd:59e4 with SMTP id d75a77b69052e-4e8b9fd5d07mr17827071cf.50.1760860626127; Sun, 19 Oct 2025 00:57:06 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHktM1kF3YbeQ+A8MVqprk2+srkSN1FrFEjBBcfgIn/C1U2Q4/923qlnP5ku3zxw8yra3ptEg== X-Received: by 2002:ac8:7d56:0:b0:4e8:b9fd:59e4 with SMTP id d75a77b69052e-4e8b9fd5d07mr17826891cf.50.1760860625500; Sun, 19 Oct 2025 00:57:05 -0700 (PDT) Received: from umbar.lan (2001-14ba-a0c3-3a00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a0c3:3a00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-591deeaf4cesm1357027e87.30.2025.10.19.00.57.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Oct 2025 00:57:03 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 19 Oct 2025 10:56:51 +0300 Subject: [PATCH v4 4/6] media: iris: remove duplicateion between generic gen2 data and qcs8300 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251019-iris-sc7280-v4-4-ee6dcee6e741@oss.qualcomm.com> References: <20251019-iris-sc7280-v4-0-ee6dcee6e741@oss.qualcomm.com> In-Reply-To: <20251019-iris-sc7280-v4-0-ee6dcee6e741@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Konrad Dybcio Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=18966; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=MpJAMVxdHplh5I0DSEkx3gDzRHpMmHV3aDbkDKBkLpE=; b=owGbwMvMwMXYbdNlx6SpcZXxtFoSQ8aXmUc+dv5tvsgodfXS2fKbrntsJN2j7IpXd+kfXc9/i 2XRyplRnYzGLAyMXAyyYoosPgUtU2M2JYd92DG1HmYQKxPIFAYuTgGYSA8PB8MixbvLIns789/x WIfc+6IsrWOgn7ooRuftowO/Yt9ub/+Uu23hqlBRlf+T5WzCFQ2ijjGcKudZG+eiPjnErPJjbJD aE7cl/IIqGzSLe/Sl9QrXqinaTDyoNf+7RH1b+6a65vl9Sd+SU6vPRj1YX6wrcOCisM9rb8cr3p nsP1qmrpnsECLvs3hb/9+9fU6yFkoqRntDHiubL3b+89nVz6zEX9fa7ve37W81P/I6ujCzinuW6 LbZvYmYb6U2V+BkwZTT9p3Kf3N8dP/1Ki7sOblBu/Ga51cD9Xk7d3//EZby7Lf16cx/l0Qij04R cpqd4eE/35dh4p3+ZxqxZk2aCx93cPwveTa5tk+GRfUtAA== X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Authority-Analysis: v=2.4 cv=KcvfcAYD c=1 sm=1 tr=0 ts=68f499d3 cx=c_pps a=qKBjSQ1v91RyAK45QCPf5w==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=8lhtx-rUCDsU0NfLSlYA:9 a=QEXdDO2ut3YA:10 a=NFOGd7dJGGMPyQGDc5-O:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDE4MDAyNSBTYWx0ZWRfX3WKUbu3D63pW CE4lj/x3RJ38GUjUkDIiKQHhQhAFi0vfPsK+roafy6erno5PnxBlhdbEt4irg/P/j1Hfoph5x4L Lw7eIfrRTE6uy0yTowDn9b+AikTHQN5xBRXlcopx9X4FBPkaduCWJi4I/xcdKyH9miN5J4JI8dq sQ74OERZZvQWYUPN3HAMSPGYA7afbKSjoU74vSMmE1cb2WPtfY0Q8/fRJN8QV2wnU0AsB12M7TU t1gK1KEayRYtcahfyGLRPyoTLc4K+3pXf7RKaIoS0CAwGkgdARiF7LccZUbTxSwwORFYKimNxit QJK6vVJSpkzb/vdgz5xmjqtOQFBLxM73gzh/6fSESavYDUmgQW2juugzrtL8eK+jFy5ddkJN3+j t+wP5/tES422cwjbpWEB1xsNROZtoA== X-Proofpoint-GUID: iuFoSwHPcVwSHnOzqxEA4pC2nCgxWLmc X-Proofpoint-ORIG-GUID: iuFoSwHPcVwSHnOzqxEA4pC2nCgxWLmc X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-19_03,2025-10-13_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 phishscore=0 priorityscore=1501 suspectscore=0 impostorscore=0 malwarescore=0 clxscore=1015 bulkscore=0 spamscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510180025 Now as we have removed PIPE value from inst_fw_caps_dec there should be no difference between inst_fw_caps of QCS8300 and SM8550+. Drop the QCS8300-specific tables and use generic one instead. The differences between QCS8300 and SM8550 data comes from a non-conflict merge of commit d22037f3fd33 ("media: iris: Set platform capabilities to firmware for encoder video device") (which added .set callbacks), and commit 6bdfa3f947a7 ("media: iris: Add platform-specific capabilities for encoder video device") (which added QCS8300 data, but not the callbacks). Reviewed-by: Vikash Garodia Signed-off-by: Dmitry Baryshkov Reviewed-by: Dikshita Agarwal --- .../media/platform/qcom/iris/iris_platform_gen2.c | 9 +- .../platform/qcom/iris/iris_platform_qcs8300.h | 533 +----------------= ---- 2 files changed, 8 insertions(+), 534 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/driver= s/media/platform/qcom/iris/iris_platform_gen2.c index 03ce5c259c8491ae6882128795d18569baea6241..6970bee488e4617478f807a30af= d231275875f5a 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c @@ -995,7 +995,6 @@ const struct iris_platform_data sm8750_data =3D { /* * Shares most of SM8550 data except: * - inst_caps to platform_inst_cap_qcs8300 - * - inst_fw_caps to inst_fw_cap_qcs8300 */ const struct iris_platform_data qcs8300_data =3D { .get_instance =3D iris_hfi_gen2_get_instance, @@ -1021,10 +1020,10 @@ const struct iris_platform_data qcs8300_data =3D { .fwname =3D "qcom/vpu/vpu30_p4_s6.mbn", .pas_id =3D IRIS_PAS_ID, .inst_caps =3D &platform_inst_cap_qcs8300, - .inst_fw_caps_dec =3D inst_fw_cap_qcs8300_dec, - .inst_fw_caps_dec_size =3D ARRAY_SIZE(inst_fw_cap_qcs8300_dec), - .inst_fw_caps_enc =3D inst_fw_cap_qcs8300_enc, - .inst_fw_caps_enc_size =3D ARRAY_SIZE(inst_fw_cap_qcs8300_enc), + .inst_fw_caps_dec =3D inst_fw_cap_sm8550_dec, + .inst_fw_caps_dec_size =3D ARRAY_SIZE(inst_fw_cap_sm8550_dec), + .inst_fw_caps_enc =3D inst_fw_cap_sm8550_enc, + .inst_fw_caps_enc_size =3D ARRAY_SIZE(inst_fw_cap_sm8550_enc), .tz_cp_config_data =3D &tz_cp_config_sm8550, .core_arch =3D VIDEO_ARCH_LX, .hw_response_timeout =3D HW_RESPONSE_TIMEOUT_VALUE, diff --git a/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h b/dri= vers/media/platform/qcom/iris/iris_platform_qcs8300.h index 310c48958018ae724d01c87e7977096cd86e1bfd..a97a9f932b75a88535df66160df= c934220919ed5 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h +++ b/drivers/media/platform/qcom/iris/iris_platform_qcs8300.h @@ -3,536 +3,9 @@ * Copyright (c) 2022-2025 Qualcomm Innovation Center, Inc. All rights res= erved. */ =20 -#define BITRATE_MAX 245000000 =20 -static const struct platform_inst_fw_cap inst_fw_cap_qcs8300_dec[] =3D { - { - .cap_id =3D PROFILE_H264, - .min =3D V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, - .max =3D V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, - .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH), - .value =3D V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, - .hfi_id =3D HFI_PROP_PROFILE, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - .set =3D iris_set_u32_enum, - }, - { - .cap_id =3D PROFILE_HEVC, - .min =3D V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - .max =3D V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE, - .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE), - .value =3D V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - .hfi_id =3D HFI_PROP_PROFILE, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - .set =3D iris_set_u32_enum, - }, - { - .cap_id =3D PROFILE_VP9, - .min =3D V4L2_MPEG_VIDEO_VP9_PROFILE_0, - .max =3D V4L2_MPEG_VIDEO_VP9_PROFILE_2, - .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_0) | - BIT(V4L2_MPEG_VIDEO_VP9_PROFILE_2), - .value =3D V4L2_MPEG_VIDEO_VP9_PROFILE_0, - .hfi_id =3D HFI_PROP_PROFILE, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - .set =3D iris_set_u32_enum, - }, - { - .cap_id =3D LEVEL_H264, - .min =3D V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - .max =3D V4L2_MPEG_VIDEO_H264_LEVEL_6_2, - .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_2), - .value =3D V4L2_MPEG_VIDEO_H264_LEVEL_6_1, - .hfi_id =3D HFI_PROP_LEVEL, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - .set =3D iris_set_u32_enum, - }, - { - .cap_id =3D LEVEL_HEVC, - .min =3D V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - .max =3D V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, - .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), - .value =3D V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1, - .hfi_id =3D HFI_PROP_LEVEL, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - .set =3D iris_set_u32_enum, - }, - { - .cap_id =3D LEVEL_VP9, - .min =3D V4L2_MPEG_VIDEO_VP9_LEVEL_1_0, - .max =3D V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, - .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_VP9_LEVEL_6_0), - .value =3D V4L2_MPEG_VIDEO_VP9_LEVEL_6_0, - .hfi_id =3D HFI_PROP_LEVEL, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - .set =3D iris_set_u32_enum, - }, - { - .cap_id =3D TIER, - .min =3D V4L2_MPEG_VIDEO_HEVC_TIER_MAIN, - .max =3D V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_HEVC_TIER_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_TIER_HIGH), - .value =3D V4L2_MPEG_VIDEO_HEVC_TIER_HIGH, - .hfi_id =3D HFI_PROP_TIER, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - .set =3D iris_set_u32_enum, - }, - { - .cap_id =3D INPUT_BUF_HOST_MAX_COUNT, - .min =3D DEFAULT_MAX_HOST_BUF_COUNT, - .max =3D DEFAULT_MAX_HOST_BURST_BUF_COUNT, - .step_or_mask =3D 1, - .value =3D DEFAULT_MAX_HOST_BUF_COUNT, - .hfi_id =3D HFI_PROP_BUFFER_HOST_MAX_COUNT, - .flags =3D CAP_FLAG_INPUT_PORT, - .set =3D iris_set_u32, - }, - { - .cap_id =3D STAGE, - .min =3D STAGE_1, - .max =3D STAGE_2, - .step_or_mask =3D 1, - .value =3D STAGE_2, - .hfi_id =3D HFI_PROP_STAGE, - .set =3D iris_set_stage, - }, - { - .cap_id =3D PIPE, - .min =3D PIPE_1, - /* .max, .min and .value are set via platform data */ - .step_or_mask =3D 1, - .hfi_id =3D HFI_PROP_PIPE, - .set =3D iris_set_pipe, - }, - { - .cap_id =3D POC, - .min =3D 0, - .max =3D 2, - .step_or_mask =3D 1, - .value =3D 1, - .hfi_id =3D HFI_PROP_PIC_ORDER_CNT_TYPE, - }, - { - .cap_id =3D CODED_FRAMES, - .min =3D CODED_FRAMES_PROGRESSIVE, - .max =3D CODED_FRAMES_PROGRESSIVE, - .step_or_mask =3D 0, - .value =3D CODED_FRAMES_PROGRESSIVE, - .hfi_id =3D HFI_PROP_CODED_FRAMES, - }, - { - .cap_id =3D BIT_DEPTH, - .min =3D BIT_DEPTH_8, - .max =3D BIT_DEPTH_8, - .step_or_mask =3D 1, - .value =3D BIT_DEPTH_8, - .hfi_id =3D HFI_PROP_LUMA_CHROMA_BIT_DEPTH, - }, - { - .cap_id =3D RAP_FRAME, - .min =3D 0, - .max =3D 1, - .step_or_mask =3D 1, - .value =3D 1, - .hfi_id =3D HFI_PROP_DEC_START_FROM_RAP_FRAME, - .flags =3D CAP_FLAG_INPUT_PORT, - .set =3D iris_set_u32, - }, -}; - -static const struct platform_inst_fw_cap inst_fw_cap_qcs8300_enc[] =3D { - { - .cap_id =3D PROFILE_H264, - .min =3D V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE, - .max =3D V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH, - .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_HIGH) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_H264_PROFILE_HIGH), - .value =3D V4L2_MPEG_VIDEO_H264_PROFILE_HIGH, - .hfi_id =3D HFI_PROP_PROFILE, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - }, - { - .cap_id =3D PROFILE_HEVC, - .min =3D V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - .max =3D V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10, - .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE) | - BIT(V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10), - .value =3D V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN, - .hfi_id =3D HFI_PROP_PROFILE, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - }, - { - .cap_id =3D LEVEL_H264, - .min =3D V4L2_MPEG_VIDEO_H264_LEVEL_1_0, - .max =3D V4L2_MPEG_VIDEO_H264_LEVEL_6_0, - .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1B) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_1_3) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_2_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_3_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_4_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_0) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_H264_LEVEL_6_0), - .value =3D V4L2_MPEG_VIDEO_H264_LEVEL_5_0, - .hfi_id =3D HFI_PROP_LEVEL, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - }, - { - .cap_id =3D LEVEL_HEVC, - .min =3D V4L2_MPEG_VIDEO_HEVC_LEVEL_1, - .max =3D V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2, - .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_2_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_3_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_4_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_5_2) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_1) | - BIT(V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2), - .value =3D V4L2_MPEG_VIDEO_HEVC_LEVEL_5, - .hfi_id =3D HFI_PROP_LEVEL, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - }, - { - .cap_id =3D STAGE, - .min =3D STAGE_1, - .max =3D STAGE_2, - .step_or_mask =3D 1, - .value =3D STAGE_2, - .hfi_id =3D HFI_PROP_STAGE, - }, - { - .cap_id =3D HEADER_MODE, - .min =3D V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE, - .max =3D V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, - .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE) | - BIT(V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME), - .value =3D V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME, - .hfi_id =3D HFI_PROP_SEQ_HEADER_MODE, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - }, - { - .cap_id =3D PREPEND_SPSPPS_TO_IDR, - .min =3D 0, - .max =3D 1, - .step_or_mask =3D 1, - .value =3D 0, - }, - { - .cap_id =3D BITRATE, - .min =3D 1, - .max =3D BITRATE_MAX, - .step_or_mask =3D 1, - .value =3D BITRATE_DEFAULT, - .hfi_id =3D HFI_PROP_TOTAL_BITRATE, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - }, - { - .cap_id =3D BITRATE_PEAK, - .min =3D 1, - .max =3D BITRATE_MAX, - .step_or_mask =3D 1, - .value =3D BITRATE_DEFAULT, - .hfi_id =3D HFI_PROP_TOTAL_PEAK_BITRATE, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - }, - { - .cap_id =3D BITRATE_MODE, - .min =3D V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - .max =3D V4L2_MPEG_VIDEO_BITRATE_MODE_CBR, - .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_VBR) | - BIT(V4L2_MPEG_VIDEO_BITRATE_MODE_CBR), - .value =3D V4L2_MPEG_VIDEO_BITRATE_MODE_VBR, - .hfi_id =3D HFI_PROP_RATE_CONTROL, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - }, - { - .cap_id =3D FRAME_SKIP_MODE, - .min =3D V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, - .max =3D V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT, - .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED) | - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_LEVEL_LIMIT) | - BIT(V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_BUF_LIMIT), - .value =3D V4L2_MPEG_VIDEO_FRAME_SKIP_MODE_DISABLED, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - }, - { - .cap_id =3D FRAME_RC_ENABLE, - .min =3D 0, - .max =3D 1, - .step_or_mask =3D 1, - .value =3D 1, - }, - { - .cap_id =3D GOP_SIZE, - .min =3D 0, - .max =3D INT_MAX, - .step_or_mask =3D 1, - .value =3D 2 * DEFAULT_FPS - 1, - .hfi_id =3D HFI_PROP_MAX_GOP_FRAMES, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - }, - { - .cap_id =3D ENTROPY_MODE, - .min =3D V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC, - .max =3D V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - .step_or_mask =3D BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CAVLC) | - BIT(V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC), - .value =3D V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC, - .hfi_id =3D HFI_PROP_CABAC_SESSION, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU, - }, - { - .cap_id =3D MIN_FRAME_QP_H264, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D MIN_QP_8BIT, - .hfi_id =3D HFI_PROP_MIN_QP_PACKED, - .flags =3D CAP_FLAG_OUTPUT_PORT, - }, - { - .cap_id =3D MIN_FRAME_QP_HEVC, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D MIN_QP_8BIT, - .hfi_id =3D HFI_PROP_MIN_QP_PACKED, - .flags =3D CAP_FLAG_OUTPUT_PORT, - }, - { - .cap_id =3D MAX_FRAME_QP_H264, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D MAX_QP, - .hfi_id =3D HFI_PROP_MAX_QP_PACKED, - .flags =3D CAP_FLAG_OUTPUT_PORT, - }, - { - .cap_id =3D MAX_FRAME_QP_HEVC, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D MAX_QP, - .hfi_id =3D HFI_PROP_MAX_QP_PACKED, - .flags =3D CAP_FLAG_OUTPUT_PORT, - }, - { - .cap_id =3D I_FRAME_MIN_QP_H264, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D MIN_QP_8BIT, - }, - { - .cap_id =3D I_FRAME_MIN_QP_HEVC, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D MIN_QP_8BIT, - }, - { - .cap_id =3D P_FRAME_MIN_QP_H264, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D MIN_QP_8BIT, - }, - { - .cap_id =3D P_FRAME_MIN_QP_HEVC, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D MIN_QP_8BIT, - }, - { - .cap_id =3D B_FRAME_MIN_QP_H264, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D MIN_QP_8BIT, - }, - { - .cap_id =3D B_FRAME_MIN_QP_HEVC, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D MIN_QP_8BIT, - }, - { - .cap_id =3D I_FRAME_MAX_QP_H264, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D MAX_QP, - }, - { - .cap_id =3D I_FRAME_MAX_QP_HEVC, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D MAX_QP, - }, - { - .cap_id =3D P_FRAME_MAX_QP_H264, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D MAX_QP, - }, - { - .cap_id =3D P_FRAME_MAX_QP_HEVC, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D MAX_QP, - }, - { - .cap_id =3D B_FRAME_MAX_QP_H264, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D MAX_QP, - }, - { - .cap_id =3D B_FRAME_MAX_QP_HEVC, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D MAX_QP, - }, - { - .cap_id =3D I_FRAME_QP_H264, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D DEFAULT_QP, - .hfi_id =3D HFI_PROP_QP_PACKED, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - }, - { - .cap_id =3D I_FRAME_QP_HEVC, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D DEFAULT_QP, - .hfi_id =3D HFI_PROP_QP_PACKED, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - }, - { - .cap_id =3D P_FRAME_QP_H264, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D DEFAULT_QP, - .hfi_id =3D HFI_PROP_QP_PACKED, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - }, - { - .cap_id =3D P_FRAME_QP_HEVC, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D DEFAULT_QP, - .hfi_id =3D HFI_PROP_QP_PACKED, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - }, - { - .cap_id =3D B_FRAME_QP_H264, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D DEFAULT_QP, - .hfi_id =3D HFI_PROP_QP_PACKED, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - }, - { - .cap_id =3D B_FRAME_QP_HEVC, - .min =3D MIN_QP_8BIT, - .max =3D MAX_QP, - .step_or_mask =3D 1, - .value =3D DEFAULT_QP, - .hfi_id =3D HFI_PROP_QP_PACKED, - .flags =3D CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT | - CAP_FLAG_DYNAMIC_ALLOWED, - }, -}; +#ifndef __IRIS_PLATFORM_QCS8300_H__ +#define __IRIS_PLATFORM_QCS8300_H__ =20 static struct platform_inst_caps platform_inst_cap_qcs8300 =3D { .min_frame_width =3D 96, @@ -547,3 +20,5 @@ static struct platform_inst_caps platform_inst_cap_qcs83= 00 =3D { .max_frame_rate =3D MAXIMUM_FPS, .max_operating_rate =3D MAXIMUM_FPS, }; + +#endif --=20 2.47.3 From nobody Sun Feb 8 04:33:58 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 0608122FE15 for ; Sun, 19 Oct 2025 07:57:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760860631; cv=none; b=TF+rSBeH0HLd2sjNzP9CcTofpOgcYmg/rEwn4qIUDDfeAS25+A8JCpq3qLfAgwUjbRWvU4FMdJNeUYAnvYbG89ZeVeKgsQbS7R5dJlHDNv4y7O4AFRasMQJevkJJay1tVNBKU/CUluazurULlLMjN6Z+1O8ZKawF9d5gaab8wA0= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760860631; c=relaxed/simple; bh=Ebl4v/VkXfD1I64iutehxYEDpuSCR37dBGPipaquSZg=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=HajtxjJbGZKZEEpzPgzga6tibN6V2sV7IgxCCJuHDkjYIBPbs8PTAUolsUwXl4NrCABL0JDnM2eYLdqj7bwSxV6MzqXnWhTYshAtFKDgh1JmRRDQVopfwpLp0bivxwpr0eyTDdfmTKm4oLVPsilpg58nNhjfRJ59Tzb0JSxhz1Q= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=Zuso0Hl0; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="Zuso0Hl0" Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 59J5fAio023777 for ; Sun, 19 Oct 2025 07:57:09 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= +e0kmPSERHqC5oqgfvQz5PD2Os0wmkHOTZ+f+cd7qww=; b=Zuso0Hl0+p3CeeOa W3DSELNAjdeJRbiiHI6/YJtUwBlf/wog2BEU2x9o5T3LLi74OdQc/QlbNUrdcy0A OMDpovdQsvosiZ92YqYQw8EOj3Yi9b7IBlE4zZWeNVSLGEWz9VrScrpYPKlvHs+e 3plz2yZx5Wo5sqY8cC0AZ6H3awDjSIlbbUm6lRK+YMQm2JtEl24AzBKzSebYs7lR TuhLdgLPH1hk/nlvgeMfosVrhXU79VYKTFdF0ifthVLDmI1pKT6hmJyf+3TNJ1Y0 pPkttr+yp++JR6OWwMampIKdCt9NBQf+/9w3BfwOTctbAJLlPEVxvsBTpOdzhrs7 avYwkg== Received: from mail-qk1-f199.google.com (mail-qk1-f199.google.com [209.85.222.199]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 49v08paaw1-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Sun, 19 Oct 2025 07:57:08 +0000 (GMT) Received: by mail-qk1-f199.google.com with SMTP id af79cd13be357-88ec911196aso1295884285a.3 for ; Sun, 19 Oct 2025 00:57:08 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760860628; x=1761465428; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=+e0kmPSERHqC5oqgfvQz5PD2Os0wmkHOTZ+f+cd7qww=; b=CuWRreCohN+yROmmZb9IfIIRkDBv3gHa0m/AlZ3KKijMYq+4hl0RiOI/cPn2DV9apx vR7wGBK2DzNp1Fuh3PNso9BUUZAX/SGdDoCg/8U76J8j8TSp8fwuThk0kpeJaL9pQQKh GkwgYQB39qIeDAEVMGPdkLMMDzLZyWmzhzHdvVMIuq2nczwDDmi3qgyEfo8lngE1CDWw +OwDaD2FVIB3EI3oCPICqKA4JN97MyXay2KCDh6RieTZuOT242YzV0DBgB4Kvbon2V2Q n1+mx/u05kweVuLz4yPRtPSL+s/qpNvOm1ZDC86Tc8hcaCmndzG0V+oazzbOywoyf0ZE Uwqg== X-Forwarded-Encrypted: i=1; AJvYcCUWqVJfr8w2Z3SCYVOj8uhXj0Lla5tcF76hg5TxhtMkilWggQ1rcAT9/SECLzuAlFLV8TYrgbPRSM7qeUw=@vger.kernel.org X-Gm-Message-State: AOJu0YyjW0bnCPqTFpEjD4AKCENhGBna3LXIZ9m8SEMxghOj20RrLPTL Q39tEI9tgT61DIGsouXQAwnJJl8kmat58Ol/wrECBUvJs3vMJaE5Hqq91zq4IfsEldAB37TjH1F tLgYGTaSEYvQJBsETkjSAQElh531PaaxXXRO+mAAh/v3v9IFOxlPHjUptcQ6MMwKY0dc= X-Gm-Gg: ASbGncscnXcO62La5c0mV9TfTGBZz2/mC2JFt34yKxfP0RiOhhuwvbG0WulDnHcqt9E +GNfA4dqHeZP3GjU4R4xBz8TJwzSUkfvaho4D7bhHq4Mdk4KPogxph4h4pUUaf7JS1skxIwQJwG Omp4/BdilHBsw0DXe8wNx+0QJp5Z3DhV0+KDNxvMash/ctY6soueR9NVKZ5KRj+qUwlASkTb8CL JAjEt7/citCbsEJ96sBJiNxoO/UeIlZHddkG1Rk07xN1gTa66+Wu33Cos3vfIhFaiWQew575XbN uQsYPLe1uulxb8yhce/BQOML0ym03zhzCIfjYeCkR70hJbVwiBFNVTRJmObWHENpH+P1cPZ9YAn 9aFISnpF5z3Z6Wmu8E+hU9EYvaVLi48bsj2o0V9I3InHcG0aPzyJ4GFoYBhsinIOcv5LMHHEqee az7EGYgwycO5g= X-Received: by 2002:ac8:580a:0:b0:4e8:beac:1151 with SMTP id d75a77b69052e-4e8beac14c7mr6065691cf.58.1760860628114; Sun, 19 Oct 2025 00:57:08 -0700 (PDT) X-Google-Smtp-Source: AGHT+IGDctdAhTGoH2UVH4SIDDcoeLsFaivxMV8gksU2P+0NHGGMP1let3HDtxEPPUwme+DeMzOSFQ== X-Received: by 2002:ac8:580a:0:b0:4e8:beac:1151 with SMTP id d75a77b69052e-4e8beac14c7mr6065531cf.58.1760860627615; Sun, 19 Oct 2025 00:57:07 -0700 (PDT) Received: from umbar.lan (2001-14ba-a0c3-3a00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a0c3:3a00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-591deeaf4cesm1357027e87.30.2025.10.19.00.57.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Oct 2025 00:57:07 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 19 Oct 2025 10:56:52 +0300 Subject: [PATCH v4 5/6] media: iris: rename sm8250 platform file to gen1 Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251019-iris-sc7280-v4-5-ee6dcee6e741@oss.qualcomm.com> References: <20251019-iris-sc7280-v4-0-ee6dcee6e741@oss.qualcomm.com> In-Reply-To: <20251019-iris-sc7280-v4-0-ee6dcee6e741@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Konrad Dybcio Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=1493; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=Ebl4v/VkXfD1I64iutehxYEDpuSCR37dBGPipaquSZg=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBo9JnECS8dwDhbb6wsBiT73LflWqJdL+MdmheXt gM9pKy93qaJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCaPSZxAAKCRCLPIo+Aiko 1ZLYB/9dd3i8u8x3HW0QEmpoIkw1Ko/osxFOOmA+2TF/8rLI4a33AczPjU0+Bsj7lelv0QM2JXh iWuIVG67FB5hWZYHyEPz3uekZCBVe+a0BaCeZeC1/w+OmE6AdiLo+NITUXHio3fXR/FP0WOX7lV 6V8XxQuActxxASDQv9Al+M2v5KmjrUkP8E81/mZthVbB2/o6hY/Q1S3bXBRylqlRhQKxnNH+CAp g2zyfg1IqpjmpmP3nXoPxuCmqRw/E/z4mXvPBwaRjwkhLXFi3EPD3OR+wXXa4RzoBtlruaVo8xl Y6+fSnFOVtiYy3VCw6zeaz0agOmvXTGoklLQJxW+6LqYHUR6 X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDE4MDAwMCBTYWx0ZWRfX9+9UdjgI/Onv 2rILORY1J78e9MI+CKRosR4daA8h8r8jllPekDCWibuWvpbOEtCLjh7r+deXm7dKhVJ4kAMgKfA Cptsyf+8k6lUfDbRcqClUDjxIoiDB1QKedUDvnwtU8hgJGySaicw13fSe1EFQUcjOcm1rDpOyqr CoZR1VP4WCHYHBE1BmjbWmbzGzxqsVyTiCIH70uz3uOpww/SKaWcD+aPhAxiBNP+NnZbOEvmSPc bTOCxU8yMW5BF94KbPSYf86OUs2gj1yMVMTIPg1g/m/scTrqblYgY9gqY+F/CKGJ7Oy1DKC0vZ6 Wy1v3PEb9dNfeICV2Q/52Aqx4tpvh+GTuSfvPY/gheuuk8n+fBMuAnIq5tmliGK3v48uVpsjaeL XhTgXrn+UpnezVBDByXfMiz6TMHMVA== X-Proofpoint-GUID: z1g3OBfM7SmMH1d7wPEa1YJ9wX2fMgVC X-Authority-Analysis: v=2.4 cv=Up1u9uwB c=1 sm=1 tr=0 ts=68f499d5 cx=c_pps a=HLyN3IcIa5EE8TELMZ618Q==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=OYuIXoeRUKmE5Kzn4ZAA:9 a=QEXdDO2ut3YA:10 a=bTQJ7kPSJx9SKPbeHEYW:22 X-Proofpoint-ORIG-GUID: z1g3OBfM7SmMH1d7wPEa1YJ9wX2fMgVC X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-19_03,2025-10-13_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 adultscore=0 suspectscore=0 malwarescore=0 clxscore=1015 impostorscore=0 bulkscore=0 priorityscore=1501 spamscore=0 phishscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510180000 In preparation to adding more Gen1 platforms, which will share a significant amount of data, rename the SM8250 platform file to iris_platform_gen1.c. Reviewed-by: Konrad Dybcio Reviewed-by: Dikshita Agarwal Reviewed-by: Vikash Garodia Signed-off-by: Dmitry Baryshkov --- drivers/media/platform/qcom/iris/Makefile | = 2 +- .../platform/qcom/iris/{iris_platform_sm8250.c =3D> iris_platform_gen1.c} = | 0 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/media/platform/qcom/iris/Makefile b/drivers/media/plat= form/qcom/iris/Makefile index 13270cd6d899852dded675b33d37f5919b81ccba..fad3be044e5fe783db697a592b4= f09de4d42d0d2 100644 --- a/drivers/media/platform/qcom/iris/Makefile +++ b/drivers/media/platform/qcom/iris/Makefile @@ -26,7 +26,7 @@ qcom-iris-objs +=3D iris_buffer.o \ iris_vpu_common.o \ =20 ifeq ($(CONFIG_VIDEO_QCOM_VENUS),) -qcom-iris-objs +=3D iris_platform_sm8250.o +qcom-iris-objs +=3D iris_platform_gen1.o endif =20 obj-$(CONFIG_VIDEO_QCOM_IRIS) +=3D qcom-iris.o diff --git a/drivers/media/platform/qcom/iris/iris_platform_sm8250.c b/driv= ers/media/platform/qcom/iris/iris_platform_gen1.c similarity index 100% rename from drivers/media/platform/qcom/iris/iris_platform_sm8250.c rename to drivers/media/platform/qcom/iris/iris_platform_gen1.c --=20 2.47.3 From nobody Sun Feb 8 04:33:58 2026 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C3ED723EAAF for ; Sun, 19 Oct 2025 07:57:13 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=205.220.180.131 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760860635; cv=none; b=lonxdtprz42UVQ7ubAsmkIVWc3TW1BVm8aljKCi3tWcS6/DbEYjgVQck3WsNfuWguzrB2jFVRRkCOseIx35SgJYy/UuSjnMwHgKit6zKqMCBxSgCJwIWZdSI1/z6gsBwMDpnftmc3ZFWJwPgVTQou9hsWMgeKWxNisISH37d/uo= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760860635; c=relaxed/simple; bh=C+tcorQ5hQe6Y69Mt0PlaH/Ulwn8QpcJFrIQfiZIazU=; h=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References: In-Reply-To:To:Cc; b=OKOYhza2z7ANnQ7/PwmeF2rMb4RHUOBOzHKuzR42imcI+zkt/VJWtsVUxeBZ8Q2mvTDMzhtCZNehn58NQcr1F3IEE7seoCFL11UkQ743CSXn/kUEbY2+lC0WU46Dtzd7NrzoFh5zB0BUcTXOzx1sVOtnuvt3/th9xK5DjxerA98= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com; spf=pass smtp.mailfrom=oss.qualcomm.com; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b=C9gk2Q9w; arc=none smtp.client-ip=205.220.180.131 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=oss.qualcomm.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com header.b="C9gk2Q9w" Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.18.1.2/8.18.1.2) with ESMTP id 59J5QIfb021065 for ; Sun, 19 Oct 2025 07:57:12 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h= cc:content-transfer-encoding:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to; s=qcppdkim1; bh= sYG9RnU2JjgBnuLLxHsgQ90XfW5PUsP89Yd/GaNL9c0=; b=C9gk2Q9wpShKnToT kdoJM86cwVi+dATqypNdCq+Bq3/4sZPAJ2Lw40j8kuImWL59BPb8WU9nm0GbKmgG gFTnSR55S6IYmgNwgX9QHnC0ct0ovr63SXC1WGGLH+a1ZDQ9PTANhrZgx4gTwH35 Arxvk/HT0D5yZA8PVwlkRian7+5G/+szyjalG6VEUmPoaH0wQXyvRj7FgDAFmGju J4auCHclu8E92aZZ0WHSA5tkW515k1KwyEw0jk/yRLsPgSG0UJERS//ACUfVxTcb ayKF8PavNbZRolfzSWg95hOVyuc0SRyVtuUT8BQ1+vDQLBNH9JqZfApOXMmBDeEc wWYpGA== Received: from mail-qv1-f72.google.com (mail-qv1-f72.google.com [209.85.219.72]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 49v39820w6-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT) for ; Sun, 19 Oct 2025 07:57:12 +0000 (GMT) Received: by mail-qv1-f72.google.com with SMTP id 6a1803df08f44-78e5b6f1296so101757866d6.2 for ; Sun, 19 Oct 2025 00:57:12 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1760860630; x=1761465430; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=sYG9RnU2JjgBnuLLxHsgQ90XfW5PUsP89Yd/GaNL9c0=; b=fdGkDX2pKASJz5NfEDEds6vltLioDbL482jl0q/vo9elZlqRm02NWC3FVJj2KhmmB7 T7vtRsEBhM/MVy5cM0ojI8p8hBkvolTz3PjTUTZNdPvW3WmAutauYQodXj3CovdWFHuR YosGszzt+sJyjr7k6HnfoFC5PzYwnDRmvixWnx8ZQeX55qt4CKAQv8HPGETP2COZCLCE HiK5WTL+Lpj2whcLnVkd+AXkrsK7zvq6H5ePhQ/jbofYd+dcSLoSUjUYp4O7AvOJ4TH4 WNZe3+t/76GBnzdJVNrIWFS3NbcJ6ID2lyVb2Gevhp2XNq1ljUBFrLKkPPqL2x/53iNd T1ag== X-Forwarded-Encrypted: i=1; AJvYcCUhKq3AebQqjbDVTtJPkgKO+ObsvdccgXdvvNUhdXMD3jL1BnRxySOK5/x98/UyTdqZYale0rnX2sLmuZI=@vger.kernel.org X-Gm-Message-State: AOJu0YzplbkUEQRxC5w3D0X70f5354O4gYr/3JuW5Jmgl3mAsGIULSX4 xRsg4yh+xZkyVuDq28oVDDKe/JC6jvXGlclJes+Zm4OH1X6E880hXr3eS5iE8PISqpfaIHNjQDJ fNICBqZ0VWQDfLwPHe+ejNHdIyKxgbZk88vi8Ocofr6UgqMKFPLUsaXwNksnBXDJsP5M= X-Gm-Gg: ASbGncu0qmiZjVT9/fnL5fHvuVOXEBSW4GNJAC+VrcywvCrCcRp9dO47TSiCt5nF1TZ hD5MhiCDRFBV7/F0J47RrJV/EUUaVOJ9u5J4WXY/pqmEUvH9msjr3Z1mIjy8XlCOxVBNsjwgWNi CuJrPAKDQixlWYTsq7ZbtRdtUqnAAqMOR5i4yTt3Nefqd434G+Y9rdvyB1r1B0sF/owbUDJnamN w3gYfrLKzZG21k/k58vSrHmTPXjBmJF/DcP4KYlkGu061stvXliQRNBoqPRDHRYFfvCHKnMZsHv xodm41775r/Ac4FSiyd14367W3gk4U/vMOkvw8+J9E5AVWEGJ9DnuWYygXVnrrG+rehMWm6/9xw R67b3h53rC72rMPrah8huOyBMy3rbo1fVCSL00hsG7+HKM6YmQRMpG0tAcDa0dzOLxag5Y66X3y QUcihWLNEHwWQ= X-Received: by 2002:ac8:5a08:0:b0:4e8:a359:b786 with SMTP id d75a77b69052e-4e8a359bde3mr107281351cf.73.1760860630337; Sun, 19 Oct 2025 00:57:10 -0700 (PDT) X-Google-Smtp-Source: AGHT+IHF4pkxWHCITjdw0m9ZOMLqjuCg5k/N7oiB6DVMVktvfzfp4MRLna+wvK4tda5kxTsa5gFqlQ== X-Received: by 2002:ac8:5a08:0:b0:4e8:a359:b786 with SMTP id d75a77b69052e-4e8a359bde3mr107281141cf.73.1760860629861; Sun, 19 Oct 2025 00:57:09 -0700 (PDT) Received: from umbar.lan (2001-14ba-a0c3-3a00-264b-feff-fe8b-be8a.rev.dnainternet.fi. [2001:14ba:a0c3:3a00:264b:feff:fe8b:be8a]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-591deeaf4cesm1357027e87.30.2025.10.19.00.57.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 19 Oct 2025 00:57:08 -0700 (PDT) From: Dmitry Baryshkov Date: Sun, 19 Oct 2025 10:56:53 +0300 Subject: [PATCH v4 6/6] media: iris: enable support for SC7280 platform Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Message-Id: <20251019-iris-sc7280-v4-6-ee6dcee6e741@oss.qualcomm.com> References: <20251019-iris-sc7280-v4-0-ee6dcee6e741@oss.qualcomm.com> In-Reply-To: <20251019-iris-sc7280-v4-0-ee6dcee6e741@oss.qualcomm.com> To: Vikash Garodia , Dikshita Agarwal , Abhinav Kumar , Bryan O'Donoghue , Mauro Carvalho Chehab , Konrad Dybcio Cc: linux-media@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=11511; i=dmitry.baryshkov@oss.qualcomm.com; h=from:subject:message-id; bh=C+tcorQ5hQe6Y69Mt0PlaH/Ulwn8QpcJFrIQfiZIazU=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBo9JnEGtex7ObfejIPjVhrc/S8LsahQuLGrblrN 0ORApSj+HqJATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCaPSZxAAKCRCLPIo+Aiko 1cPECACRiGzBg9v/l3lzQnVnEmH1ULWj1/tAwabxEuQY/M6swJfQbhkhNMq9YTMzzufWQDwv/qm t1a7KF9qAVwGkk5WPEUqQo7t6eekZzQLh2cAZyYyZ82b+fz8Sr+OZ2JbX8+7jIOpF7Zx4t2eE89 Pmg3MW6p5Nv0Wh5WvzzaW/rPkZUxpl8jAv8Mt8QWd8xSP0qbfEvJloqGNBGqUaL1gwaqX1Bj6x3 2R7UKrteJE6T9knplc5QillOFAOVzpng7Z9XqQwLXWl+gvAVE7rdpHzfM4n+qB8xr8FEom1Su6J Mfr9XeOcIeDEwK8v0mYpVgEETu4osMeI1dziVbfclqRUEo/M X-Developer-Key: i=dmitry.baryshkov@oss.qualcomm.com; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A X-Authority-Analysis: v=2.4 cv=KcvfcAYD c=1 sm=1 tr=0 ts=68f499d8 cx=c_pps a=7E5Bxpl4vBhpaufnMqZlrw==:117 a=xqWC_Br6kY4A:10 a=IkcTkHD0fZMA:10 a=x6icFKpwvdMA:10 a=VkNPw1HP01LnGYTKEx00:22 a=EUspDBNiAAAA:8 a=pG0Ruh8lDxDpiiRDS04A:9 a=QEXdDO2ut3YA:10 a=pJ04lnu7RYOZP9TFuWaZ:22 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUxMDE4MDAyNSBTYWx0ZWRfX1NnuX/kgpga8 mm6Tjs/dx8Xvi28lbzbhYlIprLQ0ACI2IzjriTrmRWl+OetpKDF9jhebAQ3PfoUN3WcV4M7x18N 7AHrf7OcAGfy1q48q6wRdEdOl00fggcORPHEkSF/BRfW9fjrKMYML4/BFdLIoz8Dosub6jdxTYp XDIwP+SkxA2J7SiKdjSCqi2IokKYmOwI7ZrYQqqIhfysjihskH7mQWLg6TgQ0SwHquoRa86NoaP E4Q3VKqfEP7VfLNL+LoV5p/NNRee0T1ncQCYoNdnzHahTI0L2x5NJEy8KGmgbVlGWDxe36DB5Mz nqtbjr5W/MfZgldsGa00CwKGXQ7N9BEZlrJhBc6tQ5n7ETV5W54GanSwmxk0qjYLO4DSJeA3CdA u5byd7wE1/+YVwgyAjGNDnmMJrRN/A== X-Proofpoint-GUID: 3VlldylXUwRzuUy8MH_WqmP-kRrggFKQ X-Proofpoint-ORIG-GUID: 3VlldylXUwRzuUy8MH_WqmP-kRrggFKQ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-10-19_03,2025-10-13_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 phishscore=0 priorityscore=1501 suspectscore=0 impostorscore=0 malwarescore=0 clxscore=1015 bulkscore=0 spamscore=0 lowpriorityscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2510020000 definitions=main-2510180025 As a part of migrating code from the old Venus driver to the new Iris one, add support for the SC7280 platform. It is very similar to SM8250, but it (currently) uses no reset controls (there is an optional GCC-generated reset, it will be added later) and no AON registers region. Extend the VPU ops to support optional clocks and skip the AON shutdown for this platform. Signed-off-by: Dmitry Baryshkov --- .../platform/qcom/iris/iris_platform_common.h | 4 ++ .../media/platform/qcom/iris/iris_platform_gen1.c | 52 ++++++++++++++++++= ++++ .../platform/qcom/iris/iris_platform_sc7280.h | 27 +++++++++++ drivers/media/platform/qcom/iris/iris_probe.c | 4 ++ drivers/media/platform/qcom/iris/iris_resources.c | 2 +- drivers/media/platform/qcom/iris/iris_vpu2.c | 6 +++ drivers/media/platform/qcom/iris/iris_vpu_common.c | 34 ++++++++++---- 7 files changed, 119 insertions(+), 10 deletions(-) diff --git a/drivers/media/platform/qcom/iris/iris_platform_common.h b/driv= ers/media/platform/qcom/iris/iris_platform_common.h index 5ffc1874e8c6362b1c650e912c230e9c4e3bd160..8d8cdb56a3c7722c06287d4d10f= eed14ba2b254c 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_common.h +++ b/drivers/media/platform/qcom/iris/iris_platform_common.h @@ -42,6 +42,7 @@ enum pipe_type { }; =20 extern const struct iris_platform_data qcs8300_data; +extern const struct iris_platform_data sc7280_data; extern const struct iris_platform_data sm8250_data; extern const struct iris_platform_data sm8550_data; extern const struct iris_platform_data sm8650_data; @@ -50,7 +51,9 @@ extern const struct iris_platform_data sm8750_data; enum platform_clk_type { IRIS_AXI_CLK, /* AXI0 in case of platforms with multiple AXI clocks */ IRIS_CTRL_CLK, + IRIS_AHB_CLK, IRIS_HW_CLK, + IRIS_HW_AHB_CLK, IRIS_AXI1_CLK, IRIS_CTRL_FREERUN_CLK, IRIS_HW_FREERUN_CLK, @@ -224,6 +227,7 @@ struct iris_platform_data { u32 hw_response_timeout; struct ubwc_config_data *ubwc_config; u32 num_vpp_pipe; + bool no_aon; u32 max_session_count; /* max number of macroblocks per frame supported */ u32 max_core_mbpf; diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen1.c b/driver= s/media/platform/qcom/iris/iris_platform_gen1.c index 9cb9ddc86ad73daf75383b3253e851394235093d..beea8c79de34d163f113d3449fe= e18d33bfe5fd9 100644 --- a/drivers/media/platform/qcom/iris/iris_platform_gen1.c +++ b/drivers/media/platform/qcom/iris/iris_platform_gen1.c @@ -12,6 +12,8 @@ #include "iris_vpu_buffer.h" #include "iris_vpu_common.h" =20 +#include "iris_platform_sc7280.h" + #define BITRATE_MIN 32000 #define BITRATE_MAX 160000000 #define BITRATE_PEAK_DEFAULT (BITRATE_DEFAULT * 2) @@ -363,3 +365,53 @@ const struct iris_platform_data sm8250_data =3D { .enc_ip_int_buf_tbl =3D sm8250_enc_ip_int_buf_tbl, .enc_ip_int_buf_tbl_size =3D ARRAY_SIZE(sm8250_enc_ip_int_buf_tbl), }; + +const struct iris_platform_data sc7280_data =3D { + .get_instance =3D iris_hfi_gen1_get_instance, + .init_hfi_command_ops =3D &iris_hfi_gen1_command_ops_init, + .init_hfi_response_ops =3D iris_hfi_gen1_response_ops_init, + .get_vpu_buffer_size =3D iris_vpu_buf_size, + .vpu_ops =3D &iris_vpu2_ops, + .set_preset_registers =3D iris_set_sm8250_preset_registers, + .icc_tbl =3D sm8250_icc_table, + .icc_tbl_size =3D ARRAY_SIZE(sm8250_icc_table), + .bw_tbl_dec =3D sc7280_bw_table_dec, + .bw_tbl_dec_size =3D ARRAY_SIZE(sc7280_bw_table_dec), + .pmdomain_tbl =3D sm8250_pmdomain_table, + .pmdomain_tbl_size =3D ARRAY_SIZE(sm8250_pmdomain_table), + .opp_pd_tbl =3D sc7280_opp_pd_table, + .opp_pd_tbl_size =3D ARRAY_SIZE(sc7280_opp_pd_table), + .clk_tbl =3D sc7280_clk_table, + .clk_tbl_size =3D ARRAY_SIZE(sc7280_clk_table), + /* Upper bound of DMA address range */ + .dma_mask =3D 0xe0000000 - 1, + .fwname =3D "qcom/vpu/vpu20_p1.mbn", + .pas_id =3D IRIS_PAS_ID, + .inst_caps =3D &platform_inst_cap_sm8250, + .inst_fw_caps_dec =3D inst_fw_cap_sm8250_dec, + .inst_fw_caps_dec_size =3D ARRAY_SIZE(inst_fw_cap_sm8250_dec), + .inst_fw_caps_enc =3D inst_fw_cap_sm8250_enc, + .inst_fw_caps_enc_size =3D ARRAY_SIZE(inst_fw_cap_sm8250_enc), + .tz_cp_config_data =3D &tz_cp_config_sm8250, + .hw_response_timeout =3D HW_RESPONSE_TIMEOUT_VALUE, + .num_vpp_pipe =3D 1, + .no_aon =3D true, + .max_session_count =3D 16, + .max_core_mbpf =3D NUM_MBS_8K, + .max_core_mbps =3D ((7680 * 4320) / 256) * 60, + .dec_input_config_params_default =3D + sm8250_vdec_input_config_param_default, + .dec_input_config_params_default_size =3D + ARRAY_SIZE(sm8250_vdec_input_config_param_default), + .enc_input_config_params =3D sm8250_venc_input_config_param, + .enc_input_config_params_size =3D + ARRAY_SIZE(sm8250_venc_input_config_param), + + .dec_ip_int_buf_tbl =3D sm8250_dec_ip_int_buf_tbl, + .dec_ip_int_buf_tbl_size =3D ARRAY_SIZE(sm8250_dec_ip_int_buf_tbl), + .dec_op_int_buf_tbl =3D sm8250_dec_op_int_buf_tbl, + .dec_op_int_buf_tbl_size =3D ARRAY_SIZE(sm8250_dec_op_int_buf_tbl), + + .enc_ip_int_buf_tbl =3D sm8250_enc_ip_int_buf_tbl, + .enc_ip_int_buf_tbl_size =3D ARRAY_SIZE(sm8250_enc_ip_int_buf_tbl), +}; diff --git a/drivers/media/platform/qcom/iris/iris_platform_sc7280.h b/driv= ers/media/platform/qcom/iris/iris_platform_sc7280.h new file mode 100644 index 0000000000000000000000000000000000000000..9e8ade674ff1a8c4e42b1a05a3d= e3097110e5f0d --- /dev/null +++ b/drivers/media/platform/qcom/iris/iris_platform_sc7280.h @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. + */ + + +#ifndef __IRIS_PLATFORM_SC7280_H__ +#define __IRIS_PLATFORM_SC7280_H__ + +static const struct bw_info sc7280_bw_table_dec[] =3D { + { ((3840 * 2160) / 256) * 60, 1896000, }, + { ((3840 * 2160) / 256) * 30, 968000, }, + { ((1920 * 1080) / 256) * 60, 618000, }, + { ((1920 * 1080) / 256) * 30, 318000, }, +}; + +static const char * const sc7280_opp_pd_table[] =3D { "cx" }; + +static const struct platform_clk_data sc7280_clk_table[] =3D { + {IRIS_CTRL_CLK, "core" }, + {IRIS_AXI_CLK, "iface" }, + {IRIS_AHB_CLK, "bus" }, + {IRIS_HW_CLK, "vcodec_core" }, + {IRIS_HW_AHB_CLK, "vcodec_bus" }, +}; + +#endif diff --git a/drivers/media/platform/qcom/iris/iris_probe.c b/drivers/media/= platform/qcom/iris/iris_probe.c index 00e99be16e087c4098f930151fd76cd381d721ce..9bc9b34c2576581635fa8d87eed= 1965657eb3eb3 100644 --- a/drivers/media/platform/qcom/iris/iris_probe.c +++ b/drivers/media/platform/qcom/iris/iris_probe.c @@ -357,6 +357,10 @@ static const struct of_device_id iris_dt_match[] =3D { .data =3D &qcs8300_data, }, #if (!IS_ENABLED(CONFIG_VIDEO_QCOM_VENUS)) + { + .compatible =3D "qcom,sc7280-venus", + .data =3D &sc7280_data, + }, { .compatible =3D "qcom,sm8250-venus", .data =3D &sm8250_data, diff --git a/drivers/media/platform/qcom/iris/iris_resources.c b/drivers/me= dia/platform/qcom/iris/iris_resources.c index cf32f268b703c1c042a9bcf146e444fff4f4990d..164490c49c95ee048670981fdab= 014d20436ef85 100644 --- a/drivers/media/platform/qcom/iris/iris_resources.c +++ b/drivers/media/platform/qcom/iris/iris_resources.c @@ -112,7 +112,7 @@ int iris_prepare_enable_clock(struct iris_core *core, e= num platform_clk_type clk =20 clock =3D iris_get_clk_by_type(core, clk_type); if (!clock) - return -EINVAL; + return -ENOENT; =20 return clk_prepare_enable(clock); } diff --git a/drivers/media/platform/qcom/iris/iris_vpu2.c b/drivers/media/p= latform/qcom/iris/iris_vpu2.c index de7d142316d2dc9ab0c4ad9cc8161c87ac949b4c..9c103a2e4e4eafee101a8a9b168= fdc8ca76e277d 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu2.c +++ b/drivers/media/platform/qcom/iris/iris_vpu2.c @@ -3,9 +3,15 @@ * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights res= erved. */ =20 +#include +#include +#include + #include "iris_instance.h" #include "iris_vpu_common.h" =20 +#include "iris_vpu_register_defines.h" + static u64 iris_vpu2_calc_freq(struct iris_inst *inst, size_t data_size) { struct platform_inst_caps *caps =3D inst->core->iris_platform_data->inst_= caps; diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.c b/drivers/m= edia/platform/qcom/iris/iris_vpu_common.c index bb98950e018fadf69ac4f41b3037f7fd6ac33c5b..1460e1683025e49cfa55d1afbe2= 81e5db5a0d898 100644 --- a/drivers/media/platform/qcom/iris/iris_vpu_common.c +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.c @@ -222,12 +222,14 @@ int iris_vpu_power_off_controller(struct iris_core *c= ore) =20 writel(MSK_SIGNAL_FROM_TENSILICA | MSK_CORE_POWER_ON, core->reg_base + CP= U_CS_X2RPMH); =20 - writel(REQ_POWER_DOWN_PREP, core->reg_base + AON_WRAPPER_MVP_NOC_LPI_CONT= ROL); + if (!core->iris_platform_data->no_aon) { + writel(REQ_POWER_DOWN_PREP, core->reg_base + AON_WRAPPER_MVP_NOC_LPI_CON= TROL); =20 - ret =3D readl_poll_timeout(core->reg_base + AON_WRAPPER_MVP_NOC_LPI_STATU= S, - val, val & BIT(0), 200, 2000); - if (ret) - goto disable_power; + ret =3D readl_poll_timeout(core->reg_base + AON_WRAPPER_MVP_NOC_LPI_STAT= US, + val, val & BIT(0), 200, 2000); + if (ret) + goto disable_power; + } =20 writel(REQ_POWER_DOWN_PREP, core->reg_base + WRAPPER_IRIS_CPU_NOC_LPI_CON= TROL); =20 @@ -250,6 +252,7 @@ int iris_vpu_power_off_controller(struct iris_core *cor= e) writel(0x0, core->reg_base + WRAPPER_TZ_CTL_AXI_CLOCK_CONFIG); =20 disable_power: + iris_disable_unprepare_clock(core, IRIS_AHB_CLK); iris_disable_unprepare_clock(core, IRIS_CTRL_CLK); iris_disable_unprepare_clock(core, IRIS_AXI_CLK); iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_CTRL_PO= WER_DOMAIN]); @@ -261,6 +264,7 @@ void iris_vpu_power_off_hw(struct iris_core *core) { dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER_DOMAIN]= , false); iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWE= R_DOMAIN]); + iris_disable_unprepare_clock(core, IRIS_HW_AHB_CLK); iris_disable_unprepare_clock(core, IRIS_HW_CLK); } =20 @@ -294,11 +298,17 @@ int iris_vpu_power_on_controller(struct iris_core *co= re) =20 ret =3D iris_prepare_enable_clock(core, IRIS_CTRL_CLK); if (ret) - goto err_disable_clock; + goto err_disable_axi_clock; + + ret =3D iris_prepare_enable_clock(core, IRIS_AHB_CLK); + if (ret && ret !=3D -ENOENT) + goto err_disable_ctrl_clock; =20 return 0; =20 -err_disable_clock: +err_disable_ctrl_clock: + iris_disable_unprepare_clock(core, IRIS_CTRL_CLK); +err_disable_axi_clock: iris_disable_unprepare_clock(core, IRIS_AXI_CLK); err_disable_power: iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_CTRL_PO= WER_DOMAIN]); @@ -318,13 +328,19 @@ int iris_vpu_power_on_hw(struct iris_core *core) if (ret) goto err_disable_power; =20 + ret =3D iris_prepare_enable_clock(core, IRIS_HW_AHB_CLK); + if (ret && ret !=3D -ENOENT) + goto err_disable_hw_clock; + ret =3D dev_pm_genpd_set_hwmode(core->pmdomain_tbl->pd_devs[IRIS_HW_POWER= _DOMAIN], true); if (ret) - goto err_disable_clock; + goto err_disable_hw_axi_clock; =20 return 0; =20 -err_disable_clock: +err_disable_hw_axi_clock: + iris_disable_unprepare_clock(core, IRIS_HW_AHB_CLK); +err_disable_hw_clock: iris_disable_unprepare_clock(core, IRIS_HW_CLK); err_disable_power: iris_disable_power_domains(core, core->pmdomain_tbl->pd_devs[IRIS_HW_POWE= R_DOMAIN]); --=20 2.47.3