From nobody Sun Feb 8 17:43:07 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 477FA337BBF; Fri, 17 Oct 2025 18:59:20 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760727562; cv=none; b=tpmAk6oHqxrnNo39RiaRgvZcGHgSEZLdxCL6bIRk1ci4INu/4c9b9QJYjlhNft+2ceS+jsUPxNwa5WMSEa0g8CarAuQ/QE5WEORLJl1oSA5RJY/+eehXTwFFXCq13ODi8t0EI7W9lkuHecV9qTHqfCQ8zHbWPj6Ms2Ar0UmAf2Y= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760727562; c=relaxed/simple; bh=+/EQV6Jmf6Epvazt8JsWQV+UXM/n7rpxjhtimdcLE80=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=dUsgPqYZNHv25HZ+kY1c/6GLctIKERPZK+yIDP+53NUyFSzdXD/ItNETwX9CyYEylloc1ql5PXt4BaCFNG8+F3YU0kn/dIZSrZ6a4iGJ3aGRm1z9DZKLd8uhkRTylg0i82LZTdrYow32Oiv5hCi2rwTq4xpvzEUE8iBicp/R6rU= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 026A81C2B; Fri, 17 Oct 2025 11:59:12 -0700 (PDT) Received: from merodach.members.linode.com (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id CB7A43F66E; Fri, 17 Oct 2025 11:59:14 -0700 (PDT) From: James Morse To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org Cc: James Morse , D Scott Phillips OS , carl@os.amperecomputing.com, lcherian@marvell.com, bobo.shaobowang@huawei.com, tan.shaopeng@fujitsu.com, baolin.wang@linux.alibaba.com, Jamie Iles , Xin Hao , peternewman@google.com, dfustini@baylibre.com, amitsinght@marvell.com, David Hildenbrand , Dave Martin , Koba Ko , Shanker Donthineni , fenghuay@nvidia.com, baisheng.gao@unisoc.com, Jonathan Cameron , Rob Herring , Rohit Mathew , Rafael Wysocki , Len Brown , Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , Greg Kroah-Hartman , Danilo Krummrich , Jeremy Linton , Gavin Shan , Ben Horgan Subject: [PATCH v3 25/29] arm_mpam: Probe for long/lwd mbwu counters Date: Fri, 17 Oct 2025 18:56:41 +0000 Message-Id: <20251017185645.26604-26-james.morse@arm.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20251017185645.26604-1-james.morse@arm.com> References: <20251017185645.26604-1-james.morse@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Rohit Mathew mpam v0.1 and versions above v1.0 support optional long counter for memory bandwidth monitoring. The MPAMF_MBWUMON_IDR register has fields indicating support for long counters. Probe these feature bits. The mpam_feat_msmon_mbwu feature is used to indicate that bandwidth monitors are supported, instead of muddling this with which size of bandwidth monitors, add an explicit 31 bit counter feature. Signed-off-by: Rohit Mathew [ morse: Added 31bit counter feature to simplify later logic ] Signed-off-by: James Morse Reviewed-by: Ben Horgan Tested-by: Fenghua Yu Reviewed-by: Jonathan Cameron --- Changes since v2: * Added 31 bit counter type feature. * Altered commit message. --- drivers/resctrl/mpam_devices.c | 13 +++++++++++-- drivers/resctrl/mpam_internal.h | 3 +++ 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c index deb1dcc6f6b1..f4d07234ce10 100644 --- a/drivers/resctrl/mpam_devices.c +++ b/drivers/resctrl/mpam_devices.c @@ -777,16 +777,25 @@ static void mpam_ris_hw_probe(struct mpam_msc_ris *ri= s) dev_err_once(dev, "Counters are not usable because not-ready timeout w= as not provided by firmware."); } if (FIELD_GET(MPAMF_MSMON_IDR_MSMON_MBWU, msmon_features)) { - bool hw_managed; + bool has_long, hw_managed; u32 mbwumon_idr =3D mpam_read_partsel_reg(msc, MBWUMON_IDR); =20 props->num_mbwu_mon =3D FIELD_GET(MPAMF_MBWUMON_IDR_NUM_MON, mbwumon_id= r); - if (props->num_mbwu_mon) + if (props->num_mbwu_mon) { mpam_set_feature(mpam_feat_msmon_mbwu, props); + mpam_set_feature(mpam_feat_msmon_mbwu_31counter, props); + } =20 if (FIELD_GET(MPAMF_MBWUMON_IDR_HAS_RWBW, mbwumon_idr)) mpam_set_feature(mpam_feat_msmon_mbwu_rwbw, props); =20 + has_long =3D FIELD_GET(MPAMF_MBWUMON_IDR_HAS_LONG, mbwumon_idr); + if (props->num_mbwu_mon && has_long) { + mpam_set_feature(mpam_feat_msmon_mbwu_44counter, props); + if (FIELD_GET(MPAMF_MBWUMON_IDR_LWD, mbwumon_idr)) + mpam_set_feature(mpam_feat_msmon_mbwu_63counter, props); + } + /* Is NRDY hardware managed? */ hw_managed =3D mpam_ris_hw_probe_hw_nrdy(ris, MBWU); if (hw_managed) diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_interna= l.h index 28c475d18d86..ff38b4bbfc2b 100644 --- a/drivers/resctrl/mpam_internal.h +++ b/drivers/resctrl/mpam_internal.h @@ -158,6 +158,9 @@ enum mpam_device_features { mpam_feat_msmon_csu_xcl, mpam_feat_msmon_csu_hw_nrdy, mpam_feat_msmon_mbwu, + mpam_feat_msmon_mbwu_31counter, + mpam_feat_msmon_mbwu_44counter, + mpam_feat_msmon_mbwu_63counter, mpam_feat_msmon_mbwu_capture, mpam_feat_msmon_mbwu_rwbw, mpam_feat_msmon_mbwu_hw_nrdy, --=20 2.39.5