From nobody Sun Feb 8 21:26:55 2026 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id EE431393DD6; Fri, 17 Oct 2025 18:58:47 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760727529; cv=none; b=pq9oJm1XBncafX+vzpW4yzFoKX8zm7WalVtIi+kQSJWe4rrDxQ1ey7EFS0lXaWTT0ikATmHrBUcRLIQa3P+XH0A5FiRFgpVC8S8w05R67jMo5xdVrHAoObVBb4TMR/St1GAPRSdmH/QZWR0dDUNkGu8omm1A30oJ6WUD8rUdQGg= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1760727529; c=relaxed/simple; bh=TRcB3Lgafm0XAFT9OUkVIuk51jzKbPrdeHwYUl0eqKg=; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References: MIME-Version; b=qfymVOvSop/ZIJpbtzFHlutD9zjuWLg9rw/+9iWsDrBlgL4txNfRIfkVYReHUKJ/gFMYy8HvvdSo0cFzGQFCGy9RBDjVluHJE/gA+i/vvYqCb67+DkL1Rb1geoCEqiHk2v3q0BN+ht7fD910+OuRBdQ3SU2/9UMJ2F1U8tD+tNM= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6FE3D1515; Fri, 17 Oct 2025 11:58:39 -0700 (PDT) Received: from merodach.members.linode.com (usa-sjc-mx-foss1.foss.arm.com [172.31.20.19]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 4831E3F66E; Fri, 17 Oct 2025 11:58:42 -0700 (PDT) From: James Morse To: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org Cc: James Morse , D Scott Phillips OS , carl@os.amperecomputing.com, lcherian@marvell.com, bobo.shaobowang@huawei.com, tan.shaopeng@fujitsu.com, baolin.wang@linux.alibaba.com, Jamie Iles , Xin Hao , peternewman@google.com, dfustini@baylibre.com, amitsinght@marvell.com, David Hildenbrand , Dave Martin , Koba Ko , Shanker Donthineni , fenghuay@nvidia.com, baisheng.gao@unisoc.com, Jonathan Cameron , Rob Herring , Rohit Mathew , Rafael Wysocki , Len Brown , Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , Greg Kroah-Hartman , Danilo Krummrich , Jeremy Linton , Gavin Shan , Ben Horgan Subject: [PATCH v3 19/29] arm_mpam: Use a static key to indicate when mpam is enabled Date: Fri, 17 Oct 2025 18:56:35 +0000 Message-Id: <20251017185645.26604-20-james.morse@arm.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20251017185645.26604-1-james.morse@arm.com> References: <20251017185645.26604-1-james.morse@arm.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Once all the MSC have been probed, the system wide usable number of PARTID is known and the configuration arrays can be allocated. After this point, checking all the MSC have been probed is pointless, and the cpuhp callbacks should restore the configuration, instead of just resetting the MSC. Add a static key to enable this behaviour. This will also allow MPAM to be disabled in response to an error, and the architecture code to enable/disable the context switch of the MPAM system registers. Signed-off-by: James Morse Reviewed-by: Jonathan Cameron Reviewed-by: Ben Horgan Reviewed-by: Fenghua Yu Tested-by: Fenghua Yu --- Changes since v2: * Removed the word 'TODO'. * Fixed a typo in the commit message. --- drivers/resctrl/mpam_devices.c | 12 ++++++++++++ drivers/resctrl/mpam_internal.h | 9 +++++++++ 2 files changed, 21 insertions(+) diff --git a/drivers/resctrl/mpam_devices.c b/drivers/resctrl/mpam_devices.c index f18a22f825a0..ab37ed1fb5de 100644 --- a/drivers/resctrl/mpam_devices.c +++ b/drivers/resctrl/mpam_devices.c @@ -29,6 +29,8 @@ =20 #include "mpam_internal.h" =20 +DEFINE_STATIC_KEY_FALSE(mpam_enabled); /* This moves to arch code */ + /* * mpam_list_lock protects the SRCU lists when writing. Once the * mpam_enabled key is enabled these lists are read-only, @@ -929,6 +931,9 @@ static int mpam_discovery_cpu_online(unsigned int cpu) struct mpam_msc *msc; bool new_device_probed =3D false; =20 + if (mpam_is_enabled()) + return 0; + guard(srcu)(&mpam_srcu); list_for_each_entry_srcu(msc, &mpam_all_msc, all_msc_list, srcu_read_lock_held(&mpam_srcu)) { @@ -1459,6 +1464,10 @@ static irqreturn_t __mpam_irq_handler(int irq, struc= t mpam_msc *msc) /* Disable this interrupt. */ mpam_disable_msc_ecr(msc); =20 + /* Are we racing with the thread disabling MPAM? */ + if (!mpam_is_enabled()) + return IRQ_HANDLED; + /* * Schedule the teardown work. Don't use a threaded IRQ as we can't * unregister the interrupt from the threaded part of the handler. @@ -1593,6 +1602,7 @@ static void mpam_enable_once(void) return; } =20 + static_branch_enable(&mpam_enabled); mpam_register_cpuhp_callbacks(mpam_cpu_online, mpam_cpu_offline, "mpam:online"); =20 @@ -1660,6 +1670,8 @@ void mpam_disable(struct work_struct *ignored) } mutex_unlock(&mpam_cpuhp_state_lock); =20 + static_branch_disable(&mpam_enabled); + mpam_unregister_irqs(); =20 idx =3D srcu_read_lock(&mpam_srcu); diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_interna= l.h index a04b09abd814..d492df9a1735 100644 --- a/drivers/resctrl/mpam_internal.h +++ b/drivers/resctrl/mpam_internal.h @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -19,8 +20,16 @@ =20 #define MPAM_MSC_MAX_NUM_RIS 16 =20 + struct platform_device; =20 +DECLARE_STATIC_KEY_FALSE(mpam_enabled); + +static inline bool mpam_is_enabled(void) +{ + return static_branch_likely(&mpam_enabled); +} + /* * Structures protected by SRCU may not be freed for a surprising amount of * time (especially if perf is running). To ensure the MPAM error interrup= t can --=20 2.39.5